PI6C4931504-04

PI6C4931504-04
High Performance HCSL Fanout Buffer
Features
Description
ÎÎ4 HCSL outputs
The PI6C4931504-04 is a high performance fanout buffer device
which supports up to 250MHz frequency. This device is ideal
for systems that need to distribute low jitter clock signals to
multiple destinations.
ÎÎUp to 250MHz output frequency
ÎÎUltra low additive phase jitter: < 0.1 ps (typ)
ÎÎTwo selectable inputs
ÎÎLow delay from input to output (Tpd typ. 1.5ns)
Applications
ÎÎ2.5V / 3.3V power supply
ÎÎNetworking systems including switches and Routers
ÎÎIndustrial temperature support
ÎÎHigh frequency backplane based computing and telecom
ÎÎTSSOP-20 package
platforms
Pin Configuration (20-Pin TSSOP)
Block Diagram
CLK_EN
Pullup
D
LE
CLK0
nCLK0
Pulldown
CLK1
Pulldown
CLK_SEL
Pullup/ Pulldown
Pulldown
Iref
12-0251
Q
Q0
nQ0
0
1
Q1
nQ1
Q2
nQ2
Q3
nQ3
GND
1
20
Q0
CLK_EN
2
19
nQ0
CLK_SEL
3
18
VDD
Q1
CLK0
4
17
nCLK0
5
16
nQ1
CLK1
6
15
Q2
NC
7
14
nQ2
NC
8
13
VDD
IREF
9
12
Q3
10
11
nQ3
VDD
1
PI6C4931504-04
Rev A
08/14/2012
PI6C4931504-04
High Performance HCSL Fanout Buffer
Pinout Table
Pin #
Pin Name
1
GND
Power
Ground
2
CLK_EN
Input
Clock output enable/ disable
3
CLK_SEL
Input
Clock input source selection pin
Input
Clock input
CLK0
4, 5
nCLK0
Type
Description
6
CLK1
Input
Clock input
7, 8
NC
-
No connect
9
IREF
Power
External resistor connection to set differential output current
10, 13, 18
VDD
Power
Power supply
Output
HCSL output clock
Output
HCSL output clock
Output
HCSL output clock
Output
HCSL output clock
nQ3
11, 12
Q3
nQ2
14, 15
Q2
nQ1
16, 17
Q1
nQ0
19, 20
Q0
Function Table
Table 1: Input select function
CLK_SEL
Function
0
CLK0, nCLK0
1
CLK1
Table 2: Output Enable function
CLK_EN
Outputs
Q0:Q4
nQ0:nQ4
0
Disabled; LOW
Disabled; HIGH
1
Enabled
Enabled
12-0251
2
PI6C4931504-04
Rev A
08/14/2012
PI6C4931504-04
High Performance HCSL Fanout Buffer
Maximum Ratings (Above which the useful life may be impaired. For user guidelines, not tested)
Note:
Storage temperature....................................................-55 to +150ºC
Stresses greater than those listed under MAXIMUM
RATINGS may cause permanent damage to the device. This
is a stress rating only and functional operation of the device
at these or any other conditions above those indicated in
the operational sections of this specification is not implied.
Exposure to absolute maximum rating conditions for
extended periods may affect reliability.
Supply Voltage to Ground Potential (VDD).............. -0.5 to +4.6V
Inputs (Referenced to GND).............................. -0.5 to VDD+0.5V
Clock Output (Referenced to GND)................. -0.5 to VDD+0.5V
Soldering Temperature (Max of 10 seconds).....................+260ºC
Power Supply Characteristics and Operating Conditions
Symbol
Parameter
VDD
Core Supply Voltage
IDD
Power Supply Current
TA
Ambient Operating Temperature
Test Condition
Min.
Typ.
Max.
Units
2.97
3.63
V
2.375
2.625
V
VDD = 3.3V, Unloaded
70
VDD = 2.5V, Unloaded
70
-40
mA
85
°C
DC Electrical Specifications - Differential Inputs
Symbol
Parameter
IIH
Input High current: CLK0, nCLK0
IIL
Min.
Typ.
Input = VDD
Max.
Units
200
uA
Input Low current: nCLK0
-200
uA
Input Low current: CLK0
-10
uA
CIN
Input capacitance
VIH
Input high voltage
VIL
Input low voltage
-0.3
VID
Input Differential Amplitude PK-PK
150
1300
mV
VCM
Common model input voltage
GND + 0.5
VDD -0.85
V
12-0251
4
PF
VDD+0.3
3
V
V
PI6C4931504-04
Rev A
08/14/2012
PI6C4931504-04
High Performance HCSL Fanout Buffer
DC Electrical Specifications - LVCMOS Inputs
Symbol
Parameter
Conditions
Min.
Typ.
CLK1, CLK_SEL
IIH
Input High current
Max.
Units
200
uA
20
uA
Input = VDD
CLK_EN
CLK1, CLK_SEL
-10
uA
-200
uA
IIL
Input Low current
Input = GND
VIH
Input high voltage
VDD =3.3V
2.0
3.765
V
VIL
Input low voltage
VDD =3.3V
-0.3
0.8
V
VIH
Input high voltage
VDD =2.5V
1.7
2.8
V
VIL
Input low voltage
VDD =2.5V
-0.3
0.7
V
CLK_EN
DC Electrical Specifications – HCSL Outputs
Parameter
Description
Conditions
Min.
Typ.
VOH
Output High voltage
VDD =3.3V
520
800
VOL
Output Low voltage
VDD =3.3V
12-0251
0
4
PI6C4931504-04
Max.
Units
mV
150
Rev A
mV
08/14/2012
PI6C4931504-04
High Performance HCSL Fanout Buffer
AC Electrical Specifications – Differential Outputs
Parameter
Description
Conditions
Min.
Typ.
Max.
Units
fOUT
Output frequency
250
MHz
Tr
Output rise time
From 20% to 80%
175
700
ps
Tf
Output fall time
From 80% to 20%
175
700
ps
TODC
Output duty cycle
48
52
%
Tj
Buffer additive jitter RMS
VMAX
Absolute Maximum Output Voltage
VMIN
Absolute Minimum Output Voltage
VCROSS
Absolute crossing voltage
HCSL
DVCROSS
Total variation of crossing voltage
HCSL
TSK
Output Skew
40
TPD
Propagation Delay
1500
TP2P Skew
Part to Part Skew1
0.1
ps
1150
-300
mV
mV
250
550
mV
140
mV
100
ps
ps
600
ps
Notes:
1. This parameter is guaranteed by design
Configuration test load board termination for HCSL Outputs
Rs
33Ω
5%
PI6C4931504-04
Clock
TLA
Rs
33Ω
5%
Clock#
TLB
475Ω
1%
12-0251
Rp
49.9Ω
1%
2pF
5%
Rp
49.9Ω
1%
5
2pF
5%
PI6C4931504-04
Rev A
08/14/2012
PI6C4931504-04
High Performance HCSL Fanout Buffer
DATE: 05/03/12
DESCRIPTION: 20-pin, 173mil Wide TSSOP
Notes:
1. Refer JEDEC MO-153F/AC
2. Controlling dimensions in millimeters
3. Package outline exclusive of mold flash and metal burr
PACKAGE CODE: L
DOCUMENT CONTROL #: PD-1311
REVISION: F
12-0373
Note:
• For latest package info, please check: http://www.pericom.com/products/packaging/mechanicals.php
Ordering Information(1-3)
Ordering Code
Package Code
PI6C4931504-04LIE
L
Package Description
20-pin, Pb-free & Green, TSSOP, (L20)
Notes:
1. Thermal characteristics can be found on the company web site at www.pericom.com/packaging/
2. E = Pb-free and Green
3. Adding an X suffix = Tape/Reel
12-0251
6
PI6C4931504-04
Rev A
08/14/2012