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DATA SHEET MOS FIELD EFFECT TRANSISTOR µ PA1764 SWITCHING DUAL N-CHANNEL POWER MOS FET INDUSTRIAL USE DESCRIPTION PACKAGE DRAWING (Unit : mm) The µ PA1764 is N-Channel MOS Field Effect Transistor designed for high current switching applications. 8 5 1 : Source 1 2 : Gate 1 7, 8 : Drain 1 FEATURES • Dual chip type • Low on-state resistance RDS(on)1 = 27 mΩ TYP. (VGS = 10 V, I D = 3.5 A) RDS(on)2 = 32 mΩ TYP. (VGS = 4.5 V, I D = 3.5 A) RDS(on)3 = 34 mΩ TYP. (VGS = 4.0 V, I D = 3.5 A) • Low input capacitance Ciss = 1300 pF TYP. • Built-in G-S protection diode • Small and surface mount package (Power SOP8) 3 : Source 2 4 : Gate 2 5, 6 : Drain 2 6.0 ±0.3 4 4.4 5.37 MAX. 0.8 0.05 MIN. 0.15 +0.10 –0.05 1.8 MAX. 1.44 1 0.5 ±0.2 0.10 1.27 0.78 MAX. 0.40 +0.10 –0.05 0.12 M ORDERING INFORMATION PART NUMBER PACKAGE µPA1764G Power SOP8 ABSOLUTE MAXIMUM RATINGS (T A = 25°C, All terminals are connected.) Drain to Source Voltage (VGS = 0 V) VDSS 60 V Gate to Source Voltage (VDS = 0 V) VGSS ±20 V Drain Current (DC) (TC = 25°C) ID(DC) ±7 A ID(pulse) ±28 A Total Power Dissipation (1 unit) Note2 PT 1.7 W Note2 PT 2.0 W Tch 150 °C Drain Current (pulse) Note1 Total Power Dissipation (2 unit) Channel Temperature Storage Temperature Tstg –55 to + 150 °C Single Avalanche Current Note3 IAS 7 A Single Avalanche Energy Note3 EAS 98 mJ Notes 1. 2. 3. Remark EQUIVALENT CIRCUIT (1/2 Circuit) Drain Body Diode Gate Gate Protection Diode Source PW ≤ 10 µs, Duty cycle ≤ 1% 2 TA = 25°C, Mounted on ceramic substrate of 1200 mm x 2.2 mm Starting Tch = 25°C, VDD = 30 V, RG = 25 Ω, VGS = 20 → 0 V The diode connected between the gate and source of the transistor serves as a protector against ESD. When this device actually used, an additional protection circuit is externally required if a voltage exceeding the rated voltage may be applied to this device. The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version. Not all devices/types available in every country. Please check with local NEC representative for availability and additional information. Document No. G14329EJ2V0DS00 (2nd edition) Date Published May 2001 NS CP(K) Printed in Japan The mark ★ shows major revised points. © 1999, 2001 µPA1764 ELECTRICAL CHARACTERISTICS (T A = 25°C, All terminals are connected.) CHARACTERISTICS SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT Zero Gate Voltage Drain Current IDSS VDS = 60 V, VGS = 0 V 10 µA Gate Leakage Current IGSS VGS = ±20 V, VDS = 0 V ±10 µA Gate Cut-off Voltage VGS(off) VDS = 10 V, ID = 1 mA 1.5 2.0 2.5 V | yfs | VDS = 10 V, ID = 3.5 A 5.0 9.0 RDS(on)1 VGS = 10 V, ID = 3.5 A 27 35 mΩ RDS(on)2 VGS = 4.5 V, ID = 3.5 A 32 42 mΩ RDS(on)3 VGS = 4.0 V, ID = 3.5 A 34 46 mΩ Forward Transfer Admittance Drain to Source On-state Resistance S Input Capacitance Ciss VDS = 10 V 1300 pF Output Capacitance Coss VGS = 0 V 230 pF Reverse Transfer Capacitance Crss f = 1 MHz 110 pF Turn-on Delay Time td(on) VDD = 30 V, ID = 3.5 A 15 ns tr VGS = 10 V 69 ns td(off) RG = 10 Ω 65 ns 27 ns Rise Time Turn-off Delay Time Fall Time tf Total Gate Charge QG VDD = 48 V 29 nC Gate to Source Charge QGS VGS = 10 V 3.6 nC Gate to Drain Charge QGD ID = 7.0 A 7.4 nC VF(S-D) IF = 7.0 A, VGS = 0 V 0.84 V Reverse Recovery Time trr IF = 7.0 A, VGS = 0 V 40 ns Reverse Recovery Charge Qrr di/dt = 100 A/µs 66 nC Body Diode Forward Voltage TEST CIRCUIT 1 AVALANCHE CAPABILITY TEST CIRCUIT 2 SWITCHING TIME D.U.T. RG = 25 Ω D.U.T. L RL PG. 50 Ω VDD VGS = 20 → 0 V RG PG. VGS VGS Wave Form 0 VDD 90% ID IAS ID VGS 0 ID Starting Tch τ = 1 µs Duty Cycle ≤ 1% TEST CIRCUIT 3 GATE CHARGE D.U.T. 2 IG = 2 mA RL 50 Ω VDD 10% 0 10% Wave Form τ VDD PG. 90% BVDSS VDS ID 90% 10% Data Sheet G14329EJ2V0DS tr td(off) td(on) ton tf toff µPA1764 TYPICAL CHARACTERISTICS (T A = 25°C, All terminals are connected.) TOTAL POWER DISSIPATION vs. AMBIENT TEMPERATURE PT - Total Power Dissipation - W/package dT - Percentage of Rated Power - % DERATING FACTOR OF FORWARD BIAS SAFE OPERATING AREA 100 80 60 40 20 0 20 40 60 80 100 120 140 160 2.8 Mounted on ceramic substrate 2of 1200 mm × 2.2 mm 2.4 2.0 2 unit 1 unit 1.6 1.2 0.8 0.4 0 TA - Ambient Temperature - ˚C ★ 20 40 60 80 100 120 140 160 TA - Ambient Temperature - ˚C FORWARD BIAS SAFE OPERATING AREA 100 d ite ) Lim 10 V = S RD VGS ID(DC) (at PW ID - Drain Current - A ) (on 10 1m 10 =1 00 µs ms 10 0m DC Po we 1 s s rD iss ipa tio nL Remark im 0.01 0.1 ite d 0.1 Mounted on ceramic substrate of 2 1200 mm × 2.2 mm TA = 25˚C Single Pulse 1 10 100 VDS - Drain to Source Voltage - V rth(t) - Transient Thermal Resistance - ˚C/W TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH 1000 100 Rth(ch-A) = 73.5˚C/W 10 1.0 0.1 100 µ Mounted on ceramic substrate of 1200 mm2 × 2.2 mm Single pulse, 1 unit TA = 25˚C 1m 10 m 100 m 1 10 100 1000 PW - Pulse Width - s Data Sheet G14329EJ2V0DS 3 µPA1764 DRAIN CURRENT vs. DRAIN TO SOURCE VOLTAGE FORWARD TRANSFER CHARACTERISTICS 100 35 Pulsed VDS = 10 V Pulsed 10 ID - Drain Current - A ID - Drain Current - A 30 TA = 150˚C TA = 75˚C TA = 25˚C 1 TA = −25˚C 0.1 25 VGS = 10 V 20 15 VGS = 4.5 V 10 VGS = 4.0 V 5 0.01 1 2 3 4 5 0 0 6 0.2 VGS - Gate to Source Voltage - V 10 TA = 25˚C 1 TA = 75˚C TA = 150˚C 0.1 0.01 0.01 0.1 1 10 100 RDS(on) - Drain to Source On-state Resistance - mΩ ID - Drain Current - A 4 RDS(on) - Drain to Source On-state Resistance - mΩ VDS = 10 V Pulsed TA = −25˚C 100 Pulsed 80 70 VGS = 4.0 V 50 VGS = 4.5 V 40 30 20 VGS = 10 V 10 0 0.1 1 10 0.8 1.0 1.2 1.4 1.6 80 60 40 ID = 7 A 20 0 0 5 10 15 VGS - Gate to Source Voltage - V GATE TO SOURCE CUT-OFF VOLTAGE vs. CHANNEL TEMPERATURE 90 60 0.6 DRAIN TO SOURCE ON-STATE RESISTANCE vs. GATE TO SOURCE VOLTAGE 100 Pulsed DRAIN TO SOURCE ON-STATE RESISTANCE vs. DRAIN CURRENT 100 VGS(off) - Gate to Source Cut-off Voltage - V |yfs| - Forward Transfer Admittance - S FORWARD TRANSFER ADMITTANCE vs. DRAIN CURRENT 100 0.4 VDS - Drain to Source Voltage - V 3 VDS = 10 V ID = 1 mA 2.5 2 1.5 1 0.5 0 ID - Drain Current - A − 50 0 50 100 Tch - Channel Temperature - ˚C Data Sheet G14329EJ2V0DS 150 SOURCE TO DRAIN DIODE FORWARD VOLTAGE DRAIN TO SOURCE ON-STATE RESISTANCE vs. CHANNEL TEMPERATURE 100 Pulsed VGS = 4.0 V VGS = 4.5 V VGS = 10 V 60 40 20 0 ID = 3.5 A − 50 0 50 100 Pulsed 10 VGS = 0 V VGS = 4.5 V 1 0.1 0.01 150 0 Tch - Channel Temperature - ˚C CAPACITANCE vs. DRAIN TO SOURCE VOLTAGE 1000 Coss Crss 1 100 td(off) 100 tf td(on) 10 VDS = 30 V VGS = 10 V RG = 10 Ω 1 0.1 1 10 100 ID - Drain Current - A REVERSE RECOVERY TIME vs. DRAIN CURRENT DYNAMIC INPUT/OUTPUT CHARACTERISTICS di/dt = 100 A/µs VGS = 0 V 100 10 1 0.1 tr VDS - Drain to Source Voltage - V 1000 trr - Reverse Recovery Time - ns 10 td(on), tr, td(off), tf - Switching Time - ns Ciss 1 0.1 1.5 SWITCHING CHARACTERISTICS VGS = 0 V f = 1 MHz 100 1.0 1000 1 10 100 VDS - Drain to Source Voltage - V Ciss, Coss, Crss - Capacitance - pF 10000 0.5 VSD - Source to Drain Voltage - V 12 60 50 VDD = 48 V 30 V 12 V 40 10 VGS 8 30 6 20 4 10 0 0 2 VDS ID = 7 A 8 16 24 32 40 VGS - Gate to Source Voltage - V 80 100 IF - Diode Forward Current - A RDS(on) - Drain to Source On-state Resistance - mΩ µPA1764 0 QG - Gate Charge - nC ID - Drain Current - A Data Sheet G14329EJ2V0DS 5 µPA1764 SINGLE AVALANCHE ENERGY DERATING FACTOR SINGLE AVALANCHE CURRENT vs. INDUCTIVE LOAD 120 10 IAS = 7 A EAS =9 8m J 1 0.1 10 RG = 25 Ω VDD = 30 V VGS = 20 0V Starting Tch = 25˚C 100 1m 10 m Energy Derating Factor - % IAS - Single Avalanche Current - A 100 100 0V 80 60 40 20 0 25 50 75 100 125 150 Starting Tch - Starting Channel Temperature - ˚C L - Inductive Load - H 6 RG = 25 Ω VDD = 30 V VGS = 20 IAS 7 A Data Sheet G14329EJ2V0DS µPA1764 [MEMO] Data Sheet G14329EJ2V0DS 7 µPA1764 • The information in this document is current as of May, 2001. The information is subject to change without notice. For actual design-in, refer to the latest publications of NEC's data sheets or data books, etc., for the most up-to-date specifications of NEC semiconductor products. Not all products and/or types are available in every country. Please check with an NEC sales representative for availability and additional information. • No part of this document may be copied or reproduced in any form or by any means without prior written consent of NEC. NEC assumes no responsibility for any errors that may appear in this document. • NEC does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from the use of NEC semiconductor products listed in this document or any other liability arising from the use of such products. No license, express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of NEC or others. • Descriptions of circuits, software and other related information in this document are provided for illustrative purposes in semiconductor product operation and application examples. The incorporation of these circuits, software and information in the design of customer's equipment shall be done under the full responsibility of customer. NEC assumes no responsibility for any losses incurred by customers or third parties arising from the use of these circuits, software and information. • While NEC endeavours to enhance the quality, reliability and safety of NEC semiconductor products, customers agree and acknowledge that the possibility of defects thereof cannot be eliminated entirely. To minimize risks of damage to property or injury (including death) to persons arising from defects in NEC semiconductor products, customers must incorporate sufficient safety measures in their design, such as redundancy, fire-containment, and anti-failure features. • NEC semiconductor products are classified into the following three quality grades: "Standard", "Special" and "Specific". The "Specific" quality grade applies only to semiconductor products developed based on a customer-designated "quality assurance program" for a specific application. The recommended applications of a semiconductor product depend on its quality grade, as indicated below. Customers must check the quality grade of each semiconductor product before using it in a particular application. "Standard": Computers, office equipment, communications equipment, test and measurement equipment, audio and visual equipment, home electronic appliances, machine tools, personal electronic equipment and industrial robots "Special": Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment and medical equipment (not specifically designed for life support) "Specific": Aircraft, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems and medical equipment for life support, etc. The quality grade of NEC semiconductor products is "Standard" unless otherwise expressly specified in NEC's data sheets or data books, etc. If customers wish to use NEC semiconductor products in applications not intended by NEC, they must contact an NEC sales representative in advance to determine NEC's willingness to support a given application. (Note) (1) "NEC" as used in this statement means NEC Corporation and also includes its majority-owned subsidiaries. (2) "NEC semiconductor products" means any semiconductor product developed or manufactured by or for NEC (as defined above). M8E 00. 4