Power-Off Protection ±5 V, +12 V, Quad SPST Switches with 5 Ω On Resistance ADG4612/ADG4613 Power-off protection Switch guaranteed off with no power supplies present Inputs are high impedance with no power Switch turns off when input > VDD + VT Overvoltage protection up to 16 V PSS robust Negative signal capability passes signals down to −5.5 V 6.1 Ω maximum on resistance 1.4 Ω on-resistance flatness ±3 V to ±5.5 V dual supply 3 V to 12 V single supply 3 V logic compatible inputs Rail-to-rail operation 16-lead TSSOP and 16-lead 3 mm × 3 mm LFCSP APPLICATIONS Hot swap applications Data acquisition systems Battery-powered systems Automatic test equipment Communication systems Relay replacement FUNCTIONAL BLOCK DIAGRAM S1 S1 IN1 IN1 D1 D1 S2 S2 IN2 IN2 ADG4612 D2 ADG4613 S3 D2 S3 IN3 IN3 D3 D3 S4 S4 IN4 IN4 D4 D4 SWITCHES SHOWN FOR A LOGIC 1 INPUT. 09005-001 FEATURES Figure 1. The low on resistance of these switches make them ideal solutions for data acquisition and gain switching applications where low on resistance and distortion is critical. The onresistance profile is very flat over the full analog input range ensuring excellent linearity and low distortion when switching audio signals. PRODUCT HIGHLIGHTS 1. Power-Off Protection On Both S and D Pins. GENERAL DESCRIPTION 2. PSS Robustness. The ADG4612/ADG4613 contain four independent singlepole/single-throw (SPST) switches. The ADG4612 switches are turned on with Logic 1 on the appropriate control input. The ADG4613 has two switches with digital control logic similar to that of the ADG4612; the logic is inverted on the other two switches. Each switch conducts equally well in both directions when on, and each switch has an input signal range that extends to the supplies. The ADG4613 exhibits break-before-make switching action for use in multiplexer applications. 3. Overvoltage Protection up to 16 V. 4. 5.2 Ω On Resistance. 5. 16-Lead TSSOP and 3 mm × 3 mm LFCSP Packages. When no power supplies are present, the switch remains in the off condition, and the switch inputs are high impedance inputs, ensuring that no current flows, which can damage the switch or downstream circuitry. This is very useful in applications where analog signals may be present at the switch inputs before power is applied or where the user has no control over the power supply sequence. In the off condition, signal levels up to 16 V are blocked. Also, when the analog input signal levels exceed VDD by VT, the switch turns off. Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2010 Analog Devices, Inc. All rights reserved. ADG4612/ADG4613 TABLE OF CONTENTS Features .............................................................................................. 1 Thermal Resistance .......................................................................9 Applications....................................................................................... 1 ESD Caution...................................................................................9 General Description ......................................................................... 1 Pin Configurations and Function Descriptions ......................... 10 Functional Block Diagram .............................................................. 1 Typical Performance Characteristics ........................................... 11 Product Highlights ........................................................................... 1 Test Circuits..................................................................................... 14 Specifications..................................................................................... 3 Terminology .................................................................................... 16 5 V Dual Supply............................................................................ 3 Theory of Operation ...................................................................... 17 12 V Single Supply........................................................................ 5 Bipolar Operation and Single-Supply Operation................... 18 5 V Single Supply.......................................................................... 7 Applications Information .............................................................. 19 Continuous Current Per Channel, Sx or Dx............................. 8 Outline Dimensions ....................................................................... 21 Power Supply Operation.............................................................. 8 Ordering Guide .......................................................................... 22 Absolute Maximum Ratings............................................................ 9 REVISION HISTORY 10/10—Revision 0: Initial Version Rev. 0 | Page 2 of 24 ADG4612/ADG4613 SPECIFICATIONS 5 V DUAL SUPPLY VDD = +5 V ± 10%, VSS = −5 V ± 10%, GND = 0 V, unless otherwise noted. Table 1. Parameter ANALOG SWITCH Analog Signal Range (Normal Mode) On Resistance (RON) On-Resistance Match Between Channels (∆RON) On-Resistance Flatness (RFLAT (ON)) LEAKAGE CURRENTS (NORMAL MODE) Source Off Leakage, IS (Off ) Drain Off Leakage, ID (Off ) Channel On Leakage, ID (On), IS (On) LEAKAGE CURRENTS (ISOLATION MODE) Source Off Leakage, IS (Off ) Drain Off Leakage, ID (Off ) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current, IINL Input Current, IINH Logic Pull-Down Resistance, RPD Digital Input Capacitance, CIN DYNAMIC CHARACTERISTICS1 tON tOFF 25°C 5.2 6.1 0.05 0.15 1.4 1.75 −40°C to +85°C Unit Test Conditions/Comments −5.5 V to VDD V Ω typ Ω max Ω typ VDD to VSS = 16 V maximum VS = ±4.5 V, IS = −10 mA; see Figure 22 VDD = +4.5 V, VSS = −4.5 V VS = ±4.5 V, IS = −10 mA Ω max Ω typ Ω max VS = ±4.5 V, IS = −10 mA 7.6 0.18 2.2 ±5 ±10 ±5 ±10 ±10 ±16 nA typ ±300 ±700 nA max nA typ nA max nA typ nA max ±0.03 ±0.1 ±2.5 μA typ μA max ±8 ±22 ±30 μA typ μAmax ±0.03 ±0.1 ±2.5 μA typ μA max ±8 ±22 ±30 μA typ μA max ±300 2.0 0.8 ±0.015 ±0.1 ±13 ±16 400 4 73 125 100 125 ±0.15 ±18 149 149 Rev. 0 | Page 3 of 24 V min V max μA typ μA max μA typ μA max kΩ typ pF typ ns typ ns max ns typ ns max VDD = +5.5 V, VSS = −5.5 V VS = ±4.5 V, VD = ט4.5 V; see Figure 23 VS = ±4.5 V, VD = ט4.5 V; see Figure 23 VS = VD = ±4.5 V; see Figure 24 VDD = 0 V or floating, VSS = 0 V or floating, GND = 0 V VS = −5.5 V, VD = +10.5 V; or VS = +10.5 V, VD = −5.5 V; see Figure 23 VDD = +5.5 V, VSS = −5.5 V or 0 V VS = −5.5 V, VD = +10.5 V; or VS = +10.5 V, VD = −5.5 V; see Figure 23 VDD = 0 V or floating, VSS = 0 V or floating, GND = 0 V VS = −5.5 V, VD = +10.5 V; or VS = +10.5 V, VD = −5.5 V; see Figure 23 VDD = +5.5 V, VSS = −5.5 V or 0 V VS = −5.5 V, VD = +10.5 V; or VS = +10.5 V, VD = −5.5 V; see Figure 23 VIN = VGND VIN = VDD RL = 300 Ω, CL = 35 pF VS = 3 V; see Figure 25 RL = 300 Ω, CL = 35 pF VS = 3 V; see Figure 25 ADG4612/ADG4613 Parameter Break-Before-Make Time Delay, tD (ADG4613 Only) Fault Response Time Fault Recovery Time Threshold Voltage, VT Charge Injection Off Isolation Channel-to-Channel Crosstalk Total Harmonic Distortion + Noise, THD + N Insertion Loss −3 dB Bandwidth CS (Off ) CD (Off ) CD (On), CS (On) POWER REQUIREMENTS Normal Mode IDD ISS Isolation Mode IDD ISS 1 25°C 20 −40°C to +85°C 295 1.2 1.8 225 −54 −71 0.13 Unit ns typ ns min ns typ μs typ V typ pC typ dB typ dB typ % typ −0.5 293 13 13 50 dB typ MHz typ pF typ pF typ pF typ 90 140 27 50 58 μA typ μA max μA typ μA max 90 140 165 μA typ μA max 0.1 0.2 6 μA typ μA max 3 165 Guaranteed by design; not subject to production test. Rev. 0 | Page 4 of 24 Test Conditions/Comments RL = 50 Ω, CL = 35 pF VS1 = VS2 = 3 V; see Figure 26 VS = 2 V to 8 V, RL = 300 Ω, CL = 35 pF VS = 2 V to 8 V, RL = 300 Ω, CL = 35 pF VS = 0 V, RS = 0 Ω, CL = 1 nF; see Figure 27 RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 28 RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 29 RL = 110 Ω, 6 V p-p, f = 20 Hz to 20 kHz; see Figure 31 RL = 50 Ω, CL = 5 pF; f = 1 MHz; see Figure 30 RL = 50 Ω, CL = 5 pF; see Figure 30 VS = 0 V, f = 1 MHz VS = 0 V, f = 1 MHz VS = 0 V, f = 1 MHz Digital inputs = 0 V or VDD VDD = +5.5 V, VSS = −5.5 V VDD = +5.5 V, VSS = −5.5 V VDD = +5.5 V, VSS = −5.5 V or floating Digital inputs = 0 V or 5.5 V VS = −5.5 V or +10.5 V VDD = 0 V or floating, VSS = −5.5 V Digital inputs = 0 V or 5.5 V VS = −5.5 V or +10.5 V ADG4612/ADG4613 12 V SINGLE SUPPLY VDD = 12 V ± 10%, VSS = 0 V, GND = 0 V, unless otherwise noted. Table 2. Parameter ANALOG SWITCH Analog Signal Range On-Resistance (RON) On-Resistance Match Between Channels (∆RON) On-Resistance Flatness (RFLAT (ON)) LEAKAGE CURRENTS Normal Mode Source Off Leakage, IS (Off ) Drain Off Leakage, ID (Off ) Channel On Leakage, ID (On), IS (On) Isolation Mode Source Off Leakage, IS (Off ) Drain Off Leakage, ID (Off ) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current, IINL Input Current, IINH Input Current, IINH Logic Pull-Down Resistance, RPD Digital Input Capacitance, CIN DYNAMIC CHARACTERISTICS 1 tON tOFF 25°C 4.5 5.1 0.05 0.15 1 1.25 ±3 ±10 ±3 ±10 ±7 ±11 −40°C to +85°C Unit Test Conditions/Comments −5.5 V to VDD V Ω typ Ω max Ω typ VDD to VSS = 16 V maximum VS = 0 V to +10 V, IS = −10 mA; see Figure 22 VDD = 10.8 V, VSS = 0 V VS = 0 V to +10 V, IS = −10 mA Ω max Ω typ Ω max VS = 0 V to +10 V, IS = −10 mA 6.4 0.18 1.6 ±200 ±200 ±300 ±0.05 nA typ nA max nA typ nA max nA typ nA max μA typ ±0.3 ±10 ±3 μA max μA typ ±28 ±0.05 ±38 μA max μA typ ±0.3 ±10 ±3 ±28 ±38 μA max 2.0 0.8 V min V max μA typ μA max μA typ μA max μA typ μA max kΩ typ pF typ ±0.015 ±0.1 ±13 ±16 ±34 ±40 400 4 46 73 70 91 ±0.15 ±18 ±42 90 103 Rev. 0 | Page 5 of 24 μA max μA typ ns typ ns max ns typ ns max VDD = 13.2 V, VSS = 0 V VS = 1 V/10 V, VD = 10 V/1 V; see Figure 23 VS = 1 V/10 V, VD = 10 V/1 V; see Figure 23 VS = VD = 1 V or 10 V; Figure 24 VDD = 0 V or floating, VSS = 0 V or floating, GND = 0 V VS = 1 V/16 V, VD = 16 V/1 V; see Figure 23 VDD = 13.2 V, VSS = 0 V, VS = 16 V/1 V, VD = 1 V/16 V; see Figure 23 VDD = 0 V or floating, VSS = 0 V or floating, GND = 0 V VS = 1 V/16 V, VD = 16 V/1 V; see Figure 23 VDD = 13.2 V, VSS = 0 V VS = 16 V/1 V, VD = 1 V/16 V; see Figure 23 VIN = VGND VIN = 5 V VIN = VDD RL = 300 Ω, CL = 35 pF VS = 8 V; see Figure 25 RL = 300 Ω, CL = 35 pF VS = 8 V; see Figure 25 ADG4612/ADG4613 Parameter Break-Before-Make Time Delay, tD (ADG4613 Only) Fault Response Time Fault Recovery Time Threshold Voltage, VT Charge Injection Off Isolation Channel-to-Channel Crosstalk Total Harmonic Distortion + Noise, THD + N 25°C 17 250 1.4 1.8 292 −56 −74 0.26 Unit ns typ ns min ns typ μs typ V typ pC typ dB typ dB typ % typ Insertion Loss −3 dB Bandwidth CS (Off ) CD (Off ) CD (On), CS (On) POWER REQUIREMENTS Normal Mode IDD −0.27 250 11.5 11.5 48 dB typ MHz typ pF typ pF typ pF typ 90 140 600 660 900 μA typ μA max μA typ μA max 165 μA typ μA max IDD Isolation Mode IDD 1 −40°C to +85°C 11 90 140 165 Guaranteed by design, not subject to production test. Rev. 0 | Page 6 of 24 Test Conditions/Comments RL = 50 Ω, CL = 35 pF VS1 = VS2 = 8 V; see Figure 26 VS = 9 V to 15 V, RL = 300 Ω, CL = 35 pF VS = 9 V to 15 V, RL = 300 Ω, CL = 35 pF VS = 6 V, RS = 0 Ω, CL = 1 nF; see Figure 27 RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 28 RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 29 RL = 110 Ω, 6 V p-p, f = 20 Hz to 20 kHz; see Figure 31 RL = 50 Ω, CL = 5 pF; f = 1 MHz; see Figure 30 RL = 50 Ω, CL = 5 pF; see Figure 30 VS = 0 V, f = 1 MHz VS = 0 V, f = 1 MHz VS = 0 V, f = 1 MHz VDD = 13.2 V, VSS = 0 V Digital inputs = 0 V or VDD Digital inputs = 5 V VDD = 13.2 V, VSS = 0 V or floating VS = 16 V or 1 V Digital inputs = 0 V or VDD ADG4612/ADG4613 5 V SINGLE SUPPLY VDD = 5 V ± 10%, VSS = 0 V, GND = 0 V, unless otherwise noted. Table 3. Parameter ANALOG SWITCH Analog Signal Range On-Resistance (RON) On-Resistance Match Between Channels (∆RON) On-Resistance Flatness (RFLAT (ON)) LEAKAGE CURRENTS Normal Mode Source Off Leakage, IS (Off ) Drain Off Leakage, ID (Off ) Channel On Leakage, ID (On), IS (On) 25°C 12.5 14.7 0.15 0.5 6.2 8 ±0.8 ±3 ±0.8 ±3 ±2 ±5 −40°C to +85°C Unit Test Conditions/Comments −5.5 V to VDD V Ω typ Ω max Ω typ Ω max Ω typ Ω max VDD to VSS = 16 V maximum VS = 0 V to +4.5 V, IS = −10 mA; see Figure 22 VDD = 4.5 V, VSS = 0 V, VS = 0 V to +4.5 V, IS = −10 mA 17 0.6 8.9 ±80 ±80 ±120 Isolation Mode Source Off Leakage, IS (Off ) ±0.05 ±3 Drain Off Leakage, ID (Off ) ±0.15 ±10 ±28 ±0.05 ±0.15 ±10 ±28 ±3 DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current, IINL Input Current, IINH Logic Pull-Down Resistance, RPD Digital Input Capacitance, CIN DYNAMIC CHARACTERISTICS 1 tON tOFF Break-Before-Make Time Delay, tD (ADG4613 Only) Fault Response Time Fault Recovery Time Threshold Voltage, VT Charge Injection Off Isolation μA typ ±38 ±38 2.0 0.8 ±0.015 ±0.1 ±13 ±16 400 4 116 190 87 120 70 nA typ nA max nA typ nA max nA typ nA max ±0.15 ±18 226 136 32 240 1.2 1.8 75 −54 Rev. 0 | Page 7 of 24 μA max μA typ μA max μA typ μA max μA typ μA max V min V max μA typ μA max μA typ μA max kΩ typ pF typ ns typ ns max ns typ ns max ns typ ns min ns typ μs typ V typ pC typ dB typ VS = 0 V to +4.5 V, IS = −10 mA VDD = 5.5 V, VSS = 0 V VS = 1 V/4.5 V, VD = 4.5 V/1 V; see Figure 23 VS = 1 V/4.5 V, VD = 4.5 V/1 V; see Figure 23 VS = VD = 1 V or 4.5 V; see Figure 24 VDD = 0 V or floating, VSS = 0 V or floating, GND = 0 V VS = 1 V/16 V, VD = 16 V/1 V; see Figure 23 VDD = 5.5 V, VSS = 0 V VS = 1 V/16 V, VD = 16 V/1 V ; Figure 23 VDD = 0 V or floating, VSS = 0 V or floating, GND = 0 V VS = 1 V/16 V, VD = 16 V/1 V; see Figure 23 VDD = 5.5 V, VSS = 0 V VS = 1 V/16 V, VD = 16 V/1 V ; see Figure 23 VIN = VGND VIN = VDD RL = 300 Ω, CL = 35 pF VS = 3 V; see Figure 25 RL = 300 Ω, CL = 35 pF VS = 3 V; see Figure 25 RL = 50 Ω, CL = 35 pF VS1 = VS2 = 3 V; see Figure 26 VS = 2 V to 8 V, RL = 300 Ω, CL = 35 pF VS = 2 V to 8 V, RL = 300 Ω, CL = 35 pF VS = 0 V, RS = 0 Ω, CL = 1 nF; see Figure 27 RL = 50 Ω, CL = 5 pF, f = 100 kHz; see Figure 28 ADG4612/ADG4613 Parameter Channel-to-Channel Crosstalk Total Harmonic Distortion + Noise, THD + N Insertion Loss −3 dB Bandwidth CS (Off ) CD (Off ) CD (On), CS (On) POWER REQUIREMENTS Normal Mode IDD Isolation Mode IDD 1 25°C −71 0.85 −40°C to +85°C −0.5 293 Unit dB typ % typ 14 14 50 dB typ MHz typ pF typ pF typ pF typ 90 140 μA typ μA max 90 140 165 μA typ μA max 165 Test Conditions/Comments RL = 50 Ω, CL = 5 pF, f = 100 kHz; see Figure 29 RL = 110 Ω, f = 20 Hz to 20 kHz, VS = 3.5 V p-p; see Figure 31 RL = 50 Ω, CL = 5 pF; f = 1 MHz; see Figure 30 RL = 50 Ω, CL = 5 pF; see Figure 30 VS = 0 V, f = 1 MHz VS = 0 V, f = 1 MHz VS = 0 V, f = 1 MHz VDD = 5.5 V, VSS = 0 V Digital inputs = 0 V or VDD VDD = 5.5 V, VSS = 0 V or floating Digital inputs = 0 V or 5.5 V VS = 1 V/16 V, VD = 16 V/1 V Guaranteed by design, not subject to production test. CONTINUOUS CURRENT PER CHANNEL, SX OR DX Table 4. Parameter CONTINUOUS CURRENT, Sx OR Dx VDD = +5 V, VSS = −5 V TSSOP (θJA = 112°C/W) LFCSP (θJA = 48.7°C/W) VDD = 12 V, VSS = 0 V TSSOP (θJA = 112°C/W) LFCSP (θJA = 48.7°C/W) VDD = 5 V, VSS = 0 V TSSOP (θJA = 112°C/W) LFCSP (θJA = 48.7°C/W) 25°C 85°C Unit 109 160 52 83 mA maximum mA maximum 113 175 56 87 mA maximum mA maximum 78 118 39 56 mA maximum mA maximum POWER SUPPLY OPERATION Temperature range is −40°C to +105°C, unless otherwise noted. Table 5. Parameter POWER SUPPLY VDD to VSS VDD VSS DUAL SUPPLY VSS/VDD SINGLE SUPPLY VDD Analog Signal Range, VD, VS Normal Mode Isolation Mode Min Max Unit Comments 2.7 −5.5 16 16 0 V V V GND = 0 V GND = 0 V GND = 0 V −5.5 +10.5 V VDD to VSS = 16 V, GND = 0 V 0 16 V VDD to VSS = 16 V, GND = 0 V, VSS = 0 V −5.5 −5.5 VDD +16 V V VDD to VSS = 16 V maximum Most negative (VS ,VD, or VSS) to most positive (VS ,VD, Inx, or VDD) = 16 V maximum Rev. 0 | Page 8 of 24 ADG4612/ADG4613 ABSOLUTE MAXIMUM RATINGS TA = 25°C, unless otherwise noted. Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Table 6. Parameter VDD to VSS VDD to GND VSS to GND Analog Inputs; VS to VD Analog Inputs; VD , VS Most Negative (VS,VD or VSS) to Most Positive (VS,VD, Inx, or VDD) Digital Inputs, INx Peak Current, Sx or Dx Continuous Current, Sx or Dx 1 Operating Temperature Range Storage Temperature Range Junction Temperature Reflow Soldering Peak Temperature, Pb-free 1 See Table 4. Rating 18 V −0.3 V to +18 V +0.3 V to −7 V 18 V −7 V to +18 V 18 V Only one absolute maximum rating may be applied at any one time. GND − 0.3 V to +18 V 350 mA (pulsed at 1 ms, 10% duty cycle max) Data + 15% −40°C to +105°C −65°C to +150°C 150°C 260 (0/−5)°C THERMAL RESISTANCE θJA is specified for a 4-layer board and, where applicable, with the exposed pad soldered to the board. Table 7. Thermal Resistance Package Type 16-Lead TSSOP 16-Lead LFCSP ESD CAUTION Rev. 0 | Page 9 of 24 θJA 112 48.7 Unit °C/W °C/W ADG4612/ADG4613 14 S2 VSS 4 13 VDD GND 5 12 NC GND 3 S4 6 11 S3 S4 4 D4 7 10 D3 IN4 8 9 IN3 NC = NO CONNECT VSS 2 12 S2 ADG4612/ ADG4613 11 VDD TOP VIEW (Not to Scale) 9 D4 5 TOP VIEW (Not to Scale) PIN 1 INDICATOR S1 1 09005-002 ADG4612/ ADG4613 10 NC S3 NOTES 1. EXPOSED PAD TIED TO SUBSTRATE, GND. 2. NC = NO CONNECT. 09005-003 3 14 IN2 D2 S1 13 D2 IN2 15 D3 8 16 2 IN3 7 1 D1 IN4 6 IN1 15 IN1 16 D1 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS Figure 3. LFCSP Pin Configuration Figure 2. TSSOP Pin Configuration Table 8. Pin Function Descriptions TSSOP 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 N/A Pin No. LFCSP 15 16 1 2 3 4 5 6 7 8 9 10 11 12 13 14 0 Mnemonic IN1 D1 S1 VSS GND S4 D4 IN4 IN3 D3 S3 NC VDD S2 D2 IN2 EPAD Description Logic Control Input 1. This pin has an internal 400 kΩ pull-down resistor to GND. Drain Terminal 1. Can be an input or output. Source Terminal 1. Can be an input or output. Most Negative Power Supply Potential. Ground (0 V) Reference. Source Terminal 4. Can be an input or output. Drain Terminal 4. Can be an input or output. Logic Control Input 4. This pin has an internal 400 kΩ pull-down resistor to GND. Logic Control Input 3. This pin has an internal 400 kΩ pull-down resistor to GND. Drain Terminal 3. Can be an input or output. Source Terminal 3. Can be an input or output. No Connection. Most Positive Power Supply Potential. Source Terminal 2. Can be an input or output. Drain Terminal 2. Can be an input or output. Logic Control Input 2. This pin has an internal 400 kΩ pull-down resistor to GND. The exposed pad is connected to the substrate GND. For best heat dissipation, it is recommended that this pad be connected to GND. If heat dissipation is not a concern, it is possible to leave the pad floating. Connecting the exposed pad to VSS (if VSS is not equal to GND) can cause current to flow and can damage the part. Table 9. ADG4612 Truth Table ADG4612 INx 1 0 Switch Condition On Off Table 10. ADG4613 Truth Table ADG4613 INx 0 1 S1, S4 Off On Rev. 0 | Page 10 of 24 S2, S3 On Off ADG4612/ADG4613 TYPICAL PERFORMANCE CHARACTERISTICS 9 12 TA = 25°C 8 VDD = +3V VSS = –3V VDD = +3V VSS = –3V 10 TA = +105°C TA = +85°C ON RESISTANCE (Ω) ON RESISTANCE (Ω) 7 6 VDD = +4.5V VSS = –4.5V 5 4 3 VDD = +5V VSS = –5V 2 VDD = +5.5V VSS = –5.5V 8 6 TA = –40°C 4 TA = +25°C 2 –4 –2 0 2 4 6 VS OR VD VOLTAGE (V) 0 –6 09005-004 0 –6 –2 –1 0 1 2 3 6 TA = 25°C VDD = +12V VSS = 0V VDD = 4.5V VSS = 0V TA = +105°C TA = +85°C 5 10 ON RESISTANCE (Ω) VDD = 5V VSS = 0V 8 VDD = 10.8V VSS = 0V VDD = 12V VSS = 0V 4 2 0 –6 VDD = 13.2V VSS = 0V –4 –2 0 2 4 6 10 12 14 16 VS OR VD VOLTAGE (V) 0 14 ON RESISTANCE (Ω) TA = +105°C TA = +85°C 4 TA = +25°C 4 6 8 10 12 VDD = +5V VSS = 0V TA = +105°C 12 5 2 Figure 8. On Resistance as a Function of VS, VD for Different Temperatures, 12 V Single Supply VDD = +5V VSS = –5V 3 –2 VS OR VD VOLTAGE (V) 7 TA = –40°C 2 10 TA = +85°C 8 6 TA = –40°C 4 TA = +25°C 2 1 –4 –2 0 VS OR VD VOLTAGE (V) 2 4 0 –6 09005-006 0 –6 TA = –40°C 0 –4 Figure 5. On Resistance as a Function of VS, VD (Single Supply) 6 TA = +25°C 2 1 VDD = 16V VSS = 0V 8 3 09005-008 VDD = 5.5V VSS = 0V 4 Figure 6. On Resistance as a Function of VS, VD for Different Temperatures, 5 V Dual Supply –4 –2 0 VS OR VD VOLTAGE (V) 2 4 09005-009 6 09005-005 ON RESISTANCE (Ω) –3 Figure 7. On Resistance as a Function of VS, VD for Different Temperatures, 3 V Dual Supply 14 ON RESISTANCE (Ω) –4 VS OR VD VOLTAGE (V) Figure 4. On Resistance as a Function of VS, VD (Dual Supply) 12 –5 09005-007 1 Figure 9. On Resistance as a Function of VS, VD for Different Temperatures, 5 V Single Supply Rev. 0 | Page 11 of 24 100 800 0 600 VDD = +5V VSS = –5V VBIAS = 1V/4.5V –300 –400 ID, IS (ON) +, + IS (OFF) +, – ID, (OFF) – , + ID (OFF) +, – IS (OFF) – , + ID, IS (ON) – , – –600 20 40 60 TEMPERATURE (°C) 80 0 –200 –400 ID, IS (ON) +, + IS (OFF) +, – ID, (OFF) – , + ID (OFF) +, – IS (OFF) – , + ID, IS (ON) – , – –600 –800 –700 0 200 100 –1000 Figure 10. Leakage Currents as a Function of Temperature, 5 V Dual Supply 0 20 40 60 TEMPERATURE (°C) 80 100 09005-013 –200 –500 VBIAS = 1V/4.5V VDD = +5V VSS = 0V 400 LEAKAGE CURRENT (nA) –100 09005-010 LEAKAGE CURRENT (nA) ADG4612/ADG4613 Figure 13. Leakage Currents as a Function of Temperature, 5 V Single Supply 0.0020 100 IDD PER LOGIC INPUT TA = 25°C 0.0018 0.0016 VDD = +3V VSS = –3V VBIAS = 1V/2V 0.0012 IDD (A) –100 VDD VDD VDD VDD 0.0014 –200 = +12V, VSS = 0V = +5V, VSS = –5V = +5V, VSS = 0V = +3V, VSS = 0V 0.0010 0.0008 0.0006 ID, IS (ON) +, + IS (OFF) +, – ID, (OFF) – , + ID (OFF) +, – IS (OFF) – , + ID, IS (ON) – , – –400 0.0004 0.0002 0 0 –500 0 20 40 60 TEMPERATURE (°C) 80 100 2 4 6 LOGIC (V) 8 10 09005-115 –300 09005-011 LEAKAGE CURRENT (nA) 0 12 Figure 14. IDD vs. Logic Level Figure 11. Leakage Currents as a Function of Temperature, 3 V Dual Supply 500 300 VDD = 12V VSS = 0V VBIAS = 1V/10V 450 CHARGE INJECTION (pC) 0 –100 ID, IS (ON) ++ IS (OFF) +– ID, (OFF) – + ID (OFF) +– IS (OFF) – + ID, IS (ON) – – –300 20 40 60 TEMPERATURE (°C) 80 300 250 VDD = +5V VSS = –5V 200 150 100 VDD = +5V VSS = 0V 50 –400 0 VDD = +12V VSS = 0V 350 100 Figure 12. Leakage Currents as a Function of Temperature, 12 V Single Supply 0 –5 –3 –1 1 3 5 7 9 VS (V) Figure 15. Charge Injection vs. Source Voltage Rev. 0 | Page 12 of 24 11 09005-012 –200 TA = 25°C 400 100 09005-112 LEAKAGE CURRENT (nA) 200 ADG4612/ADG4613 1.0 140 LOAD = 110Ω TA = 25°C 0.9 120 tON (+5V) tOFF (±5V) 100 0.7 THD + N (%) TIME (ns) VDD = 5V, VSS = 0V, VS = 3.5V p-p 0.8 tOFF (+5V) 80 60 tOFF (±12V) tON (±5V) 0.6 0.5 0.4 VDD = 12V, VSS = 0V, VS = 5V rms 0.3 40 tON (+12V) 0.2 20 –20 0 20 40 60 TEMPERATURE (°C) 80 100 0 09005-017 0 –40 0 5k Figure 16. tON/tOFF Times vs. Temperature 20k 2000 VDD = +5V VSS = –5V TA = 25°C 1800 tRECOVERY (+5V) 1600 tRECOVERY (+12V) 1400 –40 TIME (ns) OFF ISOLATION (dB) 15k Figure 19. THD + N vs. Frequency 0 –20 10k FREQUENCY (Hz) 09005-121 VDD = 5V, VSS = 5V, VS = 5V rms 0.1 –60 –80 1200 1000 tRECOVERY (±5V) 800 600 tRESPONSE (+12V) tRESPONSE (±5V) 400 –100 200 100k 1M 10M 100M 1G FREQUENCY (Hz) Figure 17. Off Isolation vs. Frequency 20 40 60 TEMPERATURE (°C) 80 100 0 VDD = +5V VSS = –5V TA = 25°C –20 VDD = +5V VSS = –5V TA = 25°C –30 ACPSRR (dB) –40 –40 –50 –60 NO DECOUPLING CAPACITORS –60 DECOUPLING CAPACITORS –80 –70 –80 –100 –100 10k 100k 1M 10M 100M FREQUENCY (Hz) 1G Figure 18. Crosstalk vs. Frequency –120 1k 10k 100k 1M FREQUENCY (Hz) Figure 21. ACPSRR vs. Frequency Rev. 0 | Page 13 of 24 10M 09005-123 –90 09005-015 CROSSTALK (dB) –20 0 Figure 20. Fault Response Time/Fault Recovery Time 0 –10 –20 09005-122 10k tRESPONSE (+5V) 0 –40 09005-014 –120 1k ADG4612/ADG4613 TEST CIRCUITS IDS V1 VS Dx 09005-020 Sx RON = V1/IDS Figure 22. On Resistance ID (OFF) Sx A Dx A VS 09005-021 IS (OFF) VD Figure 23. Off Leakage ID (ON) Dx NC = NO CONNECT A VD 09005-022 Sx NC Figure 24. On Leakage VDD VSS 0.1µF 0.1µF VSS Sx VOUT Dx VIN VS RL 300Ω INx CL 35pF ADG4612 50% 50% 90% VOUT 90% GND tOFF tON 09005-023 VDD Figure 25. Switching Times VDD VSS VS2 VSS S1 D1 S2 D2 RL 50Ω IN1, IN2 50% 0V CL 35pF VOUT2 RL 50Ω CL 35pF VOUT1 VOUT1 50% 90% 90% 0V 90% VOUT2 90% 0V ADG4613 tD GND Figure 26. Break-Before-Make Time Delay, tD Rev. 0 | Page 14 of 24 tD 09005-024 VDD VS1 VIN 0.1µF 0.1µF ADG4612/ADG4613 VS VSS VDD VSS Sx VOUT Dx VIN ADG4612 ON OFF CL 1nF INx VOUT QINJ = CL × ∆VOUT GND ∆VOUT 09005-025 RS VDD Figure 27. Charge Injection VDD VSS 0.1µF VDD NETWORK ANALYZER VSS Sx 0.1µF VDD 50Ω INx VS VS Dx RL 50Ω GND VOUT VIN RL 50Ω GND OFF ISOLATION = 20 log VOUT VS 09005-026 Dx VIN INSERTION LOSS = 20 log VDD VOUT WITH SWITCH VOUT WITHOUT SWITCH VSS 0.1µF 0.1µF 0.1µF AUDIO PRECISION VDD VDD VSS VSS RS RL 50Ω S1 Sx D S2 INx R 50Ω VIN VS 09005-027 VOUT VS RL 110Ω GND GND CHANNEL-TO-CHANNEL CROSSTALK = 20 log VS V p-p Dx Figure 31. THD + Noise Figure 29. Channel-to-Channel Crosstalk Rev. 0 | Page 15 of 24 VOUT 09005-029 VOUT VDD VSS 0.1µF VOUT Figure 30. Bandwidth Figure 28. Off Isolation NETWORK ANALYZER NETWORK ANALYZER VSS Sx 50Ω 50Ω INx VSS 0.1µF 09005-028 VDD 0.1µF ADG4612/ADG4613 TERMINOLOGY tOFF tOFF represents the delay between applying the digital control input and the output switching off. IDD IDD represents the positive supply current. ISS ISS represents the negative supply current. tD tD represents the off time measured between the 80% point of both switches when switching from one address state to another. VD, VS VD and VS represent the analog voltage on Terminal D and Terminal S, respectively. RON RON represents the ohmic resistance between Terminal D and Terminal S. Fault Response Time Fault response time is the delay between a fault condition (VS > VDD) on an analog input and the corresponding output below VDD. ΔRON ΔRON represents the difference between the RON of any two channels. Fault Recovery Time Fault recovery time is, in recovering from a fault condition, the delay between 50% of the input signal to 90% of the output signal. RFLAT (ON) Flatness that is defined as the difference between the maximum and minimum value of on resistance measured over the specified analog signal range is represented by RFLAT (ON). Charge Injection A measure of the glitch impulse transferred from the digital input to the analog output during switching. IS (Off) IS (Off) is the source leakage current with the switch off. ID (Off) ID (Off) is the drain leakage current with the switch off. ID (On), IS (On) ID (On) and IS (On) represent the channel leakage currents with the switch on. VINL VINL is the maximum input voltage for Logic 0. VINH VINH is the minimum input voltage for Logic 1. Charge Injection Charge injection is a measure of the glitch impulse transferred from the digital input to the analog output during switching. Crosstalk Crosstalk is a measure of unwanted signal that is coupled through from one channel to another as a result of parasitic capacitance. Bandwidth Bandwidth is the frequency at which the output is attenuated by 3 dB. IINL, IINH IINL and IINH represent the low and high input currents of the digital inputs. On Response On response is the frequency response of the on switch. CD (Off) CD (Off) represents the off switch drain capacitance, which is measured with reference to ground. CS (Off) CS (Off) represents the off switch source capacitance, which is measured with reference to ground. CD (On), CS (On) CD (On) and CS (On) represent on switch capacitances, which are measured with reference to ground. CIN CIN is the digital input capacitance. Off Isolation Off isolation is a measure of unwanted signal coupling through an off switch. Insertion Loss Insertion loss is the loss due to the on resistance of the switch. Total Harmonic Distortion + Noise (THD + N) The ratio of the harmonic amplitude plus noise of the signal to the fundamental is represented by THD + N. AC Power Supply Rejection Ratio (ACPSRR) ACPSRR is the ratio of the amplitude of signal on the output to the amplitude of the modulation. This is a measure of the ability of the part to avoid coupling noise and spurious signals that appear on the supply voltage pin to the output of the switch. The dc voltage on the device is modulated by a sine wave of 0.62 V p-p. tON tON represents the delay between applying the digital control input and the output switching on. Rev. 0 | Page 16 of 24 ADG4612/ADG4613 THEORY OF OPERATION The ADG4612/ADG4613 contain four independent singlepole/single-throw (SPST) switches. Each switch is rail-to-rail and conducts equally well in both directions when on. The ADG4612/ADG4613 has two modes of operation: normal mode and isolation mode. The operation modes are made possible by a special detection circuitry that monitors the voltage levels at the source or drain terminals and VDD relative to ground. Depending on these voltage levels, the device operates in normal mode or isolation mode accordingly. Isolation mode is a useful feature that isolates the inputs from the outputs where input signals may be present before supplies or during positive fault conditions that can occur in applications. Normal Mode In normal mode, the switch functions as a normal 4 × SPST switch, whereby the switch is controlled by the logic input pins, IN1 to IN4. The following three conditions need to be satisfied for the switch to be in the on condition; • • • VDD ≥ 2.7 V; and Input signal, VS, VD < VDD + VT ; and Logic input, INx set to on level VDD by a threshold voltage, VT, the switch turns off and is in isolation mode. If the analog input signal exceeds the negative supply, VSS, when the switch is off, the switch blocks a signal up to −5.5 V. If the switch is on, the switch remains on, and this signal is passed to the output. See the Negative Fault Condition; Negative Signal Handling section for more details. Isolation Mode In isolation mode, all switches are in the off condition. The switch inputs are isolated from the switch outputs. The switch inputs are high impedance inputs with greater than 475 kΩ impedance to VDD ground and across the switch. This prevents any current from flowing that can damage the switch. This is very useful in applications where analog signals may be present at the switch inputs before power is present or where the user has no control over the power supply sequence. The switch is in isolation mode when • No power supplies are present, that is, when VDD is floating or VDD ≤ 1 V; or • Input signal, VS, VD > VDD + VT The negative supply rail, VSS, can be floating or 0 V to −5.5 V. The ground pin must be connected to the ground potential. When the switch is in the on condition, if the signal range is from VDD to −5.5 V, the signals present on the switch inputs are passed through to the switch output. If the analog input exceeds Table 11. Switch Operation Mode VDD Floating VSS 1 X GND 0V 0 V to 0.8 V X 0V VDD ≥ 2.7 V X 0V VS, VD (Input Voltage, Sx or Dx) −5.5 V to +10.5 V 0 V to 16 V −5.5 V to +10.5 V 0 V to 16 V VS, VD > VDD + VT VDD ≥ 2.7 V to 16 V 0 V to −5.5 V 0V VDD to VDD – 16 V 1 X = don’t care; for example, floating, 0 V to −5.5 V. Rev. 0 | Page 17 of 24 Switch Condition All switches off Inputs isolated from outputs All switches off Inputs isolated from outputs All switches off Inputs isolated from outputs Switch state is determined by logic levels, INx Switch Mode Isolation Isolation Isolation Normal ADG4612/ADG4613 Positive Fault Condition BIPOLAR OPERATION AND SINGLE-SUPPLY OPERATION The ADG4612/ADG4613 have a maximum operational range from VDD to VSS of 16 V. The maximum signal range from source to drain, VS to VD , is also 16 V. During operation of the device, the signal range can exceed the power supply rails, but the voltage between the most negative voltage on the device (VS,VD or VSS) should be within 16 V of the most positive voltage (VS, VD, INx, or VDD). These voltage ratings should be adhered to at all times for guaranteed functionality. See Table 5 for guaranteed supply ranges. Signal ranges and power supply ranges exceeding 16 V may affect the long-term reliability of the device. The ground pin must always be connected to the GND potential to ensure proper functionality in isolation and normal operation mode. The minimum VDD voltage that the part is guaranteed operational is 2.7 V. The maximum recommended VDD voltage is 16 V. The minimum supply voltage recommended on VSS is −5.5 V, and the maximum voltage allowable on VSS is 0 V. Therefore, given that the VDD to VSS range is 16 V maximum when, VSS = −5.5 V, the VDD = +10.5 V maximum. If the analog input exceeds VDD by a threshold voltage, VT, then the switch turns off and is in isolation mode. The part can handle a fault of up to 16 V, referenced to the most negative signal. For example, if VDD= 5 V, VSS = 0 V, then the switch protects against an overvoltage of up to 16 V. If VSS = −5 V and VDD = +5 V, then the switch protects against an overvoltage of up to +11 V. Negative Fault Condition; Negative Signal Handling The ADG4612/ADG4613 are not damaged if the analog inputs exceed the negative supply, VSS. If the switch is in the off condition, the switch blocks a signal up to −5.5 V. If the switch is in the on condition, the switch remains on, and the negative signal is passed to the output; therefore, the ADG4612/ADG4613 can pass a negative signal up to −5.5 V with VSS = 0 V. The user must ensure that the downstream circuitry can handle this signal level. Also, the user should ensure the voltage between the most negative voltage on the device (VS ,VD or VSS) is within 16 V of the most positive voltage (VS, VD, INx, or VDD). Rev. 0 | Page 18 of 24 ADG4612/ADG4613 APPLICATIONS INFORMATION There are many application scenarios that benefit from the functionality offered on the ADG4612/ADG4613 switches. The ADG4612/ADG4613 allow negative signals, down to −5.5 V to be passed without a negative supply. This can be very useful in applications that need to pass negative signals but do not have a negative supply available. This cannot be done with conventional CMOS switches because ESD protection diodes turn on and clamp the signals. Theses features ensure the system is very robust to power supply sequencing issues that can be present in conventional CMOS devices. Dx Sx RS RL VS GND VSS Figure 33. ESD Protection Diodes on Conventional CMOS Switch Some users add external diodes or add current-limiting resistors to protect the device against the conditions shown in Figure 33. However, these solutions all have disadvantages in that they add extra board area, extra component count, and cost. The system level performance can also be affected by the higher on resistance from the current-limiting resistors or the higher leakage from external Schottky diodes. Using external diodes for protection still creates the problem where a floating VDD line can be pulled up to a diode drop from the input signal. VDD VS > VD FORWARD CURRENT FLOWS HOT SWAP MODULES LIVE BACKPLANE LOAD CURRENT FORWARD CURRENT 09005-031 The ADG4612/ADG4613 offer power-off protection, ensuring the switch is guaranteed off and inputs are high impedance with no power supplies present. This isolation mode is a useful feature that isolates the inputs from the outputs where input signals may be present before supplies. The isolation mode also protects the system against positive fault conditions that can occur in applications, ensuring that the switch turns off and protects downstream circuitry. For example, a module can be connected to a live backplane, supplying signals to the board before supplies are present. This is common in hot swap applications where a card could be hot plugged in a shelf where there are others cards already working and powered on. VDD VS > VD FORWARD CURRENT FLOWS HOT SWAP MODULES LOAD CURRENT FORWARD CURRENT HOT SWAP MODULES Sx CONTROLLER POWER SUPPLY Dx RS RL 09005-030 Figure 32. Typical Application Signals on Inputs with No Power Present In conventional CMOS switches, ESD protection diodes can be found on the analog and digital inputs to VDD and GND or VSS (see Figure 33, for example). If an input voltage is present on the switch inputs with no power supplies applied, current can flow through the ESD protection diodes. If this current is not limited to a safe level, it is possible to damage the ESD protection diodes and, hence, the switch. Input signals may pass through the switch to the output affecting downstream circuitry. The user may also be exceeding the absolute maximum ratings of the devices, and, therefore, affecting the long-term reliability of the device. GND VSS 09005-032 VS SW Figure 34. External Protection Added to Protect Switch Against Damage If Signals Present on Inputs Without Power Supplies The ADG4612/ADG4613 eliminate the concerns shown in Figure 34. There are no internal ESD diodes from the analog or digital inputs to VDD or VSS. If signals are present on the ADG4612/ ADG4613 inputs before power is present, the switch is in isolation mode, which means that the inputs have high impedance to VDD, GND, and the output. This prevents current flow and protects the device from damage. Rev. 0 | Page 19 of 24 ADG4612/ADG4613 Power Supply Sequencing Another benefit of the ADG4612/ADG4613 is it eliminates concerns about the power supply sequence. The part can be powered up in any sequence without damage. For devices with conventional CMOS switches, it is recommend that power supplies are powered up before analog or digital inputs are present. The ADG4612/ADG4613 do not have any power supply sequencing requirements, thereby making them a very robust design. However, a ground must first be present for the device to function in isolation mode and normal mode. protection diodes. The VDD supply normally gets pulled up to the input voltage level minus a diode drop, VDD ~VS, VD − VDIODE. This voltage can be high enough to power up other chips that are connected to this supply rail in a system, potentially damaging other components in that system. The ADG4612/ADG4613 architecture ensures that the VDD supply is isolated from the analog inputs, thereby preventing the supplies from being pulled to a higher potential when a signal is present on the inputs without any power having been applied. VDD Supply Another area of concern with conventional CMOS switches that have analog signals present before the part is powered up is that the VDD supply can be pulled up through the internal ESD Rev. 0 | Page 20 of 24 ADG4612/ADG4613 OUTLINE DIMENSIONS 5.10 5.00 4.90 16 9 4.50 4.40 4.30 6.40 BSC 1 8 PIN 1 1.20 MAX 0.15 0.05 0.20 0.09 0.30 0.19 0.65 BSC COPLANARITY 0.10 0.75 0.60 0.45 8° 0° SEATING PLANE COMPLIANT TO JEDEC STANDARDS MO-153-AB Figure 35. 16-Lead Thin Shrink Small Outline Package [TSSOP] (RU-16) Dimensions shown in millimeters 0.30 0.23 0.18 0.50 BSC 13 PIN 1 INDICATOR 16 1 12 EXPOSED PAD 1.75 1.60 SQ 1.45 9 TOP VIEW 0.80 0.75 0.70 SEATING PLANE 0.50 0.40 0.30 4 8 5 0.20 MIN BOTTOM VIEW 0.05 MAX 0.02 NOM COPLANARITY 0.08 0.20 REF FOR PROPER CONNECTION OF THE EXPOSED PAD, REFER TO THE PIN CONFIGURATION AND FUNCTION DESCRIPTIONS SECTION OF THIS DATA SHEET. COMPLIANT TO JEDEC STANDARDS MO-220-WEED-6. Figure 36. 16-Lead Lead Frame Chip Scale Package [LFCSP_WQ] 3 mm × 3 mm Body, Very Thin Quad (CP-16-22) Dimensions shown in millimeters Rev. 0 | Page 21 of 24 01-13-2010-D PIN 1 INDICATOR 3.10 3.00 SQ 2.90 ADG4612/ADG4613 ORDERING GUIDE Model 1 ADG4612BRUZ ADG4612BRUZ-REEL7 ADG4612BCPZ-REEL7 EVAL-ADG4612EBZ ADG4613BRUZ ADG4613BRUZ-REEL7 ADG4613BCPZ-REEL7 1 Temperature Range −40°C to +105°C −40°C to +105°C −40°C to +105°C −40°C to +105°C −40°C to +105°C −40°C to +105°C Package Description Thin Shrink Small Outline Package [TSSOP] Thin Shrink Small Outline Package [TSSOP] Lead Frame Chip Scale Package [LFCSP_WQ] Evaluation Board Thin Shrink Small Outline Package [TSSOP] Thin Shrink Small Outline Package [TSSOP] Lead Frame Chip Scale Package [LFCSP_WQ] Z = RoHS Compliant Part. Rev. 0 | Page 22 of 24 Package Option RU-16 RU-16 CP-16-22 RU-16 RU-16 CP-16-22 Branding LG5 S3Y ADG4612/ADG4613 NOTES Rev. 0 | Page 23 of 24 ADG4612/ADG4613 NOTES ©2010 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D09005-0-10/10(0) Rev. 0 | Page 24 of 24