750kHz – 800MHz Low Phase Noise Multiplier VCXO Universal Low Phase Noise IC’s FEATURES 1 16 SEL0^ XIN 2 15 SEL1^ XOUT 3 14 GND SEL3^ 4 13 CLKC SEL2^ 5 12 VDD OE 6 11 CLKT VCON 7 10 GND GND 8 9 GND SEL0^ / VDD* SEL1^ TSSOP-16L VDD / GND* 12 11 10 9 DESCRIPTION 13 SEL3^ 14 SEL2^ 15 OE 16 P502-3x 1 BLOCK DIAGRAM 2 3 4 GND XOUT VCON The PLL502-35 (LVPECL with inverted OE), PLL50237 (LVCMOS), PLL502-38 (LVPECL), and PLL502-39 (LVDS) are high performance and low phase noise VCXO IC chips. They provide phase noise performance as low as –125dBc at 10kHz offset (at 155MHz), by multiplying the input crystal frequency up to 32x. The wide pull range (±200 ppm) and very low jitter make them ideal for a wide range of applications, including SONET/SDH and FEC. They accept fundamental parallel resonant mode crystals from 12MHz to 25MHz. GND VDD GND Selectable 750kHz to 800MHz range. Low phase noise output (@ 10kHz frequency offset, -142dBc/Hz for 19.44MHz, -125dBc/Hz for 155.52MHz, -115dBc/Hz for 622.08MHz). LVCMOS (PLL502-37), LVPECL (PLL502-35 and PLL502-38) or LVDS (PLL502-39) output. 12MHz to 25MHz crystal input. No external load capacitor or varicap required. Output Enable selector. Wide pull range (±200 ppm) Selectable /16 to x32 frequency divider/multiplier. 3.3V operation. Available in 16-Pin TSSOP or 16-pin 3x3mm QFN GREEN/RoHS compliant packages. XIN PIN CONFIGURATION (Top View) 8 GND 7 CLKC 6 VDD 5 CLKT QFN-16L SEL[3:0] ^: *: OE VCON XIN XOUT Oscillator Amplifier w/ integrated varicaps PLL (Phase Locked Loop) CLKC CLKT Internal pull-up On 3x3 package, PLL502-35/-38 do not have SEL0 available: Pin 10 is VDD, pin 11 is GND. However, PLL502-37/-39 have SEL0 (pin 10), and pin11 is VDD. See pin assignment table for details. OUTPUT ENABLE LOGICAL LEVELS Part # PLL502-38 PLL by-pass PLL502-3x PLL502-35 PLL502-37 PLL502-39 OE 0 (Default) State Output enabled 1 Tri-state 0 Tri-state 1 (Default) Output enabled OE input: Logical states defined by LVPECL levels for PLL502-38 Logical states defined by LVCMOS levels for PLL502-37/-39 47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 9/23/08 Page 1 750kHz – 800MHz Low Phase Noise Multiplier VCXO Universal Low Phase Noise IC’s FREQUENCY SELECTION TABLE SEL3 SEL2 SEL1 SEL0 Selected Multiplier 0 0 1 1 Fin x 32 0 1 1 0 Fin / 8 0 1 1 1 Fin x 2 1 0 0 1 Fin / 2 1 0 1 0 Fin / 16 1 0 1 1 Fin x 4 1 1 0 0 Fin / 4 1 1 0 1 Fin x 8 1 1 1 0 Fin x 16 1 1 1 1 No multiplication Note: SEL0 is not available (always “1”) for PLL502-35 and PLL502-38 in 3x3mm package PIN DESCRIPTIONS PLL502-35 and PLL502-38 (see next page for PLL502-37/-39) TSSOP Pin number 3x3mm QFN Pin number Type XIN 2 12 I Crystal input (See Crystal Specification on page 4) XOUT 3 13 I Crystal output (See Crystal Specification on page 4) OE 6 16 I Output enable pin (See OE logic state table on page 1) VCON 7 1 I Voltage Control input GND 8,9,10,14 2,3,4,8,11 P Ground connection CLKT 11 5 O LVPECL True output CLKC 13 7 O LVPECL Complementary output SEL0 16 Not available I SEL1 15 9 I SEL2 5 15 I SEL3 4 14 I VDD 1, 12 6,10 P Name Description Multiplier selector pins. These pins have an internal pullup that will default SEL to ‘1’ when not connected to GND. +3.3V power supply. 47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 9/23/08 Page 2 750kHz – 800MHz Low Phase Noise Multiplier VCXO Universal Low Phase Noise IC’s PIN DESCRIPTIONS PLL502-37/-39 (see previous page for PLL502-35/-38) Name TSSOP Pin number 3x3mm QFN Pin number Type XIN 2 12 I Crystal input. See Crystal Specification on page 4. XOUT 3 13 I Crystal output. See Crystal Specification on page 4. OE 6 16 I Output enable pin (see OE logic state table on page 1). VCON 7 1 I Voltage Control input. GND 8,9,10,14 2,3,4,8 P Ground. CLKT 11 5 O LVDS True output for PLL502-39 No Connect for PLL502-37 CLKC 13 7 O LVDS Complementary output for PLL502-39 LVCMOS out for PLL502-37 SEL0 16 10 I SEL1 15 9 I SEL2 5 15 I SEL3 4 14 I VDD 1, 12 6,11 P Description Multiplier selector pins. These pins have an internal pullup that will default SELx to ‘1’ when not connected to GND. +3.3V power supply. ELECTRICAL SPECIFICATIONS 1. Absolute Maximum Ratings PARAMETERS Supply Voltage SYMBOL MIN. V DD MAX. UNITS 4.6 V Input Voltage, dc VI -0.5 V DD +0.5 V Output Voltage, dc VO -0.5 V DD +0.5 V Storage Temperature TS -65 150 C Ambient Operating Temperature* TA -40 85 C Junction Temperature TJ 125 C Lead Temperature (soldering, 10s) 260 C ESD Protection, Human Body Model 2.5 kV Exposure of the device under conditions beyond the limits specified by Maximum Ratings for extended periods may cause permanent damage to the device and affect product reliability. These conditions represent a stress rating only, and functional operations of the device at these or any other conditions above the operational limits noted in this specification is not implied. * Note: Operating Temperature is guaranteed by design for all parts (COMMERCIAL and INDUSTRIAL), but tested for COMMERCIAL grade only. 47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 9/23/08 Page 3 750kHz – 800MHz Low Phase Noise Multiplier VCXO Universal Low Phase Noise IC’s 2. Crystal Specifications PARAMETERS Crystal Resonator Frequency Crystal Loading Rating SYMBOL CONDITIONS MIN. F XIN Parallel Fundamental Mode 12 C L (xtal) Crystal Pullability Recommended ESR At VCON = 1.65V TYP. MAX. UNITS 25 MHz 9.5 pF C 0 /C 1 (xtal) AT cut 250 - RE AT cut 30 Ω Note: Crystal Loading rating: 9.5pF is the loading the crystal sees from the VCXO chip at VCON = 1.65V. It is assumed that the crystal will be at nominal frequency at this load. If the crystal requires more load to be at nominal frequency, the additional load must be added externally. This however may reduce the pull range. 3. Voltage Control Crystal Oscillator PARAMETERS SYMBOL VCXO Stabilization Time * T VCXOSTB CONDITIONS MIN. TYP. From power valid VCXO Tuning Range F XIN = 12 – 25MHz; XTAL C 0 /C 1 < 250 0V VCON 3.3V CLK output pullability VCON=1.65V, 1.65V MAX. UNITS 10 ms 500 ppm 200 VCXO Tuning Characteristic ppm 150 Pull range linearity ppm/V 10 VCON pin input impedance 0V VCON 3.3V, -3dB VCON modulation BW % 2000 kΩ 10 kHz Note: Parameters denoted with an asterisk (*) represent nominal characterization data and are not production tested to any specific limits. 4. General Electrical Specifications PARAMETERS SYMBOL CONDITIONS Supply Current, Dynamic (with Loaded Outputs) I DD F OUT <24MHz LVPECL/LVDS/ 24MHz< F OUT <96MHz LVCMOS 96MHz< F OUT <800MHz Operating Voltage V DD Output Clock Duty Cycle Short Circuit Current MIN. TYP. UNITS 60/28/15 65/45/30 mA 100/80/40 2.97 @ 50% V DD (LVCMOS) @ 1.25V (LVDS) @ V DD – 1.3V (LVPECL) MAX. 45 45 45 50 50 50 50 3.63 V 55 55 55 % mA 47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 9/23/08 Page 4 750kHz – 800MHz Low Phase Noise Multiplier VCXO Universal Low Phase Noise IC’s 5. Jitter Specifications PARAMETERS Period jitter RMS Period jitter Peak-to-Peak Integrated jitter RMS CONDITIONS FREQUENCY With capacitive decoupling between V DD and GND. Over 10,000 cycles. With capacitive decoupling between V DD and GND. Over 10,000 cycles. Integrated 12kHz to 20MHz MIN. TYP. MAX. 19.44MHz 2.2 77.76MHz 4.5 155.52MHz 4.5 622.08MHz 5.0 19.44MHz 17 77.76MHz 25 155.52MHz 27 622.08MHz 35 155.52MHz 2.5 4 622.08MHz 2.5 4 UNITS ps ps ps 6. Phase Noise Specifications PARAMETERS Phase Noise relative to carrier (typical) FREQUENCY @10Hz @100Hz @1kHz @10kHz @100kHz 19.44MHz -80 -108 -132 -142 -150 77.76MHz -72 -103 -122 -130 -125 155.52MHz -65 -95 -120 -125 -121 622.08MHz -55 -85 -109 -115 -110 UNITS dBc/Hz Note: Phase Noise measured at VCON = 0V 7. LVCMOS Electrical Characteristics PARAMETERS Output drive current Output Clock Rise/Fall Time SYMBOL CONDITIONS MIN. TYP. MAX. UNITS I OH V OH = V DD -0.4V, V DD =3.3V 10 mA I OL V OL = 0.4V, V DD = 3.3V 10 mA 0.3V ~ 3.0V with 15 pF load 2.4 ns 47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 9/23/08 Page 5 750kHz – 800MHz Low Phase Noise Multiplier VCXO Universal Low Phase Noise IC’s 8. LVDS Electrical Characteristics PARAMETERS SYMBOL Output Differential Voltage V DD Magnitude Change MIN. TYP. MAX. UNITS V OD 247 355 454 mV V OD -50 50 mV 1.6 V Output High Voltage V OH Output Low Voltage V OL Offset Voltage CONDITIONS 1.4 R L = 100Ω (see figure) 0.9 1.1 V OS 1.125 1.2 1.375 V Offset Magnitude Change V OS 0 3 25 mV Power-off Leakage I OXD 1 10 uA Output Short Circuit Current I OSD -5.7 -8 mA V out = V DD or GND V DD = 0V V 9. LVDS Switching Characteristics PARAMETERS SYMBOL CONDITIONS MIN. TYP. MAX. UNITS Differential Clock Rise Time tr 0.2 0.7 1.0 ns Differential Clock Fall Time tf R L = 100Ω C L = 10 pF (see figure) 0.2 0.7 1.0 ns LVDS Levels Test Circuit LVDS Switching Test Circuit OUT OUT CL = 10pF 50 VOD VOS VDIFF RL = 100 50 CL = 10pF OUT OUT LVDS Transistion Time Waveform OUT 0V (Differential) OUT 80% VDIFF 80% 0V 20% 20% tR tF 47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 9/23/08 Page 6 750kHz – 800MHz Low Phase Noise Multiplier VCXO Universal Low Phase Noise IC’s 10. LVPECL Electrical Characteristics PARAMETERS SYMBOL CONDITIONS MIN. MAX. Output High Voltage V OH V DD – 1.025 Output Low Voltage V OL R L = 50Ω to (V DD – 2V) (see figure) UNITS V V DD – 1.620 V 11. LVPECL Switching Characteristics PARAMETERS SYMBOL Clock Rise Time tr Clock Fall Time tf CONDITIONS 20%~80% of Waveform LVPECL Levels Test Circuit OUT TYP. MAX. UNITS 0.6 1.5 ns 0.6 1.5 ns LVPECL Output Skew VDD 50? MIN. OUT 2.0V 50% 50? OUT tSKEW OUT LVPECL Transistion Time Waveform DUTY CYCLE 45 - 55% 55 - 45% OUT 80% 50% 20% OUT tR tF 47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 9/23/08 Page 7 750kHz – 800MHz Low Phase Noise Multiplier VCXO Universal Low Phase Noise IC’s PACKAGE INFORMATION (GREEN PACKAGE COMPLIANT) TSSOP-16L Symbol A A1 b C D E H L e Dimension in MM Min. Max. 1.20 0.05 0.15 0.19 0.30 0.09 0.20 4.90 5.10 4.30 4.50 6.20 6.60 0.45 0.75 0.65 BSC E D A A1 C QFN-16L e Nom Max A 0.70 0.75 0.80 A1 0.00 - 0.05 DDD L Dimension (mm) Min D1 0.203 A3 b 0.20 0.25 0.30 D 2.95 3.00 3.05 E 2.95 3.00 3.05 D1 1.65 1.70 1.75 E1 1.65 1.70 1.75 L 0.250 0.300 0.350 e L B e Symbol H Pin1 Dot b A A3 0.50BSC SEATING PLANE A1 47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 9/23/08 Page 8 750kHz – 800MHz Low Phase Noise Multiplier VCXO Universal Low Phase Noise IC’s ORDERING INFORMATION For part ordering, please contact our Sales Department: 47745 Fremont Blvd., Fremont, CA 94538, USA Tel: (510) 492-0990 Fax: (510) 492-0991 PART NUMBER The order number for this device is a combination of the following: Part number, Package type, Operating temperature range, shipping method Order Number Marking Package Option PLL502-35OC PLL502-35OC-R PLL502-35QC-R PLL502-35OCL PLL502-35OCL-R PLL502-35QCL-R P502-35OC P502-35OC P502-35QC P502-35OCL P502-35OCL P502-35QCL 16-Pin 16-Pin 16-Pin 16-Pin 16-Pin 16-Pin TSSOP (Tube) TSSOP (Tape and Reel) 3x3 QFN (Tape and Reel) TSSOP (Tube) TSSOP (Tape and Reel) 3x3 QFN (Tape and Reel) PLL502-37OC PLL502-37OC-R PLL502-37QC-R PLL502-37OCL PLL502-37OCL-R PLL502-37QCL-R P502-37OC P502-37OC P502-37QC P502-37OCL P502-37OCL P502-37QCL 16-Pin 16-Pin 16-Pin 16-Pin 16-Pin 16-Pin TSSOP (Tube) TSSOP (Tape and Reel) 3x3 QFN (Tape and Reel) TSSOP (Tube) TSSOP (Tape and Reel) 3x3 QFN (Tape and Reel) PLL502-38OC PLL502-38OC-R PLL502-38QC-R PLL502-38OCL PLL502-38OCL-R PLL502-38QCL-R P502-38OC P502-38OC P502-38QC P502-38OCL P502-38OCL P502-38QCL 16-Pin 16-Pin 16-Pin 16-Pin 16-Pin 16-Pin TSSOP (Tube) TSSOP (Tape and Reel) 3x3 QFN (Tape and Reel) TSSOP (Tube) TSSOP (Tape and Reel) 3x3 QFN (Tape and Reel) PLL502-39OC PLL502-39OC-R PLL502-39QC-R PLL502-39OCL PLL502-39OCL-R PLL502-39QCL-R P502-39OC P502-39OC P502-39QC P502-39OCL P502-39OCL P502-39QCL 16-Pin 16-Pin 16-Pin 16-Pin 16-Pin 16-Pin TSSOP (Tube) TSSOP (Tape and Reel) 3x3 QFN (Tape and Reel) TSSOP (Tube) TSSOP (Tape and Reel) 3x3 QFN (Tape and Reel) PhaseLink Corporation, reserves the right to make changes in its products or specifications, or both at any time without notice. The information furnished by Phaselink is believed to be accurate and reliable. However, PhaseLink makes no guarantee or warranty concerning the accuracy of said information and shall not be responsible for any loss or damage of whatever nature resulting from the use of, or reliance upon this product. LIFE SUPPORT POLICY: PhaseLink’s products are not authorized for use as critical components in life support devices or systems without the express written approval of the President of PhaseLink Corporation. 47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 9/23/08 Page 9