VCXO IC Die for 20 to 52MHz Parallel Resonant

VCXO IC Die for 20 to 52MHz Parallel Resonant Crystals





XIN
27
XOUT
29
VCON
31
S2V
23
S1V
25
S0V
VDD
65 mil
VDD

Integrated voltage-controlled crystal oscillator
circuitry (VCXO) (pull range 380ppm minimum).
Selectable frequency dividers (x1, 1/2, 1/4, 1/8)
available as bonding options.
VCXO tuning range: 0.3V - 3.0V.
Uses inexpensive fundamental-mode parallel
resonant crystals (from 20 to 52MHz).
2.5V or 3.3V supply voltage.
Selectable High Drive (30mA) or Standard Drive
(10mA) CMOS output.
Available in DIE (65 mil x 62 mil).
OE^

DIE CONFIGURATION
62 mil
FEATURES
21
20
19
18
(1550,1475)
Die ID:
A0303-03J
C502A
13
CLK
10
GND
DESCRIPTION
The PLL502-50 is a monolithic low jitter, high
performance CMOS VCXO IC Die. It allows the
control of the output frequency with an input voltage
(VCON), using a low cost crystal.
The same die can be used as a VCXO with output
frequencies ranging from F XIN x 1 to F XIN / 8 thanks
to selector pads allowing bonding options (see
Divider Selection Table on this page). This makes
the PLL502-50 ideal for a wide range of applications
from 2.5MHz to 52MHz (including 27MHz,
35.328MHz, etc.).
DIE SPECIFICATIONS
Name
Size
Reverse side
Pad dimensions
Thickness
Value
62 x 65 mil
GND
80 micron x 80 micron
10 mil
GND
7
(0,0)
Y
X
Note:
^ denotes internal pull up
V
denotes internal pull down
DIVIDER SELECTION
SELECTION
S2 S1 S0
0
0
0
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
F XIN
CLK (MHz)
20MHz – 52MHz
F XIN x 1
F XIN  2
F XIN  4
F XIN x 1*
F XIN  8
F XIN  4*
F XIN  2*
F XIN  8*
Note: Selector pads default to ‘0’, wire bond to V DD to set to ‘1’
(*) High-drive CMOS output
BLOCK DIAGRAM
PAD DESCRIPTIONS
Name
Number
Description
XIN
XOUT
VCON
GND
CLK
S[0:2]
VDD
27
29
31
7,10
13
18,19,20
21,22,23
OE
25
Crystal input connection.
Crystal output connection.
Voltage Control input.
Ground.
Clock output.
Frequency selection pad
Power supply.
Output Enable: ‘0’ to disable
(tri-state output), 1’ (default)
to enabled the output.
XIN
VCXO
Selectable
Divider
CLK
VCON
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 11/8/07 Page 1
VCXO IC Die for 20 to 52MHz Parallel Resonant Crystals
ELECTRICAL SPECIFICATIONS
1. Absolute Maximum Ratings
PARAMETERS
SYMBOL
Supply Voltage
MIN.
V DD
MAX.
UNITS
4.6
V
Input Voltage, dc
VI
-0.5
V DD +0.5
V
Output Voltage, dc
VO
-0.5
V DD +0.5
V
Storage Temperature
TS
-65
150
C
Ambient Operating Temperature*
TA
-40
85
C
Junction Temperature
TJ
125
C
Lead Temperature (soldering, 10s)
260
C
ESD Protection, Human Body Model
2
kV
Exposure of the device under conditions beyond the limits specified by Maximum Ratings for extended periods may cause permanent
damage to the device and affect product reliability. These conditions represent a stress rating only, and functional operations of the
device at these or any other conditions above the operational limits noted in this specification is not implied. * Note: Operating
Temperature is guaranteed by design for all parts (COMMERCIAL and INDUSTRIAL), but tested for COMMERCIAL grade only.
2. DC Electrical Specifications
PARAMETERS
SYMBOL
CONDITIONS
MIN.
F XIN = 20 - 52MHz
Output load of 10pF
TYP.
MAX.
UNITS
Supply Current, Dynamic,
with Loaded Outputs
I DD
Operating Voltage
V DD
Output drive current
(High Drive)
I OH
V OH = V DD -0.4V, V DD =3.3V
30
mA
I OL
V OL = 0.4V, V DD = 3.3V
30
mA
Output drive current
(Standard Drive)
I OH
V OH = V DD -0.4V, V DD =3.3V
10
mA
I OL
V OL = 0.4V, V DD = 3.3V
10
mA
10
2.25
3.63
50
Short Circuit Current
VCXO Control Voltage
mA
VCON
0
V
mA
V DD
V
MAX.
UNITS
52
MHz
3. AC Electrical Specifications
PARAMETERS
SYMBOL
CONDITIONS
Input Crystal Frequency
MIN.
TYP.
20
Output Clock Rise/Fall Time
(Standard Drive)
0.3V ~ 3.0V with 15 pF
load
2.4
Output Clock Rise/Fall Time
(High Drive)
0.3V ~ 3.0V with 15 pF
load
1.2
Output Clock Duty Cycle
Measured @ 50% V DD
ns
45
50
55
%
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 11/8/07 Page 2
VCXO IC Die for 20 to 52MHz Parallel Resonant Crystals
4. Voltage Control Crystal Oscillator (3.3V)
PARAMETERS
SYMBOL
VCXO Stabilization Time *
T VCXOSTB
CONDITIONS
MIN.
TYP.
From power valid
VCXO Tuning Range
F XIN = 20 - 52MHz;
XTAL C 0 /C 1 < 250
0V  VCON  3.3V
CLK output pullability
VCON=1.65V 1.65V
MAX.
UNITS
10
ms
500
ppm
200
ppm
VCXO Tuning Characteristic
150
ppm/V
Pull range linearity
10
VCON input impedance
%
80
0V  VCON  3.3V, -3dB
VCON modulation BW
kΩ
10
kHz
Note: Parameters denoted with an asterisk (*) represent nominal characterization data and are not production tested to any specific
limits.
5. Crystal Specifications
PARAMETERS
SYMBOL
CONDITIONS
MIN.
F XIN
Parallel Fundamental Mode
20
Crystal Resonator Frequency
Crystal Loading Rating
C L (xtal)
Crystal Pullability
TYP.
At Vcon = 1.65V
MAX.
UNITS
52
MHz
9.5
pF
C 0 /C 1 (xtal)
AT cut
250
-
RE
AT cut
30
Ω
Recommended ESR
Note: Crystal Loading rating: 9.5pF is the loading the crystal sees from the VCXO chip at VCON = 1.65V. It is assumed that the crystal
will be at nominal frequency at this load. If the crystal requires more load to be at nominal frequency, the additional load must be added
externally. This however may reduce the pull range.
6. Jitter specifications
PARAMETERS
CONDITIONS
MIN.
TYP.
MAX.
UNITS
Period jitter RMS
51.84MHz
2.3
ps
Period jitter peak-to-peak
51.84MHz
18
ps
Integrated jitter RMS
Integrated 12 kHz to 20 MHz at 51.84MHz
1
ps
7. Phase noise specifications
PARAMETERS
FREQUENCY
@10Hz
@100Hz
@1kHz
@10kHz
@100kHz
UNITS
Phase Noise relative to carrier
51.85MHz
-65
-90
-120
-140
-147
dBc/Hz
Note: Phase Noise at VCON = 0V
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 11/8/07 Page 3
VCXO IC Die for 20 to 52MHz Parallel Resonant Crystals
PAD COORDINATES
Pad #
Name
X (m)
Y (m)
Description
7
GND
1042
109
Ground.
10
GND
1400
259
Ground.
13
CLK
1400
716
Clock Output.
18
S2
1232
1365
Frequency Selector pad. Has internal pull down.
19
S1
1042
1365
Frequency Selector pad. Has internal pull down.
20
S0
854
1365
Frequency Selector pad. Has internal pull down.
21
VDD
659
1365
Power Supply.
23
VDD
459
1365
Power Supply.
25
OE
194
1365
Used to Enable/Disable the output. Has internal pull up.
27
XIN
109
1017
Crystal input pad. See Crystal Specifications on page 3.
29
XOUT
109
646
Crystal output pad. See Crystal Specifications on page 3.
31
VCON
109
181
Voltage control input.
ORDERING INFORMATION
For part ordering, please contact our Sales Department:
47745 Fremont Blvd., Fremont, CA 94538, USA
Tel: (510) 492-0990 Fax: (510) 492-0991
PART NUMBER
The order number for this device is a combination of the following:
Device number, Package type and Operating temperature range
PLL502-50 D C
PART NUMBER
TEMPERATURE
C=COMMERCIAL (0°C to 70°C)
I=INDUSTRAL (-40°C to 85°C)
PACKAGE TYPE
D=DIE
Order Number
Marking
Package Option
PLL502-50DC
P502-50DC
Die (Waffle Pack)
PhaseLink Corporation, reserves the right to make changes in its products or specifications, or both at any time without notice. The information
furnished by Phaselink is believed to be accurate and reliable. However, PhaseLink makes no guarantee or warranty concerning the accuracy of said
information and shall not be responsible for any loss or damage of whatever nature resulting from the use of, or reliance upon this product.
LIFE SUPPORT POLICY: PhaseLink’s products are not authorized for use as critical components in life support devices or systems
without the express written approval of the President of PhaseLink Corporation.
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 11/8/07 Page 4