MPFC-115-3PH-270-FP Power Factor Correction Full-brick Military Grade 3-Phase Power Factor Correction Module 115Vrms L-N 45Hz to 800Hz 270Vdc 1.5kW 2.0kW 1.5% 94% Input Voltage Input Frequency Output Voltage Output Power Surge Capability THD Full Load Efficiency The MilCOTS 3-phase MPFCQor Power Factor Correction module is an essential building block of an AC-DC power supply. Used in conjunction with SynQor’s MCOTS AC line filter and a limited amount of stabilizing capacitance, the 3-Phase MPFCQor will draw a nearly perfect sinusoidal current (1.5% THD) from each phase of a 3-phase AC input. It is designed and manufactured to comply with a wide range of military standards. LE ODU N-M -FP- TION M 0 7 C 2 PH- CORRE 1.5kW 10 c 15-3 1WX C-1 FACTOR 270Vd F P ODE M ER s 3Φ C E CAG POW15Vrm Hz ~1 z - 800 86807 H 5 45 S14 S/N Operational Features • • • • • • • • • • • • • Full-brick form factor 1.5kW continuous (2.0kW surge capability) Semi-regulated output: 270Vdc Compatible with Military Standard 60Hz, 400Hz and var. freq. systems Meets military standards for harmonic content Enables systems with repetitive load transients to pass MIL-STD-461 Minimal inrush current Balanced phase currents Minimal external output capacitance needed Supports full load current during startup ramp Additional Half-brick input filter available to meet full EMI 100°C max baseplate temperature at full power Compatible with SynQor MCOTS - 270 / Bus Converters Designed and manufactured in the USA Control Features • • • • • All control pins referenced to separate ground with functional isolation PFC Enable and Battle Short inputs AC and DC Power Good outputs Clock synchronization output 3.3V standby power output Protection Features Compliance Features 3-phase PFCQor series converters are designed to meet: (With an MCOTS 3-phase AC input filter) • MIL-STD-704 (A-F) w/ leading power factor • MIL-STD-461 (C, D, E, F) • MIL-STD-1399 • MIL-STD-810G • • • • Output current limit and auto-recovery short circuit protection Auto-recovery input under/over-voltage protection Auto-recovery output over-voltage protection Auto-recovery thermal shutdown Contents Features Page No. Mechanical Features • Industry standard Full-brick-size • Size: 2.486” x 4.686” x 0.512” (63.14 x 119.02 x 13.0 mm) • Weight: 11.3oz (320g) Product # MPFC-115-3PH-270-FP Phone 1-888-567-9596 Typical Application. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Technical Specification. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Mil-STD-810G Qualification. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Application Section. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Encased Mechanical. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Ordering Information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 www.synqor.com Doc.# 005-0006513 Rev. 5 09/25/2015 Page 1 MPFC-115-3PH-270-FP Input: 115Vrms 3Φ Output: 270Vdc Power: 1.5kW Typical Application Typical Application of the 3-Phase PFC Module SynQor 3-Phase PFC Module Baseplate SHIELD LINE A FUSE1 MOV1 FUSE2 MOV2 MOV3 FUSE3 LINE A PFC A SynQor 3-Phase AC Line Filter LINE B LINE C 2.2 µH 1 LEAVE FLOATING +VOUT +VIN Boost Converter LINE B PFC B PFC Rectifier 2.2 µH 2.2 µH LINE C PFC C +MIDBUS2 -VOUT SynQor DC-DC Converter RP >15µF >320V rating +VOUT CB >40µF >240V rating -VIN -VOUT PE GND 3.3V AUX SYNC OUT A7 A10 PFC ENA A6 A9 DC GOOD A5 A8 BATTLE SHORT Reserved AC GOOD A4 GND ISO Reserved A3 TVS1 Reserved TVS2 A2 TVS3 A1 FUNCTIONAL ISOLATION +VIN +VOUT SynQor DC-DC Converter RP 3 CB -VIN 1 SHIELD pin must be left floating, but may be externally connected to plane under unit near top of PCB to contain high frequency EMI. 2 Power drawn from loosely regulated +MIDBUS output avoids boost converter losses. 3 CB & RP are for stabilizing the system when DC-DC converters are used as the PFC module’s load. Additional Hold-Up capacitance may be required for normal operation through interruptions in input power. ● ● ● ● ● ● ● ● ● +VIN +VOUT SynQor DC-DC Converter RP CB Suggested Parts: F1: MOV1: TVS1: -VOUT 250VAC, 10A; Littelfuse 0216010.MXEP 300VAC, 60J; EPCOS S10K300E2 220VJ; VISHAY 1.5KE200CA -VIN -VOUT Figure A: Typical Application of the PFCQor module to create a multiple-output 3-Phase AC-DC Power Supply Product##MPFC-115-3PH-270-FP MPFC-115-3P-270-FP Product Phone 1-888-567-9596 1-888-567-9596 Phone www.synqor.com www.synqor.com Doc.#005-0006513 005-0006513Rev.Rev.5 Doc.# 5 09/25/2015 09/25/2015 Page 2 MPFC-115-3PH-270-FP Input: 115Vrms 3Φ Output: 270Vdc Power: 1.5kW Technical Specification MPFC-115-3PH-270-FP Electrical Characteristics Operating Conditions: 115 Vrms L-N (199 Vrms L-L) 3-phase 400Hz; 1.5kW output; baseplate temperature = 25°C unless otherwise noted. Full operating baseplate temperature range is -55°C to +100°C. Specifications subject to change without notice. Parameter Min. Typ. Max. Units Notes & Conditions ABSOLUTE MAXIMUM RATINGS Input Voltage - Operating Continuous 200 Vrms L-N 346 Vrms L-L Transient (≤1s) 240 Vrms L-N 416 Vrms L-L Input Voltage - Non-Operating 200 Vrms L-N 346 Vrms L-L Operating Temperature -55 100 °C Baseplate temperature Storage Temperature -65 135 °C Voltage at PFC ENA / BATTLE SHORT pins -2 7 V Relative to CTL RETURN pin INPUT CHARACTERISTICS Operating Input Voltage Available output power reduced below 100 Vrms L-N Continuous 85 140 Vrms L-N 147 to 242 Vrms L-L Transient (≤1s) 180 Vrms L-N 312 Vrms L-L Operating Input Frequency 45 800 Hz Recommended Operating Range with Line Imbalance Amplitude Imbalance 5 Vrms L-N Phase Imbalance 5 deg Thresholds for Phase Drop Warning & Shutdown Warning causes BATTLE SHORT pin to go high Amplitude Imbalance 37 Vrms L-N 0.25s shutdown delay Phase Imbalance 18 deg “ Input Under-Voltage Lockout 40 Vrms L-N 1.0s shutdown delay Inrush of AC Input Current 1 A Output cap is charged later during startup ramp Distortion Component of Power Factor 0.999 Fraction of total RMS current at fundamental Reactive Power (per phase) 64 VAR Zero load (see note 1); Leading Total Harmonic Distortion of AC Input Current 1.5 2.5 % Enabled AC Input Power, No Load (sum of phases) See note 1 400Hz 9.0 W 60Hz 6.1 W Disabled AC Input Power (sum of phases) See note 1 400Hz 6.0 W 60Hz 3.1 W Maximum Steady-State Input Current (per phase) 7.2 Arms Provided for rating of circuit / fuse +VOUT OUTPUT CHARACTERISTICS Output Voltage Set Point 272 275 278 V Zero load Output Voltage Droop -22 -18 -12 V 0.0 to 6.0 Amps Output Voltage Ripple and Noise (Differential Mode) With minimum output capacitance Peak-to-Peak over Full Frequency Spectrum 1.8 V RMS Ripple over Full Frequency Spectrum 0.9 V Operating +VOUT Current Range Assumes no additional power drawn from +MIDBUS Continuous 0.0 6.0 A Reduced when +MIDBUS < 200 V Surge Limit 8.0 A “ Recommended Output Capacitance Minimum 20 uF Can be reduced by a factor of (PboostMax / 2kW) Maximum 1 mF Use R || D for additional holdup cap Output Over-Voltage Limit Threshold (Full Temp Range) 300 310 320 V Cycle-by-cycle limit +MIDBUS OUTPUT CHARACTERISTICS MIDBUS Voltage Set Point For main regulated output, see section above Over Load, Temp, and Line Range of 85 - 180 Vrms L-N 160 220 V See “+MIDBUS Regulation” in application section Over Load, Temp, and Line Range of 100 - 180 Vrms L-N 190 220 V MIDBUS Voltage Ripple and Noise (Differential Mode) With minimum output capacitance Peak-to-Peak over Full Frequency Spectrum 4.4 V RMS Ripple over Full Frequency Spectrum 2.2 V Operating +MIDBUS Current Range Includes boost converter input current Continuous 0 7.5 A Reduces rated power when +MIDBUS < 200 V Surge Current Limit Setpoint 10.0 A Reduces surge power when +MIDBUS < 200 V Recommended Output Capacitance Minimum 40 uF Maximum 1 mF Use R || D for additional holdup cap DYNAMIC CHARACTERISTICS Turn-On Transient Start-up Inhibit Time 300 ms From PFC ENA to beginning of startup ramp Turn-On Time 850 ms From PFC ENA to DC GOOD +VOUT Overshoot 1 % Auto-Restart Time 1 s See “Protection Features” in application section Product##MPFC-115-3PH-270-FP MPFC-115-3P-270-FP Product Phone 1-888-567-9596 1-888-567-9596 Phone www.synqor.com www.synqor.com Doc.#005-0006513 005-0006513Rev.Rev.5 Doc.# 5 09/25/2015 09/25/2015 Page 3 MPFC-115-3PH-270-FP Input: 115Vrms 3Φ Output: 270Vdc Power: 1.5kW Technical Specification MPFC-115-3PH-270-FP Electrical Characteristics (continued) Operating Conditions: 115 Vrms L-N (199 Vrms L-L) 3-phase 400Hz; 1.5kW output; baseplate temperature = 25°C unless otherwise noted. Full operating baseplate temperature range is -55°C to +100°C. Specifications subject to change without notice. Parameter Min. Typ. EFFICIENCY From AC 3-Phase Input to Main Output 100% Load (1.5kW) 94.1 50% Load 94.0 From AC 3-Phase Input to MIDBUS Output 100% Load (1.5kW) 95.4 50% Load 95.2 FEATURE CHARACTERISTICS AC GOOD Line voltage for AC GOOD to stay high 80 Low-line threshold for AC GOOD -> High 81 High-line threshold for AC GOOD -> High 135 Low State 0 Internal Pull-Up Voltage 3.3 Internal Pull-Up Resistance 10 DC GOOD Rising +VOUT for DC GOOD -> High 240 Falling +VOUT for DC GOOD -> Low 140 Low State 0 Internal Pull-Up Voltage 3.3 Internal Pull-Up Resistance 10 PFC ENA Off State Input Voltage 2.4 On State Input Voltage Internal Pull-Up Voltage 3.3 Internal Pull-Up Resistance 10 BATTLE SHORT Normal State Input Voltage 2.4 Protection-Disabled State Input Voltage Internal Pull-Up Voltage 3.3 Internal Pull-Up Resistance 10 3.3V AUX Output Voltage Range 3.19 3.30 Source Current SYNC OUT High State Output Voltage 2.9 3.1 Low State Output Voltage 0.2 Free Running Switching Frequency 186.5 196.5 ISOLATION CHARACTERISTICS Isolation Voltage Any Pin to Baseplate Power pins 2-9 to control pins A1-A10 Isolation Resistance 100 Isolation Capacitance 100 TEMPERATURE LIMITS FOR POWER DERATING CURVES Semiconductor Junction Temperature Board Temperature Transformer Temperature Maximum Baseplate Temperature, Tb Over-Temperature Protection Disable Threshold 130 Warning Threshold 125 Enable Threshold 125 RELIABILITY CHARACTERISTICS Calculated MTBF (MIL-217) MIL-HDBK-217F 853 Calculated MTBF (MIL-217) MIL-HDBK-217F 142 Field Demonstrated MTBF Max. Units Notes & Conditions % % % % 145 0.4 0.4 0.8 0.8 3.43 100 0.4 201.5 Includes both PFC Rectifier and Boost stages 400 Hz (0.3% higher at 60 Hz) 400 Hz (0.6% higher at 60 Hz) Power drawn from MIDBUS avoids Boost losses 400 Hz (0.3% higher at 60 Hz) 400 Hz (0.6% higher at 60 Hz) AC power good output (positive logic) Vrms L-N Vrms L-N Vrms L-N V 0.2mA sink current V kΩ DC Power Good output (positive logic) V V V 0.2mA sink current V kΩ PFC enable input (pull low to enable unit) V V V kΩ Battle short input (pull low to disable protection) V V V kΩ 3.3V output always on regardless of PFC ENA state V Over line, load, temp, and life mA Synchronization output at switching frequency V 4mA source current V 4mA sink current kHz Over temp and life 2150 1000 V V MΩ pF 125 125 125 100 °C °C °C °C °C °C °C Basic insulation Functional insulation Measured at surface of internal PCB Warning causes BATTLE SHORT pin to go high 103 Hrs. Ground Benign, Tb = 70°C 103 Hrs. Ground Mobile, Tb = 70°C 103 Hrs. See our website for details Note 1: External input filter will contribute to this parameter; refer to the appropriate filter datasheet. Product##MPFC-115-3PH-270-FP MPFC-115-3P-270-FP Product Phone 1-888-567-9596 1-888-567-9596 Phone www.synqor.com www.synqor.com Doc.#005-0006513 005-0006513Rev.Rev.5 Doc.# 5 09/25/2015 09/25/2015 Page 4 MPFC-115-3PH-270-FP Input: 115Vrms 3Φ Output: 270Vdc Power: 1.5kW Mil-STD-810G Qualification Mil-COTS MIL-STD-810G Qualification Testing MIL-STD-810G Test Fungus Method 508.6 Description Table 508.6-I 500.5 - Procedure I Storage: 70,000ft. / 2 Hr. duration 500.5 - Procedure II Operating; 70,000ft. / 2 Hr. duration; Ambient Temperature Rapid Decompression 500.5 - Procedure III Storage: 8,000ft. to 40,000ft. Acceleration 513.6 - Procedure II Operating - 15g’s Salt Fog 509.5 Storage 501.5 - Procedure I Storage: 135°C / 3 hrs 501.5 - Procedure II Operating: 100°C / 3 hrs 502.5 - Procedure I Storage: -65C / 4 hrs 502.5 - Procedure II Operating: -55C / 3 hrs Temperature Shock 503.5 - Procedure I - C Storage: -65C to 135C; 12 cycles Rain 506.5 - Procedure I Wind Blown Rain Immersion 512.5 - Procedure I Non-Operating Humidity 507.5 - Procedure II Aggravated cycle @ 95% RH (Figure 507.5-7 aggravated temp - humidity cycle, 15 cycles) Random Vibration 514.6 - Procedure I 10-2000 Hz, PSD level of 1.5 g2/Hz(54.6grms), duration = 1 hr/axis 516.6 - Procedure I 20g’s peak, 11ms, Functional Shock (Operating no load) (saw tooth) 516.6 - Procedure VI 514.6 - Category 14 510.5 - Procedure I Bench Handling Shock Rotary wing aircraft - helicopter, 4hrs/axis, 20g’s (sine sweep from 10 - 500HZ) Blowing Dust 510.5 - Procedure II Blowing Sand Altitude High Temperature Low Temperature Shock Sinusoidal vibration Sand and Dust Mil-COTS DC-DC Converter and Filter Screening Screening S-Grade M-Grade Baseplate Operating Temperature -55˚C to +100˚C -55˚C to +100˚C Storage Temperature -65˚C to +135˚C -65˚C to +135˚C ● ● Pre-Cap Inspection Temperature Cycling Burn-In Process Description IPC-610, Class III Method 1010, Condition B, 10 Cycles 100˚C Baseplate 12 Hours 96 Hours 100% 25˚C -55˚C, +25˚C, +100˚C MIL-STD-2008 ● ● Final Electrical Test Final Visual Inspection Product##MPFC-115-3PH-270-FP MPFC-115-3P-270-FP Product ● Phone 1-888-567-9596 1-888-567-9596 Phone www.synqor.com www.synqor.com Doc.#005-0006513 005-0006513Rev.Rev.5 Doc.# 5 09/25/2015 09/25/2015 Page 5 MPFC-115-3PH-270-FP Input: 115Vrms 3Φ Output: 270Vdc Power: 1.5kW Application Section As seen in Figure A, this PFC rectifier takes nominal 115 Vrms (L-N) / 199 Vrms (L-L) 3-phase delta AC at its LINE A/B/C inputs, and uses a buck converter to create a DC output at the +MIDBUS pin. An additional cascaded boost stage converts +MIDBUS to the main output at the pin +VOUT. Both outputs (+MIDBUS and +VOUT) are referenced to the -VOUT pin and are not isolated from the line inputs. Power Dissipation (W) 100 POWER TOPOLOGY OVERVIEW PERFORMANCE 400 Hz; +VOUT load 60 Hz; +VOUT load 400 Hz; +MIDBUS load 60 Hz; +MIDBUS load 80 60 40 20 0 0 Efficiency and Power Dissipation 500 1000 1500 Output Power (W) Output power may be drawn either from the buck output at +MIDBUS or from the boost output at +VOUT. Drawing power directly from +MIDBUS avoids boost-stage losses and therefore results in higher efficiency. Nonetheless, drawing power from the +VOUT boost output may be desirable even though it incurs an efficiency penalty because +VOUT has better regulation, remaining at its normal output voltage even during line interruptions (provided holdup capacitance is placed at +MIDBUS). Efficiency data are shown in Figure 1, and the corresponding power dissipation data are shown in Figure 2. Figure 2: Power dissipation vs. output power. Input Current Distortion Legacy diode rectifier solutions typically use bulky magnetics, while having relatively high distortion at line harmonics. In contrast, this modern PFC rectifier switches at high frequency, providing very low harmonic content while using small and light internal magnetics. Active current control yields low-distortion and well-balanced phase currents, even with phase and/or amplitude imbalance on the line inputs. 96% Efficiency (%) 95% 94% 93% 60 Hz; +MIDBUS load 92% 400 Hz; +MIDBUS load 60 Hz; +VOUT load 91% 400 Hz; +VOUT load 90% 0 500 1000 Output Power (W) Figure 1: Efficiency vs. output power. 1500 Figure 3: Typical 400 Hz input current waveforms at 50% rated output power; includes MACF-115-3PH-UNV-HT external input filter module. Input current distortion is typically excellent above 25% of full rated output power, increasing somewhat at light loads due to buck converter discontinuous mode operation (See Figure 4). Product##MPFC-115-3PH-270-FP MPFC-115-3P-270-FP Product Phone 1-888-567-9596 1-888-567-9596 Phone www.synqor.com www.synqor.com Doc.#005-0006513 005-0006513Rev.Rev.5 Doc.# 5 09/25/2015 09/25/2015 Page 6 MPFC-115-3PH-270-FP Input: 115Vrms 3Φ Output: 270Vdc Power: 1.5kW Application Section If MIL-STD-704 revision F compliance is required with no leading power factor, please contact factory application support for further information on correcting the input current phase without resorting to bulky inductors. Input Current THD (%) 6.0% 5.0% 4.0% POWER CIRCUITRY OVERVIEW 3.0% Inrush and Startup 2.0% 1.0% 0.0% 0 500 1000 1500 Output Power (W) Figure 4: Input Current THD over full load range; input 3phase 400 Hz 115 Vrms (L-N); includes external input filter module, part number MACF-115-3PH-UNV-HT. Reactive Power at Fundamental The buck topology affords excellent control over inrush current. While a small amount of EMI capacitance does reside before the main switches, any bulk capacitance is downstream of the buck stage. Even very large holdup capacitors can be charged gracefully with an actively controlled current limit. Full rated output current is available even during the startup ramp. Figure 6 shows a typical startup ramp with both capacitive and constant-current loading. The ‾‾‾‾‾‾‾‾‾ PFC ENA pin must be pulled low to enable the unit. Also, startup will proceed only after the AC line input rises above 81 Vrms (L-N) and the AC GOOD signal is asserted. 0.6 1.6 0.5 1.4 60 Hz 115 Vrms L-N MIL-STD-1399 Limit 400 Hz 115 Vrms L-N MIL-STD-704A Limit 0.4 0.3 1.2 1.0 0.8 0.6 0.2 0.4 0.1 Output Power (kW) Apparent Input Power per Phase (kVA) Line capacitance is necessarily integral to the input EMI filter circuitry, which is divided between internal filtering and the external MACF-115-3PH-UNV-HT input filter module. Total reactive power (including the external input filter module) is approximately 100 VAR per phase when running at 400 Hz. This can be seen directly in Figure 3, where input current is leading input voltage by 20 degrees at half rated load power with a 400 Hz input. At full load and 400 Hz operation, the leading phase angle of input current would be 10 degrees. The same conditions with a 60 Hz input would result in an input current phase lead of only 3 degrees at half load or 1.5 degrees at full load. Figure 5 shows the equivalent power factor in comparison with selected military standards. 0.2 0.0 0.0 1.0 0.9 0.8 0.7 0.6 0.5 0.4 Leading Power Factor Figure 5: Input power factor as a function of operating power level; includes MACF-115-3PH-UNV-HT external input filter module. MIL-STD-704A compliance is based on a fully loaded condition. Product##MPFC-115-3PH-270-FP MPFC-115-3P-270-FP Product Phone 1-888-567-9596 1-888-567-9596 Phone Figure 6: Startup with constant current full rated load: +VOUT (Ch1), +VOUT pin current (Ch2), and +MIDBUS (Ch3); 1mF at +MIDBUS; 20 uF at +VOUT. The glitch in current on initial startup is due to the electronic load. Line Transients The input stage blocks even severe line transients from reaching the output, allowing generous headroom above typical operating input voltage levels. Line Frequency and Phase Rotation The input stage has no dependence on line frequency; input frequency transients over the full 45 – 800 Hz operating range are handled seamlessly. The unit operates equally well with either ABC or CBA input voltage phase rotation. www.synqor.com www.synqor.com Doc.#005-0006513 005-0006513Rev.Rev.5 Doc.# 5 09/25/2015 09/25/2015 Page 7 MPFC-115-3PH-270-FP Input: 115Vrms 3Φ Output: 270Vdc Power: 1.5kW Application Section Common Mode Voltage +MIDBUS Regulation The +VOUT and +MIDBUS outputs share a -VOUT return, and all three pins are non-isolated with respect to the 3-phase line inputs. Measured relative to the instantaneous average of all three line inputs (a pseudo-neutral voltage), the -VOUT pin inherently has common-mode ripple voltage at 3x line frequency and approximately 50 Vpk-pk (at nominal line voltage). This is shown in Figure 7, where each signal is measured using a differential probe referenced to pseudoneutral line voltage. This ripple is normally not observable, and causes no external current to flow, since in the intended application the AC generator is not referred to the DC outputs. Differentially, the voltage from -VOUT to +MIDBUS is a constant 205 V DC with low noise, as seen in Figure 8. Also note that the MIDBUS output is symmetric to the input pseudo-neutral voltage, with the DC component of -VOUT at 102.5 V DC and +MIDBUS at +102.5 V DC. Being a buck converter, the main PFC rectifier can only create a +MIDBUS output lower than the instantaneous line-toline input voltage. The loosely-regulated nominal +MIDBUS output is 205 V, which holds constant at higher inputs, but drops at lower inputs (See Figure 9). +MIDBUS Voltage (V) 250 200 150 100 50 0 85 95 105 115 125 135 AC Line Voltage (Vrms L-N) Figure 9: Steady-state +MIDBUS vs. AC line voltage. Typical values shown at 25% load power; subtract 5V at full load. +VOUT Regulation and Droop Figure 7: Typical voltages at power pins relative to the instantaneous average of line input voltages: the pseudoneutral voltage. The cascaded boost stage compensates for variations at +MIDBUS. The boost stage is limited to 50% duty cycle, so it is able to maintain nominal +VOUT when the +MIDBUS voltage is greater than half the +VOUT voltage. The main +VOUT output (formed by a cascaded boost converter) is tightly regulated at no-load, but is intentionally allowed to droop down with increased load current (See Figure 10). This semi-regulated characteristic is generally supported by military standards and has two important advantages over tight regulation. +VOUT Voltage (V) 280 275 270 265 260 255 Figure 8: Differential output voltage ripple at +VOUT (Ch1) and +MIDBUS (Ch3); both relative to -VOUT; 1.5 kW output power. Product##MPFC-115-3PH-270-FP MPFC-115-3P-270-FP Product Phone 1-888-567-9596 1-888-567-9596 Phone 0 1 2 3 4 5 6 +VOUT Terminal Current (A) Figure 10: +VOUT voltage vs. load current: a controlled droop characteristic. www.synqor.com www.synqor.com Doc.#005-0006513 005-0006513Rev.Rev.5 Doc.# 5 09/25/2015 09/25/2015 Page 8 MPFC-115-3PH-270-FP Input: 115Vrms 3Φ Output: 270Vdc Power: 1.5kW Application Section First, if the +VOUT output is feeding regulated converters with their constant power input characteristic, then boost droop represents additional output resistance which contributes to input-system stability of these downstream converters. Second, a droop characteristic generally improves the worstcase peak deviation of the +VOUT output in response to transient load steps. The peak deviation is relative to the voltage immediately before the transient. Therefore, if at full load the nominal output voltage starts lower due to droop, when the load is suddenly removed, the resulting peak deviation will also be lower. The boost droop is temperature dependent; under load, the +VOUT voltage will be slightly lower when the unit is hot. Restrictions on Paralleling +VOUT or +MIDBUS outputs must be individually isolated with external isolated DC/DC converters before wiring the isolated output side in parallel. If direct output paralleling is required, please contact the factory for support. Input filters should be wired to each module individually to keep common mode choke currents balanced. With proper design, there is no practical limit to the number of units that can be placed in parallel. The buck PFC rectifier inherently can only deliver power in the forward direction because each input switch is wired in series with a high voltage diode. The same is true of the boost stage which uses a high voltage diode rectifier. Parallel operation is inherently N+1 redundant. CTL RETURN should be wired in parallel to provide a common control ground. The 3.3V AUX output may be paralleled, but total current drawn from 3.3VAUX should not exceed the rating of a single unit. SYNC OUT pins should not be interconnected and may be left open. ‾‾‾‾‾‾‾‾‾ PFC ENA inputs should be wired in parallel. As shown in Figure 18, the AC and DC GOOD outputs have series 301 ohm resistors as part of the ESD protection circuit. If these lines are paralleled, the logic-low margin is degraded when only one unit is pulling these lines low, with the apparent pull-up resistance divided by the number of units. Therefore, if the AC or DC GOOD outputs are used in a parallel application, they should be buffered by the external application circuit, as shown in Figure 11. Alternatively, assuming that the inputs and outputs of all units share the same voltages, the AC and DC GOOD outputs could be derived from just a single unit. Product##MPFC-115-3PH-270-FP MPFC-115-3P-270-FP Product Phone 1-888-567-9596 1-888-567-9596 Phone Figure 11: Combining AC or DC GOOD outputs of multiple units. POWER RATINGS Continuous Power Rating Power is rated to 1500 W continuous above 100 Vrms (L-N), and de-rated linearly to 1275 W as the input drops to 85 Vrms (L-N) (See Figure 12). Full power is available even at a baseplate temperature of 100 °C, while maintaining internal temperatures to less than 125 °C (See Figure 13). Current Limit and Surge Power The buck stage contains a linear output current limit at 10 A. Thus the unit can deliver up to 2 kW with +MIDBUS at 200 V. The MIDBUS voltage is reduced at low input voltage (See Figure 9) so the maximum available power is reduced at low line (See Figure 12). Thermally, the unit can operate indefinitely near this current/surge power limit while maintaining internal temperatures to less than 125 °C, provided the baseplate is maintained at or below 85 °C (See Figure 13). With +VOUT regulated however, the input to the boost stage is constant-power: if +MIDBUS falls, the boost input current will rise. Therefore, if the unit is loaded from +VOUT such that the buck 10 A current limit becomes activated, the +MIDBUS voltage will collapse at a rate governed by the capacitance at +MIDBUS. It is therefore recommended to operate the converter at rated power, approaching the surge limit only during transient events. www.synqor.com www.synqor.com Doc.#005-0006513 005-0006513Rev.Rev.5 Doc.# 5 09/25/2015 09/25/2015 Page 9 MPFC-115-3PH-270-FP Input: 115Vrms 3Φ Output: 270Vdc Power: 1.5kW Application Section Over-Temperature Shutdown Output Power (W) 2000 An integrated temperature sensor protects the unit from accidental damage by disabling the unit when the internal PCB temperature rises above 130 °C. The unit automatically restarts after cooling below 125 °C. The measurement point is tightly coupled thermally to the PFC rectifier power switching devices. At full rated power, OTP shutdown will typically engage at a baseplate temperature of 110 °C. Over-temperature shutdown can be disabled (along with phase drop shutdown) by connecting the ‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾ BATTLE SHORT signal to CTL RETURN. When not externally driven low, a high state on the ‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾ BATTLE SHORT pin indicates that overtemperature shutdown is imminent, transitioning 5 degrees below the shutdown threshold. (A high state on the BATTLE SHORT pin can also be due to a phase drop ‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾ condition). 1500 1000 Surge Limit 500 Power Rating 0 85 95 105 115 125 135 Input Voltage (Vrms L-N) Figure 12: Rated steady state power vs. input voltage. Output Power (W) 2000 PROTECTION FEATURES 1500 Short Circuit Current Limit Independent current sense resistors and comparators are connected in series with both the positive and negative outputs of the buck stage. If +MIDBUS is accidentally shorted, these comparators will quickly disable the unit, which will autorestart after 1 second. 1000 Surge Limit for 100-140 Vrms (L-N) Input Surge Limit for 85 Vrms (L-N) Input 500 Power Rating for 100-140 Vrms (L-N) Input Power Rating for 85 Vrms (L-N) Input Boost Current Limit 0 0 20 Figure 13: Rated temperature. 40 60 80 Baseplate Temperature (ºC) steady state power vs. 100 baseplate THERMAL DESIGN Output Over-Voltage Protection Internal Temps & Cooling Requirements Advanced thermal management techniques are employed to create a very low thermal resistance from power devices to baseplate, while retaining SynQor’s standard SMT construction and mechanically compliant potting compounds. When running at 100 °C baseplate and 1.5 kW, internal power devices are designed to run at junction temperatures less than 125 °C. At full rated load, these power devices typically run 20 °C above the baseplate temperature. When running steady state at the surge power limit of 2.0 kW, an 85 °C maximum baseplate temperature ensures power devices are still below 125 °C. Figure 13 shows the resulting power derating curve. Product##MPFC-115-3PH-270-FP MPFC-115-3P-270-FP Product Phone 1-888-567-9596 1-888-567-9596 Phone An independent current sense resistor and comparator implement a hardware cycle-by-cycle current limit in the boost stage. If +VOUT is accidentally overloaded while a large holdup capacitor is connected to +MIDBUS, this circuit will limit the boost current to approximately 14 A. There is also a high surge current bypass diode between +MIDBUS and +VOUT. A redundant hardware over-voltage protection circuit will disable the boost stage on a cycle-by-cycle basis if +VOUT ever rises above 310 V. The unit resumes normal operation immediately after the output voltage returns below this threshold. +MIDBUS Under-Voltage Shutdown Should the action of the linear 10 A buck current limit reduce the +MIDBUS voltage to less than 50 V for more than 150 ms, the unit will assume a sustained overload and will shut down. Auto-restart will occur after 1 second. This feature is also present during startup and thus serves to limit energy delivered into a shorted output (or a reversed-polarity electrolytic capacitor connected to the output externally). www.synqor.com www.synqor.com Doc.#005-0006513 005-0006513Rev.Rev.5 Doc.# 5 09/25/2015 09/25/2015 Page 10 MPFC-115-3PH-270-FP Input: 115Vrms 3Φ Output: 270Vdc Power: 1.5kW Application Section PULSED LOADS Pulsed Loads and Input Harmonics The CE101 input harmonics shown in Figure 16 were measured with a DC load. If instead the system inherently had a pulsed load, the pulsed power could be reflected back to the input and might cause a compliance failure. Special constant power control in the PFC is able to help significantly. Enabling Constant Input Power Control The 3-phase PFC has two modes of control. Within +/- 10 V of the nominal +MIDBUS set point, the buck stage output approximates a constant power characteristic. If the +MIDBUS capacitance is adequately sized, this control forces the capacitor to absorb (and deliver) a large fraction of the load pulse energy, and thus helps prevent the load variation from appearing on the PFC input. Within the +/- 10 V constant power window, average power flow is adjusted slowly, with a 40 ms time constant. On the other hand, if the pulsed load is too large or +MIDBUS capacitance is too small, and +MIDBUS deviates from nominal by more than +/- 10 V, then the controller will switch modes and attempt to quickly regulate the +MIDBUS voltage. This necessarily draws transient currents from the PFC input. +MIDBUS Cap Value for Const. Power By way of example, consider a 500 W load that pulses to 1.5 kW for 2 ms, repeating every 10 ms. This load can be considered a constant 700 W superimposed with a 100 Hz repetitive transient (+800 W @ 20% duty & -200 W @ 80% duty). So long as the +MIDBUS capacitor can supply the full transient energy (800 W for 2 ms = 1.6 J) while slewing +MIDBUS by less than 20 V, the PFC input will essentially draw constant input power. Capacitor energy supplied during the transient is ∆𝐸𝐸 = 𝐶𝐶 ∙ 𝑉𝑉 ∙ ∆𝑉𝑉 𝑜𝑜𝑜𝑜 𝐶𝐶 = ∆𝐸𝐸⁄(𝑉𝑉 ∙ ∆𝑉𝑉). In this example, 𝐶𝐶 = 1.6 𝐽𝐽⁄(200 𝑉𝑉 ∙ 20 𝑉𝑉) = 400 𝑢𝑢𝑢𝑢; when 𝐶𝐶𝑀𝑀𝑀𝑀 > 400 𝑢𝑢𝑢𝑢, the unit will operate with constant input power. A general solution for the minimum +MIDBUS capacitance (to enable constant power control) may be expressed as: or 𝐶𝐶𝑀𝑀𝑀𝑀 > (𝑃𝑃𝑚𝑚𝑚𝑚𝑚𝑚 − 𝑃𝑃𝑎𝑎𝑎𝑎 ) ∙ 𝐷𝐷𝑚𝑚𝑚𝑚𝑚𝑚 1 ∙ 𝑓𝑓𝑡𝑡𝑡𝑡𝑡𝑡𝑡𝑡 𝑉𝑉𝑀𝑀𝑀𝑀 ∙ ∆𝑉𝑉𝑀𝑀𝑀𝑀 𝐶𝐶𝑀𝑀𝑀𝑀 > (𝑃𝑃𝑎𝑎𝑎𝑎 − 𝑃𝑃𝑚𝑚𝑚𝑚𝑚𝑚 ) ∙ 𝐷𝐷𝑚𝑚𝑚𝑚𝑚𝑚 1 ∙ 𝑓𝑓𝑡𝑡𝑡𝑡𝑡𝑡𝑡𝑡 𝑉𝑉𝑀𝑀𝑀𝑀 ∙ ∆𝑉𝑉𝑀𝑀𝑀𝑀 where values in parenthesis are from the above example: 𝑃𝑃𝑎𝑎𝑎𝑎 is the pulsed load average power (ex. 700 W) 𝑃𝑃𝑚𝑚𝑚𝑚𝑚𝑚 is the pulsed load maximum power (1500 W) 𝑃𝑃𝑚𝑚𝑚𝑚𝑚𝑚 is the pulsed load minimum power (500 W) 𝐷𝐷𝑚𝑚𝑚𝑚𝑚𝑚 is the maximum power duty cycle (0.2) Product##MPFC-115-3PH-270-FP MPFC-115-3P-270-FP Product Phone 1-888-567-9596 1-888-567-9596 Phone 𝐷𝐷𝑚𝑚𝑚𝑚𝑚𝑚 is the minimum power duty cycle (0.8) 𝑓𝑓𝑡𝑡𝑡𝑡𝑡𝑡𝑡𝑡 is the pulsed load frequency (100 Hz) 𝑉𝑉𝑀𝑀𝑀𝑀 is 200 V, the nominal +MIDBUS voltage. ∆𝑉𝑉𝑀𝑀𝑀𝑀 is 12 V, applying a safety factor to the 20 Vpk-pk maximum +MIDBUS voltage deviation required to maintain constant power control. The +MIDBUS capacitor does not necessarily need to be large enough to satisfy the above equation. In applications where the load is essentially constant, transients are infrequent, or where input current transients are acceptable, the minimum 40 uF +MIDBUS capacitance may be used. POWER INTERRUPTS AND HOLDUP Many systems need to operate through brief interruptions of AC input power. External capacitors placed at +MIDBUS, +VOUT, or both can be used to maintain power flow to critical loads during these input power interruptions. Holdup Capacitor Position The boost stage is able to maintain its normal output down to a +MIDBUS voltage of 135 V. It therefore makes sense to place a holdup capacitor at +MIDBUS if output regulation is important. The voltage rating for capacitors at +MIDBUS should be at least 240 V DC. Holdup capacitance may instead be placed at +VOUT if dips in the output voltage are acceptable during a line interruption. The voltage rating for capacitors at +VOUT should be at least 320 V DC. The internal PFC bias supply can be powered either from the line or from +VOUT. If a line interruption occurs, the unit will stay alive provided +VOUT stays above 100 V DC. The boost stage includes a bypass diode so that +VOUT is never more than a diode drop below +MIDBUS. Holdup Capacitor Value For uninterrupted operation through a line interruption, the holdup capacitor must store a certain amount of energy: 𝐸𝐸ℎ𝑜𝑜𝑜𝑜𝑜𝑜𝑜𝑜𝑜𝑜 = 𝑃𝑃𝑜𝑜𝑢𝑢𝑢𝑢 ∙ 𝑡𝑡𝑑𝑑𝑑𝑑𝑑𝑑𝑑𝑑 where: 𝑃𝑃𝑜𝑜𝑜𝑜𝑜𝑜 is the output power during the holdup event 𝑡𝑡𝑑𝑑𝑑𝑑𝑑𝑑𝑑𝑑 is the duration of the input power interruption www.synqor.com www.synqor.com Doc.#005-0006513 005-0006513Rev.Rev.5 Doc.# 5 09/25/2015 09/25/2015 Page 11 MPFC-115-3PH-270-FP Input: 115Vrms 3Φ Output: 270Vdc Power: 1.5kW Application Section Based on this energy requirement, the holdup capacitor value is: 𝐶𝐶ℎ𝑜𝑜𝑜𝑜𝑜𝑜𝑜𝑜𝑜𝑜 > 2 ∙ 𝐸𝐸ℎ𝑜𝑜𝑜𝑜𝑜𝑜𝑜𝑜𝑜𝑜 (𝑉𝑉𝑖𝑖2 − 𝑉𝑉𝑓𝑓2 ) where: 𝑉𝑉𝑖𝑖 is the initial holdup capacitor voltage immediately before the input power interruption. 𝑉𝑉𝑓𝑓 is the minimum voltage at which recovery is possible (due to 10 A +MIDBUS current limit). When the holdup capacitor is located at +MIDBUS, 𝑉𝑉𝑖𝑖 will be a function of line voltage (see Figure 9) and load current (+MIDBUS will typically droop to 200 V at full load). 𝑉𝑉𝑓𝑓 will be a function of load power during line interruption because of the 10 A +MIDBUS surge current limit. Below 150 V at +MIDBUS, the unit is unable to sustain 1500 W and will collapse if full load is applied. A significant safety margin on the holdup capacitor value is recommended to account for the following cumulative effects: 1) 2) 3) 4) 5) 6) Capacitor tolerance, aging, and temperature variation. Capacitor ESR and diode losses during the interruption. Variation in the initial +MIDBUS voltage 𝑉𝑉𝑖𝑖 due to line & load conditions immediately preceding the input power interruption. Current limit tolerance (~5%, which may raise the required 𝑉𝑉𝑓𝑓 to sustain load power). Boost stage efficiency (See Figure 2: 98.5% at full load). Fall and rise time of the input voltage, which increase the interval when the buck is unable to deliver power. Figure 14 shows an example response to a line interruption. Note that for the conditions in Figure 14, the ideal equation would predict 𝐶𝐶ℎ𝑜𝑜𝑜𝑜𝑜𝑜𝑜𝑜𝑜𝑜 > 6.6 mF. Yet the actual capacitor used was 7.5 mF, 14% higher due to the combined effects of items 1, 2, 5, and 6 shown above. When full load is drawn during a long input power interruption, the holdup capacitor physical size quickly becomes unreasonable. It is possible to reduce holdup power significantly by disabling non critical loads when the AC GOOD signal goes low. Figure 14: Response to 50ms line interruption; 60 Hz; 1250 W power drawn from +VOUT pin; 7.5 mF of holdup capacitance placed at +MIDBUS with series R || D network as shown in Figure 15. Line Brownout When considering recovery from a line dip / brownout, 𝑡𝑡𝑑𝑑𝑑𝑑𝑑𝑑𝑑𝑑 from the above 𝐶𝐶ℎ𝑜𝑜𝑜𝑜𝑜𝑜𝑜𝑜𝑜𝑜 equation must be carefully defined as the time during which the PFC is unable to recharge +MIDBUS. The PFC will be unable to contribute any power below 75 Vrms (L-N) for 150 V at +MIDBUS, or 65 Vrms (L-N) for 130 V at +MIDBUS. At lower line voltages or higher +MIDBUS voltages than these levels, diodes in the buck topology based PFC stage become reversed biased and no current will flow. R||D Network for Large Holdup Capacitors Capacitance in excess of the 1 mF maximum value requires an additional series R||D network for optimum stability, as shown in Figure 15. The resistor value should be 4.7 Ω, and must be adequately rated for pulse capability; a ceramic composition type is recommended. The diode must be rated for at least 300 V and pulse currents of 20 A. An ultrafast type is recommended for improved forward recovery characteristics. Figure 15: Series R||D network for capacitance at +MIDBUS or +VOUT in excess of 1 mF Product##MPFC-115-3PH-270-FP MPFC-115-3P-270-FP Product Phone 1-888-567-9596 1-888-567-9596 Phone www.synqor.com www.synqor.com Doc.#005-0006513 005-0006513Rev.Rev.5 Doc.# 5 09/25/2015 09/25/2015 Page 12 MPFC-115-3PH-270-FP Input: 115Vrms 3Φ Output: 270Vdc Power: 1.5kW Application Section EMI RECOMMENDATIONS Input Protection Input Filtering As shown in figure A, it is recommended to pair the PFC module with the separately available MACF-115-3PH-UNV-HT half brick 3-phase AC input filter module. Properly designed, a system using this external filter with the PFC module will pass the CE102 requirement from MIL-STD-461. Without an input filter, the full load input noise level (as measured by a standard 50 uH LISN) is 0.28 Vpk (109 dBuV) at the main switching frequency. With the specified input filter, this is reduced by approximately 45 dB to 1.6 mVpk (64 dBuV). Conducted emissions spectra are shown in Figure 16 and Figure 17. CE101 Measured at Independent Lab It is recommended to add protection devices to the input, which help mitigate the effects of surge events. Figure A shows an example input protection circuit, consisting of clamping devices on either side of the external EMI filter, along with input fusing. During a surge event, Metal Oxide Varistors (MOVs) clamp the peak voltage upstream of the EMI filter to about 900 V (L-L) and are able to withstand large pulse energies. Downstream of the EMI filter, Transient Voltage Suppressor (TVS) devices further limit the peak surge voltage to keep the PFC module input below its absolute maximum voltage ratings. Fuses in series with each input line will open in the event of catastrophic damage to the protection devices. SHIELD pin The SHIELD net is internally coupled via capacitors to both the input and output voltages and is therefore able to locally contain high frequency electromagnetic emissions. If desired, this pin can be connected to a floating shield plane underneath the unit, but should always be left floating. Internal bleeder resistors maintain the SHIELD pin at the pseudo-neutral line potential. Baseplate Electrical Connection All circuitry in the PFC module is electrically isolated from the baseplate by a multi-layer solid insulator. This isolation meets basic insulation requirements and is 100% hi-pot tested in production. Figure 16: Input current harmonic limit relative to peak at 400 Hz fundamental; output power 1.5 kW using 3 phase AC input line filter, part number MACF-115-3PH-UNV-HT. CE102 Measured at Independent Lab CONTROL PINS CTL RETURN CTL RETURN serves as the ground reference for all control signals. 1 kV of functional isolation is provided between CTL RETURN and all power pins. CTL RETURN may be externally connected to any of the power pins, attached to the application ground, or left floating. AC GOOD Figure 17: Input noise spectra with standard 50 uH LISN; output power 1.5 kW using 3 phase AC input line filter, part number MACF-115-3PH-UNV-HT. Product##MPFC-115-3PH-270-FP MPFC-115-3P-270-FP Product Phone 1-888-567-9596 1-888-567-9596 Phone The AC GOOD output will be pulled low when the input voltage goes below 80 Vrms (L-N) or above 145 Vrms (L-N) at the input pins of the PFC module. Hysteresis is 1 Vrms (L-N) at the low-line threshold and 10 Vrms (L-N) at the high-line threshold. The response time to an input power interruption is less than 1 ms at 400 Hz, and less than 5 ms at 60 Hz. AC GOOD will return to its normal high state 40 ms after the line voltage recovers. Internal interface circuitry is shown in Figure 18. www.synqor.com www.synqor.com Doc.#005-0006513 005-0006513Rev.Rev.5 Doc.# 5 09/25/2015 09/25/2015 Page 13 MPFC-115-3PH-270-FP Input: 115Vrms 3Φ Output: 270Vdc Power: 1.5kW Application Section DC GOOD The DC GOOD output will remain low on startup until +VOUT crosses the 240 V DC rising threshold. The falling threshold at 140 V DC is significantly lower, such that DC GOOD will usually stay high during an input power interruption. Therefore, DC GOOD is typically used to indicate successful startup, whereas AC GOOD is used to warn of a input power interruption. The typical DC GOOD response time is less than 1 ms. Internal interface circuitry is shown in Figure 18. Figure 18: Internal circuitry for AC GOOD and DC GOOD pins. ‾‾‾‾‾‾‾‾‾ PFC ENA The ‾‾‾‾‾‾‾‾‾ PFC ENA pin must be brought low to enable the unit. A 10.0 kΩ pull-up resistor is connected internally to 3.3V AUX. Therefore, if all control pins are left floating, the unit will be disabled. Internal interface circuitry is shown in Figure 19. Figure 20: Internal circuitry for ‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾pin. BATTLE SHORT 3.3V AUX The 3.3V AUX supply is always on, regardless of the ‾‾‾‾‾‾‾‾‾ PFC ENA state, and is rated up to 100 mA at 3.3 V (relative to CTL RETURN). This independent supply is powered from either the line input or main output. Therefore, if there is a line interruption but the +VOUT output voltage remains above 100 V due to external holdup capacitance (at +VOUT or +MIDBUS), the 3.3V AUX output will remain live. Some internal circuitry is also powered by 3.3V AUX, so if 3.3V AUX is externally shorted, the unit will be disabled. SYNC OUT The SYNC OUT signal generates a logic-level 50% duty cycle square wave at the main switching frequency. The SYNC OUT pin may be left open if not used. Internal interface circuitry is shown in Figure 21. Figure 21: Internal circuitry for SYNC OUT pin. Figure 19: Internal circuitry for ‾‾‾‾‾‾‾‾‾ PFC ENA pin. BATTLE SHORT ‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾ If the BATTLE ‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾ SHORT pin is externally pulled down to CTL RETURN, over-temperature protection and phase drop shutdown will be disabled. If the ‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾ BATTLE SHORT pin is not externally held low, the pin will go high to warn of either an impending over-temperature shutdown or an input phase drop shutdown. The over-temperature warning engages 5 °C below shutdown. The input phase drop warning is asserted 250 ms before shutdown. A 10.0 kΩ pull-up resistor is connected internally to 3.3V AUX. Internal interface circuitry is shown in Figure 20. Product##MPFC-115-3PH-270-FP MPFC-115-3P-270-FP Product Phone 1-888-567-9596 1-888-567-9596 Phone www.synqor.com www.synqor.com Doc.#005-0006513 005-0006513Rev.Rev.5 Doc.# 5 09/25/2015 09/25/2015 Page 14 MPFC-115-3PH-270-FP Input: 115Vrms 3Φ Output: 270Vdc Power: 1.5kW Encased Mechanical 2.486 ±0.020 [63.14] ±0.50] 2.000 [50.80] SEATING PLANE HEIGHT 0.512 0.005 [ 13.00 0.12] PIN EXTENSION 0.200 0.026 [ 5.09 0.66] 0.600 [15.24] 6 7 8 9 0.010 [0.25] TOP VIEW BOTTOM VIEW 4.686 0.020 [119.02 0.50] 0.079 x5 [2.00] A1 A3 A5 A7 A9 4.200 [106.68] A2 A4 A6 A8 A10 4.200 [106.68] 2.107 [53.53] 2 4 M3 STANDOFF x4 SEE NOTE 8 0.800 0.020 [20.32 0.50] NOTES: 1. APPLIED TORQUE PER SCREW SHOULD NOT EXCEED 6in-lb (0.7Nm) 2. BASEPLATE FLATNESS TOLERANCE IS 0.010” (0.25mm) TIR FOR SURFACE. 3. PINS 2-4, 6, 7, AND 9 ARE 0.080” (2.03mm) DIA. WITH 0.125” (3.18mm) DIA. STANDOFF SHOULDERS 4. PIN 8 IS 0.040” (1.02mm) DIA. 5. PINS A1-A10 ARE 0.020” SQUARE PINS 6. PINS 1-10: MATERIAL: COPPER ALLOY FINISH: MATTE TIN OVER NICKEL PLATE 7. PINS A1-A10: MATERIAL: COPPER ALLOY FINISH: GOLD FLASH OVER PALLADIUM NICKEL 8. THREADED OR NON-THREADED OPTIONS AVAILABLE 9. UNDIMENSIONED COMPONENTS ONLY FOR VISUAL REFERENCE 10. ALL DIMENSIONS IN INCHES (mm) TOLERANCES: X.XXIN +/-0.010 (X.Xmm +/-0.5mm) X.XXXIN+/-0.010 (X.XXmm +/-0.25mm) 11. WEIGHT: 11.3oz (320g) Product##MPFC-115-3PH-270-FP MPFC-115-3P-270-FP Product Phone 1-888-567-9596 1-888-567-9596 Phone A1 A3 A5 A7 A9 3 2 0.250 [6.35] 0.861 [21.86] 0.939 [23.86] A2 A4 A6 A8 A10 0.200 [5.08] 0.400 [10.16] 0.650 [16.51] Pin 2 3 4 6 Name LINE A LINE B LINE C +MIDBUS PIN DESIGNATIONS Function AC Line A Input AC Line B Input AC Line C Input Positive PFC Output / Boost Input Voltage 7 8 9 -VOUT SHIELD +VOUT Negative Return for +VOUT and +MIDBUS EMI Shield Net at Output Voltage Midpoint Positive Boost Output Voltage A1 Reserved A2 A3 A4 A5 A6 A7 CTL RETURN Reserved Reserved AC GOOD DC GOOD PFC ENA Reserved - Do Not Connect Isolated Ground Reference for Pins A1 - A10 Reserved - Do Not Connect Reserved - Do Not Connect AC Power Good Output (High = Good) DC Power Good Output (High = Good) Pull Low to Enable Unit Pull Low to Disable OTP / Phase Drop A8 BATTLE SHORT Shutdown A9 3.3V AUX 3.3V @ 100mA Always-On Power Output A10 SYNC OUT Synchronization Output www.synqor.com www.synqor.com Doc.#005-0006513 005-0006513Rev.Rev.5 Doc.# 5 09/25/2015 09/25/2015 Page 15 MPFC-115-3PH-270-FP Input: 115Vrms 3Φ Output: 270Vdc Power: 1.5kW Ordering Information Part Numbering Scheme Family Input Voltage Input Phases Output Voltage Package Size Thermal Design Screening Level Options MPFC 115 - 115Vrms L-N 3PH: Three-Phase 270 - 270Vdc FP - Full-brick Peta N - Normal Threaded S:S-Grade M:M-Grade [ ]: Standard Feature Example: MPFC-115-3PH-270-FP-N-M PART NUMBERING SYSTEM PATENTS The part numbering system for SynQor’s ac-dc converters follows the format shown in the example. APPLICATION NOTES A variety of application notes and technical white papers can be downloaded in PDF format from our website. SynQor holds numerous U.S. patents, one or more of which apply to most of its power converter products. Any that apply to the product(s) listed in this document are identified by markings on the product(s) or on internal components of the product(s) in accordance with U.S. patent laws. SynQor’s patents include the following: 5,999,417 6,222,742 6,545,890 6,594,159 6,731,520 6,894,468 6,896,526 6,927,987 7,050,309 7,072,190 7,085,146 7,119,524 7,269,034 7,272,021 7,272,023 7,558,083 7,564,702 7,765,687 7,787,261 8,023,290 8,149,597 8,493,751 8,644,027 Contact SynQor for further information and to order: Phone: �����������������������978-849-0600 Toll Free:���������������������888-567-9596 Fax: ���������������������������978-849-0602 E-mail: �����������������������[email protected] Web:���������������������������www.synqor.com Address: ���������������������155 Swanson Road Boxborough, MA 01719 USA Product##MPFC-115-3PH-270-FP MPFC-115-3P-270-FP Product Phone 1-888-567-9596 1-888-567-9596 Phone Warranty SynQor offers a two (2) year limited warranty. Complete warranty information is listed on our website or is available upon request from SynQor. www.synqor.com www.synqor.com Doc.#005-0006513 005-0006513Rev.Rev.5 Doc.# 5 09/25/2015 09/25/2015 Page 16