SC2434 POWER MANAGEMENT Applications Information (Cont.) PCB Layout Consideration Good layout is necessary for successful implementation of the SC2434 based 3 tri-phase topology. There are few general rules: · Reserve enough PCB space for the power supply (1.2~1.5 square inch for every 10A of load current); · Place enough high frequency ceramic capacitors inside and around the CPU socket (please follow CPU manufacture’s decoupling guideline); · Place bulk output capacitors around the CPU socket as uniformly as possible. The connection copper between these capacitors and the CPU socket must be short and wide to minimize inductance and resistance; · Always place the high power parts first; · Always use a ground plane or ground planes; · Always try to minimize the stray inductance of the high pulsating current loop which is formed by input capacitors and the MOSFET half-bridges. The following layout guideline gives details on how to achieve a good layout: · Input filter should contain mixed electrolytic capacitors and MLC capacitors. For every 20A of load current, use about 10uF of MLC caps. Put MLC caps close to current sensing resistor; · Use surface mount current sensing resistor (typically 3~5 mOhm in surface mount package with low temperature coefficient and low package inductance, typically less than 0.3nH); · Try to minimize the stray inductance from the current sensing resistor to the drains of the top FETs by using wide trace (>0.5” wide and no more than 3” long). This trace can run on inner1 layer, for example, if the inner2 layer is the ground plane, assuming the FETs are on the top layer. This arrangement forms so called strip line structure for the pulsating power current, which yields least amount of stray inductance. The concept is depicted in Fig. 7; · Keep the layout as electrically symmetrical as possible, as shown in Fig. 8, to avoid very uneven stray inductance from the sensing resistor to the drains of the top FETs; · Use a pair of closely paralleled traces to pick up the sensing voltage across the sensing resistor. The sensing traces server as differential input to the OC+ and OC- pins of the SC2434 controller. These traces should run on a routing layer (e.g., bottom layer for 4 layer PCB case) to avoid picking up strong AC magnetic field due to power current flow. In this case, the differential sensing traces are shielded by the ground layer. The filter cap across the OC+ and OCpins should be placed as close as possible to the controller. Pay close attention that never allow power current flowing on or running close by the sensing traces. Please see Fig. 8; · Separate power ground from analog ground to prevent power current from running over the analog ground plane. The SC2434 controller should be placed on the quite analog ground area. The analog ground should be singlepoint connected to the PGND near the output capacitor or the CPU socket to provide best possible ground sense. Refer to the application schematics for those components should be connected directly to the AGND (Vcc decoupling caps, cap on BGOUT pin, resistors on OSCREF pin, DACREF pin, FB pin, and PGIN pin). Rsense VIA MLC D TOP FET S D BOT FET S VIA Ground Plane Fig. 7 - Use MLC capacitors and strip line structure to minimize the stray inductance for the switching current loop. 2005 Semtech Corp. 11 www.semtech.com SC2434 POWER MANAGEMENT Applications Information (Cont.) PRELIMINARY Fig. 8 - Layout concept for input current sensing: (a) use MLC input capacitors; (b) minimize inductance; (c) keep electrical symmetry; and (d) use differential sensing traces. A Reference Design Example For Intel Pentium IV Processor Brief specifications of this design are listed below: • Vin=12V • Vout=1.725V +/- 25mV at 0A load • Vout droop slope is 1.5 mOhm • Vout tolerance is +/-25mV for all load conditions • Iout = 60A max • VID [4:0] = 00100 The schematic is shown on the cover page of this data sheet. 2005 Semtech Corp. 12 www.semtech.com SC2434 POWER MANAGEMENT Bill of Materials - Reference Design Item Qty. Reference Value Description/Part No. P ackag e Vendor 47pF 10V, X7R,MLCC,VJ603Y470KXXAT 0603 VISHAY 1 1 C_COMP 2 1 C1 0.33uF 25V, X7R,MLCC,VJ805Y334KXXAT 0805 VISHAY 3 3 C2,C3,C4 2200uF 15V Al. Elec. cap CPCYL/D.400/ LS.200/.034 Sanyo 4 8 C5,C9,C13, C15,C18, C26,C30,C38 1uF 16V, Y5V,MLCC,PCC1849CT-ND 0805 Panasonic 5 3 C6,C7,C16 4.7uF 16V, Y5V,MLCC,PCC1900CT-ND 1206 Panasonic 6 12 C8,C10,C14, C19,C20,C22, C23,C27,C28, C31,C33,C35 1500uF 6.3V Al. Cap Rybucon MBZ CPCYL/D.325/ LS.125/.034 Rubicon 7 3 C11,C24,C36 1nF 16V, X7R,MLCC,VJ603Y102KXXAT 0603 VISHAY 8 3 C12,C25,C37 2.2nF 50V, X7R,MLCC,VJ805Y222KXXAT 0805 VISHAY 9 2 C17,C29 0.33uF 25V, X7R,MLCC,VJ803Y334KXXAT 0805 VISHAY 10 1 C 21 10nF 10V, X7R,MLCC,VJ603Y103KXXAT 0603 VISHAY 11 1 C 32 100nF 16V, X7R,MLCC,VJ603Y104KXXAT 0603 VISHAY 12 1 C 34 470pF 10V, X7R,MLCC,VJ603Y471KXXAT 0603 VISHAY 13 6 D1,D2,D3,D4, D5,D6 3A 30V SM Schottly DL4148MSCT-ND DO213AC DIGI-KEY 14 4 L1,L2,L3,L4 638nH 638nH, 20A , Inductor TTIF1305-638 IN/L500/W400/.10 Falco 15 3 M1,M3,M5 F D B 6036B L MOSFET TO-263AB Fairchild 16 2 M2,M4 F D B 7045L MOSFET TO-263AB Fairchild 17 1 M6 F D P 7045L MOSFET TO-263AB Fairchild 18 1 R_COMP 29.4K SM 1% CRCW06032942F 0603 VISHAY 19 1 R_DAC 37.4K SM 1% CRCW06033742F 0603 VISHAY 20 1 R_DRP 187K SM 1% CRCW06031873F 0603 VISHAY 21 1 R_FB 10.0K SM 1% CRCW06031002F 0603 VISHAY 22 1 R_OS 46.4K SM 1% CRCW06034642F 0603 VISHAY 23 1 R_OSC 31.6K SM 1% CRCW06033162F 0603 VISHAY 24 1 R1 3m SM Sensing R 1% RL7520W 2512 CYNTEC 25 4 R2,R5,R8,R13 2R2 SM 1% CRCW06032R2F 0603 VISHAY 26 1 R3 20 SM 1% CRCW060320R0F 0603 VISHAY 27 3 R4,R10,R15 1R0 SM 1% CRCW060331R0F 0603 VISHAY 28 1 R6 100 SM 1% CRCW06031000F 0603 VISHAY 29 3 R7,R11,R16 1R0 SM 1% CRCW12061R0F 1206 VISHAY 2005 Semtech Corp. 13 www.semtech.com SC2434 POWER MANAGEMENT Bill of Materials - Reference Design (Cont.) Item Qty. Reference PRELIMINARY Value Description/Part No. Package Vendor 30 1 R9 NO POP SM 1% CRCW06031R0F 0603 VISHAY 31 1 R12 5.1K SM 1% CRCW06035111F 0603 VISHAY 32 2 R14,R18 1.0K SM 1% CRCW06031001F 0603 VISHAY 33 1 R17 750 SM 1% CRCW06037500F 0603 VISHAY 34 3 U1, U3, U4 SC1205 Dual FET Driver SOIC-8 SEMTECH 35 1 U2 SC2434 Tri-Phase Current Mode Controller w/ Power Good SOIC-20 or TSSOP-20 SEMTECH Note 1: Magnetic Cool Mu 77041, 5 turns AWG #16 (800nH@0A, 600nH@25A) 2005 Semtech Corp. 14 www.semtech.com SC2434 POWER MANAGEMENT Applications Information (Cont.) Typical Performance Of The Reference Design The reference design implemented 1.5mOhm output droop impedance as shown in Fig. 9. Load Line (Vin=12V, VID=00100) 1.76 1.74 Vo(V) 1.72 Vo Spec_H Spec_L 1.7 1.68 1.66 1.64 1.62 1.6 0 10 20 30 40 50 60 I (A) Fig. 9 - Measured output drooping characteristics of the 60A design. The efficiency of the design is depends on the MOSFET being used and thermal management requirements of controlling the PCB temperature and the MOSFET junction temperature. The following efficiency curve is corresponding to 4mOhm bottom FET, while the top FET has 12 mOhm Rdson. Efficency (%) 95.00 90.00 85.00 80.00 75.00 70.00 65.00 0 10 20 30 40 50 60 70 I_out(A) Fig. 10 - Typical efficiency curve for 12 mOhm top FETs and 4 Ohm bottom FETs. 2005 Semtech Corp. 15 www.semtech.com SC2434 POWER MANAGEMENT Applications Information (Cont.) PRELIMINARY The typical phase node voltage and the output voltage ripple waveform is shown in Fig. 11 under 60A full load operation, where one can see the output ripple is very small and even with a frequency three times of the switching frequency. Fig. 11 - The typical phase node voltage and the output voltage ripple waveform under 60A full load operation. The typical gate waveform for the top and bottom MOSFETs is also shown here, well-controlled dead time is demonstrated which ensures high efficiency operation of the VR. Ch2: HS Gate Ch3: Phase Node Ch4: LS Gate Fig. 12 - The typical gate waveform for the top and bottom MOSFETs. 2005 Semtech Corp. 16 www.semtech.com SC2434 POWER MANAGEMENT Applications Information (Cont.) The transient response for a maximum load step changes (10A to 60A) is shown in Fig. 14, where one can see that accurate drooping will help to reduce the amount of output capacitance needed. Please notice that using more multilayer ceramic capacitors for better high frequency decoupling can reduce the narrow voltage spikes. Output Voltage Load Current Fig. 13 - Transient response and the test condition: Step Load from 10A to 60A Output Capacitors: 14 units of 560uF OSCON caps, 38 units of 10uF ceramic caps Ch1: Output Voltage Ch4: Output Current (1A = 27.5mV di/dt = 370A/uS) Meet Intel P-4 spec 2005 Semtech Corp. 17 www.semtech.com