DISCRETE SEMICONDUCTORS DATA SHEET BTA212 series D, E and F Three quadrant triacs guaranteed commutation Product specification June 2003 NXP Semiconductors Product specification Three quadrant triacs guaranteed commutation BTA212 series D, E and F GENERAL DESCRIPTION QUICK REFERENCE DATA Passivated guaranteed commutation triacs in a plastic envelope intended for use in motor control circuits or with other highly inductive loads. These devices balance the requirements of commutation performance and gate sensitivity. The "sensitive gate" E series and "logic level" D series are intended for interfacing with low power drivers, including micro controllers. PINNING - TO220AB PIN DESCRIPTION 1 main terminal 1 2 main terminal 2 3 gate SYMBOL PARAMETER BTA212BTA212BTA212Repetitive peak off-state voltages RMS on-state current Non-repetitive peak on-state current VDRM IT(RMS) ITSM PIN CONFIGURATION UNIT 600D 600E 600F 600 V 12 95 A A SYMBOL tab T2 tab MAX. T1 G 1 23 main terminal 2 LIMITING VALUES Limiting values in accordance with the Absolute Maximum System (IEC 134). SYMBOL PARAMETER VDRM Repetitive peak off-state voltages IT(RMS) RMS on-state current ITSM Non-repetitive peak on-state current I2t dIT/dt IGM PGM PG(AV) Tstg Tj I2t for fusing Repetitive rate of rise of on-state current after triggering Peak gate current Peak gate power Average gate power CONDITIONS full sine wave; Tmb ≤ 99 ˚C full sine wave; Tj = 25 ˚C prior to surge t = 20 ms t = 16.7 ms t = 10 ms ITM = 20 A; IG = 0.2 A; dIG/dt = 0.2 A/µs over any 20 ms period Storage temperature Operating junction temperature MIN. MAX. UNIT - 6001 V - 12 A - 95 105 45 100 A A A2s A/µs - 2 5 0.5 A W W -40 - 150 125 ˚C ˚C 1 Although not recommended, off-state voltages up to 800V may be applied without damage, but the triac may switch to the on-state. The rate of rise of current should not exceed 15 A/µs. June 2003 1 Rev 3.000 NXP Semiconductors Product specification Three quadrant triacs guaranteed commutation BTA212 series D, E and F THERMAL RESISTANCES SYMBOL PARAMETER Rth j-mb Thermal resistance full cycle junction to mounting base half cycle Thermal resistance in free air junction to ambient Rth j-a CONDITIONS MIN. TYP. MAX. UNIT - 60 1.5 2.0 - K/W K/W K/W STATIC CHARACTERISTICS Tj = 25 ˚C unless otherwise stated SYMBOL PARAMETER CONDITIONS MIN. BTA212- 2 IGT Gate trigger current VD = 12 V; IT = 0.1 A T2+ G+ T2+ GT2- GVD = 12 V; IGT = 0.1 A T2+ G+ T2+ GT2- G- IL Latching current IH Holding current VD = 12 V; IGT = 0.1 A VT VGT On-state voltage Gate trigger voltage ID Off-state leakage current IT = 17 A VD = 12 V; IT = 0.1 A VD = 400 V; IT = 0.1 A; Tj = 125 ˚C VD = VDRM(max); Tj = 125 ˚C MAX. UNIT ...D ...E ...F - 5 5 5 10 10 10 25 25 25 mA mA mA - 15 25 25 20 30 30 25 40 40 mA mA mA - 15 25 30 mA 0.25 1.6 1.5 - V V V - 0.5 mA DYNAMIC CHARACTERISTICS Tj = 25 ˚C unless otherwise stated SYMBOL PARAMETER CONDITIONS MIN. BTA212- dVD/dt Critical rate of rise of off-state voltage dIcom/dt Critical rate of change of commutating current dIcom/dt Critical rate of change of commutating current VDM = 67% VDRM(max); Tj = 110 ˚C; exponential waveform; gate open circuit VDM = 400 V; Tj = 125 ˚C; IT(RMS) = 12 A; dVcom/dt = 10 V/µs; gate open circuit VDM = 400 V; Tj = 125 ˚C; IT(RMS) = 12 A; dVcom/dt = 0.1 V/µs; gate open circuit ...D MAX. UNIT ...E ...F 30 60 70 - V/µs 1.0 8 21 - A/ms 3.5 16 32 - A/ms 2 Device does not trigger in the T2-, G+ quadrant. June 2003 2 Rev 3.000 NXP Semiconductors Product specification Three quadrant triacs guaranteed commutation 20 BTA212 series D, E and F Tmb(max) / C 95 Ptot / W 15 IT(RMS) / A BT138 = 180 15 99 C 120 1 102.5 90 10 60 10 110 30 5 117.5 5 0 0 5 125 15 10 0 -50 0 50 Tmb / C IT(RMS) / A Fig.1. Maximum on-state dissipation, Ptot, versus rms on-state current, IT(RMS), where α = conduction angle. 1000 100 150 Fig.4. Maximum permissible rms current IT(RMS) , versus mounting base temperature Tmb. ITSM / A 25 IT(RMS) / A 20 dI T /dt limit 15 100 10 I TSM IT T 5 time Tj initial = 25 C max 10 10us 100us 1ms T/s 10ms 0 0.01 100ms Fig.2. Maximum permissible non-repetitive peak on-state current ITSM, versus pulse width tp, for sinusoidal currents, tp ≤ 20ms. 100 1.6 ITSM IT T 10 Fig.5. Maximum permissible repetitive rms on-state current IT(RMS), versus surge duration, for sinusoidal currents, f = 50 Hz; Tmb ≤ 99˚C. ITSM / A 80 0.1 1 surge duration / s VGT(Tj) VGT(25 C) 1.4 time Tj initial = 25 C max 1.2 60 1 40 0.8 20 0 0.6 1 10 100 Number of cycles at 50Hz 0.4 -50 1000 Fig.3. Maximum permissible non-repetitive peak on-state current ITSM, versus number of cycles, for sinusoidal currents, f = 50 Hz. June 2003 0 50 Tj / C 100 150 Fig.6. Normalised gate trigger voltage VGT(Tj)/ VGT(25˚C), versus junction temperature Tj. 3 Rev 3.000 NXP Semiconductors Product specification Three quadrant triacs guaranteed commutation BTA212 series D, E and F IGT(Tj) IGT(25°C) 40 3 IT / A Tj = 125 C Tj = 25 C T2+ G+ T2+ GT2- G- 2.5 typ max 30 Vo = 1.175 V Rs = 0.0316 Ohms 2 20 1.5 1 10 0.5 0 0 -50 0 50 Tj/°C 100 150 0.5 1 1.5 VT / V 2 2.5 3 Fig.10. Typical and maximum on-state characteristic. Fig.7. Normalised gate trigger current IGT(Tj)/ IGT(25˚C), versus junction temperature Tj. 3 0 IL(Tj) IL(25 C) 10 Zth j-mb (K/W) 2.5 1 unidirectional 2 bidirectional 0.1 1.5 1 P D tp 0.01 0.5 t 0 -50 0 50 Tj / C 100 0.001 10us 150 Fig.8. Normalised latching current IL(Tj)/ IL(25˚C), versus junction temperature Tj. 3 0.1ms 1ms 10ms tp / s 0.1s 1s 10s Fig.11. Transient thermal impedance Zth j-mb, versus pulse width tp. IH(Tj) IH(25C) 103 dIcom/dt (A/ms) F TYPE E TYPE D TYPE 2.5 102 2 1.5 10 1 0.5 0 -50 0 50 Tj / C 100 1 150 20 Fig.9. Normalised holding current IH(Tj)/ IH(25˚C), versus junction temperature Tj. June 2003 40 60 80 100 120 Tj (˚C) 140 Fig.12. Minimum critical rate of change of commutating current dIcom/dt versus junction temperature, dVcom/dt =10V/µs. 4 Rev 3.000 NXP Semiconductors Product specification Three quadrant triacs guaranteed commutation BTA212 series D, E and F MECHANICAL DATA Dimensions in mm 4,5 max Net Mass: 2 g 10,3 max 1,3 3,7 2,8 5,9 min 15,8 max 3,0 max not tinned 3,0 13,5 min 1,3 max 1 2 3 (2x) 0,9 max (3x) 2,54 2,54 0,6 2,4 Fig.13. SOT78 (TO220AB). pin 2 connected to mounting base. Notes 1. Refer to mounting instructions for SOT78 (TO220) envelopes. 2. Epoxy meets UL94 V0 at 1/8". June 2003 5 Rev 3.000 NXP Semiconductors Legal information DATA SHEET STATUS DOCUMENT STATUS(1) PRODUCT STATUS(2) DEFINITION Objective data sheet Development This document contains data from the objective specification for product development. Preliminary data sheet Qualification This document contains data from the preliminary specification. Product data sheet Production This document contains the product specification. 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