FQU2N50B N-Channel QFET® MOSFET 500 V, 1.6 A, 5.3 Ω Description Features This N-Channel enhancement mode power MOSFET is produced using Fairchild Semiconductor’s proprietary planar stripe and DMOS technology. This advanced MOSFET technology has been especially tailored to reduce on-state resistance, and to provide superior switching performance and high avalanche energy strength. These devices are suitable for switched mode power supplies, audio amplifier, DC motor control, and variable switching power applications. • 1.6 A, 500 V, RDS(on) = 5.3 Ω (Max.) @ VGS = 10 V, ID = 0.8 A • Low Gate Charge (Typ. 6.0 nC) • Low Crss (Typ. 4.3 pF) • Fast Switching • 100% Avalanche Tested • Improved dv/dt Capability D G G D S I-PAK S Absolute Maximum Ratings T Symbol VDSS ID o C = 25 C unless otherwise noted. FQU2N50BTU_WS 500 Parameter Drain-Source Voltage - Continuous (TC = 25°C) Drain Current - Continuous (TC = 100°C) IDM Drain Current VGSS Gate-Source Voltage EAS Single Pulsed Avalanche Energy IAR EAR dv/dt PD - Pulsed (Note 1) TL 1.6 A 1.0 A 6.4 A ± 30 V (Note 2) 120 mJ Avalanche Current (Note 1) 1.6 A Repetitive Avalanche Energy Peak Diode Recovery dv/dt Power Dissipation (TA = 25°C) * (Note 1) 3.0 4.5 2.5 mJ V/ns W 30 0.24 -55 to +150 W W/°C °C 300 °C (Note 3) Power Dissipation (TC = 25°C) TJ, TSTG Units V - Derate above 25°C Operating and Storage Temperature Range Maximum Lead Temperature for Soldering, 1/8" from Case for 5 Seconds Thermal Characteristics Symbol RJC RJA Parameter FQU2N50BTU_WS Thermal Resistance, Junction to Ambient (Minimum Pad of 2-oz Copper), Max. 2 Thermal Resistance, Junction to Ambient (*1 in Pad of 2-oz Copper), Max. ©2000 Fairchild Semiconductor Corporation FQU2N50B Rev. C0 Unit 4.17 Thermal Resistance, Junction to Case, Max. 1 110 oC/W 50 www.fairchildsemi.com FQU2N50B — N-Channel QFET® MOSFET November 2013 Part Number FQU2N50BTU_WS Electrical Characteristics T Symbol Package I-PAK Top Mark FQU2N50B Packing Method Tube Reel Size N/A Tape Width N/A Quantity 75 units o C = 25 C unless otherwise noted. Parameter Test Conditions Min Typ Max Units 500 -- -- V -- V/°C Off Characteristics BVDSS Drain-Source Breakdown Voltage VGS = 0 V, ID = 250 µA ∆BVDSS / ∆TJ Breakdown Voltage Temperature Coefficient ID = 250 µA, Referenced to 25°C -- 0.48 IDSS Zero Gate Voltage Drain Current VDS = 500 V, VGS = 0 V -- -- 1 µA VDS = 400 V, TC = 125°C -- -- 10 µA IGSSF Gate-Body Leakage Current, Forward VGS = 30 V, VDS = 0 V -- -- 100 nA IGSSR Gate-Body Leakage Current, Reverse VGS = -30 V, VDS = 0 V -- -- -100 nA On Characteristics VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250 µA 2.3 3.0 3.7 V VDS = VGS, ID = 250 mA 3.6 4.3 5.0 V RDS(on) Static Drain-Source On-Resistance VGS = 10 V, ID = 0.8 A -- 4.2 5.3 Ω gFS Forward Transconductance VDS = 50 V, ID = 0.8 A -- 1.3 -- S VDS = 25 V, VGS = 0 V, f = 1.0 MHz -- 180 230 pF -- 30 40 pF -- 4 6 pF ns Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance Switching Characteristics td(on) Turn-On Delay Time tr Turn-On Rise Time td(off) Turn-Off Delay Time tf Turn-Off Fall Time Qg Total Gate Charge Qgs Gate-Source Charge Qgd VDD = 250 V, ID = 2.1 A, RG = 25 Ω (Note 4) VDS = 400 V, ID = 2.1 A, VGS = 10 V (Note 4) Gate-Drain Charge -- 6 20 -- 25 60 ns -- 10 30 ns -- 20 50 ns -- 6.0 8.0 nC -- 1.3 -- nC -- 3.0 -- nC A Drain-Source Diode Characteristics and Maximum Ratings IS Maximum Continuous Drain-Source Diode Forward Current -- -- 1.6 ISM -- -- 6.4 A VSD Maximum Pulsed Drain-Source Diode Forward Current VGS = 0 V, IS = 1.6 A Drain-Source Diode Forward Voltage -- -- 1.4 V trr Reverse Recovery Time Qrr Reverse Recovery Charge VGS = 0 V, IS = 2.1 A, dIF / dt = 100 A/µs -- 195 -- ns -- 0.69 -- µC 1. Repetitive rating : pulse-width limited by maximum junction temperature. 2. L = 85 mH, IAS = 1.6 A, VDD = 50 V, RG = 25 Ω, starting TJ = 25oC. 3. ISD ≤ 2.1 A, di/dt ≤ 200 A/μs, VDD ≤ BVDSS, starting TJ = 25oC. 4. Essentially independent of operating temperature. ©2000 Fairchild Semiconductor Corporation FQU2N50B Rev. C0 2 www.fairchildsemi.com FQU2N50B — N-Channel QFET® MOSFET Package Marking and Ordering Information ID , Drain Current [A] 0 10 Bottom : VGS 15 V 10 V 8.0 V 7.0 V 6.5 V 6.0 V 5.5 V ID , Drain Current [A] Top : -1 10 150℃ 0 10 25℃ -55℃ ※ Notes : 1. 250μs Pulse Test 2. TC = 25℃ ※ Notes : 1. VDS = 50V 2. 250μs Pulse Test -2 10 -1 -1 0 10 10 1 10 2 10 4 8 6 10 VGS , Gate-Source Voltage [V] VDS , Drain-Source Voltage [V] Figure 1. On-Region Characteristics Figure 2. Transfer Characteristics 18 IDR , Reverse Drain Current [A] RDS(on) [ Ω ], Drain-Source On-Resistance 15 VGS = 10V 12 VGS = 20V 9 6 3 0 10 25℃ 150℃ ※ Notes : 1. VGS = 0V 2. 250μs Pulse Test ※ Note : TJ = 25℃ 0 0.0 -1 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 10 4.5 0.2 0.4 ID , Drain Current [A] 0.6 0.8 1.0 1.2 1.4 VSD , Source-Drain Voltage [V] Figure 3. On-Resistance Variation vs. Drain Current and Gate Voltage Figure 4. Body Diode Forward Voltage Variation vs. Source Current and Temperature 12 350 Ciss = Cgs + Cgd (Cds = shorted) Coss = Cds + Cgd Crss = Cgd 300 VDS = 100V 10 Capacitance [pF] 250 VGS, Gate-Source Voltage [V] VDS = 250V Ciss 200 Coss 150 ※ Notes : 1. VGS = 0 V 2. f = 1 MHz 100 Crss 50 VDS = 400V 8 6 4 2 ※ Note : ID = 2.1 A 0 -1 10 0 0 10 0 1 10 Figure 5. Capacitance Characteristics ©2000 Fairchild Semiconductor Corporation FQU2N50B Rev. C0 1 2 3 4 5 6 7 QG, Total Gate Charge [nC] VDS, Drain-Source Voltage [V] Figure 6. Gate Charge Characteristics 3 www.fairchildsemi.com FQU2N50B — N-Channel QFET® MOSFET ! 3.0 1.2 RDS(ON) , (Normalized) Drain-Source On-Resistance BV DSS , (Normalized) Drain-Source Breakdown Voltage 2.5 1.1 1.0 ※ Notes : 1. VGS = 0 V 2. ID = 250 μA 0.9 0.8 -100 -50 0 50 100 150 2.0 1.5 1.0 ※ Notes : 1. VGS = 10 V 2. ID = 1.05 A 0.5 0.0 -100 200 -50 o 0 50 100 150 200 o TJ, Junction Temperature [ C] TJ, Junction Temperature [ C] Figure 7. Breakdown Voltage Variation vs. Temperature Figure 8. On-Resistance Variation vs. Temperature 1.8 Operation in This Area is Limited by R DS(on) 1 1.5 10 ID, Drain Current [A] ID, Drain Current [A] 100 µs 10µs 1 ms 0 10 10 ms DC -1 10 ※ Notes : o 1. TC = 25 C 1.2 0.9 0.6 0.3 o 2. TJ = 150 C 3. Single Pulse -2 10 0 1 10 2 10 0.0 25 3 10 10 50 Figure 9. Maximum Safe Operating Area ZJC(t), Thermal Response [oC/W] 75 100 125 150 TC, Case Temperature [℃] VDS, Drain-Source Voltage [V] Figure 10. Maximum Drain Current vs. Case Temperature D = 0 .5 10 ※ N o te s : 1 . Z θ J C ( t) = 4 .1 7 ℃ /W M a x . 2 . D u ty F a c to r , D = t 1 /t 2 3 . T J M - T C = P D M * Z θ J C ( t) 0 0 .2 0 .1 0 .0 5 10 PDM 0 .0 2 0 .0 1 -1 t1 s i n g l e p u ls e 10 -5 10 -4 10 t2 -3 10 -2 10 -1 10 0 10 1 t1 , R e c t a n g u l a r P u l s e D u r a t i o n [ s e c ] Figure 11. Transient Thermal Response Curve ©2000 Fairchild Semiconductor Corporation FQU2N50B Rev. C0 4 www.fairchildsemi.com FQU2N50B — N-Channel QFET® MOSFET ! FQU2N50B — N-Channel QFET® MOSFET 50KΩ 200nF 12V VGS Same Type as DUT Qg 10V 300nF VDS VGS Qgs Qgd DUT IG = const. 3mA Charge Figure 12. Gate Charge Test Circuit & Waveform VDS RG RL VDS 90% VDD VGS VGS DUT V 10V GS 10% td(on) tr td(off) t on t off tf Figure 13. Resistive Switching Test Circuit & Waveforms VDS BVDSS 1 EAS = ---- L IAS2 -------------------2 BVDSS - VDD L BVDSS IAS ID RG V 10V GS GS VDD ID (t) VDS (t) VDD DUT tp Time tp Figure 14. Unclamped Inductive Switching Test Circuit & Waveforms ©2000 Fairchild Semiconductor Corporation FQU2N50B Rev. C0 5 www.fairchildsemi.com + VDS _ I SD L Driver RG VGS VGS ( Driver ) I SD ( DUT ) Same Type as DUT VDD • dv/dt controlled by RG • ISD controlled by pulse period Gate Pulse Width D = -------------------------Gate Pulse Period 10V IFM , Body Diode Forward Current di/dt IRM Body Diode Reverse Current VDS ( DUT ) Body Diode Recovery dv/dt VSD VDD Body Diode Forward Voltage Drop Figure 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms ©2000 Fairchild Semiconductor Corporation FQU2N50B Rev. C0 6 www.fairchildsemi.com FQU2N50B — N-Channel QFET® MOSFET DUT FQU2N50B — N-Channel QFET® MOSFET Mechanical Dimensions Figure 16. TO-251 (I-PAK), Molded, 3-Lead, Option AA Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/package/packageDetails.html?id=PN_TT251-003 ©2000 Fairchild Semiconductor Corporation FQU2N50B Rev. C0 7 www.fairchildsemi.com tm *Trademarks of System General Corporation, used under license by Fairchild Semiconductor. DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. 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PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative / In Design Datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production Datasheet contains preliminary data; supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. No Identification Needed Full Production Datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve the design. Obsolete Not In Production Datasheet contains specifications on a product that is discontinued by Fairchild Semiconductor. The datasheet is for reference information only. Rev. I66 ©2000 Fairchild Semiconductor Corporation FQU2N50B Rev. C0 8 www.fairchildsemi.com FQU2N50B — N-Channel QFET® MOSFET TRADEMARKS The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not intended to be an exhaustive list of all such trademarks. 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