® RT9832 PWM Duty Generator with Adjustable Duty Setting General Description Features The RT9832 is a PWM duty generator with adjustable duty setting. The PWM frequency is fixed 0.5Hz typically. The duty cycle can be set by an external resistor between the RSET and GND pins. When the RSET pin is floating, the duty cycle is set at 50% typically. An open drain output is provided and it can be pulled up to a suitable voltage level with a pull-up resistor. z Input Voltage Range : 2.8V to 20V z 0.5Hz PWM Frequency EN Pin with Internal Pull-Low Resistor Open Drain Output Adjustable PWM Duty from 1% to 100% Input Under Voltage Lockout Thermal Shutdown Protection Shutdown Current : <3.5μ μA 6-Ball WL-CSP Package RoHS Compliant and Halogen Free The device operates over a wide input voltage range from 2.8V to 20V. An active-low enable control pin is used to reduce shutdown current to 3.5μA. Input UVLO and thermal shutdown are provided. The RT9832 is available in the WL-CSP-6B 0.8x1.2 (BSC) package. z z z z z z z z Applications z Ordering Information z z RT9832 Package Type WSC : WL-CSP-6B 0.8x1.2 (BSC) Cellular Phones Digital Cameras Probable Instruments Pin Configurations Note : (TOP VIEW) Richtek products are : ` ` RoHS compliant and compatible with the current require- VCC A1 ments of IPC/JEDEC J-STD-020. GND Suitable for use in SnPb or Pb-free soldering processes. OUT A2 RSET B1 B2 EN C1 C2 NC WL-CSP-6B 0.8x1.2 (BSC) Marking Information 0B : Product Code 0BW W : Date Code Simplified Application Circuit 3.3V Rpull-up VCC CVIN VCC OUT RT9832 PWM RSET Enable RSET EN GND Copyright © 2013 Richtek Technology Corporation. All rights reserved. DS9832-00 January 2013 is a registered trademark of Richtek Technology Corporation. www.richtek.com 1 RT9832 Functional Pin Description Pin No. Pin Name Pin Function A1 VCC Supply Voltage Input. Connect a 0.47μF or larger ceramic capacitor from VCC to ground as close as possible to the VCC pin. A2 RSET Duty Set Pin. Connect an external resistor to set PWM duty. When the RSET pin is floating, the PWM duty cycle is equal to 50% (typ.). B1 GND Ground. B2 EN Enable Control Input (Active Low). C1 OUT Open Drain Output. Connect a pull-up resistor from this pin to VCC or a suitable supply. C2 NC No Internal Connection. Function Block Diagram VCC EN EN Logic UVLO Timer OTP OUT RSET RSET Timer Duty Generator GND Copyright © 2013 Richtek Technology Corporation. All rights reserved. www.richtek.com 2 is a registered trademark of Richtek Technology Corporation. DS9832-00 January 2013 RT9832 Absolute Maximum Ratings z z z z z z z z z (Note 1) Supply Voltage, VCC ----------------------------------------------------------------------------------------------------Output Voltage, OUT ----------------------------------------------------------------------------------------------------EN, RSET ------------------------------------------------------------------------------------------------------------------Power Dissipation, PD @ TA = 25°C WL-CSP-6B 0.8x1.2 (BSC) --------------------------------------------------------------------------------------------Package Thermal Resistance (Note 2) WL-CSP-6B 0.8x1.2 (BSC), θJA --------------------------------------------------------------------------------------Lead Temperature (Soldering, 10 sec.) ------------------------------------------------------------------------------Junction Temperature ----------------------------------------------------------------------------------------------------Storage Temperature Range -------------------------------------------------------------------------------------------ESD Susceptibility (Note 3) HBM (Human Body Model) ---------------------------------------------------------------------------------------------MM (Machine Model) ----------------------------------------------------------------------------------------------------- Recommended Operating Conditions z z z −0.3V to 22V −0.3V to 22V −0.3V to 6V 0.68W 148°C/W 260°C 150°C −65°C to 150°C 2kV 200V (Note 4) Supply Input Voltage ------------------------------------------------------------------------------------------------------ 2.8V to 20V Junction Temperature Range -------------------------------------------------------------------------------------------- −40°C to 125°C Ambient Temperature Range -------------------------------------------------------------------------------------------- −40°C to 85°C Electrical Characteristics (VCC = 4V, CIN = 0.47μF, TA = 25°C, unless otherwise specified) Parameter Symbol Test Conditions Min Typ Max Unit Power Supply Supply Current IVCC VCC = 5V, EN = Low, RSET = 500kΩ -- 1 2 mA UVLO Threshold VUVLO VCC Falling -- 2.5 -- V UVLO Hysteresis ΔVUVLO -- 100 -- mV VCC Shutdown Current ISHDN -- 3.5 -- μA VCC = 5V, EN = High Duty Generator RSET Voltage VSET 0.833 0.85 0.867 V PWM Frequency fPWM 0.45 0.5 0.55 Hz Minimum Duty Cycle DMIN 1 -- -- % Duty Cycle Duty -- RSET / 10k -- % Duty Cycle Accuracy DACC RSET = 50kΩ to 1000kΩ −10 -- 10 % OUT Current Sink Ability ISINK VCC ≥ 4V, VOUT = 0.1V 10 -- 40 mA OUT Leakage Current ILEAK VCC = 5V, EN = High, VOUT = 5V −0.1 -- 0.1 μA -- 160 -- °C -- 20 -- °C Output Protection Function Thermal Shutdown TSD Thermal Shutdown Hysteresis ΔTSD Copyright © 2013 Richtek Technology Corporation. All rights reserved. DS9832-00 January 2013 is a registered trademark of Richtek Technology Corporation. www.richtek.com 3 RT9832 Parameter Symbol Test Conditions Min Typ Max Unit Logic Control EN Voltage Logic-High VIH 1.2 -- -- Logic-Low VIL -- -- 0.4 REN -- 200 -- EN Pull Low Resistance V kΩ Note 1. Stresses beyond those listed “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may affect device reliability. Note 2. θJA is measured at TA = 25°C on a high effective thermal conductivity four-layer test board per JEDEC 51-7. Note 3. Devices are ESD sensitive. Handling precaution is recommended. Note 4. The device is not guaranteed to function outside its operating conditions. Copyright © 2013 Richtek Technology Corporation. All rights reserved. www.richtek.com 4 is a registered trademark of Richtek Technology Corporation. DS9832-00 January 2013 RT9832 Typical Application Circuit A1 CVIN 0.47µF OUT VCC RT9832 RSET B2 Enable Rpull-up 100 C1 A2 RSET 50k EN GND B1 Figure 1. WLED Indicator Timing Diagram UVLO + hys VCC UVLO EN 1% to 100% OUT 3s 2s Copyright © 2013 Richtek Technology Corporation. All rights reserved. DS9832-00 January 2013 3s 2s is a registered trademark of Richtek Technology Corporation. www.richtek.com 5 RT9832 Typical Operating Characteristics Supply Current vs. Input Voltage Supply Current vs. Temperature 350 250 Supply Current (µA) Supply Current (µA) 300 250 200 150 200 150 100 50 100 VCC = 2.8V to 20V, EN = Low, RSET = 500kΩ VCC = 5V, EN = Low, RSET = 500kΩ 50 0 2.8 4.95 7.1 9.25 11.4 13.55 15.7 17.85 20 -50 -25 0 Input Voltage (V) 50 75 100 125 Temperature (°C) Shutdown Current vs. Input Voltage PWM Frequency vs. Input Voltage 1.4 0.53 1.3 0.52 PWM Frequency (Hz) Shutdown Current (µA)1 25 1.2 1.1 1.0 0.9 0.8 0.7 0.51 0.50 0.49 0.48 0.47 0.46 VCC = 5V, EN = High 0.6 0.45 2.8 4.95 7.1 9.25 11.4 13.55 15.7 17.85 20 2.8 4.95 7.1 Input Voltage (V) 11.4 13.55 15.7 17.85 20 Input Voltage (V) PWM Frequency vs. Temperature RSET Voltage vs. Input Voltage 0.490 0.865 0.488 0.861 0.486 RSET Voltage (V) PWM Frequency (Hz) 9.25 0.484 0.482 0.480 0.478 0.476 0.857 0.853 0.849 0.845 0.841 0.474 0.837 0.472 0.470 0.833 -50 -25 0 25 50 75 100 Temperature (°C) Copyright © 2013 Richtek Technology Corporation. All rights reserved. www.richtek.com 6 125 2.8 4.95 7.1 9.25 11.4 13.55 15.7 17.85 20 Input Voltage (V) is a registered trademark of Richtek Technology Corporation. DS9832-00 January 2013 RT9832 RSET Voltage vs. Temperature Duty Cycle vs. RSET Resistance 0.865 100 0.861 90 Specification Measure Result Duty Cycle (%) RSET Voltage (V) 80 0.857 0.853 0.849 0.845 70 60 50 40 30 0.841 20 0.837 10 0.833 0 -50 -25 0 25 50 75 100 125 0 400 600 800 Temperature (°C) RSET Resistance (k Ω) Duty Cycle Duty Cycle VOUT (1V/Div) VOUT (1V/Div) VRSET (500mV/Div) VRSET (500mV/Div) VIN = 4V, RSET = 10kΩ, Duty = 1% Time (500ms/Div) Duty Cycle Duty Cycle VOUT (1V/Div) VRSET (500mV/Div) VRSET (500mV/Div) VIN = 4V, RSET = 500kΩ, Duty = 50% Time (500ms/Div) Copyright © 2013 Richtek Technology Corporation. All rights reserved. 1000 VIN = 4V, RSET = 250kΩ, Duty = 25% Time (500ms/Div) VOUT (1V/Div) DS9832-00 January 2013 200 VIN = 4V, RSET = 750kΩ, Duty = 75% Time (500ms/Div) is a registered trademark of Richtek Technology Corporation. www.richtek.com 7 RT9832 Duty Cycle VOUT (1V/Div) VRSET (500mV/Div) VOUT (1V/Div) VIN = 4V, RSET = 1000kΩ, Duty = 100% VRSET (500mV/Div) Time (500ms/Div) Power On from VCC Power On from VCC VOUT (5V/Div) VIN = 4V, EN = Low V CC (5V/Div) VIN = 12V, EN = Low Time (1s/Div) Time (1s/Div) Power Off from VCC Power Off from VCC VOUT (1V/Div) VOUT (5V/Div) V CC (2V/Div) V CC (5V/Div) VIN = 4V, EN = Low Time (1s/Div) Copyright © 2013 Richtek Technology Corporation. All rights reserved. www.richtek.com 8 VIN = 4V, RSET = Floating, Duty = 50% Time (50ms/Div) VOUT (1V/Div) V CC (2V/Div) Duty Cycle VIN = 12V, EN = Low Time (1s/Div) is a registered trademark of Richtek Technology Corporation. DS9832-00 January 2013 RT9832 Duty Off from EN Duty On from EN VOUT (1V/Div) VOUT (1V/Div) VEN (2V/Div) VIN = 4V, EN = High to Low Time (1s/Div) Copyright © 2013 Richtek Technology Corporation. All rights reserved. DS9832-00 January 2013 VEN (2V/Div) VIN = 4V, EN = Low to High Time (500ms/Div) is a registered trademark of Richtek Technology Corporation. www.richtek.com 9 RT9832 Application Information The RT9832 is a PWM duty generator with adjustable duty setting. The PWM frequency is fixed 0.5Hz typically. The device operates over a wide input voltage range from 2.8V to 20V. PD(MAX) = (TJ(MAX) − TA) / θJA Capacitor Selection For recommended operating condition specifications, the maximum junction temperature is 125°C. The junction to ambient thermal resistance, θJA, is layout dependent. For WL-CSP-6B 0.8x1.2 (BSC) package, the thermal resistance, θJA, is 148°C/W on a standard JEDEC 51-7 four-layer thermal test board. The maximum power dissipation at TA = 25°C can be calculated by the following formula : UVLO/OTP As the input voltage is lower than a specified value, the chip will enter protection mode to prevent abnormal function. As the die temperature is higher then 160°C, the chip will also enter protection mode. The output will be turned off during protection mode to prevent abnormal operation. Duty Cycle Setting The duty cycle is set by an external resistor on RSET pin, and the PWM duty is adjustable from 1% to 100%, according to following equation : R Duty Cycle = SET 10kΩ When the RSET is floating, the duty cycle is set at 50% typically. Enable The RT9832 enable is an active low logic signal control for output. The enable pin is pulled to low with internal resistors. When enable logic is low, a PWM duty will be on; when enable logic is high, a PWM duty will be off. PD(MAX) = (125°C − 25°C) / (148°C/W) = 0.68W for WL-CSP-6B 0.8x1.2 (BSC) package The maximum power dissipation depends on the operating ambient temperature for fixed T J(MAX) and thermal resistance, θJA. The derating curve in Figure 2 allows the designer to see the effect of rising ambient temperature on the maximum power dissipation. 1.0 Maximum Power Dissipation (W)1 Input ceramic capacitor of 0.47μF is recommended for the RT9832. For better voltage filtering, ceramic capacitors with low ESR are recommended. X5R and X7R types are suitable because of their wider voltage and temperature ranges. where TJ(MAX) is the maximum junction temperature, TA is the ambient temperature, and θJA is the junction to ambient thermal resistance. Four-Layer PCB 0.8 0.6 0.4 0.2 0.0 0 25 50 75 100 125 Ambient Temperature (°C) Figure 2. Derating Curve of Maximum Power Dissipation Thermal Considerations For continuous operation, do not exceed absolute maximum junction temperature. The maximum power dissipation depends on the thermal resistance of the IC package, PCB layout, rate of surrounding airflow, and difference between junction and ambient temperature. The maximum power dissipation can be calculated by the following formula : Copyright © 2013 Richtek Technology Corporation. All rights reserved. www.richtek.com 10 is a registered trademark of Richtek Technology Corporation. DS9832-00 January 2013 RT9832 Layout Consideration For best performance of the RT9832, the following guidelines must be strictly followed. ` Input capacitors should be placed close to the IC and connected to ground plane to reduce noise coupling. ` The GND should be connected to a strong ground plane for heat sinking and noise protection. ` Keep the main current traces as possible as short and wide. Connect the GND to a strong ground plane for maximum power dissipation and noise protection. Place the input capacitor as close as possible to the input pin. GND RSET CVCC VCC A1 Rpull-up A2 RSET GND B1 B2 EN OUT C1 C2 NC Keep the main power traces as wide and short as possible. Figure 3. PCB Layout Guide Copyright © 2013 Richtek Technology Corporation. All rights reserved. DS9832-00 January 2013 is a registered trademark of Richtek Technology Corporation. www.richtek.com 11 RT9832 Outline Dimension Symbol Dimensions In Millimeters Dimensions In Inches Min. Max. Min. Max. A 0.500 0.600 0.020 0.024 A1 0.170 0.230 0.007 0.009 b 0.240 0.300 0.009 0.012 D 1.150 1.250 0.045 0.049 D1 E 0.800 0.750 0.031 0.850 0.030 0.033 E1 0.400 0.016 e 0.400 0.016 6B WL-CSP 0.8x1.2 Package (BSC) Richtek Technology Corporation 5F, No. 20, Taiyuen Street, Chupei City Hsinchu, Taiwan, R.O.C. Tel: (8863)5526789 Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries. www.richtek.com 12 DS9832-00 January 2013