RT8810 Dual-Phase Synchronous Buck PWM Controller General Description Features The RT8810 is a dual phase synchronous buck controller which can provide users with a compact, high efficient, well protected and cost effective solution. The RT8810's integrated high driving capability MOSFET drivers makes it more attractive for high current application. The built-in bootstrap diode simplifies the circuit design and reduces external part count and PCB space. For output voltage control, the RT8810 can precisely regulate feedback voltage according to the internal reference voltage 0.6V or external reference voltage from 0.4V to 2.5V. z Single IC Supply Voltage : 4.5V to 13.2V z Supports Manual / Auto Dynamic Phase Number Control Integrated Bootstrap Diode Lossless RDS(ON) Current Sensing for Current Balance Adjustable Operation Frequency : 100kHz to 1MHz Adjustable Over Current Protection Capacitor Programmable Soft-Start Support 0% to 80% Duty Cycle Selectable Internal/External VREF Voltage Mode PWM Control with External Feedback Loop Compensation Phase Crosstalk Jitter Suspend (CJSTM) Programmable Quick Response Driver Shoot Through Protection Supports Current Reporting 16-Lead WQFN and 24-Lead WQFN Packages RoHS Compliant and Halogen Free The MODE pin programs single phase or dual phase operation, making the RT8810 suitable for dual power input applications such as PCI-Express interface graphic cards. To set RT8810 at automatic mode, the RT8810 operates in single phase at light load condition and maintains high efficiency over a wide range of output currents. In addition, the RT8810 features adjustable gate driving voltage for maximum efficiency and optimum performance. The RT8810 adopts lossless RDS(ON) current sensing technique for channel current balance and over current protection. Other features include adjustable soft-start, adjustable operation phase, and adjustable over current threshold. z z z z z z z z z z z z z z Applications z z z z GPU Core Power Desktop PC Memory, VTT Power Low Output Voltage, High Power Density DC/DC Converters Voltage Regulator Modules Ordering Information RT8810 Package Type QW : WQFN-16L 3x3 (W-Type) QW : WQFN-24L 4x4 (W-Type) Lead Plating System G : Green (Halogen Free and Pb Free) Z : ECO (Ecological Element with Halogen Free and Pb free) Product Classification A : Only for WQFN-24L 4x4 B : Only for WQFN-16L 3x3 (With MODE Pin) C : Only for WQFN-16L 3x3 (With REFIN Pin) D : Only for WQFN-24L 4x4 DS8810-01 June 2011 Note : Richtek products are : ` RoHS compliant and compatible with the current requirements of IPC/JEDEC J-STD-020. ` Suitable for use in SnPb or Pb-free soldering processes. www.richtek.com 1 RT8810 Marking Information RT8810AGQW RT8810BGQW RT8810CGQW RT8810DGQW EL=YM DNN JU=YM DNN JV=YM DNN 02=YM DNN EL= : Product Code JU= : Product Code JV= : Product Code 02= : Product Code YMDNN : Date Code YMDNN : Date Code YMDNN : Date Code YMDNN : Date Code RT8810AZQW RT8810BZQW RT8810CZQW RT8810DZQW EL YM DNN JU YM DNN JV YM DNN 02 YM DNN EL : Product Code JU : Product Code JV : Product Code 02 : Product Code YMDNN : Date Code YMDNN : Date Code YMDNN : Date Code YMDNN : Date Code Pin Configurations LGATE1 PVCC9 VCC LGATE2 PHASE1 LGATE1 PVCC9 PVCC VCC LGATE2 (TOP VIEW) 24 23 22 21 20 19 1 18 2 17 3 16 PGND 4 15 25 5 14 6 13 8 16 15 14 13 PHASE1 UGATE1 BOOT1 MODE 1 12 2 11 PGND 3 5 9 10 11 12 7 9 RT8810B LGATE1 PVCC9 VCC LGATE2 PHASE1 LGATE1 PVCC PCVV9 VCC LGATE2 RT8810A 24 23 22 21 20 19 12 2 11 PGND 3 10 17 4 7 8 IMAX RT COMP FB 6 9 PHASE2 UGATE2 BOOT2 SS/EN NC PGND UGATE1 BOOT1 AGND REFIN 1 18 2 17 3 16 PGND 4 15 25 5 14 6 13 7 8 PHASE2 PGND UGATE2 BOOT2 SS/EN QR1 9 10 11 12 MODE IMAX RT COMP FB QR2 1 PHASE2 UGATE2 BOOT2 SS/EN 8 WQFN-16L 3x3 5 www.richtek.com 2 6 WQFN-24L 4x4 16 15 14 13 PHASE1 UGATE1 BOOT1 REFIN 10 17 4 MODE IMAX RT COMP FB QR2 7 PHASE2 PGND UGATE2 BOOT2 SS/EN QR1 IMAX RT COMP FB NC PGND UGATE1 BOOT1 AGND REFIN WQFN-16L 3x3 WQFN-24L 4x4 RT8810C RT8810D DS8810-01 June 2011 RT8810 Typical Application Circuit VIN 12V R1 10 VCC RBOOT1 0 CBOOT1 0.1µF C1 1µF PVCC9 C6 1µF R2 0 C14 0.1µF UGATE1 PHASE1 LGATE1 REFIN RT RRT 18k CSS 0.1µF SS/EN C4 33pF R6 20k PHASE2 RUG2 0 LGATE2 C9 10µF x 4 /16V C10 10µF x 5 Q3 L2 1µH R12* Q4 C18* PGND C11 820µF x 2 /2.5V C12 10µF x 4 /16V C13 NC R7 1.5k R9 NC FB COMP C5 4.7nF C17* C8 820µF x 2 /2.5V + RIMAX 100k R11* Q2 RBOOT2 0 CBOOT2 0.1µF UGATE2 IMAX VOUT 1.1V L1 1µH BOOT2 MODE RMODE 33k RUG1 0 Q1 + PVCC C2 1µF VREFIN C7 10µF x 5 RT8810 BOOT1 AGND QR2 QR1 R10 24k C15 100pF C16 NC R8 1.8k * : Option Figure 1. RT8810A/D DS8810-01 June 2011 www.richtek.com 3 RT8810 VIN 12V R1 10 VCC RBOOT1 0 CBOOT1 0.1µF C1 1µF C6 1µF R2 0 PVCC9 UGATE1 PHASE1 LGATE1 MODE UGATE2 RT CSS 0.1µF C4 33pF RBOOT2 0 CBOOT2 0.1µF RUG2 0 R11* C17* C8 820µF x 2 /2.5V C9 10µF x 4 /16V C10 10µF x 5 Q3 Q4 L2 1µH R12* C18* PGND COMP C5 4.7µF Q2 SS/EN LGATE2 VOUT 1.1V L1 1µH + PHASE2 RRT 18k Q1 BOOT2 IMAX RIMAX 100k RUG1 0 + PVCC C2 1µF RMODE 33k C7 10µF x 5 RT8810 BOOT1 C11 820µF x 2 /2.5V C12 10µF x 4 /16V C13 NC R7 1.5k R9 NC FB R8 1.8k AGND R6 20k * : Option Figure 2. RT8810B www.richtek.com 4 DS8810-01 June 2011 RT8810 VIN 12V R1 10 VCC RBOOT1 0 CBOOT1 0.1µF C1 1µF PVCC9 C6 1µF R2 0 UGATE1 C14 0.1µF LGATE1 REFIN RT CSS 0.1µF SS/EN C5 4.7nF PHASE2 LGATE2 COMP Q2 R11* C17* RBOOT2 0 CBOOT2 0.1µF UGATE2 VOUT 1.1V L1 1µH RUG2 0 C8 820µF x 2 /2.5V C9 10µF x 4 /16V C10 10µF x 5 Q3 L2 1µH + RRT 18k Q1 BOOT2 IMAX RIMAX 100k C4 33pF PHASE1 RUG1 0 + PVCC C2 1µF VREFIN C7 10µF x 5 RT8810 BOOT1 Q4 R12* C18* PGND C11 820µF x 2 /2.5V C12 10µF x 4 /16V C13 NC R7 1.5k R9 NC FB R8 1.8k AGND R6 20k * : Option Figure 3. RT8810C DS8810-01 June 2011 www.richtek.com 5 RT8810 Functional Pin Description Pin No. WQFN-16L 3x3 -- WQFN-24L 4x4 1 Pin Name NC 2, 17, 17 25 PGND (Exposed Pad) (Exposed Pad) 2 3 UGATE1 3 4 BOOT1 -- 5 AGND 4 (RT8810C) 6 REFIN Pin Function No Internal Connection. Power Ground for the IC. These pins are ground returns for the gate drivers. Tie these pins to the ground island/plane through the lowest impedance connection available. The exposed pad must be soldered to a large PCB and connected to PGND for maximum power dissipation. Upper Gate Driver Output for Channel 1. Connect this pin to the gate of upper MOSFET. T his pin is monitored by the adaptive shoot through protection circuitry to determine when the upper MOSFET has turned off. Bootstrap Supply for the Floating Upper Gate Driver of Channel 1. Connect the bootstrap capacitor CBOOT 1 between BOOT1 pin and the PHASE1 pin to form a bootstrap circuit. The bootstrap capacitor provides the charge to turn on the upper MOSFET. All voltages levels are measured with respect to this pin. Tie this pin to the ground island/plane through the lowest impedance connection available. External Reference Input. This is the input pin for the external reference voltage. If external reference voltage is not available, leave this pin open for default internal 0.6V reference. Operation Phase Control Input. Connect a resistor RMODE from this pin to GND to set the threshold current level for single and dual phase operations. The RT8810 operates in dual phase if the output current is higher than the threshold current level; in single phase if the output current is lower than the threshold current level; see the related sections for detail. Tie this pin to GND for continuous single phase operation. Leave this pin open for continuous dual phase operation. Both upper and lower switches of PHASE2 are turned off when operating in single phase. 4 (RT8810B) 7 MODE 5 8 IMAX 6 9 RT 7 10 COMP 8 11 FB Feedback Voltage. This pin is the inverting input to the error amplifier. A resistor divider from the output to GND is used to set the regulation voltage. -- 12 QR2 Quick Response Setting Pin for Load Transition. -- 13 QR1 Quick Response Setting Pin for Load Transition. 9 14 SS/EN Soft-Start Output. Connect a capacitor from this pin to GND to set the soft-start interval. Pulling this pin low to 0.4V will shut down the RT8810. Output Current Indication. Connect this pin to ground with a resistor to set the output over current protection level. Operation Frequency Setting. Connect a resistor between this pin and AGND to set the operation frequency. Error Amplifier Output. This is the output of the Error Amplifier (EA) and the non-inverting input of the PWM comparators. Use this pin in combination with the FB pin to compensate the voltage-control feedback loop of the converter To be continued www.richtek.com 6 DS8810-01 June 2011 RT8810 Pin No. WQFN-16L WQFN-24L 3x3 4x4 Pin Name Pin Function 10 15 BOOT2 Bootstrap Supply for the Floating Upper Gate Driver of Channel 2. Connect the bootstrap capacitor between BOOT2 pin and the PHASE2 pin to form a bootstrap circuit. The bootstrap capacitor provides the charge to turn on the upper MOSFET. 11 16 UGATE2 Upper Gate Driver Output for Channel 2. Connect this pin to the gate of upper MOSFET. This pin is monitored by the adaptive shoot through protection circuitry to determine when the upper MOSFET has turned off. 12 18 PHASE2 Switch Node for Channel 2. Connect this pin to the source of the upper MOSFET and the drain of the lower MOSFET. This pin is used as the sink for the UGATE2 driver. This pin is also monitored by the adaptive shoot through protection circuitry to determine when the upper MOSFET has turned off. 13 19 LGATE2 Lower Gate Driver Output for Channel 2. Connect this pin to the gate of lower MOSFET. This pin is monitored by the adaptive shoot through protection circuitry to determine when the lower MOSFET has turn off. VCC Supply Voltage. This pin is the input pin of the internal 9V LDO, which provides current for PVCC9 and PVCC pins. Place a minimum 1μF ceramic capacitor physically near the pin to locally bypass the supply voltage. PVCC Supply Input. This pin receives a supply voltage from 4.5V to 13.2V and provides bias current for the internal control circuit. Physically place a minimum 1μF ceramic capacitor near it. This pin to bypass it. PVCC9 Supply Input. This pin is the output of the internal 9V LDO regulator. It provides current for lower gate drivers and bootstrap current for upper drivers. LGATE1 Lower Gate Driver Output for Channel 1. Connect this pin to the gate of lower MOSFET. This pin is monitored by the adaptive shoot through protection circuitry to determine when the lower MOSFET has turn off. PHASE1 Switch Node for Channel 1. Connect this pin to the source of the upper MOSFET and the drain of the lower MOSFET. This pin is used as the sink for the UGATE driver. This pin is also monitored by the adaptive shoot through protection circuitry to determine when the upper MOSFET has turned off. 14 -- 15 16 1 DS8810-01 20 21 (RT8810A) 22 (RT8810D) 22 (RT8810A) 21 (RT8810D) 23 24 June 2011 www.richtek.com 7 RT8810 Function Block Diagram REFIN REF SEL PVCC VCC Bias LV Regulator HV Regulator - SS/EN POR Soft-Start + + FB COMP BOOT2 - PVCC9 SD - UGATE2 Fault Logic + Gate Control PHASE2 + + - - BOOT1 OC UGATE1 Gate Control PHASE1 LGATE1 LGATE2 + - S/H Current Balance S/H PGND - VB AGND - + VB Phase Control + Oscillator + Transient Response Enhancement MODE www.richtek.com 8 RT QR1 QR2 IMAX DS8810-01 June 2011 RT8810 Absolute Maximum Ratings z z z z z z z z z z z z (Note 1) VCC, PVCC, PVCC9 to AGND ---------------------------------------------------------------BOOTx to PHASEx -----------------------------------------------------------------------------PHASEx to PGNDx DC ---------------------------------------------------------------------------------------------------<20ns ----------------------------------------------------------------------------------------------UGATEx to PHASEx DC ---------------------------------------------------------------------------------------------------<20ns ----------------------------------------------------------------------------------------------LGATEx to PGNDx DC ---------------------------------------------------------------------------------------------------<20ns ----------------------------------------------------------------------------------------------Input, Output or I/O Voltage -------------------------------------------------------------------Power Dissipation, PD @ TA = 25°C WQFN-16L 3x3 ----------------------------------------------------------------------------------WQFN-24L 4x4 ----------------------------------------------------------------------------------Package Thermal Resistance (Note 2) WQFN-16L 3x3, θJA -----------------------------------------------------------------------------WQFN-16L 3x3, θJC ----------------------------------------------------------------------------WQFN-24L 4x4, θJA -----------------------------------------------------------------------------WQFN-24L 4x4, θJC ----------------------------------------------------------------------------Junction Temperature ---------------------------------------------------------------------------Lead Temperature (Soldering, 10 sec.) -----------------------------------------------------Storage Temperature Range ------------------------------------------------------------------ESD Susceptibility (Note 3) HBM (Human Body Mode) --------------------------------------------------------------------MM (Machine Mode) ----------------------------------------------------------------------------- Recommended Operating Conditions z z z 15V 15V −0.5V to 15V −5V to 25V −0.3V to (BOOTx − PHASEx + 0.3V) −5V to (BOOTx − PHASEx + 5V) −0.3V to (PVCC9 + 0.3V) −5V to (PVCC9 + 5V) (AGND − 0.3V) to 6V 1.471W 1.923W 68°C/W 7.5°C/W 52°C/W 7°C/W 150°C 260°C −65°C to 150°C 2kV 200V (Note 4) Supply Voltage, VCC ----------------------------------------------------------------------------- 4.5V to 13.2V Junction Temperature Range ------------------------------------------------------------------- −40°C to 125°C Ambient Temperature Range ------------------------------------------------------------------- −40°C to 85°C DS8810-01 June 2011 www.richtek.com 9 RT8810 Electrical Characteristics (VCC = 12V, VPVCC9 = 9V, TA = 25°C, unless otherwise specified) Parameter Symbol Test Conditions Min Typ Max Unit Supply Input Bias Voltage VPVCC 4.5 -- 13.2 V Regulated Bias Voltage VPVCC9 8 9 10 V Supply Current I CC UGATE, LGATE Open -- 6.5 -- mA Shutdown Current I SHDN UGATE, LGATE Open -- 4 -- mA 3.8 4.1 4.4 V -- 0.3 -- V 175 200 225 kHz 100 -- 1000 kHz -- 2 -- VP-P Minimum Duty Cycle 0 -- -- % Minimum LGATE Pulse -- 300 -- ns 0.59 0.6 0.61 V Power-On Reset VCC POR Threshold VPVCC9R_th VCC9 Rising Power On Reset Hysteresis VPVCC9_hys Oscillator Frequency f OSC RRT = 30kΩ Frequency Range Ramp Amplitude ΔVOSC Reference Nominal Feedback Voltage VFB Error Amplifier Open Loop DC Gain ADC Guaranteed by Design -- 70 -- dB Gain Bandwidth GBW Guaranteed by Design -- 10 -- MHz Slew Rate SR Guaranteed by Design, CL = 10pF -- 6 -- V/μs Transconductance Maximum Current (Source & Sink) Soft-Start gm -- 1.8 -- mA/V I COMPsk -- 360 -- μA SS Source Current I SS 7 10 13 μA -- 0.5 -- V 145 165 185 μA/V Re-Soft-Start Threshold Level VSS/EN = 0V Current Sense Current Sense Gain Mode Pin Voltage VMODE -- 0.6 -- V Forced Single Phase Operation I MODE 250 -- -- μA Forced Dual Phase Operation I MODE -- -- 1 μA To be continued www.richtek.com 10 DS8810-01 June 2011 RT8810 Parameter Symbol Test Conditions Min Typ Max Unit PWM Controller Gate Driver Upper Gate Sourcing Ability IUGATEsr VBOOTx − VPHASEx = 12V, Max. Source Current -- 1.5 -- A Upper Gate RDS(ON) Sinking RUGATEsk VUGATEx − VPHASEx = 0.1V -- 2 -- Ω Lower Gate Sourcing Ability ILGATEsr VCC= 12V, Max. Source Current -- 1.5 -- A Lower Gate RDS(ON) Sinking RLGATEsk VLGATEx = 0.1V -- 2 -- Ω VUGATEx − VPHASEx = 1.2V to VLGATEx = 1.2V -- 30 -- ns Deadtime Protection Over Current Threshold VIMAX 2.75 3 3.25 V SS Enable Threshold VEN 0.3 0.4 0.5 V Note 1. Stresses listed as the above "Absolute Maximum Ratings" may cause permanent damage to the device. These are for stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may remain possibility to affect device reliability. Note 2. θJA is measured in natural convection at TA = 25°C on a high effective thermal conductivity four-layer test board of JEDEC 51-7 thermal measurement standard. The measurement case position of θJC is on the exposed pad of the packages. Note 3. Devices are ESD sensitive. Handling precaution is recommended. Note 4. The device is not guaranteed to function outside its operating conditions. DS8810-01 June 2011 www.richtek.com 11 RT8810 Typical Operating Characteristics VREF vs. Temperature Efficiency vs. Load Current 100 0.610 Phase 2 Active 95 0.608 90 0.606 0.604 VREF (V) Efficiency (%) 85 80 75 70 0.602 0.600 0.598 0.596 65 0.594 60 VIN = VCC = 12V, VOUT = 1.1V 55 0.592 VIN = VCC = 12V, No Load 0.590 0 10 20 30 40 50 60 -50 -25 0 25 Frequency vs. Temperature 100 125 RRT vs. Frequency 315 650 VIN = VCC = 12V, No Load 600 310 550 Frequency (kHz)1 Frequency (kHz)1 75 Temperature (°C) Load Current (A) 305 300 295 500 450 400 350 300 250 290 VIN = VCC = 12V, No Load 285 200 150 -50 Inductor Current (A) 50 32 30 28 26 24 22 20 18 16 14 12 10 8 6 4 2 0 -25 0 25 50 75 100 125 5 10 15 20 25 30 Temperature (°C) RRT (k ) (kΩ) Inductor Current vs. Output Current Power On from EN 35 40 SS/EN (1V/Div) Phase1 VOUT (1V/Div) UGATE1 (20V/Div) Phase2 UGATE2 (20V/Div) VIN = VCC = 12V 5 10 15 20 25 30 35 40 Output Current (A) www.richtek.com 12 45 50 55 60 VIN = VCC = 12V, IOUT = 40A Time (4ms/Div) DS8810-01 June 2011 RT8810 Power Off from EN Power On from VCC SS/EN (1V/Div) VCC (10V/Div) VOUT (1V/Div) UGATE1 (20V/Div) VOUT (1V/Div) UGATE1 (20V/Div) UGATE2 (20V/Div) VIN = VCC = 12V, IOUT = 40A UGATE2 (20V/Div) VIN = VCC = 12V, IOUT = 40A Time (200μs/Div) Time (4ms/Div) Power Off from VCC Dynamic Output Voltage Control VCC (10V/Div) V REFIN (1V/Div) VOUT (1V/Div) UGATE1 (20V/Div) VOUT (1V/Div) UGATE1 (20V/Div) UGATE2 (20V/Div) VIN = VCC = 12V, IOUT = 40A UGATE2 (20V/Div) VIN = VCC = 12V, IOUT = 20A, VREFIN = 0V to 1.1V Time (20ms/Div) Time (400μs/Div) Dynamic Output Voltage Control Load Transient Response VIN = VCC = 12V, IOUT = 0A to 40A V REFIN (1V/Div) UGATE1 (20V/Div) VOUT (1V/Div) UGATE1 (20V/Div) UGATE2 (20V/Div) UGATE2 (20V/Div) VIN = VCC = 12V, IOUT = 20A, VREFIN = 1.1V to 0V Time (400μs/Div) DS8810-01 June 2011 IOUT (50A/Div) VOUT (50mV/Div) Time (10μs/Div) www.richtek.com 13 RT8810 Mode Transition Load Transient Response VIN = VCC = 12V, IOUT = 40A to 0A UGATE1 (20V/Div) UGATE1 (20V/Div) UGATE2 (20V/Div) UGATE2 (20V/Div) IOUT (50A/Div) VOUT (50mV/Div) VOUT (20mV/Div) VIN = VCC = 12V, single to dual phase Time (10μs/Div) Time (10μs/Div) Mode Transition Over Current Protection UGATE1 (20V/Div) VOUT (500mV/Div) UGATE2 (20V/Div) IL1 (10A/Div) VOUT (20mV/Div) VIN = VCC = 12V, dual to single phase Time (10μs/Div) www.richtek.com 14 IL2 (10A/Div) VIN = VCC = 12V Time (10ms/Div) DS8810-01 June 2011 RT8810 Application Information Frequency vs. RRT Dual Supply Voltage (VCC, PVCC) with Internal Regulator The Power-On-Reset (POR) circuit monitors the supply voltage at the PVCC pin. If PVCC exceeds the POR rising threshold voltage, the controller is reset and prepares the PWM for operation. If PVCC falls below the POR falling threshold during normal operation, all MOSFETs stop switching. The POR rising and falling threshold has a hysteresis to prevent noise caused reset. Soft-Start The RT8810 provides external soft-start function to prevent large inrush current and output voltage overshoot when the converter starts up. The soft-start begins when OCP programming is complete. During soft-start, an internal current source (10μA) is used to charge the external soft-start capacitor at the SS/EN pin. VSS/EN rises up, and the PWM logic and gate drives become enabled. When the feedback voltage crosses 0.6V, the internal 0.6V reference takes over the behavior of the error operational transconductance amplifier and softstart is complete. The RT8810 turns off the internal 10μA current source when soft-start is complete. 600 Frequency (kHz)1 The RT8810 requires an external bias supply for PVCC and VCC. PVCC receives a supply voltage from 4.5V to 13.2V and provides bias current for internal control circuit. VCC is the input pin of the internal 9V LDO which provides current for the PVCC9 pin. PVCC9 is the output pin of the internal 9V LDO regulator. It provides current for lower gate drivers and bootstrap current for upper drivers. Physically place a minimum 1μF ceramic capacitor near PVCC and VCC to locally bypass the supply voltage. 700 500 400 300 200 100 5 10 15 20 25 30 35 RRT (kΩ) Figure 4. RRT vs. Switching Frequency A resistor of 8.6kΩ to 18kΩ corresponds to a switching frequency of 500kHz to 300kHz, respectively. External Reference Input The RT8810 supports external reference input to provide more flexible applications. The REFIN pin is implemented to be the external reference input. The mode selection is determined and latched after POR. If REFIN pin is floating, a 10μA current source will pull high the REFIN pin and if the pin voltage exceeds 2.8V, the FB pin will follow the internal reference voltage 0.6V. On the other hand, if an external voltage is applied to the REFIN pin, the RT8810 enters tracking mode and regulates FB to be close to this voltage. The applied voltage must be within the tracking range (typically between 0.4V to 2.5V). If the applied voltage is less than 0.3V, the controller will be shut down. Switching Frequency Current Sensing and Reporting High frequency operation optimizes the application by allowing smaller component size, but trades off efficiency due to higher switching losses. Low frequency operation offers the best overall efficiency, but at the expense of component size and board space. The RT8810 monitors per phase current for current balance and over current protection. Per phase current is sensed by the on-resistance of low side MOSFET when turned on. The GM amplifier senses the voltage drop across the lower switch and converts it into a current signal each time it turns on. The sensed current is expressed as : Connect a resistor (RRT) between RT and ground to set the switching frequency (fSW) per phase. Users can refer to Figure 4 for switching frequency setting. DS8810-01 June 2011 ICS = 3.3 x IL x RDS(ON) x 10 −4 + 5.5μA www.richtek.com 15 RT8810 where IL is the per phase current in Ampere, RDS(ON) is the on-resistance of low side MOSFET in mΩ, and 5.5μA is a constant to compensate the offset of the current sensing circuit. Note that the valley inductor current is sampled and held. The sampled and hold current is the averaged inductor current minus half of inductor ripple current : IL_SH = IL_AVG − ⎛⎜ 1 x ΔIL ⎞⎟ ⎝2 ⎠ where ΔIL is the inductor ripple current One half of the summation of the sampled and hold current signal (ICS1 + ICS2) / 2 is injected to the IMAX pin, that results in a voltage VIMAX across the resistor RIMAX connecting IMAX and AGND for over current protection. And VIMAX is equal to VIMAX = ICS1 + ICS2 x RIMAX 2 ⎡ 3.3 x (IL1_SH + IL2_SH ) xRDS(ON) x10 −4 + 11μA ⎤ ⎥ = ⎢ 2 ⎢ ⎥ ⎣ ⎦ Therefore, IMAX pin could be used for current reporting. Over Current Protection The RT8810 features over current protection. The voltage at the IMAX pin (VIMAX) is compared with a 3.0V reference voltage. If VIMAX is higher than 3.0V, OCP is triggered. The over current setting resistor (RIMAX) value for dual phase threshold can be calculated according to 3V x RDS(ON) x 10−4 + 5.5μA And the RIMAX value for single phase threshold will be RIMAX = 3V 1.5 x ⎡1.65x (IO_MAX − ΔIL ) x RDS(ON) x10−4 + 2.75μA ⎤ ⎣ ⎦ The RT8810 features hiccup and shutdown mode OCP. If OCP is triggered after soft-start ends, the RT8810 turns off both upper and lower MOSFETs and discharges CSS with a constant current of 10μA. When VSS exceeds 0.5V, the RT8810 initiates another soft-start cycle. The RT8810 shuts down after 3 hiccups. If the OCP is triggered during soft-start cycle, the RT8810 turns off both upper and lower www.richtek.com 16 Current Balance The RT8810 senses each phase current from low side MOSFET RDS(ON), and fine tunes the duty cycle of each phase for current balance as shown in Figure 5. If the current of PHASE1 is smaller than the current of PHASE2, the RT8810 increases the duty cycle of the corresponding phase to increase its phase current accordingly. PWM1 + - PWM2 VCOMP + Ramp1 + + + ICS1 ICS2 + - Ramp2 + + - Figure 5. Current Balance Control Circuit Dynamic Phase Number Control The RT8810 adaptively controls the operation phase number according to the load current. Figure 6 shows the dynamic phase number control circuit. The phase adding and dropping threshold can be set by a resistor, RMODE, which is connected from the MODE pin to AGND. A current, IMODE, flows through the resistor, RMODE, as IMODE = RIMAX = 1.65 x (IO_MAX − ΔIL ) MOSFETs but continues to charge CSS with a constant current of 10μA until soft-start ends. The shutdown status can only be reset by the POR function. 0.6 RMODE Once IIMAX is higher than 3 / 5 of IMODE, the controller will transit to 2-phase operation. When IIMAX is lower than 2 / 5 of IMODE, the active phase number will return to one phase. For example, if RMODE = 30kΩ, RDS(ON) = 3mΩ,ΔIL = 5A. The load current threshold for adding phase can be calculated as 3 x IMODE 5 ⎡ 3.3 x10 −4 x (IOUT_2P − 2.5 ) A x 3m Ω + 5.5μA ⎤ ⎥ = ⎢ 2 ⎢ ⎥ ⎣ ⎦ IOUT_2P = 21.2A And the load current threshold for dropping phase can be calculated as DS8810-01 June 2011 RT8810 2 x IMODE 5 ⎡ 3.3 x 10−4 x (IOUT_2P − 5 ) A x 3mΩ + 11μA ⎤ ⎥ = ⎢ 2 ⎢ ⎥ ⎣ ⎦ IOUT_2P = 10A 2/5 x IMODE 2/5 + VFB 1µA QR2 QR comp. + RQR2 EAP Min. on EAP VFB Drop Phase VQR2 RT8810 FB CQR1 QR QR1 TQR 3/5 x IMODE 3/5 0.6V + Add Phase Figure 7. Quick Response Active - + IIMAX - ICS1 Feedback and Compensation IMODE ICS2 RMODE Figure 6. Dynamic Phase Number Control Circuit The RT8810 allows the output voltage of the DC/DC converter to be adjusted from 0.6V to 85% of VIN supply via an external resistor divider. It will try to maintain the feedback pin at internal reference voltage (0.6V). VOUT Manual Phase Number Control R1 FB The RT8810 supports manual selecting of single phase or dual phase operation. If IMODE is higher than 150μA, the RT8810 operates in forced single phase mode. If IMODE is smaller than 4μA, the RT8810 operates in forced dual phase mode. According to the resistor divider network above, the output voltage is set as : Note that, the MODE pin is not available for the RT8810C. It supports only two phase operation. ⎛ ⎞ VREF R2 = R1 x ⎜ ⎟ V V − REF ⎠ ⎝ OUT Load Transient Quick Response The RT8810 utilizes a new quick response feature to supply heavy load current demand during instantaneous load application transient. The RT8810 detects load transient and reacts via VOUT pin. When VOUT drops during load application transient, the quick response comparator will send asserted signals to turn on high side MOSFETs and turn off low side MOSFETs. The QR signal will turn on all phase' high side MOSFETs while turning off low side MOSFETs. Therefore, the influence of total quick response function of the RT8810 is adjustable. The quick response threshold can be set by RQR2. QR is triggered if VEAP > 1μA x RQR2 + VFB. The QR width can be set according to : C x 0.8V TQR = QR1 300μA DS8810-01 June 2011 R2 The RT8810 is a voltage mode controller and requires external compensation to have an accurate output voltage regulation with fast transient response. The RT8810 uses a high gain Operational Transconductance Amplifier (OTA) as the error amplifier. As Figure 8 shows, the OTA works as the voltage controlled current source. The characteristic of OTA is as below : gm = ΔIOUT , ΔVM where ΔVM = ( VIN+ ) − ( VIN− ) and ΔVCOMP = ΔIOUT x ZOUT VIN+ VIN- + GM - IOUT VCOMP ZOUT Figure 8. Operational Transconductance Amplifier, OTA www.richtek.com 17 RT8810 Figure 9 shows a typical buck control loop using Type II compensator. The control loop consists of the power stage, PWM comparator and a compensator. The PWM comparator compares V COMP with oscillator (OSC) sawtooth wave to provide a Pulse-Width Modulated (PWM) with an amplitude of VIN at the PHASE node. The PWM wave is smoothen by the output filter LOUT and COUT. The output voltage (VOUT) is sensed and fed to the inverting input of the error amplifier. VIN UGATE PWM Comparator Driver Logic + - PHASE LOUT COUT LGATE VOUT VOSC + GM - VREF FB RFB1 The output LC filter introduces a double pole, 40dB/decade gain slope above its corner resonant frequency, and a total phase lag of 180 degrees. The resonant frequency of the LC filter is expressed as : fLC = VIN 2π LOUT x COUT The ESR zero is contributed by the ESR associated with the output capacitance. Note that this requires the output capacitor to have enough ESR to satisfy stability requirements. The ESR zero of the output capacitor is expressed as follows : fESR = RFB2 COMP VCOMP CC RC The DC gain of the modulator is the input voltage (VIN) divided by the peak-to-peak oscillator voltage VOSC. VIN Gainmodulator = ΔVOSC CP Figure 9. Typical Voltage Mode Buck Converter Control Loop The modulator transfer function is the small signal transfer function of VOUT / VCOMP (output voltage over the error amplifier output). This transfer function is dominated by a DC gain, a double pole, and an ESR zero as shown in Figure 10. 1 2π x COUT x ESR The goal of the compensation network is to provide adequate phase margin (usually greater than 45 degrees) and the highest bandwidth (0dB crossing frequency). It is also recommended to manipulate loop frequency response so that its gain crosses over 0dB at a slope of −20dB/ dec. According to Figure 8, the compensation network frequency is as below : FP1 = 0 1 ⎛ C x CP ⎞ 2 π x RC x ⎜ C ⎟ ⎝ CC + CP ⎠ 1 = 2π x RC x CC FP2 = FZ1 Determining the 0dB crossing frequency (FC, control loop bandwidth) is the first step of compensator design. Usually, FC is set to 0.1 to 0.3 times the switching frequency. The second step is to calculate the open loop modulator gain and find out the gain loss at FC. The third step is to design a compensator gain that can compensate the modulator gain loss at FC. The final step is to design FZ1 and FZ2 to allow the loop sufficient phase margin. Figure 10. Typical Bode plot of a Voltage Mode Buck Converter www.richtek.com 18 FZ1 is designed to cancel one of the double poles of modulator. Usually, FZ1 is placed before fLC. FP2 is usually placed below the switching frequency (typically, 0.5 to 1.0 times switching frequency) to eliminate high frequency noise. DS8810-01 June 2011 RT8810 The inductor plays an important role in the buck converter because energy from the input power rail is stored in it and then released to the load. From the viewpoint of efficiency, the inductor's DC Resistance (DCR) should be as small as possible since the inductor constantly carries current. In addition, the inductor takes up most of the board space, so its size is also important. Low profile inductors can save board space, especially when there is a height limitation. Additionally, larger inductance results in lower ripple current, and therefore lower power loss. However, the inductor current rising time increases with inductance value. This means the inductor will have a longer charging time before its current reaches the required output current. Since the response time is increased, the transient response performance will be decreased. Therefore, the inductor design is a trade-off between performance, size and cost. In general, inductance is designed such that the ripple current ranges between 20% to 30% of full load current. The inductance can be calculated using the following equation. L(MIN) = fSW VIN − VOUT V x OUT x k x IOUT(MAX) VIN where k is 0.2 to 0.3. Output Capacitor Selection Output capacitors are used to maintain high performance for the output beyond the bandwidth of the converter itself. Two different settings of output capacitors can be found, bulk capacitors closely located to the inductors and ceramic output capacitors in close proximity to the load. Latter ones are for mid frequency decoupling with especially small ESR and ESL values, while the bulk capacitors have to provide enough stored energy to overcome the low frequency bandwidth gap between the regulator and the GPU. Thermal Considerations For continuous operation, do not exceed absolute maximum junction temperature. The maximum power dissipation depends on the thermal resistance of the IC DS8810-01 June 2011 package, PCB layout, rate of surrounding airflow, and difference between junction and ambient temperature. The maximum power dissipation can be calculated by the following formula : PD(MAX) = (TJ(MAX) − TA) / θJA where TJ(MAX) is the maximum junction temperature, TA is the ambient temperature, and θJA is the junction to ambient thermal resistance. For recommended operating condition specifications of the RT8810, the maximum junction temperature is 125°C and TA is the ambient temperature. The junction to ambient thermal resistance, θJA, is layout dependent. For WQFN16L 3x3 packages, the thermal resistance, θJA, is 68°C/ W on a standard JEDEC 51-7 four-layer thermal test board. For WQFN-24L 4x4 packages, the thermal resistance, θJA, is 52°C/W on a standard JEDEC 51-7 four-layer thermal test board. The maximum power dissipation at TA = 25°C can be calculated by the following formula : PD(MAX) = (125°C − 25°C) / (68°C/W) = 1.471W for WQFN-16L 3x3 package PD(MAX) = (125°C − 25°C) / (52°C/W) = 1.923W for WQFN-24L 4x4 package The maximum power dissipation depends on the operating ambient temperature for fixed T J(MAX) and thermal resistance, θJA. For the RT8810 package, the derating curves in Figure 11 allow the designer to see the effect of rising ambient temperature on the maximum power dissipation. Maximum Power Dissipation (W)1 Inductor Selection 2.0 1.9 1.8 1.7 1.6 1.5 1.4 1.3 1.2 1.1 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0.0 Four-Layer PCB WQFN-24L 4x4 WQFN-16L 3x3 0 25 50 75 100 125 Ambient Temperature (°C) Figure 11. Derating Curves for the RT8810 Packages www.richtek.com 19 RT8810 Layout Considerations Careful PC board layout is critical to achieve low switching losses and clean, stable operation. The switching power stage requires particular attention. If possible, mount all of the power components on the top side of the board with their ground terminals flush against one another. Follow these guidelines for optimum PC board layout : ` Power components should be placed first. Place the input capacitors close to the power MOSFETs, then locate the filter inductors and output capacitors between the power MOSFETs and the load. ` Place both the ceramic and bulk input capacitor close to the drain pin of the high side MOSFET. This can reduce the impedance presented by the input bulk capacitance at high switching frequency. If there is more than one high side MOSFET in parallel, each should have its own individual ceramic capacitor. ` Keep the power loops as short as possible. For low voltage high current applications, power components are the most critical part in the layout because they switch a large amount of current. The current transition from one device to another at high speed causes voltage spikes due to the parasitic components on the circuit board. Therefore, all of the high current switching loops should be kept as short as possible with large and thick copper traces to minimize the radiation of electromagnetic interference. ` Minimize the trace length between the power MOSFETs and its drivers. Since the drivers use short, high current pulses to drive the power MOSFETs, the driving traces should be sized as short and wide as possible to reduce the trace inductance. This is especially true for the low side MOSFET, since this can reduce the possibility of shoot through. ` Provide enough copper area around the power MOSFETs and the inductors to aid in heat sinking. Use thick copper PCB to reduce the resistance and inductance for improved efficiency. ` The bank of output capacitor should be placed physically close to the load. This can minimize the impedance seen by the load, and then improve the transient response. www.richtek.com 20 ` Place all of the high frequency decoupling ceramic capacitors close to their decoupling targets. ` Small signal components should be located as close to the IC as possible. The small signal components include the feedback components, current sensing components, the compensation components, function setting components and any bypass capacitors. These components belong to the high impedance circuit loop and are inherently sensitive to noise pick-up. Therefore, they must be located close to their respective controller pins and away from the noisy switching nodes. ` A multi layer PCB design is recommended. Make use of one single layer as the power ground and have a separate control signal ground as the reference of all signals. DS8810-01 June 2011 RT8810 Outline Dimension D SEE DETAIL A D2 L 1 E E2 e b A A1 1 1 2 2 DETAIL A Pin #1 ID and Tie Bar Mark Options A3 Note : The configuration of the Pin #1 identifier is optional, but must be located within the zone indicated. Dimensions In Millimeters Dimensions In Inches Symbol Min Max Min Max A 0.700 0.800 0.028 0.031 A1 0.000 0.050 0.000 0.002 A3 0.175 0.250 0.007 0.010 b 0.180 0.300 0.007 0.012 D 2.950 3.050 0.116 0.120 D2 1.300 1.750 0.051 0.069 E 2.950 3.050 0.116 0.120 E2 1.300 1.750 0.051 0.069 e L 0.500 0.350 0.020 0.450 0.014 0.018 W-Type 16L QFN 3x3 Package DS8810-01 June 2011 www.richtek.com 21 RT8810 D2 D SEE DETAIL A L 1 E E2 e b 1 1 2 2 DETAIL A Pin #1 ID and Tie Bar Mark Options A A3 A1 Note : The configuration of the Pin #1 identifier is optional, but must be located within the zone indicated. Dimensions In Millimeters Dimensions In Inches Symbol Min Max Min Max A 0.700 0.800 0.028 0.031 A1 0.000 0.050 0.000 0.002 A3 0.175 0.250 0.007 0.010 b 0.180 0.300 0.007 0.012 D 3.950 4.050 0.156 0.159 D2 2.300 2.750 0.091 0.108 E 3.950 4.050 0.156 0.159 E2 2.300 2.750 0.091 0.108 e L 0.500 0.350 0.020 0.450 0.014 0.018 W-Type 24L QFN 4x4 Package Richtek Technology Corporation Richtek Technology Corporation Headquarter Taipei Office (Marketing) 5F, No. 20, Taiyuen Street, Chupei City 5F, No. 95, Minchiuan Road, Hsintien City Hsinchu, Taiwan, R.O.C. Taipei County, Taiwan, R.O.C. Tel: (8863)5526789 Fax: (8863)5526611 Tel: (8862)86672399 Fax: (8862)86672377 Email: [email protected] Information that is provided by Richtek Technology Corporation is believed to be accurate and reliable. Richtek reserves the right to make any change in circuit design, specification or other related things if necessary without notice at any time. No third party intellectual property infringement of the applications should be guaranteed by users when integrating Richtek products into any application. No legal responsibility for any said applications is assumed by Richtek. www.richtek.com 22 DS8810-01 June 2011