TI Designs Digitally Isolated 2-Channel, Wide DC Binary Input Module TI Designs Design Features TI Designs provide the foundation that you need including methodology, testing and design files to quickly evaluate and customize the system. TI Designs help you accelerate your time to market. • Design Resources • TIDA-00420 MSP430G2332IPW20 ISO1541D Tool Folder Containing Design Files • Product Folder Product Folder • SN6501DBV ISO7220A Product Folder Product Folder • ASK Our E2E Experts WEBENCH® Calculator Tools • • • BI1 18-V DC to 300-V DC 3.3 VSEC + 3.3 V SN6501 Transformer driver + 3.3 V 1:1.1 Isolated GND 3.3 VSEC + 3.3 V Transistor switch MOSFET with 2.5 Kcurrent limit resistor Wetting control BI1 • • • Featured Applications 3.3 VSEC To host MCU ADC input ISO1541D or ISO7220ADR I2C J2 BI1 18-V DC to 300-V DC DGND Isolated GND TP25 Transistor bias from 15-V DC input Accurate Sensing of Input Voltage Over Wide Temperature Range – Accuracy < ±3% of Measured Value ±1 V (Programming Resolution or Step Size) MCU-Based 2-Channel DC Binary Input Voltage Sensing Isolator Rated for 2500-VRMS Isolation for 1 Minute per UL 1577 Independent Wetting Current Control for Both Inputs Can be Extended to Measure Four or Six Binary Inputs Wide DC Input Measurement: 18 to 300-V DC Can be Interfaced to the Host CPU Using I2C Interface or Digital Output Type of Isolators ≥2.5-KΩ Impedance for Wetting and >300-KΩ Impedance for Binary Input Less Than 1-mA Consumption at 300-V DC Input Measurement Resolution Better Than 1 V PCB Width ≤ 1 Inch BI1 Resistor divider with protection binary input 2 BI2 MSP430G2332IPW20 I2C Isolated GND Resistor divider with protection binary input 1 ADC input DGND I2C address configuration and programming 18-V DC to 300-V DC 18-V DC to 300-V DC Wetting control BI2 Transistor switch MOSFET with 2.5 Kcurrent limit resistor Transistor bias from 15-V DC input BI2 18-V DC to 300-V DC BI2 18-V DC to 300-V DC • • • • • • • • Multifunction Protection Relays Remote Terminal Unit Bay Controller Remote I/O Power Quality Analyzer Merging Unit Circuit Breaker Digital Input Module FTU/DTU/FRTU All trademarks are the property of their respective owners. TIDU858A – March 2015 – Revised May 2015 Submit Documentation Feedback Digitally Isolated 2-Channel, Wide DC Binary Input Module Copyright © 2015, Texas Instruments Incorporated 1 System Description www.ti.com An IMPORTANT NOTICE at the end of this TI reference design addresses authorized use, intellectual property matters and other important disclaimers and information. 1 System Description 1.1 Introduction to IED and Subsystems in Grid Applications Key interface Digital input subsystem Communication port Power system interface Analog input subsystem Relay software Power supply Digital output subsystem Console panel LCD/LED targets/alarms Figure 1. Generic Block Diagram of a Protection Relay The protection relay, intelligent electronic device (IED), or substation controllers used in grid applications have the following generic subsystems. The subsystems are based on the functionality and are as follows: • CPU or DSP module – This module handles all protection functions and logic. Additionally, the HMI and communication functions are also handled by this module. • Power supply – Nominal auxiliary voltage: 24-V DC, 48 to 60-V DC, 110 to 125-V DC, 220-V DC, and 230-V AC, 50 or 60 Hz, ± 20%, and 40-W max admissible consumption – Stored energy for up to 50 ms power supply interruption – Dual source power supply (optional) • AC measurement inputs – Nominal frequency (FNOM): 50 or 60 Hz – Operating range: 45 to 66 Hz – Accuracy: 0.2% FS at FNOM • CT measurements inputs – Nominal current: 1 or 5 A (ΙN) – Nominal consumption per phase: < 0.15 A at IN – Load rating: 20 A in continuous; 30 A for 3 s; 100 A for 1 s • VT measurements inputs – Nominal voltage: 57.7 to 500 V – Nominal consumption per phase: < 0.1 VA at 130 V – Maximum measurable voltage: 577 VRMS 2 Digitally Isolated 2-Channel, Wide DC Binary Input Module Copyright © 2015, Texas Instruments Incorporated TIDU858A – March 2015 – Revised May 2015 Submit Documentation Feedback System Description www.ti.com • • • • • • • DC analog input range (independently configurable): – ±1.25, ±2.5, ±5, and ±10 V – ±1, ±5, ±10, and ±20 mA – 0 to 1, 0 to 5, 0 to 10, 0 to 20, and 4 to 20 mA DC analog output range (independently configurable): – ±5, ±10, ±20 mA, and 4 to 20 mA Digital inputs – Nominal voltage: 24-V DC, 48 to 60-V DC, 110 to 125-V DC/AC and 220-V DC/AC, ±20% or multi-voltage (24 to 250-V DC/AC) – Power consumption per input: 2 to 6 mA, maximum power dissipation is 0.45 W ±20% per input or short peak-current (> 25 mA) – Groups of 4, 8, 12, 16, or 32 Digital output relays – Continuous current: 5 A – Short-duration current: 30 A for 500 ms; 100 A for 30 ms – Breaking capacity: DC: 50 W resistive, 15 W inductive (L/R = 20 ms); AC: 1250 VA (cos PF = 0,7) Control output relays – Continuous current: 5 A – Short-duration current: 30 A for 4 s; 250 A for 30 ms – Breaking capacity (Double pole contacts wired in serial): DC: 100 W resistive, 30 W inductive (L/R = 40 ms); AC: 2000 VA (cos F = 0.7) Time synchronization – by an IRIG–B GPS clock (through the IRIG-B input) – by an Ethernet SNTP server – by a time telegram message issued by remote Scada (DNP3.0, IEC 60870-5-101 or IEC 60870-5-104) Communication capabilities – Ethernet communication • 10/100BASE-TX, auto-crossing or 100BASE-FX • Protocols include UCA2 or IEC 61850, IEC 60870-5-104 (multi-client) or DNP3.0 IP • Embedded Ethernet switch module with up to six ports (permitting a compact connection of various devices or I/O extensions) – Serial communication • Up to two SCADA or four IED links per device • SCADA protocol can be switched between DNP3.0, IEC 60870-5-101 and MODBUS • IED Protocol can be switched between DNP3.0, IEC 60870-5-103, MODBUS and IEC 60870-5-101 • Transmission rate is configurable up to 38.4 kbps TIDU858A – March 2015 – Revised May 2015 Submit Documentation Feedback Digitally Isolated 2-Channel, Wide DC Binary Input Module Copyright © 2015, Texas Instruments Incorporated 3 System Description 1.2 www.ti.com Binary Inputs or Digital Inputs The inputs to the protection relay or substation controllers are called under different names: • Binary input • Digital input • Control input • Indication input The names are based on the function performed. These inputs will be referred as binary inputs in this design guide. Binary inputs have wide applications. The binary input module specifications differ with OEMs. The binary inputs are designed as modules and based on application one or more modules are used. Below is the summary of some of the Applications, functionalities, and specifications. These inputs have galvanic isolation from internal circuits, generally opto-coupler are used for isolation. Number of binary inputs per module can vary as 4, 8, 16, or 32. The binary inputs are organized in groups (depending upon application) with a common wire. In some of the applications the inputs are channel isolated. 1.2.1 Binary Input Applications Some of the grip applications use binary inputs for the following functionalities: • Substation battery monitoring • Bay or substation interlocking • Breaker status indications • General interrogations • LED test • Diagnostics (self-test) • Fault indication (alarm) • Configuration change (operated with new settings to perform different functionality) 4 Digitally Isolated 2-Channel, Wide DC Binary Input Module Copyright © 2015, Texas Instruments Incorporated TIDU858A – March 2015 – Revised May 2015 Submit Documentation Feedback System Description www.ti.com 1.2.2 Specifications Key Specification • • • • • Input voltage range Threshold for guarantee operation Threshold for uncertain operation Response or reset time (software provides de-bounce time) Power consumption, energized General Specification • • • • • • • • • • • 1.2.3 Inputs are jumper selectable for low range (nominal system voltages of up to 100 V) or high range (from 100 to 300 V) Tolerance: ±10% Common input voltage ranges: – 24-V DC – 48-V DC – 110-V DC – 230-V DC Contacts per common return: Four or more Recognition (processing of the inputs) time: ≥ 3 ms Inputs protected against continuous overload up to 300-V DC All I/O terminals protected with internal transient limiting devices Input de-bounce time is selectable; de-bounce time: 0.0 to 16.0 ms in steps of 0.5 Continuous current draw: < 5 mA Auto-burnish impulse current: 20 to 50 mA Duration of auto-burnish impulse: 25 to 50 ms Wetting or Auto Burnishing The binary inputs sense a change of the state of the external device. When these external devices are located in a harsh industrial environments (either outdoor or indoor), their contacts can be exposed to various types of contamination. Normally, there is a thin film of insulating sulfidation, oxidation, or contaminates on the surface of the contacts, sometimes making it difficult or impossible to detect a change of the state. This film must be removed to establish circuit continuity; an impulse of higher than normal current can accomplish this. The contact inputs with auto-burnish create a high current impulse when the threshold is reached to burn off this oxidation layer as maintenance to the contacts. Afterwards, the contact input current is reduced to a steady-state current. Contact inputs with auto burnishing allow currents up to 50 mA at the first instance when the change of state was sensed. Then, within 25 to 50 ms, this current is slowly reduced to 5 mA. The 50-mA peak current burns any film on the contacts, allowing for proper sensing of state changes. TIDU858A – March 2015 – Revised May 2015 Submit Documentation Feedback Digitally Isolated 2-Channel, Wide DC Binary Input Module Copyright © 2015, Texas Instruments Incorporated 5 System Description 1.2.4 www.ti.com Miscellaneous Features Filter Filters prevent the input signal from being detected erroneously. The following types of input filters can be used: • The hardware input filter is used to suppress contact bounce (1 to 64 ms). • Change-of-state delay is used to suppress short signal interruptions. • Chatter blocking is used to suppress huge bursts of indications in case of defective battery or intermediate relays. Processing The detected changes of state can be processed further in the following ways: • Single-point indication: Each incoming or outgoing input signal causes data to be entered in the event buffer and the process image to be updated. • Transient indication: Each change in the input signal causes the process image to be updated. However, only an incoming input signal causes data to be entered in the event buffer. • Double-point indication: Two defined states of an operational device ( for example, on/off) and two undefined states (for example, intermediate state information) can be represented with two inputs. Each change in the double-point indication causes data to be entered in the event buffer. Each new state of the two inputs is entered in the process image. • Bit patterns: Several inputs are used to detect freely definable states of an operating device. This information can be transferred to the event buffer by an internal event signal (change in the bit pattern) or an external event signal (impulse through a fixed external input). • Transformer tap indication: Several inputs are used to detect the states of a transformer tap generator. This information is transferred according to the moving contact. The transformer taps can be entered in variable codes. • Metered-value acquisition: Signal changes are interpreted as metering pulses and totalized. The metered value is transferred to the event buffer by means of a transfer job. 6 Digitally Isolated 2-Channel, Wide DC Binary Input Module Copyright © 2015, Texas Instruments Incorporated TIDU858A – March 2015 – Revised May 2015 Submit Documentation Feedback System Description www.ti.com 1.3 Isolation Table 1. Key Methods of Isolation SiO2: ISO72x; Typical BV is VPEAK/µm • Inorganic • Highly stable (over temperature, moisture, time), high quality • Used extensively and for a long time as dielectric in semiconductor (low defunct rates) • Deposited in a controlled semiconductor process Polymide: ADI transformer core; Typical BV is 250 VPEAK/µm • Organic • Retains moisture — affects lifetime especially at high voltages • Used in semiconductor mainly for stress relief and now as isolation barrier Epoxy: Opto-couplers; Typical BV is 50 VPEAK/µm • Uses filler materials • Leaky (higher partial discharge) • Applied at packaging as mold compound • Voids and anomalies are common Table 2. Isolation Solutions Reliability OPTO MAGNETIC CAPACITIVE Signaling rate (Mbps) PARAMETER 50 150 150 Propagation delay time (ns) 20 32 12 Pulse width distortion (ns) 2 2 1.5 Channel-to-channel skew (ns) 16 2 1.6 Part-to-part skew (ns) 20 10 2 ESD on all pins (kV) ±2 ±2 ±4 CM transient immunity (kV/µs) 20 25 25 –45 to 125 –40 to 125 –55 to 125 2255 Temperature (°C) MTTF @ 125°C, 90% confidence (years) 8 1746 14391 65 50 Magnetic immunity @ 1 kHz (Wb/m2) — 102 108 Radiated electromagnetic-field immunity IEC61000-4-3 (80 to 1000 MHz) MIL-STD 461E RS103 (30 to 1000 MHz) — — — a Fails Fails a Compiles Compiles High-voltage lifetime expectancy (years) <5 < 10 > 28 FIT @ 125°C, 90% confidence TIDU858A – March 2015 – Revised May 2015 Submit Documentation Feedback Digitally Isolated 2-Channel, Wide DC Binary Input Module Copyright © 2015, Texas Instruments Incorporated 7 System Description 1.4 www.ti.com EMC — Transient Overvoltage Stress In industrial applications, lightning strikes, power source fluctuations, inductive switching, and electrostatic discharge (ESD) can cause damage to binary inputs by generating large transient voltages. The following ESD and surge protection specifications are relevant to binary input applications: • IEC 61000-4-2 ESD protection • IEC 61000-4-5 Surge protection The level of protection can be further enhanced when using external clamping devices, such as TVS diodes. TVS diodes are normally used to protect silicon devices, like binary inputs, from transients. The protection is accomplished by clamping the voltage spike to a limit, by the low impedance avalanche breakdown of a PN junction. TVS diodes are ideally open-circuit devices. A TVS diode can be modeled as a large resistance in parallel with some capacitance while working below its breakdown voltage. When a transient is generated and the surge voltage is larger than the breakdown voltage of the TVS, the resistance of the TVS decreases to keep the clamping voltage constant. The TVS clamps the pulse to a level that does not damage the device that it is protecting. The transients are clamped instantaneously (< 1 ns) and the damaging current is diverted away from the protected device. 1.5 1.5.1 TI Isolator Solutions for Binary Input Module ISO72x Family of High-Speed Digital Isolators The Texas Instruments ISO72x family of isolators use capacitive coupling. The capacitive coupling solution uses proven and cost-effective manufacturing processes and provides an inherent immunity to magnetic fields. To provide transfer of steady-state information, the ISO72x uses both a high-signaling rate and lowsignaling rate channel to communicate as shown in Figure 2. The high-signaling rate channel is not encoded and it transmits data transitions across the barrier after a single-ended-to-differential conversion. The low-signaling rate channel encodes the data in a pulse-width modulated format and transmits the data across the barrier differentially, ensuring the accurate communication of steady-state conditions (long string of 1s or 0s). Differential transfer of the single-ended logic signal across the isolation barrier allows low-level signals and small coupling capacitance. This appears as high impedance to common-mode noise and, with the common-mode noise rejection of the receiver, gives excellent transient immunity, the primary concern in capacitive coupling of signals. Isolation Barrier DC Channel Filter OSC Vref + PWD PWM Carrier Detect POR BIAS POR Data MUX Input IN + EN AC Detect Vref 3-State Filter OUT Output Buffer AC Channel Figure 2. ISO72x Isolator Internal Diagram 8 Digitally Isolated 2-Channel, Wide DC Binary Input Module Copyright © 2015, Texas Instruments Incorporated TIDU858A – March 2015 – Revised May 2015 Submit Documentation Feedback System Description www.ti.com 1.5.2 Power Consumption Beyond the efficiency of the signal transfer across the barrier, the design of the input and output conditioning circuitry has the most to do with power consumption. As shown in Table 3, the opto-couplers use more power than the inductive or capacitive examples. Table 3. Quiescent Power Supply Current Table PART COUPLING TECHNOLOGY ISO721 Capacitive ADuM1100 Magnetic HCPL-0900 Magnetic HCPL-0721 Optical HCPL-0723 (1) (2) 1.5.3 Optical VCC1 AND VCC2 (V) ICC1 (mA) ICC2 (mA) POWER (mW) 5 1 11 60 3.3 0.5 6 21.5 5 0.8 0.06 4.3 3.3 0.3 0.04 1.2 5 0.018 6 30 3.3 0.01 4 13.2 5 only 10 (1) 9 5 only (1) 10 17.5 95 (2) 137.5 10 mA is for the logic-low input state. When the logic input state is high, then the current consumption drops to 3 mA. 17.5 mA is for the logic-low input state. When the logic input state is high, then the current consumption drops to 16.5 mA. Reliability Mean time to failure (MTTF) is a standard measure for reliability of semiconductor devices. For digital isolators, this measure represents the reliability of both the integrated circuit and the isolation mechanism. Table 4 shows the MTTF of an optical, inductive, and capacitive digital isolator. The ISO721 is very reliable when compared to inductive and optical solutions. Table 4. MTTF Reliability Measurement PART 1.6 COUPLING TECHNOLOGY AMBIENT TEMPERATURE (°C) MTTF (Hr/Fail) TYPICAL, 60% CONFIDENCE TYPICAL, 90% CONFIDENCE FITs (Fail/10 Hr) MTTF (Hr/Fail) FITs (Fail/109 Hr) 1983 9 ISO721 Capacitive 125 1,246,889 802 504,408 HCPL-0900 Inductive 125 288,118 3471 114,654 8722 HCPL-0721 Optical 125 174,617 5727 69,487 14.391 Isolated 2-Channel, Wide DC Binary Input Module TI Design Advantages Some of the advantage of the DC binary input module is as follows: • Allows for measurement of wide DC input voltage • Uses MCU to allow flexibility in terms of input voltage processing and measurement accuracy • Provides provision for programmable threshold on the host side • Uses digital isolator to increase reliability • Uses MCU capabilities to control wetting current • Costs optimized solution • Reduces the cost per channel with addition of more channels with common ground TIDU858A – March 2015 – Revised May 2015 Submit Documentation Feedback Digitally Isolated 2-Channel, Wide DC Binary Input Module Copyright © 2015, Texas Instruments Incorporated 9 Design Features 2 www.ti.com Design Features The DC binary input module measures the input DC voltage and converts the measured voltage into ADC counts. The ADC counts are communicated to the host and the host converts the ADC count into voltage for further processing. Table 5. DC Binary Input — Electrical Specifications SERIAL NUMBER PARAMETER DESCRIPTION COMMENT 1 Number of inputs 2 Both inputs share common ground. 2 Input voltage range 18-V to 264-V DC Maximum permissible voltage input is ≤ 300-V DC. 3 Input voltage frequency DC 4 Measurement resolution <1 V for input values between 24-V to 230-V DC 5 Input voltage measurement accuracy ±3% of measured value ±1 V (programmable step size) 6 Voltage input resistance ≥ 300 KΩ 7 Current drain at voltage input < 1 mA at 300-V DC 8 Response time ≥ 3 ms Measurement averaged over 3 ms. 9 Binary input wetting resistance ≥ 2.5 KΩ Default wetting is off Binary wetting pulse width is based on nominal voltage (24 V, 110 V, 230 V). 10 Isolator type 11 Binary input contact type External wetting type 12 LED indication N/A 13 Reference temperature 25°C 14 Isolation of binary inputs Group isolated 14 Electrical isolation level > 2 kVRMS 16 Protection against ESD, surge (EMC requirements) ESD: 2 kV, contact Surge: 2 kV , 42-Ω differential mode • I2C isolator • Digital isolator (replaces I2C isolator) Binary module communicates measured voltage as ADC counts using I2C interface to the host. 3.3-V isolated voltage is generated internally on the module. Tested with DC input. NOTE: This module must not be used to measure AC input or negative DC input. 10 Digitally Isolated 2-Channel, Wide DC Binary Input Module Copyright © 2015, Texas Instruments Incorporated TIDU858A – March 2015 – Revised May 2015 Submit Documentation Feedback Block Diagram www.ti.com 3 Block Diagram BI1 18-V DC to 300-V DC 3.3 VSEC + 3.3 V SN6501 Transformer driver + 3.3 V BI1 18-V DC to 300-V DC Transistor switch MOSFET with 2.5 Kcurrent limit resistor DGND Isolated GND TP25 Transistor bias from 15-V DC input 1:1.1 Isolated GND 3.3 VSEC + 3.3 V 3.3 VSEC To host MCU ADC input ISO1541D or ISO7220ADR 2 IC Isolated GND Resistor divider with protection binary input 1 BI1 Resistor divider with protection binary input 2 BI2 MSP430G2332IPW20 2 IC J2 Wetting control BI1 ADC input DGND 2 I C address configuration and programming 18-V DC to 300-V DC 18-V DC to 300-V DC Wetting control BI2 Transistor switch MOSFET with 2.5 Kcurrent limit resistor Transistor bias from 15-V DC input BI2 18-V DC to 300-V DC BI2 18-V DC to 300-V DC Figure 3. Block Diagram of Wide DC Binary Input Module 3.1 MCU With Internal ADC The MSP430 family of ultra-low-power microcontrollers has been considered for this TI design. The MCU considered is MSP430G2332IPW20. The MCU has an internal 10-bit ADC. Other features include: • Low supply voltage range: 1.8 to 3.6 V • Ultra-low power consumption – Active mode: 220 μA at 1 MHz, 2.2 V • Internal very-low-power low-frequency (LF) oscillator • One 16-bit Timer_A with three capture/compare registers 3.2 Digital Isolator To meet safety requirements, the binary input module is isolated from the host interface. Digital isolators have been considered for isolation. The binary inputs status information is communicated to the host MCU using the following options: • I2C isolator: ISO1541D low-power bidirectional I2C isolators The status information is communicated as ADC counts that can be converted to voltage • Digital isolator: ISO7220ADR dual-channel digital isolators. The status information is conveyed as above (high) or below (low) a set value TIDU858A – March 2015 – Revised May 2015 Submit Documentation Feedback Digitally Isolated 2-Channel, Wide DC Binary Input Module Copyright © 2015, Texas Instruments Incorporated 11 Block Diagram 3.3 www.ti.com Isolated Power Supply The isolated power for the MCU, digital isolator, and the signal conditioning circuit used for sensing the status of the binary inputs are generated using a Push-Pull Driver for Isolated Power Supplies SN6501DBV. The transformer used for this application is 750313734. The transformer package is selected to have isolation voltage of ≥ 5 kV. Choosing a bigger transformer package facilitates easy migration to reinforced isolators. Zener diode PTZTE253.9B is used for protecting the power supply against overvoltage and ESD. The Isolated power supply operates with a single 3.3-V input. The host interface provides the required power supply for the binary module operation. 3.4 Host Interface The status of the binary output can be communicated as voltage output (I2C output) or digital output. The status is communicated to a host MCU. Tiva™ C Series TM4C123G LaunchPad™ Evaluation Board is used as the host MCU. NOTE: The host MCU (LaunchPad) is not part of the binary module. 3.5 Input Voltage Divider and Protection • • 3.6 3.6.1 Input protection: TVS SMCJ400CA is used for protecting binary input module against overvoltage and transient inputs. Package selection is critical to ensure the device has low leakage with temperature variation. Resistor divider: The DC binary input voltage applied is divided by a resistor divider, which presents a constant resistance to the binary input. Multiple resistors are used to ensure the resistors withstand the maximum input voltage reliably. The output of the resistor divider is measured by the ADC, which is within the ADC measurement range at maximum input. A Zener diode PTZTE255.1B is used to protect the electronic circuit from overvoltage. Wetting Current Control Transistor Drive for MOSFET Gate Driver A transistor is used to drive the MOSFET that controls the wetting current. The bias voltage of 15 V max for the MOSFET operation is generated from the binary input using a Zener regulator. The bias current for the Zener must be in µA and care should be taken during selection of the Zener. Vz versus Iz characteristics is critical. 3.6.2 Wetting Current Limiting Resistor and MOSFET Four resistors, 10 KΩ each connected in parallel, are used as current limit for wetting current. A D-PAK MOSFET with a 600-V rating AOD2N60A is used that ensures reliability of the MOSFET. The short time overload capability of the resistor is being used and care should be taken to not test the wetting current for test > 100 ms (typically 50 ms). 12 Digitally Isolated 2-Channel, Wide DC Binary Input Module Copyright © 2015, Texas Instruments Incorporated TIDU858A – March 2015 – Revised May 2015 Submit Documentation Feedback Circuit Design and Component Selection www.ti.com 4 Circuit Design and Component Selection 4.1 MCU With Internal ADC The binary input modules are highly cost sensitive and to ensure the overall solution cost is optimal, MCU with internal ADC has been selected. The internal ADC is a 10-bit SAR ADC. +3.3VSEC +3.3VSEC +3.3VSEC R23 R21 DNP 10.0k DNP 10.0k U1 DVCC ADC_0 PWM_0 PWM_1 ADC_0 PWM_0 PWM_1 2 3 4 DVSS TA0CLK TA0.0/A1 TA0.1/A2 XIN/P2.6 XOUT/P2.7 TP6 ADC_1 ADC_2 R19 R20 0 0 5 6 7 ADC_3 8 9 10 11 12 13 TP12 TP15 TP13 TP19 TP18 TP20 0.1µF C1 1µF 1 20 +3.3VSEC 19 TP17 18 GND TP16 R24 1.50k ADC10CLK SMCLK TDO/TDI TP7 C2 TA0.0/SCLK/A5 TDI/TCLK 15 SDA 14 SCL R27 1.50k +3.3VSEC P2.0_GPIO P2.1_GPIO P2.2_GPIO P2.3_GPIO P2.4_GPIO P2.5_GPIO TEST/SBWTCK RST R35 47k 17 16 J1 R22 R28 R25 R26 DNP 0 DNP 0 DNP 0 DNP 0 C8 470pF 1 2 3 MSP430G2332IPW20 GND GND GND Figure 4. MCU Functionality Configuration The MCU considered is MSP430G2332IPW20. Texas Instruments MSP430 family of ultra-low-power microcontrollers consist of several devices featuring different sets of peripherals targeted for various applications. The architecture, combined with five low-power modes is optimized to achieve extended battery life in portable measurement applications. The device features a powerful 16-bit RISC CPU, 16-bit registers, and constant generators that contribute to maximum code efficiency. The digitally controlled oscillator (DCO) allows wake-up from low-power modes to active mode in less than 1 μs. The MSP430G2332IPW20 is a ultra-low-power mixed signal microcontroller with a built-in 16-bit timer. The device has up to 16 I/O capacitive-touch enabled pins and built-in communication capability using the universal serial communication interface. TheMSP430G2332IPW20 has a 10-bit A/D converter. TIDU858A – March 2015 – Revised May 2015 Submit Documentation Feedback Digitally Isolated 2-Channel, Wide DC Binary Input Module Copyright © 2015, Texas Instruments Incorporated 13 Circuit Design and Component Selection 4.1.1 www.ti.com Features • • • • • • • • • • • • • Low supply voltage range: 1.8 to 3.6 V Ultra-low power consumption – Active mode: 220 μA at 1 MHz, 2.2 V – Standby mode: 0.5 μA – Off mode (RAM retention): 0.1 μA Five power-saving modes Ultra-fast wake-up from standby mode in less than 1 μs 16-bit RISC architecture, 62.5-ns instruction cycle time Basic clock module configurations – Internal frequencies up to 16 MHz with four calibrated frequencies – Internal very-low-power LF oscillator – 32-kHz crystal – External digital clock source One 16-bit Timer_A with three capture/compare registers Universal serial interface (USI) supporting SPI and I2C 10-bit 200-ksps A/D converter with internal reference, sample-and-hold, and autoscan (MSP430G2x32 only) Brownout detector Serial onboard programming, no external programming voltage needed, programmable code protection by security fuse On-chip emulation logic with Spy-Bi-Wire interface Package – TSSOP: 20-pin N OR PW PACKAGE (TOP VIEW) DVCC P1.0/TA0CLK/ACLK/A0 P1.1/TA0.0/A1 P1.2/TA0.1/A2 P1.3/ADC10CLK/VREF-/VEREF-/A3 P1.4/TA0.2/SMCLK/A4/VREF+/VEREF+/TCK P1.5/TA0.0/SCLK/A5/TMS P2.0 P2.1 P2.2 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 DVSS XIN/P2.6/TA0.1 XOUT/P2.7 TEST/SBWTCK RST/NMI/SBWTDIO P1.7/SDI/SDA/A7/TDO/TDI P1.6/TA0.1/SDO/SCL/A6/TDI/TCLK P2.5 P2.4 P2.3 Figure 5. MCU Pinout Description 14 Digitally Isolated 2-Channel, Wide DC Binary Input Module Copyright © 2015, Texas Instruments Incorporated TIDU858A – March 2015 – Revised May 2015 Submit Documentation Feedback Circuit Design and Component Selection www.ti.com 4.1.2 MCU Resources Table 6. MCU RAM and Flash Size 4.1.3 PIN NUMBER DESCRIPTION SIZE 1 Flash 4 KB 2 RAM 256 bytes 3 ADC10 8 channels 4 Package and pin count 20-TSSOP MCU Configuration Table 7. MCU Pin Configuration for the DC Binary Module PIN NUMBER PIN FUNCTION 1 DVCC CONFIGURATION 3.3 VSEC 2 A0 3 TA0.0 PWM_0 (Control of Binary input1 wetting current) 4 TA0.1 PWM_1 (Control of Binary input2 wetting current) 5 A3 ADC_1 (Currently not used — configured as Port) 6 A4 ADC_2 (Currently not used — configured as Port) 7 A5 ADC_3 (Binary input2) 8 P2.0 Not used – configured as output 9 P2.1 Not used – configured as output 10 P2.2 Can be used to set I2C address — configured as output 11 P2.3 Can be used to set I2C address — configured as output 12 P2.4 Can be used to set I2C address — configured as output 13 P2.5 Can be used to set I2C address — configured as output 14 SCL I2C clock 15 SDA I2C data 16 /RST Programming 17 SBWTCK Programming 18 P2.7 Not used – configured as output 19 P2.6 Not used – configured as output 20 DVSS TIDU858A – March 2015 – Revised May 2015 Submit Documentation Feedback ADC_0 (Binary input1) GND Digitally Isolated 2-Channel, Wide DC Binary Input Module Copyright © 2015, Texas Instruments Incorporated 15 Circuit Design and Component Selection 4.1.4 www.ti.com ADC Features The ADC used is a 10-bit, 8-channel ADC with Autoscan and DMA capabilities. Table 8. 10-Bit ADC, Timing Parameters (MSP430G2x32 Only) (1) PARAMETER TEST CONDITIONS For specified performance of ADC10SR = 0 ADC10 linearity parameters ADC10SR = 1 fADC10CLK ADC input clock frequency fADC10OSC ADC10 built-in ADC10DIVx = 0, ADC10SSELx = 0, oscillator frequency fADC10CLK = fADC10OSC tCONVERT tADC10ON (1) (2) Conversion time ADC10 built-in oscillator, ADC10SSELx = 0, fADC10CLK = fADC10OSC VCC MIN TYP MAX 0.45 6.3 0.45 1.5 3V 3.7 6.3 3V 2.06 3.51 3V fADC10CLK from ACLK, MCLK, or SMCLK: ADC10SSELx ≠ 0 UNIT MHz MHz µs 13 × ADC10DIV × 1/fADC10CLK Turn-on setting time of the ADC (2) 100 ns Over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted). The condition is that the error in a conversion started after tADC10ON is les than ±0.5 LSB. The reference and input signal are already settled. Table 9. 10-Bit ADC, Linearity Parameters (MSP430G2x32 Only) PARAMETER 16 TEST CONDITIONS VCC MIN TYP MAX UNIT EI Integral linearity error 3V ±1 LSB ED Differential linearity error 3V ±1 LSB EO Offset error 3V ±1 LSB EG Gain error 3V ±1.1 ±2 LSB ET Total unadjusted error 3V ±2 ±5 LSB Source impedance RS < 100 Ω Digitally Isolated 2-Channel, Wide DC Binary Input Module Copyright © 2015, Texas Instruments Incorporated TIDU858A – March 2015 – Revised May 2015 Submit Documentation Feedback Circuit Design and Component Selection www.ti.com 4.2 Digital Isolator The binary input module is isolated from the host MCU. TI digital isolators are used to provide the required isolation. The isolator could be digital output type or I2C interface type. Primary Secondary An I2C interface type isolator provides flexibility in terms of functionality. A digital output type is recommended when cost is critical and the binary inputs are a fixed input voltage. +3.3VSEC VCC_ISO VCC_ISO C5 C6 0.1µF 0.1µF U2 1 2 3 4 VCC1 VCC2 SDA1 SDA2 SCL1 SCL2 GND1 GND2 GND_iso 8 R32 R29 1.50k 1.50k J2 7 R30 0 SDA_iso 6 R31 0 SCL_iso 800-10-003-10-001000 5 ISO1541D GND_iso GND 1 2 3 GND_iso TP22 TP21 Figure 6. Digital Isolator for I2C Interface I2C Isolator: ISO1541D Low-Power Bidirectional I2C Isolators 4.2.1 The ISO1541 are low-power, bidirectional isolators that are compatible with I2C interfaces. These devices have their logic input and output buffers separated by TI’s capacitive isolation technology using a SiO2 barrier. When used in conjunction with isolated power supplies, these devices block high voltages, isolate grounds, and prevent noise currents from entering the local ground and interfering with or damaging sensitive circuitry. This isolation technology provides for function, performance, size, and power consumption advantages when compared to opto-couplers. The ISO1541 enable a complete isolated I2C interface to be implemented within a small form factor. The ISO1541 is useful in applications that have a single master while the ISO1540 is ideally fit for multi-master applications. Isolated bidirectional communications is accomplished within these devices by offsetting the Side 1 Low-Level Output Voltage to a value greater than the Side 1 High-Level Input Voltage, thus preventing an internal logic latch that otherwise would occur with standard digital isolators. 4.2.1.1 • • • • • • • Features Isolated bidirectional, I2C compatible, communications Supports up to 1 MHz operation 3- to 5.5-V supply range Open drain outputs with 3.5-mA Side 1 and 35-mA Side 2 sink current capability –40°C to 125°C operating temperature ±50 kV/μs transient immunity (typical) HBM ESD protection of 4 kV on all pins; 8 kV on bus pins TIDU858A – March 2015 – Revised May 2015 Submit Documentation Feedback Digitally Isolated 2-Channel, Wide DC Binary Input Module Copyright © 2015, Texas Instruments Incorporated 17 Circuit Design and Component Selection 4.2.2 www.ti.com Digital Isolator: ISO7220ADR Dual Channel Digital Isolators The ISO7220 are dual-channel digital isolators. The logic input and output buffer is separated by TI’s SiO2 isolation barrier, providing galvanic isolation of up to 4000 VPK per VDE. Used in conjunction with isolated power supplies, these devices block high voltage, isolate grounds, and prevent noise currents on a data bus or other circuits from entering the local ground and interfering with or damaging sensitive circuitry. A binary input signal is conditioned, translated to a balanced signal, then differentiated by the capacitive isolation barrier. Across the isolation barrier, a differential comparator receives the logic transition information, then sets or resets a flip-flop and the output circuit accordingly. A periodic update pulse is sent across the barrier to ensure the proper dc level of the output. If this dc-refresh pulse is not received every 4 μs, the input is assumed to be unpowered or not being actively driven, and the failsafe circuit drives the output to a logic high state. The small capacitance and resulting time constant provide fast operation with signaling rates available from 0 Mbps (DC) to 150 Mbps. The signaling rate of a line is the number of voltage transitions that are made per second expressed in the units bps (bits per second). The A-, B-, and C-option devices have TTL input thresholds and a noise filter at the input that prevents transient pulses from being passed to the output of the device. The M-option devices have CMOS VCC/2 input thresholds and do not have the input noise-filter and the additional propagation delay. 4.2.2.1 • • • • • • • • • • Features 1 Mbps signaling rate options – Low channel-to-channel output skew; 1-ns max – Low pulse-width distortion (PWD); 1-ns max – Low jitter content; 1 ns typical at 150 Mbps 50 kV/μs typical transient immunity Operates with 2.8-V (C-Grade), 3.3-V or 5-V supplies 4-kV ESD protection High electromagnetic immunity –40°C to 125°C operating range Typical 28-year life at rated voltage (see High-Voltage Lifetime of the ISO72x Family of Digital Isolators [SLLA197]) VDE basic insulation with 4000-VPK VIOTM, 560 VPK VIORM per DIN EN 60747-5-5 (VDE 0884-5) and DIN EN 61010-1 (VDE 0411-1) 2500 VRMS isolation per UL 1577 CSA approved for component acceptance notice 5 A and IEC 60950-1 NOTE: ISO7220ADR is pin compatible to the I2C isolator and hence is not shown in the schematics. Based on the requirement, the I2C or digital isolator is mounted. ISO7320 series isolators provide higher isolation and surge ratings. These devices are pin compatible and can be considered based on application requirement. 18 Digitally Isolated 2-Channel, Wide DC Binary Input Module Copyright © 2015, Texas Instruments Incorporated TIDU858A – March 2015 – Revised May 2015 Submit Documentation Feedback Circuit Design and Component Selection www.ti.com 4.3 Isolated Power Supply T1 1 5 2 U3 SN6501DBV 2 +3.3VSEC +3.3V 6 1 D6 BAT54C-7-F 3 C4 1µF X7R 16V C3 10µF 3 GND 1 D5 PTZTE253.9B 3.9V 2 4 D1 GND 4 VCC D2 GND 5 3 1.1:1 C7 1µF X7R 16V GND_iso GND_iso GND Figure 7. Isolated Power Supply 4.3.1 Push-Pull Driver for Isolated Power Supplies SN6501DBV The SN6501 is a monolithic oscillator/power-driver, specifically designed for small form factor, isolated power supplies in isolated interface applications. The device drives a low-profile, center-tapped transformer primary from a 3.3-V or 5-V DC power supply. The secondary can be wound to provide any isolated voltage based on transformer turns ratio. The SN6501 consists of an oscillator followed by a gate drive circuit that provides the complementary output signals to drive the ground referenced N-channel power switches. The internal logic ensures breakbefore-make action between the two switches. The SN6501 is available in a small SOT-23 (5) package, and is specified for operation at temperatures from –40°C to 125°C. 4.3.1.1 • • • • • Features Push-pull driver for small transformers Single 3.3- or 5-V supply High primary-side current drive: – 5-V supply: 350 mA (max) – 3.3-V supply: 150 mA (max) Low ripple on rectified output permits small output capacitors Small 5-pin SOT-23 package TIDU858A – March 2015 – Revised May 2015 Submit Documentation Feedback Digitally Isolated 2-Channel, Wide DC Binary Input Module Copyright © 2015, Texas Instruments Incorporated 19 Circuit Design and Component Selection 4.3.2 www.ti.com Isolation Transformer Table 10. Isolation Transformer 750313734 Specifications PARAMETER 4.3.3 SPECIFICATION Isolation voltage 6.25 kV Operating temperature range –40°C to 125°C Termination style SMD/SMT Dimensions 9.14 × 8 × 7.62 mm (L × W × H) Brand Midcom / Wurth Electronics Current rating 150 mA Inductance 340 µH Maximum DC resistance 0.419 Ω Primary resistance 0.419 Ω Product Transformers Secondary resistance 0.335 Ω Series MID-SN6501 Shielding Unshielded Type Power transformer Power Supply Overvoltage and ESD Protection Zener (PTZTE253.9B) Table 11. 3.9-V Power Supply Protection Zener Diode Specification 20 PARAMETER SPECIFICATION Voltage — Zener (Nom; Vz) 4.1 V Tolerance ±6% Power — Max 1W Impedance (Max; Zzt) 15 Ω Current — Reverse leakage @ Vr 40 µA @ 1 V Mounting type Surface mount Package or case DO-214AC, SMA Supplier device package PMDS Digitally Isolated 2-Channel, Wide DC Binary Input Module Copyright © 2015, Texas Instruments Incorporated TIDU858A – March 2015 – Revised May 2015 Submit Documentation Feedback Circuit Design and Component Selection www.ti.com 4.4 Simulation of Host MCU Interface To test the functionality, the host interface was simulated using an MCU-based system. 4.4.1 Tiva C Series LaunchPad Interface The Tiva C Series LaunchPad (EK-TM4C123GXL) is a low-cost evaluation platform for ARM® Cortex™-M4F-based microcontrollers. The Tiva C Series LaunchPad design highlights the TM4C123GH6PMI microcontroller USB 2.0 device interface, hibernation module, and motion control pulse-width modulator (MC PWM) module. The Tiva C Series LaunchPad also features programmable user buttons and an RGB LED for custom applications. The stackable headers of the Tiva C Series LaunchPad BoosterPack™ XL interface demonstrate how easy it is to expand the functionality of the Tiva C Series LaunchPad when interfacing to other peripherals on many existing BoosterPack add-on boards as well as future products. Figure 8 shows a photo of the Tiva C Series LaunchPad. Power Select Switch USB Connector (Power/ICDI) Green Power LED Tiva TM4C123GH6PMI Microcontroller USB Micro-A/-B Connector (Device) Reset Switch RGB User LED Tiva C Series LaunchPad BoosterPack XL Interface (J1, J2, J3, and J4 Connectors) Tiva C Series LaunchPad BoosterPack XL Interface (J1, J2, J3, and J4 Connectors) Tiva TM4C123GH6PMI Microcontroller MSP430 LaunchPad-Compatible BoosterPack Interface MSP430 LaunchPad-Compatible BoosterPack Interface User Switch 1 User Switch 2 Figure 8. Tiva C Series TM4C123G LaunchPad Evaluation Board TIDU858A – March 2015 – Revised May 2015 Submit Documentation Feedback Digitally Isolated 2-Channel, Wide DC Binary Input Module Copyright © 2015, Texas Instruments Incorporated 21 Circuit Design and Component Selection 4.5 www.ti.com Input Voltage Divider, Signal Conditioning, and Protection Note on resistor divider The 300-KΩ resistance was increased to 500 KΩ and 1 MΩ, and voltage measurement accuracy was tested. No variation in accuracy was observed with increase in resistance. The 300-KΩ impedance has been finalized. The ratio of division has to be maintained even with an increase in total resistance. TP2 D1 SMCJ400CA R1 100k TP4 R5 100k R9 100k R7 0 R13 R51 R3 6.34k 6.34k C11 DNP 1000pF C0G/NP0 50V ADC_0 0 D3 PTZTE255.1B 5.1V ADC_0 TP9 GND1 GND1 Figure 9. Analog Input 22 Digitally Isolated 2-Channel, Wide DC Binary Input Module Copyright © 2015, Texas Instruments Incorporated TIDU858A – March 2015 – Revised May 2015 Submit Documentation Feedback Circuit Design and Component Selection www.ti.com 4.5.1 Input Protection The binary input module is protected against overvoltage and transients. The SMCJ400CA is used to achieve the required protection. Table 12. SMCJ400 Specifications 4.5.2 PARAMETER SPECIFICATION Type Zener Bidirectional channels 1 Voltage — Reverse standoff (Typ) 400 V Voltage — Breakdown (Min) 447 V Voltage — Clamping (Max) @ IPP 648 V Current — Peak Pulse (10/1000 µs) 2.3 A Power — Peak pulse 1500 W (1.5 kW) Power line protection No Applications General Purpose Capacitance @ frequency — Operating temperature –55°C to 150°C (TJ) Mounting type Surface mount Package or case DO-214AB, SMC Resistor Divider A 100-KΩ 1206 package resistor, which can withstand a maximum voltage of 200 V, is selected for this application. The resistor tolerance and temperature drift can be selected based on the accuracy requirement. 4.5.3 ADC Input Overvoltage Protection (PTZTE255.1B) A Zener diode is used to protect the electronic circuit from overvoltage and ESD. Table 13. 5.1-V Analog Input to ADC Protection Diode Specifications PARAMETER SPECIFICATION Voltage — Zener (Nom; Vz) 5.4 V Tolerance ±6% Power — Max 1W Impedance (Max; Zzt) 8Ω Current — Reverse leakage @ Vr 20 µA @ 1 V Mounting type Surface mount Package or case DO-214AC, SMA TIDU858A – March 2015 – Revised May 2015 Submit Documentation Feedback Digitally Isolated 2-Channel, Wide DC Binary Input Module Copyright © 2015, Texas Instruments Incorporated 23 Circuit Design and Component Selection 4.6 www.ti.com Wetting Current Control R40 R46 10.0k R44 10.0k 100k R42 10.0k D R48 10.0k R39 100k Q2 AOD2N60 600V R37 100k S G D7 DNPC9 PTZTE2515B 1µF 15V R12 100k 1% 1206 Q4 4 2 GND1 GND1 FCX458 R18 2.61k 1% PWM_0 3 1 PWM_0 R16 100k 1% GND1 TP8 GND1 Figure 10. Wetting Current Control Circuit 4.6.1 Transistor Drive for MOSFET Gate Driver A transistor is used to drive the MOSFET that controls the wetting current. The bias voltage of 15 V max is generated from the binary input using a Zener PTZTE2515BCT regulator. Table 14. 15-V Transistor Bias Voltage Regulation Zener Specification PARAMETER SPECIFICATION Voltage — Zener (Nom; Vz) 15.4 V Tolerance ±6% Power — Max 1W Impedance (Max; Zzt) 10 Ω Current — Reverse leakage @ Vr 10 µA @ 11 V Mounting type Surface mount Package or case DO-214AC, SMA Table 15. FCX458 Transistor Specifications PARAMETER 24 SPECIFICATION Transistor type NPN Current — Collector (Ic; Max) 225 mA Voltage — Collector emitter breakdown (Max) 400 V Vce Saturation (Max) @ Ib, Ic 500 mV @ 6 mA, 50 mA Current — Collector cutoff (Max) 100 nA DC current gain (hFE) (Min) @ Ic, Vce 100 @ 50 mA, 10 V Power (Max) 1W Frequency — Transition 50 MHz Mounting type Surface mount Package or case TO-243AA Digitally Isolated 2-Channel, Wide DC Binary Input Module Copyright © 2015, Texas Instruments Incorporated TIDU858A – March 2015 – Revised May 2015 Submit Documentation Feedback Circuit Design and Component Selection www.ti.com 4.6.2 Current Limiting Resistors and MOSFET AOD2N60A Table 16. Wetting Current Control MOSFET Specifications PARAMETER SPECIFICATION FET type MOSFET N-channel, metal oxide FET feature Standard Drain-to-source voltage (VDS) 600 V Current — Continuous drain (Id) @ 25°C 2 A (Tc) Rds On (Max) @ Id, Vgs 4.7 Ω @ 1 A, 10 V VGS(th) (Max) @ Id 4.5 V @ 250 µA Gate charge (Qg) @ Vgs 11 nC @ 10 V Input capacitance (Ciss) @ VDS 295 pF @ 25 V Power (Max) 57 W Mounting type Surface mount Package or case TO-252-3, DPak (Two Leads + Tab), SC-63 Supplier device package TO-252 (D-Pak) Four resistors, 1206 package 10 KΩ each in parallel, are used as current limit for wetting current. A D-PAK MOSFET with a 600-V rating is used for enhanced reliability. 4.7 Hardware Design Guidelines • • • • Input voltage divider selection: Ensure the resistors are de-rated 30% for the maximum withstand voltage rating. Wetting current control resistor selection: The short time overload capability must be greater than 2.5 times the normal voltage withstand capability for one second. 15-V Zener selection for MOSFET switching: Vz must be constant for wide bias currents. The Zener current must be as less as possible to reduce power loss. Zener selection for ADC input overvoltage protection: At lower biasing, current Vz reduces and this will clip the input voltage affecting accuracy. The Vz at low bias current must be selected such that at the lowest input voltage, the voltage would be sufficient to bias the MOSFET. TIDU858A – March 2015 – Revised May 2015 Submit Documentation Feedback Digitally Isolated 2-Channel, Wide DC Binary Input Module Copyright © 2015, Texas Instruments Incorporated 25 Circuit Design and Component Selection 4.8 4.8.1 www.ti.com Enhancements Increasing Binary Inputs Up to six inputs can be configured as ADC to measure the binary inputs. If there is a requirement to increase number of inputs to more than two, the resistor divider and the wetting control circuit have to be added. The circuit that has to be added is shown in Figure 11. R40 R46 10.0k R44 10.0k 100k R42 10.0k D R48 10.0k R39 100k Q2 AOD2N60 600V R37 100k S G D7 DNPC9 PTZTE2515B 1µF 15V R12 100k 1% 1206 Q4 4 2 GND1 GND1 FCX458 R18 2.61k 1% PWM_0 1 3 TP2 GND1 D1 SMCJ400CA PWM_0 R16 100k 1% TP8 R1 100k GND1 TP4 R5 100k R9 100k R7 0 R13 R51 R3 6.34k 6.34k C11 DNP 1000pF C0G/NP0 50V ADC_0 0 D3 PTZTE255.1B 5.1V ADC_0 TP9 GND1 GND1 Figure 11. Circuit to Add for Binary Input Channel Expansion 4.8.2 Migration of Digital Isolator From Basic to Reinforced Isolation TI has a reinforced isolator as part of the isolator roadmap that is package and pin compatible. With this design, the migration to reinforce would need minimal efforts of digital isolator replacement and testing. There may not be any design efforts required. 26 Digitally Isolated 2-Channel, Wide DC Binary Input Module Copyright © 2015, Texas Instruments Incorporated TIDU858A – March 2015 – Revised May 2015 Submit Documentation Feedback Software Description www.ti.com 5 Software Description 5.1 Initialization Table 17. MCU Peripherals Initialization for DC Binary Module Functionality FUNCTIONALITY MCU clock DESCRIPTION SMCLK and DCO are initialized to 1 MHz 1. Timer 3. Configure the timer capture control register (TA0CCTL0) to select no capture CMx as 0, compare/capture input selected as CCIxA, output mode OUTMODx as 0 and enable compare interrupt CCIE. Timer A programmed to provide interrupt every 200 µs (or any other sampling interval desired). Set the sampling interval (TA0CCR0) Configure the Timer A control register (TA0CTL) to choose SMCLK, divider as 1 and up/down mode. 1. 2. Disable conversion. Configure the following options for the ADC control register0 (ADC10CTL0): 2. (a) Enable ADC interrupt. (b) Switch ON ADC. (c) Set the sample and hold time to 16 x ADC10CLKs. 3. (d) Set the reference voltages for ADC: VR+ = VCC and VR– = VSS ADC10CTL0, once configured, does not need to be changed to switch between different channels. Configure the following options for the ADC control register0 (ADC10CTL1): (a) Set the mode to single channel single conversion. ADC – Four channels (b) Set the ADC clock to ADC1OSC. (c) Set the divider to 1. (d) Set the sampling trigger to ADC10SC bit. 7. (e) Set the channel to be sampled. Enable ADC channels ADC10AE0. Enable conversion. To sample multiple channels, ADC10CTL1 and ADC10AE0 registers can be updated with the other desired ADC channel. Issue ADC convert sample by setting ADC10SC bit. Ports 1. 2. Configure the direction of the ports (P1DIR); 0 as inputs and 1 as outputs. Set the default values for outputs (0 as low, 1 as high). I2C 1. 2. 3. 4. 5. 6. 7. 8. · Set the output pins for I2C (P1.6 and P1.7) to high. Enable the pull up resistors for P1.6 and P1.7 (P1REN). Enable the USI function by setting the USIPE6 and USIPE7 bits in USICTL0 register. Disable the USI peripheral using software reset (USISWRST bit). Enable I2C mode and USI interrupt enable. Set clock polarity. Disable automatic clear control (USIIFGCC bit). Enable USI peripheral by clearing the (USISWRST bit). 4. 5. 6. TIDU858A – March 2015 – Revised May 2015 Submit Documentation Feedback Digitally Isolated 2-Channel, Wide DC Binary Input Module Copyright © 2015, Texas Instruments Incorporated 27 Software Description 5.2 www.ti.com Functionality Table 18. DC Binary Module Functional Description FUNCTIONALITY Power ON DESCRIPTION 1. 2. 3. 4. 5. 6. 7. 8. ADC sample capturing ADC samples integration • Samples are triggered by setting ADC10SC bit. (From the timer interrupt for the first channel) • When conversion is complete, it triggers an interrupt. The result is obtained by reading the register ADC10MEM. • Reinitialize the ADC to read the other ADC channels and issue ADC10SC trigger. Repeat this step to read the other ADC channels. • After the value is read from ADC10MEM, the offset has to be corrected. • For each ADC channel, the sample values are added over a timer period (1 ms) and then averaged by dividing with the number of sample counts. 3- and 10-ms ADC count calculation • The 1-ms average for each channel can be stored for a pay period of time (for example, 10 ms equals 10 values). This facilitates calculating the 3- and 10-ms sample count average. I2C interface for communicating ADC count to host • The 3- and 10-ms averages can be transmitted over I2C to the host processor. • A pre-requisite for this is to have a host processor (for example, LaunchPad) that runs as an I2C slave. • The master sends 3- and 10-ms averages for each channel on I2C. The slave replies with 3- and 10-ms averages for each channel on I2C. Digital isolator interface for testing 28 Stop the watchdog timer. Initialize the clocks to set SMCLK to 1 MHz. Disable all interrupts. Set the direction of port pins to default values. Initialize I2C in master mode. Configure Timer A to provide an interval based interrupt using compare register. The timer interrupt can be used to periodically trigger ADC sampling. Initialize ADC to sample one ADC channel. Re-initialize ADC10CTL1 and ADC10AE0 to sample a different ADC channel. Enable all interrupts. • Measure the input voltage in ADC counts and compare with set ADC count and indicate the input voltage as high or low. Digitally Isolated 2-Channel, Wide DC Binary Input Module Copyright © 2015, Texas Instruments Incorporated TIDU858A – March 2015 – Revised May 2015 Submit Documentation Feedback Software Description www.ti.com 5.3 Calculations Table 19. Maximum DC Input Allowed PARAMETER SPECIFICATION ADC range in counts 0 to 1023 Resistor divider ratio 303.16 KΩ / 3.16 KΩ = 95.93 ADC reference ADCref = 3.3 V Maximum input voltage ADCref × Resistor divider ratio = 315 V Table 20. Converting ADC Count to Voltage SPECIFICATION VCC 3.3 V Maximum input 315 V ADC count for maximum input 1023 DC voltage equivalent for one ADC count Maximum input / ADC count = 0.3076 V Programming SBWTDIO RAM/Flash Memory TCK TDO TMS Spy-Bi-Wire Logic SBWTCK TDI 5.4 PARAMETER JTAG TAP Controller Core Logic and Emulation Logic Figure 12. Spy-Bi-Wire Basic Concept The 2-wire interface is made up of the SBWTCK (Spy-Bi-Wire test clock) and SBWTDIO (Spy-Bi-Wire test data I/O) pins. The SBWTCK signal is the clock signal and is a dedicated pin. In normal operation, this pin is internally pulled to ground. The SBWTDIO signal represents the data and is a bidirectional connection. To reduce the overhead of the 2-wire interface, the SBWTDIO line is shared with the RST/NMI pin of the device. TIDU858A – March 2015 – Revised May 2015 Submit Documentation Feedback Digitally Isolated 2-Channel, Wide DC Binary Input Module Copyright © 2015, Texas Instruments Incorporated 29 Testing www.ti.com 6 Testing 6.1 Functional Testing Table 21. Measurements PARAMETERS 6.2 SPECIFICATION MEASUREMENT Isolated supply — 3.3-V output 3.3 V 3.28 V MCU programming Spy-Bi-Wire OK Voltage Measurement Accuracy Testing NOTE: The readings in the following tables are the measurements taken without any calibration. The errors include component tolerances and ADC error. The accuracy can be improved by introducing software calibration. The errors observed can be further improved by doing a gain calibration. To ensure that the results are less than ±3.0% of measured value ±1 V (programmable step size), applying gain calibration is recommended. The gain calibration can be applied on the host side. For initial testing, averaging was done for 1, 3, and 10 ms. The measurement was repeatable at 3 and 10 ms, and there was no difference observed in the measured values. In case measurements are expected to be done faster than 3 ms, characterization has be done for accuracy before implementation. 6.2.1 Testing with 3-ms Averaging Table 22. Board 1: DC Input Voltage versus Measured Voltage Difference 30 DC INPUT VOLTAGE ALLOWED DC VOLTAGE LIMIT (±V) MEASURED VOLTAGE DIFFERENCE B1_Ch1 MEASURED VOLTAGE DIFFERENCE B1_Ch2 18 1.54 17.932 –0.068 17.932 –0.068 19 1.57 18.859 –0.141 18.55 –0.45 20 1.6 19.787 –0.213 19.478 –0.522 21 1.63 20.714 –0.286 20.714 –0.286 24 1.72 23.806 –0.194 23.497 –0.503 48 2.44 47.922 –0.078 47.612 –0.388 49 2.47 48.54 –0.46 48.231 –0.769 50 2.5 49.467 –0.533 49.467 –0.533 51 2.53 50.395 –0.605 50.086 –0.914 72 3.16 71.419 –0.581 71.419 –0.581 110 4.3 109.137 –0.863 108.519 –1.481 111 4.33 110.065 –0.935 109.756 –1.244 112 4.36 110.683 –1.317 110.374 –1.626 113 4.39 112.229 –0.771 111.611 –1.389 144 5.32 142.837 –1.163 142.219 –1.781 196 6.88 194.469 –1.531 193.85 –2.15 240 8.2 237.753 –2.247 236.825 –3.175 241 8.23 238.68 –2.32 238.062 –2.938 242 8.26 239.608 –2.392 238.68 –3.32 276 9.28 273.616 –2.384 272.689 –3.311 300 10 296.804 –3.196 295.877 –4.123 Digitally Isolated 2-Channel, Wide DC Binary Input Module Copyright © 2015, Texas Instruments Incorporated TIDU858A – March 2015 – Revised May 2015 Submit Documentation Feedback Testing www.ti.com Table 23. Board 2: DC Input Voltage versus Measured Voltage Difference DC INPUT VOLTAGE ALLOWED DC VOLTAGE LIMIT (±V) MEASURED VOLTAGE DIFFERENCE B2_Ch1 MEASURED VOLTAGE (V) DIFFERENCE B2_Ch2 18 1.54 18.241 0.241 18.55 0.55 19 1.57 19.169 0.169 19.478 0.478 20 1.6 20.405 0.405 20.405 0.405 21 1.63 21.333 0.333 21.642 0.642 24 1.72 24.425 0.425 24.425 0.425 48 2.44 48.54 0.54 48.54 0.54 49 2.47 49.467 0.467 49.467 0.467 50 2.5 50.395 0.395 50.704 0.704 51 2.53 51.632 0.632 51.632 0.632 72 3.16 72.346 0.346 71.419 –0.581 110 4.3 110.374 0.374 109.447 –0.553 111 4.33 111.302 0.302 110.374 –0.626 112 4.36 112.538 0.538 110.992 –1.008 113 4.39 113.466 0.466 111.92 –1.08 144 5.32 144.383 0.383 143.455 –0.545 196 6.88 196.324 0.324 194.778 –1.222 240 8.2 240.226 0.226 238.68 –1.32 241 8.23 241.153 0.153 239.608 –1.392 242 8.26 242.39 0.39 240.226 –1.774 276 9.28 276.399 0.399 273.926 –2.074 300 10 300.205 0.205 297.732 –2.268 TIDU858A – March 2015 – Revised May 2015 Submit Documentation Feedback Digitally Isolated 2-Channel, Wide DC Binary Input Module Copyright © 2015, Texas Instruments Incorporated 31 Testing 6.2.2 www.ti.com Testing With 10-ms Averaging Table 24. Board 1: DC Input Voltage versus Measured Voltage Difference 32 DC INPUT VOLTAGE ALLOWED DC VOLTAGE LIMIT (±V) MEASURED VOLTAGE DIFFERENCE B1_Ch1 MEASURED VOLTAGE DIFFERENCE B1_Ch2 18 1.54 17.932 0.068 17.932 0.068 19 1.57 18.859 0.141 18.55 0.45 20 1.6 19.787 0.213 19.787 0.213 21 1.63 20.714 0.286 20.405 0.595 24 1.72 23.806 0.194 23.497 0.503 48 2.44 47.612 0.388 47.612 0.388 49 2.47 48.849 0.151 48.54 0.46 50 2.5 49.467 0.533 49.467 0.533 51 2.53 50.395 0.605 50.086 0.914 72 3.16 71.419 0.581 71.109 0.891 110 4.3 108.828 1.172 108.519 1.481 111 4.33 110.065 0.935 109.447 1.553 112 4.36 110.992 1.008 110.374 1.626 113 4.39 111.92 1.08 111.611 1.389 144 5.32 142.837 1.163 142.219 1.781 196 6.88 194.159 1.841 193.541 2.459 240 8.2 237.753 2.247 236.825 3.175 241 8.23 238.68 2.32 237.753 3.247 242 8.26 239.608 2.392 238.68 3.32 276 9.28 273.307 2.693 272.071 3.929 300 10 296.804 3.196 295.568 4.432 Digitally Isolated 2-Channel, Wide DC Binary Input Module Copyright © 2015, Texas Instruments Incorporated TIDU858A – March 2015 – Revised May 2015 Submit Documentation Feedback Testing www.ti.com Table 25. Board 2: DC Input Voltage versus Measured Voltage Difference DC INPUT VOLTAGE ALLOWED DC VOLTAGE LIMIT (±V) MEASURED VOLTAGE DIFFERENCE B2_Ch1 MEASURED VOLTAGE DIFFERENCE B2_Ch2 18 1.54 18.241 0.241 18.55 0.55 19 1.57 19.169 0.169 19.169 0.169 20 1.6 20.405 0.405 20.405 0.405 21 1.63 21.333 0.333 21.333 0.333 24 1.72 24.425 0.425 24.115 0.115 48 2.44 48.54 0.54 48.54 0.54 49 2.47 49.467 0.467 49.467 0.467 50 2.5 50.395 0.395 50.704 0.704 51 2.53 51.632 0.632 51.322 0.322 72 3.16 72.346 0.346 71.419 –0.581 110 4.3 110.374 0.374 109.447 –0.553 111 4.33 111.302 0.302 110.374 –0.626 112 4.36 112.229 0.229 110.992 –1.008 113 4.39 113.466 0.466 111.92 –1.08 144 5.32 144.383 0.383 143.455 –0.545 196 6.88 196.324 0.324 194.778 –1.222 240 8.2 240.226 0.226 238.68 –1.32 241 8.23 241.153 0.153 239.608 –1.392 242 8.26 242.39 0.39 240.226 –1.774 276 9.28 276.399 0.399 273.926 –2.074 300 10 300.205 0.205 297.732 –2.268 TIDU858A – March 2015 – Revised May 2015 Submit Documentation Feedback Digitally Isolated 2-Channel, Wide DC Binary Input Module Copyright © 2015, Texas Instruments Incorporated 33 Testing 6.2.3 www.ti.com Error in % of the Measured Value Table 26. Input Voltage versus Measured Voltage Error (% of the Reading) BOARD 1 ERROR (%) BOARD 2 ERROR (%) DC INPUT VOLTAGE @ 10 ms B1_Ch1 B1_Ch2 B2_Ch1 B2_Ch2 18 –0.38 –0.38 1.34 3.06 19 –0.74 –2.37 0.89 2.51 20 –1.07 –2.61 2.03 2.03 21 –1.36 –1.36 1.58 3.06 24 –0.81 –2.10 1.77 1.77 48 –0.16 –0.81 1.12 1.12 49 –0.94 –1.57 0.95 0.95 50 –1.07 –1.07 0.79 1.41 51 –1.19 –1.79 1.24 1.24 72 –0.81 –0.81 0.48 –0.81 110 –0.78 –1.35 0.34 –0.50 111 –0.84 –1.12 0.27 –0.56 112 –1.18 –1.45 0.48 –0.90 113 –0.68 –1.23 0.41 –0.96 144 –0.81 –1.24 0.27 –0.38 196 –0.78 –1.10 0.17 –0.62 240 –0.94 –1.32 0.09 –0.55 241 –0.96 –1.22 0.06 –0.58 242 –0.99 –1.37 0.16 –0.73 276 –0.86 –1.2 0.14 –0.75 300 –1.07 –1.37 0.07 –0.76 4 B1_Ch1 B1_Ch2 B2_Ch1 B2_Ch2 3 Error at 3 ms (%) 2 1 0 -1 -2 -3 -4 18 20 24 49 51 110 112 144 DC Input Voltage (V) 240 242 300 D001 Figure 13. DC Input Voltage versus Measured Voltage Error (% of the Reading) 34 Digitally Isolated 2-Channel, Wide DC Binary Input Module Copyright © 2015, Texas Instruments Incorporated TIDU858A – March 2015 – Revised May 2015 Submit Documentation Feedback Testing www.ti.com Table 27. Input Voltage versus Measured Voltage Error (% of the Reading) BOARD 1 ERROR (%) BOARD 2 ERROR (%) DC INPUT VOLTAGE @ 10 ms B1_Ch1 B1_Ch2 B2_Ch1 B2_Ch2 18 –0.38 –0.38 1.34 3.06 19 –0.74 –2.37 0.89 0.89 20 –1.07 –1.07 2.03 2.03 21 –1.36 –2.83 1.58 1.58 24 –0.81 –2.10 1.77 0.48 48 –0.81 –0.81 1.12 1.12 49 –0.31 –0.94 0.95 0.95 50 –1.07 –1.07 0.79 1.41 51 –1.19 –1.79 1.24 0.63 72 –0.81 –1.24 0.48 –0.81 110 –1.07 –1.35 0.34 –0.50 111 –0.84 –1.40 0.27 –0.56 112 –0.90 –1.45 0.20 –0.90 113 –0.96 –1.23 0.41 –0.96 144 –0.81 –1.24 0.27 –0.38 196 –0.94 –1.25 0.17 –0.62 240 –0.94 –1.32 0.09 –0.55 241 –0.96 –1.35 0.06 –0.58 242 –0.99 –1.37 0.16 –0.73 276 –0.98 –1.42 0.14 –0.75 300 –1.07 –1.48 0.07 –0.76 4 B1_Ch1 B1_Ch2 B2_Ch1 B2_Ch2 3 Error at 10 ms (%) 2 1 0 -1 -2 -3 -4 18 20 24 49 51 110 112 144 DC Input Voltage (V) 240 242 300 D002 Figure 14. DC Input Voltage versus Measured Voltage Error (% of the Reading) TIDU858A – March 2015 – Revised May 2015 Submit Documentation Feedback Digitally Isolated 2-Channel, Wide DC Binary Input Module Copyright © 2015, Texas Instruments Incorporated 35 Testing 6.3 www.ti.com Drift Due to Temperature Variation of Signal Conditioning Circuit The signal conditioning circuit consisting of the resistor divider, 400-V input TVS, 5.1-V ADC input protection Zener was tested for temperature variation. The leakage current for 400-V TVS is < 1 µA at rated voltage for SMCJ package. The following results indicate that the effect of leakage current does not significantly influence the voltage input to ADC. Table 28. Voltage Drift With Temperature at 300-V Input TEMPERATURE °C MEASURED VOLTAGE (V) DIFFERENCE (–V) –10 298.92 –1.082 12 299.01 –0.986 40 299.01 –0.986 70 299.11 –0.890 Table 29. Voltage Drift With Temperature at 110-V Input TEMPERATURE °C MEASURED VOLTAGE (V) DIFFERENCE (–V) –10 109.84 –0.160 10 109.74 –0.256 40 109.84 –0.160 70 109.84 –0.160 Table 30. Voltage Drift With Temperature 24-V Input 6.4 TEMPERATURE °C MEASURED VOLTAGE (V) DIFFERENCE (–V) –10 23.98 –0.018 10 23.89 –0.113 40 23.98 –0.018 70 23.98 –0.018 Wetting Current Measurement Table 31. Wetting Current Measurement at Different Voltage Inputs 6.5 DC VOLTAGE INPUT SWITCHED ON FOR 50 ms IMPEDANCE INPUT 1 CURRENT (mA) DUTY CYCLE INPUT 2 CURRENT (mA) DUTY CYCLE N/A 24 V 2.5 K ~9 NA ~9 110 V 2.5 K ~44 NA ~44 N/A 230 V 2.5 K ~44 50% ~44 50% Binary Input Testing With Digital Output (ISO7220ADR) Table 32. Results With Digital Isolator Mounted 36 BINARY INPUT 1 OBSERVATION BINARY INPUT 2 OBSERVATION DC INPUT VIN APPLIED VOLTAGE TOLERANCE 24 22 ±3% of VIN ±1 V Low Low 24 26 ±3% of VIN ±1 V High High 110 106 ±3% of VIN ±1 V Low Low 110 114 ±3% of VIN ±1 V High High 240 230 ±3% of VIN ±1 V Low Low 240 250 ±3% of VIN ±1 V High High Digitally Isolated 2-Channel, Wide DC Binary Input Module Copyright © 2015, Texas Instruments Incorporated TIDU858A – March 2015 – Revised May 2015 Submit Documentation Feedback Testing www.ti.com 6.6 IEC Pre-Compliance Testing The following EMC tests have been performed. Table 33. EMC Tests TEST STANDARD ESD IEC61000-4-2 Surge IEC61000-4-5 Table 34. Performance Criteria CRITERIA A B ACCEPTANCE (PASS) CRITERIA The analog output module must continue to operate as intended. No loss of function or performance occur even during the test. Temporary degradation of performance is accepted. After the test, the analog output module must continue to operate as intended without manual intervention. During the test, a loss of functions accepted, but no destruction of hardware or software. C After the test, the analog output module must continue to operate as intended automatically after manual restart or power off/power on. TIDU858A – March 2015 – Revised May 2015 Submit Documentation Feedback Digitally Isolated 2-Channel, Wide DC Binary Input Module Copyright © 2015, Texas Instruments Incorporated 37 Testing 6.6.1 www.ti.com IEC61000-4-2 ESD Test The IEC610004-2 ESD test simulates the electrostatic discharge of an operator directly onto an adjacent electronic component. Electrostatic charge usually develops in low relative humidity, and on lowconductivity carpets, or vinyl garments. To simulate a discharge event, an ESD generator applies ESD pulses to the equipment under test (EUT), which can happen through direct contact with the EUT (contact discharge), or through an air-gap (air-discharge). This was applied across signal inputs only. A series of 10 negative and positive pulses were applied directly on the binary inputs during the test (contact discharge). After the test, the binary input module was attached to TM4C123GXL LaunchPad to verify functionality. The test results show the EUT was able to withstand the required discharge . The EUT was not permanently damaged. Table 35. ESD Test Steps TEST NO TEST MODE OBSERVATION 1 Contact 1 kV Pass 2 Contact –1 kV Pass 3 Contact 2 kV Pass 4 Contact –2 kV Pass Table 36. ESD Test Observations IMMUNITY TEST STANDARD PORT TARGET VOLTAGE ESD IEC 61000-4-2, contact Binary input ±2 kV RESULT Meets Criteria B (After the test, the module continued to operate as intended.) Constant Voltage Source ESD Gun ESD Generator Figure 15. ESD Setup for Binary Input Module 38 Digitally Isolated 2-Channel, Wide DC Binary Input Module Copyright © 2015, Texas Instruments Incorporated TIDU858A – March 2015 – Revised May 2015 Submit Documentation Feedback Testing www.ti.com 6.6.2 IEC61000-4-5 Surge Test The IEC61000-4-5 surge test simulates switching transients caused by lightning strikes or the switching of power systems including load changes and short circuits. The test requires five positive and five negative surge pulses with a time interval between successive pulses of one minute or less. The unshielded symmetrical data line setup as defined by the IEC61000-4-5 specification was used for this test. The test generator was configured for 1.2/50-μs surges and diode clamps were used for line-to-ground coupling. A series of five negative and positive pulses, with 10 seconds spacing between each pulse, were applied during the test. After the test, the binary input module was attached to TM4C123GXL LaunchPad to verify functionality. The test results show the EUT was able to withstand up to ±500-V bursts. The EUT was able to perform normally after each test. Because functionality could not be verified during the test, the result was noted as passing with Class B. Table 37. Surge Test Steps TEST NO TEST MODE OBSERVATION 1 0.5 kV Pass 2 –0.5 kV Pass 3 1 kV Pass 4 –1 kV Pass 5 2 kV Pass 6 –2 kV Pass Table 38. Surge Test Observations IMMUNITY TEST Surge, DM STANDARD IEC 61000-4-5: 1.2/20-µs voltage waveform 8/20-µs current waveform 42-Ω impedance PORT TARGET VOLTAGE Binary input ± 1 kV RESULT Meets Criteria B (After the test, the module continued to operate as intended.) CDN Network Constant Voltage Source EFT/Surge Generator Figure 16. Surge Setup for Binary Input Module TIDU858A – March 2015 – Revised May 2015 Submit Documentation Feedback Digitally Isolated 2-Channel, Wide DC Binary Input Module Copyright © 2015, Texas Instruments Incorporated 39 Testing 6.7 www.ti.com Test Results Summary Table 39. Test Results Summary for DC Binary Input Module 40 TESTS OBSERVATION Power supply OK MCU programming OK Measurement of DC voltage input OK DC input voltage measurement accuracy < ±3% of measured value ±1 V (programmable step size) EMC pre-compliance tests OK Digitally Isolated 2-Channel, Wide DC Binary Input Module Copyright © 2015, Texas Instruments Incorporated TIDU858A – March 2015 – Revised May 2015 Submit Documentation Feedback Design Files www.ti.com 7 Design Files 7.1 Schematics To download the schematics, see the design files at TIDA-00420. 7.2 Bill of Materials To download the bill of materials (BOM), see the design files at TIDA-00420. 7.3 Layer Plots To download the layer plots, see the design files at TIDA-00420. 7.4 Altium Project To download the Altium project files, see the design files at TIDA-00420. 7.5 Gerber Files To download the Gerber files, see the design files at TIDA-00420. TIDU858A – March 2015 – Revised May 2015 Submit Documentation Feedback Digitally Isolated 2-Channel, Wide DC Binary Input Module Copyright © 2015, Texas Instruments Incorporated 41 Terminology 8 www.ti.com Terminology External clearance— The shortest distance through air between conductive input and output leads; measured in mm. Comparative tracking index (CTI)— Outer molding material characterization in the presence of aqueous contaminants. The higher the CTI value, the more resistant the material is to electrical arc tracking. CTI is often used with creepage by safety agencies to determine working voltage. External creepage— The shortest distance along the outside surface between input and output leads; measured in mm. Dielectric insulation voltage withstand rating— The ability to withstand without breakdown a 60-second application of a defined dielectric insulation voltage between input and output leads. Installation class— 1. Equipment in closed systems (for example, telecom) protected against overvoltage with devices such as diverters, filters, capacitors, and so on. 2. Energy consuming equipment (for example, appliances) supplied through a fixed installation. 3. Primarily equipment in fixed installations (for example, fixed industrial equipment). 4. Primary supply level for industrial factories. Insulation— • Operational — Required for correct equipment operation but not as a protection against electric shock. • Basic — Protects against electric shock. • Supplementary — Independently applied to basic insulation to protect against shock in the event of its failure. • Double — Composed of both basic and supplementary. • Reinforced — A single insulation system composed of several layers (for example, single and supplementary). Material group (see Comparative Tracking Index) — 1. 600 < CTI 2. 400 < CTI < 600 3. 175 < CTI < 400 4. 100 < CTI <175 Partial discharge— Electric discharge that partially bridges the insulation between two electrodes. Agilent supports partial discharge measurements per VDE0884, a technique developed to evaluate the integrity of insulating materials Pollution degree— 1. Nonconductive pollution only. 2. Only occasional, temporary conductivity due to condensation. 3. Frequent conductive pollution due to condensation. 4. Persistent conductive pollution due to dust, rain, or snow. Rated mains voltage— Primary power voltage declared by manufacturer. Used to categorize opto-coupler maximum allowable working voltage. Common-mode transient rejection (CMTR)— CMTR describes the maximum tolerable rate-of-rise (or fall) of a common-mode voltage (given in volts per microsecond). The specification for CMTR also includes the amplitude of the common-mode voltage (VCM) that can be tolerated. Common-mode interference that exceeds the maximum specification might result in abnormal voltage transitions or excessive noise on the output signal. 42 Digitally Isolated 2-Channel, Wide DC Binary Input Module Copyright © 2015, Texas Instruments Incorporated TIDU858A – March 2015 – Revised May 2015 Submit Documentation Feedback References www.ti.com 9 References 1. Texas Instruments, MSP430™ Programming Via the JTAG Interface, User's Guide (SLAU320). 2. Texas Instruments, The ISO72x Family of High-Speed Digital Isolators, Application Report (SLLA198). 10 About the Author KALLIKUPPA MUNIYAPPA SREENIVASA is a systems architect at Texas Instruments where he is responsible for developing reference design solutions for the industrial segment. Sreenivasa brings to this role his experience in high-speed digital and analog systems design. Sreenivasa earned his bachelor of electronics (BE) in electronics and communication engineering (BE-E&C) from VTU, Mysore, India. VIVEK GOPALAKRISHNAN is a firmware architect at Texas Instruments India where he is responsible for developing reference design solutions for Smart Grid within Industrial Systems. Vivek brings to his role his experience in firmware architecture design and development. Vivek earned his master’s degree in sensor systems technology from VIT University, India. He can be reached at [email protected]. TIDU858A – March 2015 – Revised May 2015 Submit Documentation Feedback Digitally Isolated 2-Channel, Wide DC Binary Input Module Copyright © 2015, Texas Instruments Incorporated 43 Revision History www.ti.com Revision History Changes from Original (March 2015) to A Revision ....................................................................................................... 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