40kRad(Si)

3/3/2009
UC1846-SP
5962-8680603V2A
5962-8680603VEA
Radiation Test Report
TI Proprietary Data
Please Do Not Distribute Without Express Written Permission From
TI HiRel
Contact: [email protected]
T.I. Proprietary Information
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5962-8680603VEA (UC1846J-SP) Radiation Testing
Note: The following radiation test results are provided for information only, as these devices are not
Radiation Hardness Assured (RHA) at this time.
Samples of the 5962-8680603VEA, UC1846J-SP, device have been evaluated to determine
performance effects after Total Ionizing Dose (TID) radiation exposure. The initial radiation test
plan for this device involved testing 40 units at a dose rate of 10 mrad/second, with samples
pulled at various total dose intervals. Twenty samples were exposed under unbiased conditions,
and 20 samples were exposed under biased conditions. For the biased samples, the bias
conditions were the same as the circuit used for burn-in.
The TID samples were pulled from the initial qualification lot after completing normal class-V
processing (assembly, burn-in, full-temp testing), and serialized datalogs were collected at 25C
before and after radiation exposure. The electrical testing results are included in the release
documentation. The test results are summarized below.
Device Traceability Information
Confirmed By:
Date:
Full Device Name:
Datecode or Lot Trace Code:
A/T Lot #:
Full Die Name (Alias with Die Rev):
Die Lot #:
Sample Size:
Kevin Treece
10/20/2008
5962-8680603VEA
0827A
8020888ALP
SMATRC1843VS
8124614SHE
235
Summary: Units pass up to 40 krad(Si)
Dose rate requirement: 10 mrad(Si)/sec
Exposure groups by S/N:
Control – SN 230 (no radiation exposure)
Biased samples:
10krad(Si) – SN 251, 252*, 253, 254, 255
20krad(Si) – SN 256, 257, 258, 259, 260
30krad(Si) – SN 261*, 262, 263, 264, 265*
40krad(Si) – SN 266, 267, 268, 269, 270
Uniased samples:
10krad(Si) – SN 231, 232, 233, 234, 235
20krad(Si) – SN 236, 237, 238, 239, 240
30krad(Si) – SN 241, 242, 243, 244, 245
40krad(Si) – SN 246, 247, 248, 249, 250
* Note: Unit #252, from the 10krad sample, and unit #s 261 and 265, from the 30krad sample, failed post radiation electrical testing
with several gross parametric test failures. Failure analysis results showed the failures were due to electrical overstress. These
devices were removed from the electrical test data.
T.I. Proprietary Information
Please do not share without permission from T.I.
prerad
Units: 38
Parameter
25'C QA
Standby Supply Current; Vin15V
Reference Output Voltage; Il1mA
Reference Line Reg; Vin8-40V
>Reference Load Reg; Il1-10mA
Reference Short Circuit Current
*Oscillator Discharge Current
INITIAL READING
Oscillator Accuracy; 10K, 4.7nF
Oscillator Voltage Stab; Vin8-40V
*Ct Leakage; Ct2.5V, RtVref
SYNC Output High Level; Il-1.3mA
SYNC Output Low Level; Il0mA
SYNC Input Current; 5.25V,RTVREF,CT0
*SYNC Leakage Current; 0.5V,Vref0
SYNC In High/Low Thresh.; CT0
E/A Input Offset Voltage
E/A Avol; Vout1.2-3V, Vcm2V
E/A PSRR; Vin8-40V
E/A CMRR; Vcm0-38; Vin40V
E/A Input Bias Current
E/A Input Offset Current
E/A Output Sink Current; COMP1.2V
E/A Output Source Current; COMP2.5V
E/A Output High Level; Rl15K
E/A Output Low Level; Rl15K
C/L ADJ Offset Voltage
C/L ADJ Input Bias Current; 0V
*C/L ADJ Input Bias Current; 5V
*PWM Latch Test Output A
*PWM Latch Test Output B
C/S AMP Input Offset Voltage
C/S AMP CMRR; Vcm1-12V
C/S AMP PSRR; Vin8-40V
C/S AMP Input Bias Current
C/S AMP Input Offset Current
C/S AMP Gain
C/S AMP Max Diff Input
Shutdown Threshold Voltage
Shutdown Latching Voltage; 3mA
Shutdown NonLatching Volt; 0.8mA
*Shutdown Input Bias Current; 0V
*Shutdown Input Bias Current; 15V
Collector Leakage Current; Vc40V
Output A Low; Il20mA
T.I. Proprietary Information
lyier Units
ma
v
mv
mv
ma
ma
k hz
k hz
%
u a
v
v
ma
ma
v
mv
db
db
db
u a
n a
ma
ma
v
v
v
u a
u a
%
%
mv
db
db
u a
u a
v
v
mv
v
v
ma
ma
u a
v
Cpk (LL)
Lower Limit
1.79663777
9.18070464
11.9620708
97.7713812
15.0292177
2.51551009
2.51551009
15.6427767
40.0132726
9.07652926
5.05
-19
-14
-147
3.02
39.25
39.25
-1.94
-19
3.91
546.563279
15.4154324
3.67109191
5.94123747
7.7252204
1.95359104
74.6889438
85.6344626
10.0685679
-1.5
2.51
-4.9
82
82
77
-0.98
-245
2.04
11.1371905
4.31
3.57298515
40.5605722
1120.76129
0.453
-29.4
-29.4
4.00777591
11.0837491
3.24042251
134.916263
23.667744
3.40229826
3.6352269
7.75732204
-23.4
63
63
-9.7
-0.7
2.515
1.12
254
1161.70976
326.1506
32.4016184
5.01
-1
1
-6 Sigma
27
12.2944238
5.04153127
-0.0289658
-4.0116628
-47.041565
7.70798836
40.5280435
40.5280435
0.85781969
-0.524435
4.19677222
2.13119422
1.15417357
0.04128149
2.92838431
-3.0559285
99.2161063
91.041986
75.9408425
0.13507454
-4.5511009
7.72440032
-0.5989772
4.64261183
0.70836228
0.4710025
-7.995952
0.33672938
7.37111171
7.39632857
-13.068784
80.5613304
73.2854175
0.81175263
-0.0719114
2.6137844
1.18266578
333.370044
0.08685957
6.08746552
-0.0190367
2.57222739
77.5299437
0.09259894
Min
27
12.7178
5.0997
3.8863
-2.5399
-45.5928
8.1365
41.9372
41.9372
0.9947
0.0255
4.2551
2.177
1.1821
0.0452
2.9716
-2.0028
105.2635
93.0707
108.8924
0.1565
-0.6091
8.6403
-0.5705
4.6942
0.7284
0.4863
-7.348
0.3725
7.6271
7.6751
-7.1147
83.241
84.6105
0.9177
-0.0418
2.7061
1.2355
347.3827
0.1115
6.0884
-0.0151
2.6401
82.7425
0.1239
Ave
27
13.0214763
5.12481842
5.25492632
-2.0063895
-44.954126
8.4276
45.4864079
45.4864079
1.26797368
0.44762368
4.27782105
2.20202368
1.20272368
0.04694211
2.99075789
-0.8489026
107.952503
94.2006368
121.585374
0.16575526
1.19889474
9.13342368
-0.5573842
4.71541579
0.73893421
0.49389211
-6.8858
0.38988947
8.31366316
8.32487105
-2.7775789
84.4278684
89.86915
0.96992368
-0.0139368
2.75467368
1.25931053
360.941905
0.12321579
6.08932368
-0.0129842
2.67565789
86.7353105
0.14047105
Max
27
13.2336
5.1499
7.7574
-1.377
-44.1371
8.7671
46.4201
46.4201
1.3877
0.7045
4.303
2.2276
1.2169
0.0486
3.0197
0.1206
112.9897
95.4462
140.0091
0.1815
3.2889
9.826
-0.532
4.7357
0.7491
0.5041
-6.4298
0.4069
8.4779
8.4906
0.4822
86.0034
95.4058
1.0415
0.0095
2.8013
1.2842
370.674
0.1365
6.0899
-0.0114
2.7163
88.9072
0.1592
Sigma
0
0.12117542
0.01388119
0.88064868
0.33421221
0.34790642
0.11993527
0.82639407
0.82639407
0.068359
0.16200977
0.01350814
0.01180491
0.00809169
0.00094344
0.0103956
0.36783764
1.45606606
0.5264418
7.60742187
0.00511345
0.95833261
0.23483723
0.00693216
0.01213399
0.00509532
0.00381493
0.18502533
0.00886002
0.15709191
0.15475708
1.71520078
0.644423
2.76395541
0.02636184
0.00966242
0.02348155
0.01277412
4.59531029
0.00605937
0.00030969
0.00100875
0.01723842
1.53422781
0.00797868
Skew
#DIV/0!
-0.32
-0.1273
1.1549
0.093
0.0871
-0.0902
-3.2352
-3.2352
-2.0335
-0.6972
-0.0264
-0.1958
-0.5665
0.0416
0.9032
-0.6183
0.8003
-0.1426
0.8312
0.8595
0.4297
0.252
1.1283
-0.1016
0.0685
0.3753
0.0894
0.0834
-3.4762
-3.2705
-0.4886
0.2116
0.0885
0.3774
-0.1971
-0.0143
-0.035
-0.0493
0.1959
-0.2513
-0.1319
-0.3081
-0.7245
0.0724
Kurt
#DIV/0!
-0.2426
-0.8888
1.0576
-1.1136
-0.1373
1.6989
11.798
11.798
7.1359
-0.0426
-0.9065
-0.1283
0.2144
-0.9503
1.0389
3.661
2.654
0.0089
0.9474
1.3614
-0.1209
1.2502
3.6817
-0.9846
-0.3358
0.2883
0.8061
-0.5421
13.012
11.641
0.2011
-0.0494
-0.702
0.5711
1.325
-0.2858
-0.6479
1.3218
-0.105
0.487
-0.8632
-0.1162
-0.0173
0.3182
+6 Sigma Upper Limit
27
13.7485288
20.6
5.20810557
5.15
10.5388184
19
-0.0011162
-42.866688
-13
9.14721164
17.98
50.4447723
46.75
50.4447723
46.75
1.67812768
1.94
1.41968233
19
4.35886989
5.09
2.27285315
2.48
1.2512738
1.49
0.05260272
1.49
3.05313148
3.89
1.35812322
4.9
116.688899
97.3592877
167.229905
0.19643598
0.98
6.94889041
245
10.542447
-0.5157912
-0.408
4.78821975
0.76950615
0.97
0.51678171
0.547
-5.775648
29.4
0.44304957
29.4
9.25621461
25
9.25341354
25
7.51362571
23.4
88.2944064
106.452882
1.12809474
9.7
0.04403769
0.7
2.89556297
2.985
1.33595528
388.513767
396
0.15957201
1.995
6.09118185
7
-0.0069317
0.99
2.7790884
4.99
95.9406774
170
0.18834316
0.392
Cpk (UL)
20.847252
0.604693
5.20263224
30.6156335
26.5487646
0.50968101
0.50968101
3.27694632
38.1713109
20.0417185
7.84917196
11.8342186
509.859064
28.834068
5.20963779
53.0785948
84.8004482
7.18314606
15.1162031
4.64035094
65.3708686
1091.42429
35.4067394
35.9167819
5.08736923
110.387788
24.6293278
3.26960728
2.54303428
102.969139
980.189333
331.427223
44.7516346
18.0904663
10.5083714
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prerad
Units: 38
Parameter
>Output A Low; Il100mA
>Output B Low; Il100mA
Output B Low; Il20mA
Output B High; Il-20mA
>Output B High; Il-100mA
Output A High; Il-20mA
>Output A High; Il-100mA
*PWM Output A Minimum Duty Cycle
*PWM Output B Minimum Duty Cycle
*PWM Output A Maximum Duty Cycle
*PWM Output B Maximum Duty Cycle
UVLO Start-up Threshold
UVLO Threshold Hysterisis
T.I. Proprietary Information
lyier Units
v
v
v
v
v
v
v
%
%
%
%
v
v
Cpk (LL)
Lower Limit
44.9076241
68.0950089
33.5626948
29.4418096
13.045
12.03
13.045
12.03
9.68803602
8.440662
28.9899421
66.6898401
45.05
45.05
6.01
0.11
-6 Sigma
0.54188164
0.55395454
0.09564839
13.5155158
13.3063954
13.5056698
13.2433434
0
0
46.9496736
46.8637218
7.69286528
0.80238323
Min
0.6647
0.6628
0.1232
13.5266
13.3344
13.5224
13.2898
0
0
47.3273
47.282
7.7646
0.8155
Ave
0.73418421
0.72352368
0.13785789
13.5374474
13.3450184
13.5348605
13.3317737
0
0
47.4438632
47.4269316
7.81756842
0.82378947
Max
0.8035
0.8252
0.1594
13.5469
13.3595
13.5474
13.3616
0
0
47.7567
47.7782
7.8551
0.8315
Sigma
0.03205043
0.02826152
0.00703492
0.00365526
0.00643717
0.00486513
0.01473838
0
0
0.08236493
0.09386829
0.02078386
0.00356771
Skew
0.1097
1.0724
0.6573
-0.1341
0.3079
0.0081
-0.4417
#DIV/0!
#DIV/0!
2.5079
2.165
-0.0866
0.1862
Kurt
0.2569
3.766
1.7632
1.8104
-0.6303
0.9671
0.7381
#DIV/0!
#DIV/0!
8.1548
6.7555
0.0084
0.2228
+6 Sigma Upper Limit
0.92648679
2.09
0.89309283
2.09
0.1800674
0.392
13.5593789
13.3836415
13.5640513
13.420204
0
0.001
0
0.001
47.9380527
47.9901413
7.94227156
7.99
0.84519572
2
Cpk (UL)
14.1008594
16.1170396
12.0419364
Infinite
Infinite
2.76547291
109.894156
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post10krad
Units: 9
Parameter
25'C QA
Standby Supply Current; Vin15V
Reference Output Voltage; Il1mA
Reference Line Reg; Vin8-40V
>Reference Load Reg; Il1-10mA
Reference Short Circuit Current
*Oscillator Discharge Current
INITIAL READING
Oscillator Accuracy; 10K, 4.7nF
Oscillator Voltage Stab; Vin8-40V
*Ct Leakage; Ct2.5V, RtVref
SYNC Output High Level; Il-1.3mA
SYNC Output Low Level; Il0mA
SYNC Input Current; 5.25V,RTVREF,CT0
*SYNC Leakage Current; 0.5V,Vref0
SYNC In High/Low Thresh.; CT0
E/A Input Offset Voltage
E/A Avol; Vout1.2-3V, Vcm2V
E/A PSRR; Vin8-40V
E/A CMRR; Vcm0-38; Vin40V
E/A Input Bias Current
E/A Input Offset Current
E/A Output Sink Current; COMP1.2V
E/A Output Source Current; COMP2.5V
E/A Output High Level; Rl15K
E/A Output Low Level; Rl15K
C/L ADJ Offset Voltage
C/L ADJ Input Bias Current; 0V
*C/L ADJ Input Bias Current; 5V
*PWM Latch Test Output A
*PWM Latch Test Output B
C/S AMP Input Offset Voltage
C/S AMP CMRR; Vcm1-12V
C/S AMP PSRR; Vin8-40V
C/S AMP Input Bias Current
C/S AMP Input Offset Current
C/S AMP Gain
C/S AMP Max Diff Input
Shutdown Threshold Voltage
Shutdown Latching Voltage; 3mA
Shutdown NonLatching Volt; 0.8mA
*Shutdown Input Bias Current; 0V
*Shutdown Input Bias Current; 15V
Collector Leakage Current; Vc40V
Output A Low; Il20mA
T.I. Proprietary Information
lyier Units
ma
v
mv
mv
ma
ma
k hz
k hz
%
u a
v
v
ma
ma
v
mv
db
db
db
u a
n a
ma
ma
v
v
v
u a
u a
%
%
mv
db
db
u a
u a
v
v
mv
v
v
ma
ma
u a
v
Cpk (LL)
Lower Limit
1.66559973
22.4017106
10.4054153
105.542367
25.1741555
6.7233453
6.7233453
59.4626427
61.3131257
6.95448356
5.05
-19
-14
-147
3.02
39.25
39.25
-1.94
-19
3.91
486.034882
25.1446221
2.74173853
9.34055679
8.15804093
2.50148487
79.3808356
56.8238065
12.8959703
-1.5
2.51
-4.9
82
82
77
-0.98
-245
2.04
9.84798528
4.31
4.83165616
26.6275569
669.254569
0.453
-29.4
-29.4
5.68600278
7.63032927
4.63090138
120.085264
25.728726
3.96751057
4.07906909
16.6857979
-23.4
63
63
-9.7
-0.7
2.515
1.12
254
662.366514
461.549241
55.0236649
5.01
-1
1
-6 Sigma
27
12.5829155
5.0344605
2.51345867
-4.400653
-46.865115
8.02007808
43.8781676
43.8781676
1.16574819
-0.1859852
4.17124285
2.12269869
1.18121514
0.0403797
2.94550037
-3.8358984
103.020902
90.946065
84.8284905
0.16872105
-7.2792716
8.09614715
-0.5794119
4.63506958
0.71927134
0.47583042
-9.2248229
0.30216092
7.97825361
8.14570575
-9.5785263
79.2107951
77.7292142
1.05788354
-0.0859656
2.63416611
1.19091515
347.659127
0.09855349
6.10857284
-0.0167901
2.62057357
68.665374
0.10129469
Min
27
12.9062
5.104
4.1541
-2.5399
-45.4223
8.3724
45.399
45.399
1.243
0.2891
4.2572
2.1827
1.1986
0.0457
2.9758
-1.8455
107.1346
93.0632
107.8349
0.1912
-1.2171
8.9168
-0.5608
4.6983
0.7325
0.4883
-7.9331
0.3664
8.3455
8.3659
-4.0956
83.5648
86.4968
1.1947
-0.0427
2.7289
1.239
358.0354
0.1159
6.1112
-0.0135
2.6626
81.9039
0.1296
Ave
27
13.0610111
5.1274
4.62244444
-2.1165667
-44.930933
8.4516
45.8378667
45.8378667
1.27384444
0.44841111
4.2767
2.20894444
1.20585556
0.04674444
2.98313333
-0.9666889
108.748233
93.8515556
116.049733
0.19841111
1.3929
9.20777778
-0.5545889
4.71791111
0.73654444
0.49195556
-7.5864
0.39118889
8.40175556
8.40894444
-2.0790889
84.9691778
88.9263
1.24008889
-0.0342111
2.7553
1.25913333
360.414189
0.1204
6.1119
-0.0125111
2.6817
86.5309889
0.13573333
Max
27
13.1375
5.1552
5.271
-1.4995
-44.5831
8.5923
46.5242
46.5242
1.2964
0.6287
4.3133
2.2285
1.2099
0.0485
2.9923
-0.4992
110.3286
94.6871
126.6494
0.2041
3.773
9.5209
-0.5487
4.7402
0.7425
0.4963
-7.1993
0.4127
8.553
8.5075
-0.1567
86.3668
91.7242
1.2896
-0.021
2.7917
1.275
364.6823
0.1269
6.1131
-0.0113
2.6954
90.9806
0.1437
Sigma
0
0.0796826
0.01548992
0.35149763
0.38068105
0.32236365
0.07192032
0.32661651
0.32661651
0.01801604
0.10573272
0.01757619
0.01437429
0.00410674
0.00106079
0.00627216
0.47820158
0.95455528
0.48424843
5.20354048
0.00494834
1.44536193
0.18527177
0.00413716
0.01380692
0.00287885
0.00268752
0.27307049
0.014838
0.07058366
0.04387312
1.24990624
0.95973044
1.86618096
0.03036756
0.00862575
0.02018898
0.0113697
2.12584357
0.00364109
0.00055453
0.00071317
0.01018774
2.97760248
0.00573977
Skew
#DIV/0!
-0.9608
0.3326
0.6233
0.6495
-0.4857
1.0772
1.1896
1.1896
-0.2724
0.1477
1.0104
-0.7267
-1.0846
0.7541
0.2476
-1.2695
-0.071
-0.1083
0.6804
-0.5459
-0.2305
0.22
0.1321
0.2294
0.8549
0.2266
-0.0026
-0.4181
1.5738
1.5416
-0.0499
-0.095
0.0867
-0.0784
0.6633
0.5768
-0.4933
1.1225
0.4167
0.9896
0.4185
-0.8896
-0.0676
0.5905
Kurt
#DIV/0!
0.1708
0.0886
-0.269
-1.2918
-1.4573
0.4637
1.8306
1.8306
-0.7167
-0.4709
1.3475
-0.0085
-0.2459
-1.2254
-1.8087
0.2523
-0.0303
0.27
1.822
-1.3338
0.6515
-0.1544
-0.5826
-0.5861
1.6784
-0.7394
-1.4545
-0.4977
1.7938
2.8432
-0.4762
-1.2006
-1.4497
-0.1287
-1.6256
-0.4643
-0.2629
0.8943
-0.4264
2.6675
-0.8893
0.3836
-0.9455
-1.7015
+6 Sigma Upper Limit
27
13.5391067
20.6
5.2203395
5.15
6.73143021
19
0.16751964
-42.996751
-13
8.88312192
17.98
47.7975657
46.75
47.7975657
46.75
1.3819407
1.94
1.08280745
19
4.38215715
5.09
2.2951902
2.48
1.23049597
1.49
0.05310919
1.49
3.0207663
3.89
1.90252061
4.9
114.475565
96.7570461
147.270976
0.22810118
0.98
10.0650716
245
10.3194084
-0.5297659
-0.408
4.80075265
0.75381754
0.97
0.50808069
0.547
-5.9479771
29.4
0.48021686
29.4
8.8252575
25
8.67218314
25
5.42034857
23.4
90.7275604
100.123386
1.42229424
9.7
0.01754341
0.7
2.87643389
2.985
1.32735151
373.16925
396
0.14224651
1.995
6.11522716
7
-0.0082321
0.99
2.74282643
4.99
104.396604
170
0.17017197
0.392
Cpk (UL)
31.5375806
0.48633791
13.6345686
33.0175086
44.1618351
0.93089124
0.93089124
12.3252293
58.4858009
15.4242746
6.28565569
23.063285
453.515476
48.1953353
4.08941132
52.6498592
56.1813376
11.8107438
27.0311119
6.82716048
45.1487819
651.67857
78.3856817
126.053319
6.79493336
92.8612805
28.3728323
3.79249762
5.57987294
171.615512
533.848535
468.570581
75.525436
9.3440961
14.8825075
Please do not share without permission from T.I.
post10krad
Units: 9
Parameter
>Output A Low; Il100mA
>Output B Low; Il100mA
Output B Low; Il20mA
Output B High; Il-20mA
>Output B High; Il-100mA
Output A High; Il-20mA
>Output A High; Il-100mA
*PWM Output A Minimum Duty Cycle
*PWM Output B Minimum Duty Cycle
*PWM Output A Maximum Duty Cycle
*PWM Output B Maximum Duty Cycle
UVLO Start-up Threshold
UVLO Threshold Hysterisis
T.I. Proprietary Information
lyier Units
v
v
v
v
v
v
v
%
%
%
%
v
v
Cpk (LL)
Lower Limit
30.4040176
53.0580879
28.1526867
42.4969559
13.045
12.03
13.045
12.03
16.097677
21.9311709
28.9273449
113.049145
45.05
45.05
6.01
0.11
-6 Sigma
0.5755435
0.56962508
0.09870029
13.4876746
13.2760893
13.485729
13.2661509
0
0
47.1417686
47.1833505
7.69764113
0.81299459
Min
0.6891
0.6974
0.1296
13.512
13.3129
13.5126
13.3094
0
0
47.339
47.339
7.7955
0.8233
Ave
0.71401111
0.72088889
0.13654444
13.5188444
13.3249
13.5194333
13.3272
0
0
47.4385222
47.3974222
7.82298889
0.82565556
Max
0.7489
0.7693
0.1487
13.527
13.3351
13.5291
13.3384
0
0
47.5015
47.4564
7.862
0.8294
Sigma
0.02307794
0.02521063
0.00630736
0.00519498
0.00813511
0.00561738
0.01017485
0
0
0.04945894
0.03567863
0.02089129
0.00211016
Skew
0.7777
1.1227
1.039
-0.1864
-0.3848
0.3545
-1.0225
#DIV/0!
#DIV/0!
-0.952
-0.0999
0.5416
0.6007
Kurt
-1.183
0.2307
0.2439
-1.0116
-1.4815
-0.7125
-0.0816
#DIV/0!
#DIV/0!
0.8343
-0.2304
-0.111
-0.8733
+6 Sigma Upper Limit
0.85247872
2.09
0.8721527
2.09
0.1743886
0.392
13.5500143
13.3737107
13.5531376
13.3882491
0
0.001
0
0.001
47.7352759
47.611494
7.94833665
7.99
0.83831652
2
Cpk (UL)
19.8745231
18.1022958
13.5003972
Infinite
Infinite
2.66476427
185.506329
Please do not share without permission from T.I.
post20krad
Units: 10
Parameter
25'C QA
Standby Supply Current; Vin15V
Reference Output Voltage; Il1mA
Reference Line Reg; Vin8-40V
>Reference Load Reg; Il1-10mA
Reference Short Circuit Current
*Oscillator Discharge Current
INITIAL READING
Oscillator Accuracy; 10K, 4.7nF
Oscillator Voltage Stab; Vin8-40V
*Ct Leakage; Ct2.5V, RtVref
SYNC Output High Level; Il-1.3mA
SYNC Output Low Level; Il0mA
SYNC Input Current; 5.25V,RTVREF,CT0
*SYNC Leakage Current; 0.5V,Vref0
SYNC In High/Low Thresh.; CT0
E/A Input Offset Voltage
E/A Avol; Vout1.2-3V, Vcm2V
E/A PSRR; Vin8-40V
E/A CMRR; Vcm0-38; Vin40V
E/A Input Bias Current
E/A Input Offset Current
E/A Output Sink Current; COMP1.2V
E/A Output Source Current; COMP2.5V
E/A Output High Level; Rl15K
E/A Output Low Level; Rl15K
C/L ADJ Offset Voltage
C/L ADJ Input Bias Current; 0V
*C/L ADJ Input Bias Current; 5V
*PWM Latch Test Output A
*PWM Latch Test Output B
C/S AMP Input Offset Voltage
C/S AMP CMRR; Vcm1-12V
C/S AMP PSRR; Vin8-40V
C/S AMP Input Bias Current
C/S AMP Input Offset Current
C/S AMP Gain
C/S AMP Max Diff Input
Shutdown Threshold Voltage
Shutdown Latching Voltage; 3mA
Shutdown NonLatching Volt; 0.8mA
*Shutdown Input Bias Current; 0V
*Shutdown Input Bias Current; 15V
Collector Leakage Current; Vc40V
Output A Low; Il20mA
T.I. Proprietary Information
lyier Units
ma
v
mv
mv
ma
ma
k hz
k hz
%
u a
v
v
ma
ma
v
mv
db
db
db
u a
n a
ma
ma
v
v
v
u a
u a
%
%
mv
db
db
u a
u a
v
v
mv
v
v
ma
ma
u a
v
Cpk (LL)
Lower Limit
1.57554658
12.9763041
19.2900864
91.9684513
16.5960099
12.7542844
12.7542844
27.8956548
47.3129934
8.67607247
5.05
-19
-14
-147
3.02
39.25
39.25
-1.94
-19
3.91
565.919496
16.6567645
5.53774705
5.30988048
10.7127313
1.75528151
46.291582
57.2475622
13.8819548
-1.5
2.51
-4.9
82
82
77
-0.98
-245
2.04
10.3264918
4.31
3.43648283
14.5878151
830.918023
0.453
-29.4
-29.4
4.96145189
12.7072177
3.65016489
58.6341803
18.4715787
3.33357034
3.1112888
6.79542713
-23.4
63
63
-9.7
-0.7
2.515
1.12
254
634.56163
332.544321
24.374066
5.01
-1
1
-6 Sigma
27
12.2388969
5.03211987
1.0094451
-3.3910513
-47.11568
7.71636628
44.6003353
44.6003353
1.0318268
-0.4448088
4.18421223
2.16569212
1.15417531
0.04239972
2.92626785
-2.2672223
97.895077
92.0107101
70.5478489
0.171714
-7.2958643
8.26479682
-0.6173928
4.62982011
0.71190526
0.46919369
-11.096336
0.32380289
8.11055352
8.1768455
-10.520738
81.257166
74.8429018
1.07405124
-0.1178726
2.6125144
1.16779777
329.385494
0.09865384
6.10854667
-0.0178327
2.5387797
69.0105901
0.10464725
Min
27
12.8573
5.0997
3.7047
-2.457
-45.4815
8.1689
45.3816
45.3816
1.22
0.207
4.2513
2.1872
1.194
0.0457
2.9676
-1.1521
105.5324
93.6969
110.187
0.2067
-1.3396
9.06
-0.5704
4.6904
0.729
0.4839
-8.8269
0.3813
8.3131
8.3333
-3.8353
83.6007
85.9523
1.3785
-0.061
2.7103
1.2356
350.8312
0.1157
6.1109
-0.0143
2.6379
83.1805
0.1278
Ave
27
13.04353
5.11637
4.65538
-2.16388
-44.89525
8.35988
45.59535
45.59535
1.26135
0.37417
4.26636
2.19533
1.20409
0.04787
2.98307
-0.77883
107.4997
94.30866
123.27906
0.22372
1.30919
9.31257
-0.55568
4.70664
0.73458
0.49174
-8.18818
0.39552
8.36594
8.37938
-1.8228
84.66742
89.1965
1.45453
-0.04719
2.75876
1.25382
360.82607
0.11958
6.11202
-0.01189
2.67633
88.95183
0.13358
Max
27
13.2323
5.1412
5.7867
-1.9059
-44.4872
8.5056
45.9764
45.9764
1.3491
0.5942
4.2888
2.1997
1.2163
0.0487
3.003
-0.291
110.6309
94.8969
140.0091
0.2362
3.2273
9.6337
-0.5311
4.7257
0.7418
0.4962
-7.5313
0.4127
8.4521
8.4236
1.0968
85.5132
94.216
1.5517
-0.0239
2.7929
1.2817
369.6337
0.1255
6.1127
-0.0109
2.7107
93.6143
0.1427
Sigma
0
0.13410552
0.01404169
0.60765582
0.20452855
0.37007165
0.10725229
0.16583578
0.16583578
0.03825387
0.13649647
0.01369129
0.00493965
0.00831911
0.00091171
0.00946702
0.24806538
1.60077049
0.38299165
8.78853519
0.00866767
1.43417571
0.17462886
0.01028546
0.01280332
0.00377912
0.00375772
0.48469264
0.01195285
0.04256441
0.03375575
1.4496563
0.56837567
2.39226636
0.06341313
0.01178044
0.02437427
0.01433704
5.24009593
0.00348769
0.00057889
0.00099045
0.02292505
3.32353998
0.00482212
Skew
#DIV/0!
0.0469
0.5563
0.4168
-0.1182
-0.5681
-0.3788
1.2848
1.2848
1.3596
0.6253
0.5777
-0.6651
0.0988
-1.8322
0.6344
0.4051
0.638
-0.2229
0.6488
-0.5918
-0.3739
0.3257
1.4083
0.5195
0.7049
-1.0754
-0.1073
0.4571
0.7079
-0.1891
0.7478
-0.5387
0.6884
0.5228
0.8819
-0.4281
0.6081
-0.1864
1.0021
-0.4547
-1.7325
-0.5065
-0.6959
0.8714
Kurt
#DIV/0!
-1.6192
-0.5611
0.1474
-1.6266
-1.3523
-0.7762
2.5656
2.5656
2.4199
-0.3682
-0.8971
-1.5563
-1.5125
3.1839
1.6669
0.5482
-0.0683
-0.9121
0.1216
0.3051
-0.4436
-0.2973
3.826
-1.1806
0.3714
0.8605
-1.799
-1.3823
0.3856
-1.8265
0.5948
-0.0138
1.2777
-1.1866
0.0592
0.8264
0.2378
0.6552
-0.2871
0.128
3.7656
-0.4129
-0.3081
-0.1261
+6 Sigma Upper Limit
27
13.8481631
20.6
5.20062013
5.15
8.3013149
19
-0.9367087
-42.67482
-13
9.00339372
17.98
46.5903647
46.75
46.5903647
46.75
1.4908732
1.94
1.19314883
19
4.34850777
5.09
2.22496788
2.48
1.25400469
1.49
0.05334028
1.49
3.03987215
3.89
0.70956229
4.9
117.104323
96.6066099
176.010271
0.275726
0.98
9.91424428
245
10.3603432
-0.4939672
-0.408
4.78345989
0.75725474
0.97
0.51428631
0.547
-5.2800241
29.4
0.46723711
29.4
8.62132648
25
8.5819145
25
6.87513782
23.4
88.077674
103.550098
1.83500876
9.7
0.02349264
0.7
2.9050056
2.985
1.33984223
392.266646
396
0.14050616
1.995
6.11549333
7
-0.0059473
0.99
2.8138803
4.99
108.89307
170
0.16251275
0.392
Cpk (UL)
18.7823982
0.79833707
7.86882948
28.728896
29.8987255
2.32087032
2.32087032
5.91356338
45.4854981
20.0526443
19.2098753
11.4559468
527.259707
31.9329474
7.63082427
29.0843366
56.6389943
4.78604472
20.7649536
4.90191123
25.8501825
808.858015
130.265782
164.126309
5.79971955
43.3426038
21.142107
3.09397339
2.23748639
179.241712
511.313802
337.181923
33.6410762
8.12869916
17.863494
Please do not share without permission from T.I.
post20krad
Units: 10
Parameter
>Output A Low; Il100mA
>Output B Low; Il100mA
Output B Low; Il20mA
Output B High; Il-20mA
>Output B High; Il-100mA
Output A High; Il-20mA
>Output A High; Il-100mA
*PWM Output A Minimum Duty Cycle
*PWM Output B Minimum Duty Cycle
*PWM Output A Maximum Duty Cycle
*PWM Output B Maximum Duty Cycle
UVLO Start-up Threshold
UVLO Threshold Hysterisis
T.I. Proprietary Information
lyier Units
v
v
v
v
v
v
v
%
%
%
%
v
v
Cpk (LL)
Lower Limit
66.2355173
89.3627333
40.2505211
37.4519537
13.045
12.03
13.045
12.03
11.6098277
14.6026827
30.5648143
113.963749
45.05
45.05
6.01
0.11
-6 Sigma
0.60224382
0.61149343
0.10783144
13.5091388
13.305451
13.4988211
13.260076
0
0
47.0034644
47.0649368
7.689554
0.80904305
Min
0.6853
0.6841
0.1274
13.5188
13.3251
13.5123
13.3009
0
0
47.2588
47.2817
7.7854
0.8178
Ave
0.70757
0.70274
0.13199
13.52359
13.33465
13.52255
13.32947
0
0
47.41002
47.3847
7.80715
0.82153
Max
0.7427
0.7277
0.1396
13.5274
13.343
13.5277
13.3413
0
0
47.4948
47.4721
7.8456
0.8254
Sigma
0.01755436
0.01520776
0.00402643
0.00240853
0.0048665
0.00395481
0.01156566
0
0
0.06775926
0.05329386
0.01959933
0.00208116
Skew
0.9668
0.6736
0.769
-0.3539
-0.2203
-2.0687
-1.8527
#DIV/0!
#DIV/0!
-1.1491
-0.3566
0.9764
0.1069
Kurt
0.3042
-0.6029
-0.2623
0.8722
1.0806
6.1767
4.1841
#DIV/0!
#DIV/0!
1.9673
0.5695
0.0382
0.8453
+6 Sigma Upper Limit
0.81289618
2.09
0.79398657
2.09
0.15614856
0.392
13.5380412
13.363849
13.5462789
13.398864
0
0.001
0
0.001
47.8165756
47.7044632
7.924746
7.99
0.83401695
2
Cpk (UL)
26.2504538
30.4068426
21.52529
Infinite
Infinite
3.10979956
188.752209
Please do not share without permission from T.I.
post30krad
Units: 8
Parameter
25'C QA
Standby Supply Current; Vin15V
Reference Output Voltage; Il1mA
Reference Line Reg; Vin8-40V
>Reference Load Reg; Il1-10mA
Reference Short Circuit Current
*Oscillator Discharge Current
INITIAL READING
Oscillator Accuracy; 10K, 4.7nF
Oscillator Voltage Stab; Vin8-40V
*Ct Leakage; Ct2.5V, RtVref
SYNC Output High Level; Il-1.3mA
SYNC Output Low Level; Il0mA
SYNC Input Current; 5.25V,RTVREF,CT0
*SYNC Leakage Current; 0.5V,Vref0
SYNC In High/Low Thresh.; CT0
E/A Input Offset Voltage
E/A Avol; Vout1.2-3V, Vcm2V
E/A PSRR; Vin8-40V
E/A CMRR; Vcm0-38; Vin40V
E/A Input Bias Current
E/A Input Offset Current
E/A Output Sink Current; COMP1.2V
E/A Output Source Current; COMP2.5V
E/A Output High Level; Rl15K
E/A Output Low Level; Rl15K
C/L ADJ Offset Voltage
C/L ADJ Input Bias Current; 0V
*C/L ADJ Input Bias Current; 5V
*PWM Latch Test Output A
*PWM Latch Test Output B
C/S AMP Input Offset Voltage
C/S AMP CMRR; Vcm1-12V
C/S AMP PSRR; Vin8-40V
C/S AMP Input Bias Current
C/S AMP Input Offset Current
C/S AMP Gain
C/S AMP Max Diff Input
Shutdown Threshold Voltage
Shutdown Latching Voltage; 3mA
Shutdown NonLatching Volt; 0.8mA
*Shutdown Input Bias Current; 0V
*Shutdown Input Bias Current; 15V
Collector Leakage Current; Vc40V
Output A Low; Il20mA
T.I. Proprietary Information
lyier Units
ma
v
mv
mv
ma
ma
k hz
k hz
%
u a
v
v
ma
ma
v
mv
db
db
db
u a
n a
ma
ma
v
v
v
u a
u a
%
%
mv
db
db
u a
u a
v
v
mv
v
v
ma
ma
u a
v
Cpk (LL)
Lower Limit
2.08530587
22.7735311
21.2335466
109.518552
14.3984759
11.982857
11.982857
36.5905312
52.2420103
10.1914587
5.05
-19
-14
-147
3.02
39.25
39.25
-1.94
-19
3.91
609.648845
17.7154091
4.69962702
5.53988686
6.10799419
1.99642157
69.0005047
96.2937814
19.7451168
-1.5
2.51
-4.9
82
82
77
-0.98
-245
2.04
12.6153754
4.31
4.08181577
28.8161079
597.681889
0.453
-29.4
-29.4
5.78285761
7.15454727
8.08428826
151.376306
5.01928161
2.67580004
3.62939493
16.2814119
-23.4
63
63
-9.7
-0.7
2.515
1.12
254
1364.39532
197.650418
33.8425951
5.01
-1
1
-6 Sigma
27
12.3487228
5.05283544
2.19561344
-3.3001375
-46.720812
7.62855569
44.5777356
44.5777356
1.08198355
-0.3926585
4.19565532
2.15267264
1.14520961
0.04355708
2.92956689
-2.541028
98.0934275
90.2596285
76.9206849
0.20903178
-3.6209731
8.54171122
-0.5826459
4.6452495
0.72110301
0.47204295
-10.300574
0.29638199
8.11469624
8.13813381
-8.9920387
78.6479317
82.851484
1.5094294
-0.31928
2.57314562
1.18264452
347.529467
0.09979636
6.06765985
-0.0244103
2.56475677
69.6708445
0.10416647
Min
27
12.8032
5.1032
3.9119
-2.4344
-45.1825
8.2531
45.4368
45.4368
1.1949
0.1978
4.2479
2.1827
1.1852
0.0473
2.968
-1.174
105.2242
93.3765
109.3247
0.2319
0.7304
9.1085
-0.561
4.6936
0.7318
0.4842
-9.1908
0.3764
8.309
8.3374
-2.9425
83.3289
87.4396
1.6192
-0.1245
2.7006
1.2398
357.6518
0.1147
6.0689
-0.0165
2.6397
80.7761
0.1272
Ave
27
12.9695875
5.1193125
4.23625
-2.1875125
-44.855475
8.3719625
45.6451125
45.6451125
1.2567125
0.34805
4.2654
2.19785
1.1994125
0.0486375
2.9829625
-0.7934
107.18605
94.280875
121.250188
0.244525
1.49875
9.2745
-0.555925
4.7084125
0.7343125
0.4903375
-8.8761
0.3960875
8.3812375
8.3874
-1.3745375
84.7194375
89.376975
1.6595125
-0.0670875
2.745225
1.2595375
360.627538
0.1188375
6.0692125
-0.0144375
2.6630375
86.603325
0.1328375
Max
27
13.1379
5.135
4.93
-1.9062
-44.2799
8.6359
45.9526
45.9526
1.2785
0.5751
4.2791
2.208
1.2132
0.0495
2.997
-0.1952
109.088
95.5198
132.9697
0.249
3.4692
9.471
-0.5484
4.7238
0.7383
0.4941
-8.4663
0.4169
8.4438
8.4604
1.1088
86.3855
90.7579
1.7005
-0.0169
2.7793
1.2798
363.6703
0.1238
6.0694
-0.0122
2.6907
88.6403
0.1403
Sigma
0
0.10347746
0.01107951
0.34010609
0.1854375
0.31088957
0.12390113
0.17789615
0.17789615
0.02912149
0.12345141
0.01162411
0.00752956
0.00903382
0.00084674
0.00889927
0.29127134
1.51543709
0.67020774
7.38825043
0.00591554
0.85328719
0.12213146
0.00445349
0.01052717
0.00220158
0.00304909
0.23741235
0.01661758
0.04442354
0.04154437
1.26958354
1.01191763
1.08758183
0.02501385
0.04203208
0.0286799
0.0128155
2.18301169
0.00317352
0.00025877
0.00166213
0.01638012
2.82208009
0.0047785
Skew
#DIV/0!
-0.059
-0.123
1.3042
0.5694
0.812
1.5594
0.6087
0.6087
-1.7
0.6403
-0.504
-0.957
-0.038
-0.502
-0.15
1.1668
0.1799
0.5969
0.1068
-1.731
2.1602
0.4403
0.5838
-0.022
0.924
-1.04
0.4932
0.0979
-0.129
0.7411
0.9005
0.5877
-0.453
0.0401
-0.246
-0.359
0.0897
-0.019
0.7977
-0.644
0.289
-0.041
-1.482
0.8037
Kurt
#DIV/0!
0.0971
-1.235
1.6679
-0.715
0.2274
2.636
-0.356
-0.356
2.5037
0.6238
-1.332
2.0889
-0.409
-1.455
0.2309
2.3283
-1.828
0.6472
-0.038
2.6071
5.1276
-0.6
-0.879
-1.183
0.0784
1.7771
-0.299
-2.183
-0.418
-0.194
1.2098
-0.274
0.0517
0.1909
-1.747
-1.207
-0.389
-1.393
-0.327
-2.24
-1.306
0.3428
1.7264
-0.751
+6 Sigma Upper Limit
27
13.5904522
20.6
5.18578956
5.15
6.27688656
19
-1.0748875
-42.990138
-13
9.11536931
17.98
46.7124894
46.75
46.7124894
46.75
1.43144145
1.94
1.08875848
19
4.33514468
5.09
2.24302736
2.48
1.25361539
1.49
0.05371792
1.49
3.03635811
3.89
0.95422805
4.9
116.278673
98.3021215
165.57969
0.28001822
0.98
6.61847313
245
10.0072888
-0.5292041
-0.408
4.7715755
0.74752199
0.97
0.50863205
0.547
-7.4516259
29.4
0.49579301
29.4
8.64777876
25
8.63666619
25
6.24296374
23.4
90.7909433
95.902466
1.8095956
9.7
0.18510496
0.7
2.91730438
2.985
1.33643048
373.725608
396
0.13787864
1.995
6.07076515
7
-0.0044647
0.99
2.76131823
4.99
103.535806
170
0.16150853
0.392
Cpk (UL)
24.5799511
0.92325084
14.4697496
34.1551883
25.8486669
2.07028554
2.07028554
7.82111391
50.3624584
23.6462489
12.4907684
10.7222137
567.418123
33.9742377
6.51557407
41.4431279
95.1228197
11.0718415
35.6845632
6.19446632
53.7406744
581.791593
124.69936
133.292043
6.50463629
107.147142
6.08334988
2.78679533
5.40117164
197.064097
1198.96821
201.43572
47.3533819
9.85049708
18.0783541
Please do not share without permission from T.I.
post30krad
Units: 8
Parameter
>Output A Low; Il100mA
>Output B Low; Il100mA
Output B Low; Il20mA
Output B High; Il-20mA
>Output B High; Il-100mA
Output A High; Il-20mA
>Output A High; Il-100mA
*PWM Output A Minimum Duty Cycle
*PWM Output B Minimum Duty Cycle
*PWM Output A Maximum Duty Cycle
*PWM Output B Maximum Duty Cycle
UVLO Start-up Threshold
UVLO Threshold Hysterisis
T.I. Proprietary Information
lyier Units
v
v
v
v
v
v
v
%
%
%
%
v
v
Cpk (LL)
Lower Limit
19.5477684
43.2188048
18.7568844
39.7994615
13.045
12.03
13.045
12.03
17.7106961
21.0001113
23.1177695
42.6756248
45.05
45.05
6.01
0.11
-6 Sigma
0.59950663
0.57770154
0.09858105
13.4556467
13.2506592
13.4546783
13.2500701
0
0
47.0968454
47.1324238
7.65643375
0.78984725
Min
0.6863
0.6864
0.1266
13.484
13.2917
13.484
13.2896
0
0
47.2914
47.2921
7.7821
0.8168
Ave
0.70835
0.713575
0.13335
13.50245
13.3098875
13.503575
13.314625
0
0
47.3574125
47.351625
7.8123625
0.823275
Max
0.7362
0.7557
0.144
13.5093
13.3241
13.509
13.3229
0
0
47.4305
47.4043
7.8606
0.8315
Sigma
0.01814056
0.02264558
0.00579483
0.00780055
0.00987138
0.00814945
0.01075915
0
0
0.04342785
0.03653354
0.02598813
0.00557129
Skew
0.3979
0.9309
1.1359
-2.338
-0.614
-2.52
-2.215
#DIV/0!
#DIV/0!
0.4442
-0.331
0.652
0.3553
Kurt
-1.09
0.4722
0.417
6.0784
0.784
6.6304
5.3637
#DIV/0!
#DIV/0!
0.2563
-0.426
0.5151
-1.623
+6 Sigma Upper Limit
0.81719337
2.09
0.84944846
2.09
0.16811895
0.392
13.5492533
13.3691158
13.5524717
13.3791799
0
0.001
0
0.001
47.6179796
47.5708262
7.96829125
7.99
0.85670275
2
Cpk (UL)
25.3878569
20.2603952
14.8782168
Infinite
Infinite
2.27844442
70.4040862
Please do not share without permission from T.I.
post40krad
Units: 11
Parameter
25'C QA
Standby Supply Current; Vin15V
Reference Output Voltage; Il1mA
Reference Line Reg; Vin8-40V
>Reference Load Reg; Il1-10mA
Reference Short Circuit Current
*Oscillator Discharge Current
INITIAL READING
Oscillator Accuracy; 10K, 4.7nF
Oscillator Voltage Stab; Vin8-40V
*Ct Leakage; Ct2.5V, RtVref
SYNC Output High Level; Il-1.3mA
SYNC Output Low Level; Il0mA
SYNC Input Current; 5.25V,RTVREF,CT0
*SYNC Leakage Current; 0.5V,Vref0
SYNC In High/Low Thresh.; CT0
E/A Input Offset Voltage
E/A Avol; Vout1.2-3V, Vcm2V
E/A PSRR; Vin8-40V
E/A CMRR; Vcm0-38; Vin40V
E/A Input Bias Current
E/A Input Offset Current
E/A Output Sink Current; COMP1.2V
E/A Output Source Current; COMP2.5V
E/A Output High Level; Rl15K
E/A Output Low Level; Rl15K
C/L ADJ Offset Voltage
C/L ADJ Input Bias Current; 0V
*C/L ADJ Input Bias Current; 5V
*PWM Latch Test Output A
*PWM Latch Test Output B
C/S AMP Input Offset Voltage
C/S AMP CMRR; Vcm1-12V
C/S AMP PSRR; Vin8-40V
C/S AMP Input Bias Current
C/S AMP Input Offset Current
C/S AMP Gain
C/S AMP Max Diff Input
Shutdown Threshold Voltage
Shutdown Latching Voltage; 3mA
Shutdown NonLatching Volt; 0.8mA
*Shutdown Input Bias Current; 0V
*Shutdown Input Bias Current; 15V
Collector Leakage Current; Vc40V
Output A Low; Il20mA
T.I. Proprietary Information
lyier Units
ma
v
mv
mv
ma
ma
k hz
k hz
%
u a
v
v
ma
ma
v
mv
db
db
db
u a
n a
ma
ma
v
v
v
u a
u a
%
%
mv
db
db
u a
u a
v
v
mv
v
v
ma
ma
u a
v
Cpk (LL)
Lower Limit
1.33056456
6.7019687
32.6088927
108.741371
15.9808551
4.36475439
4.36475439
8.26650201
55.2462226
5.96693881
5.05
-19
-14
-147
3.02
39.25
39.25
-1.94
-19
3.91
515.085224
12.094725
3.64860907
4.9004958
8.14649402
1.7694379
14.4190063
19.6750373
6.06499938
-1.5
2.51
-4.9
82
82
77
-0.98
-245
2.04
7.93096218
4.31
2.55914221
8.32076206
951.018772
0.453
-29.4
-29.4
2.43139925
6.30615721
2.58341993
14.6163814
2.43412337
3.68814747
3.68950789
3.95706496
-23.4
63
63
-9.7
-0.7
2.515
1.12
254
742.986075
162.453105
32.3695272
5.01
-1
1
-6 Sigma
27
12.1013306
5.01570085
-2.3508125
-3.0189695
-46.574559
7.55013366
42.7031987
42.7031987
0.5018619
-0.3203685
4.14561212
2.08708818
1.15067062
0.04275002
2.91142325
-3.0765224
97.0925615
91.3436806
71.6312891
0.07747351
-23.040688
6.77283207
-0.6006461
4.60715118
0.67971708
0.46151309
-13.891733
0.34171204
7.73329062
7.87654165
-19.701278
78.1537186
68.7177048
0.14042026
-0.5875234
2.62321804
1.18180286
308.576191
0.04495323
6.06593175
-0.0272253
2.56749034
76.8048047
0.10024118
Min
27
12.718
5.0911
3.6669
-2.488
-45.1825
8.0032
44.8709
44.8709
1.1684
0.2732
4.2407
2.1662
1.1837
0.0467
2.972
-1.3478
105.0581
93.3303
100.6087
0.1659
-1.6433
8.096
-0.5654
4.6851
0.731
0.4864
-9.8234
0.3909
8.233
8.233
-10.7187
83.9945
79.776
0.9801
-0.2377
2.7139
1.2336
356.0438
0.1172
6.0682
-0.018
2.6373
84.1254
0.1296
Ave
27
13.0004636
5.11817273
4.73098182
-2.3014636
-44.6929
8.19818182
45.6237545
45.6237545
1.2812
0.38126364
4.2644
2.19412727
1.20347273
0.04876364
2.99095455
-0.8643818
107.499445
94.3840091
118.201918
0.24777273
2.07488182
9.10140909
-0.5547091
4.70735455
0.73854545
0.49196364
-8.9846455
0.40439091
8.37679091
8.37957273
-2.5537182
85.1918818
88.3183545
1.70036364
-0.0693455
2.75142727
1.25496364
364.3497
0.12487273
6.06878182
-0.0151
2.67071818
86.6342545
0.13625455
Max
27
13.1996
5.1492
8.0534
-2.1129
-44.2596
8.3701
46.6012
46.6012
1.6502
0.5751
4.3149
2.2297
1.2139
0.0501
3.0115
0.1269
110.8835
95.0956
127.5928
0.2711
13.9986
9.5003
-0.5452
4.7448
0.7669
0.506
-6.8568
0.4193
8.6284
8.5329
0.1811
88.0975
93.1414
1.8891
0.1051
2.7944
1.2733
390.9681
0.1635
6.0692
-0.0126
2.6864
89.2318
0.1486
Sigma
0
0.14985551
0.01707865
1.18029905
0.11958432
0.31360987
0.10800803
0.48675931
0.48675931
0.12988968
0.1169387
0.01979798
0.01783985
0.00880035
0.00100227
0.01325522
0.36869011
1.73448065
0.50672142
7.76177152
0.0283832
4.18592823
0.38809617
0.00765617
0.01670056
0.00980473
0.00507509
0.81784795
0.01044648
0.10725005
0.08383851
2.8579266
1.1730272
3.26677495
0.25999056
0.08636299
0.0213682
0.01219346
9.29558491
0.01331992
0.00047501
0.00202089
0.01720464
1.63824165
0.00600223
Skew
#DIV/0!
-0.446
-0.099
2.5852
0.2814
-0.073
-0.373
0.2936
0.2936
2.6409
0.7458
1.608
0.2137
-1.164
-0.679
0.0216
2.0584
1.1727
-0.746
-1.018
-2.813
2.6871
-1.905
-0.094
0.8358
2.8477
2.3417
1.892
0.0803
1.1719
-0.021
-2.688
1.5803
-1.728
-2.443
0.059
0.3578
-0.366
2.7088
2.8972
-0.478
0.0609
-1.519
0.202
1.0394
Kurt
#DIV/0!
-0.443
-0.119
7.5313
-0.47
-1.16
-0.226
0.7847
0.7847
7.959
-0.831
4.2836
0.4829
1.3001
0.1896
-0.941
6.0051
1.0656
0.5857
1.6326
8.6457
8.0645
4.4739
-1.668
1.5657
8.758
6.91
4.6261
-1.651
2.3326
0.3143
8.2445
3.2089
5.3446
6.812
1.6834
0.9057
-0.742
8.3562
8.8678
-1.964
-1.567
1.1297
-0.957
0.0676
+6 Sigma Upper Limit
27
13.8995967
20.6
5.22064461
5.15
11.8127761
19
-1.5839577
-42.811241
-13
8.84622997
17.98
48.5443104
46.75
48.5443104
46.75
2.0605381
1.94
1.08289581
19
4.38318788
5.09
2.30116636
2.48
1.25627483
1.49
0.05477726
1.49
3.07048584
3.89
1.34775881
4.9
117.906329
97.4243376
164.772547
0.41807194
0.98
27.1904512
245
11.4299861
-0.5087721
-0.408
4.80755791
0.79737383
0.97
0.52241418
0.547
-4.0775578
29.4
0.46706978
29.4
9.0202912
25
8.8826038
25
14.5938414
23.4
92.230045
107.919004
3.26030701
9.7
0.44883251
0.7
2.8796365
2.985
1.32812442
420.123209
396
0.20479223
1.995
6.07163189
7
-0.0029747
0.99
2.77394602
4.99
96.4637044
170
0.17226791
0.392
Cpk (UL)
16.9041423
0.62119036
4.02977483
33.6861214
30.1885535
0.77125417
0.77125417
1.69066544
53.0726413
13.9004082
5.34146414
10.8528726
479.323984
22.6085971
5.21158713
8.59930298
19.3445838
6.38740295
7.86880581
3.6148033
15.6445729
925.211611
51.6649621
66.0811154
3.02710342
10.2563163
2.9694256
3.64361798
1.13495817
46.8002744
653.469988
165.784969
44.9352001
16.9624438
14.2028095
Please do not share without permission from T.I.
post40krad
Units: 11
Parameter
>Output A Low; Il100mA
>Output B Low; Il100mA
Output B Low; Il20mA
Output B High; Il-20mA
>Output B High; Il-100mA
Output A High; Il-20mA
>Output A High; Il-100mA
*PWM Output A Minimum Duty Cycle
*PWM Output B Minimum Duty Cycle
*PWM Output A Maximum Duty Cycle
*PWM Output B Maximum Duty Cycle
UVLO Start-up Threshold
UVLO Threshold Hysterisis
T.I. Proprietary Information
lyier Units
v
v
v
v
v
v
v
%
%
%
%
v
v
Cpk (LL)
Lower Limit
21.6059353
53.184466
20.2983974
34.4631518
13.045
12.03
13.045
12.03
13.199297
17.5490334
26.5606525
51.3863162
45.05
45.05
6.01
0.11
-6 Sigma
0.57451232
0.49522148
0.09247266
13.4555474
13.2532741
13.4530217
13.2290127
0
0
47.008994
47.0863791
7.66538228
0.7926283
Min
0.69
0.6979
0.1304
13.4889
13.2877
13.4879
13.2813
0
0
47.2356
47.2809
7.7694
0.8119
Ave
0.71964545
0.73512727
0.13850909
13.4974273
13.3010727
13.4976182
13.3028818
0
0
47.3588364
47.3483091
7.80018182
0.82027273
Max
0.7598
0.8389
0.1556
13.5118
13.3124
13.512
13.3191
0
0
47.4614
47.4084
7.8343
0.8269
Sigma
0.02418886
0.0399843
0.00767274
0.00697998
0.00796644
0.00743274
0.01231152
0
0
0.05830705
0.043655
0.02246659
0.00460741
Skew
0.7059
1.893
1.1809
0.6643
-0.03
0.5017
-0.345
#DIV/0!
#DIV/0!
-0.409
-0.011
0.057
-0.956
Kurt
-1.098
4.5042
1.2144
0.1494
-0.968
-0.261
-0.861
#DIV/0!
#DIV/0!
1.4783
-1.404
-1.172
0.3514
+6 Sigma Upper Limit
0.86477859
2.09
0.97503307
2.09
0.18454552
0.392
13.5393072
13.3488714
13.5422146
13.376751
0
0.001
0
0.001
47.7086787
47.6102391
7.93498135
7.99
0.84791716
2
Cpk (UL)
18.8841035
11.2950396
11.0126228
Infinite
Infinite
2.81630319
85.3500865
Please do not share without permission from T.I.
prerad
post10krad
post20krad
post30krad
post40krad
Cpk(LL)
LL
9.181
22.402
12.976
22.774
6.702
T.I. Proprietary Information
Avg
13.41
Outliers
13.34
13.26
13.19
13.11
13.04
12.96
12.89
12.81
12.74
12.66
12.59
Outliers
Sigma
13.234
13.137
13.232
13.138
13.200
UL
0.121
0.080
0.134
0.103
0.150
20.6
20.6
20.6
20.6
20.6
Cpk(UL)
20.847
31.538
18.782
24.580
16.904
Outliers
5.17
5.16
5.15
5.14
5.13
5.12
5.12
5.11
20
15
10
5
0
5.10
Reference Output Voltage; Il1mA
post40krad
post30krad
post20krad
post10krad
prerad
v
Max
5.125
5.127
5.116
5.119
5.118
Sigma
5.150
5.155
5.141
5.135
5.149
UL
0.014
0.015
0.014
0.011
0.017
5.15
5.15
5.15
5.15
5.15
Cpk(UL)
0.605
0.486
0.798
0.923
0.621
post40krad
Min
0
0
0
0
0
2
6
2
0
0
0
0
1
0
Avg
3.886
4.154
3.705
3.912
3.667
Reference Line Reg; Vin8-40V
Outliers
7.98
7.39
6.80
6.21
5.62
5.03
4.44
post30krad
post20krad
post10krad
prerad
mv
Max
5.255
4.622
4.655
4.236
4.731
post40krad
3.85
30
20
10
0
3.26
0
0
0
0
0
4
3
1
0
0
0
0
0
0
2.67
post30krad
-19
-19
-19
-19
-19
Max
0
0
0
1
2
0
2
5
0
0
1
0
0
0
5.100
5.104
5.100
5.103
5.091
0
0
0
0
0
2
4
2
2
0
0
0
0
0
post10krad
prerad
post40krad
Min
post20krad
0
0
0
0
0
0
5
4
0
0
0
0
0
0
post30krad
post20krad
ma
13.021
13.061
13.044
12.970
13.000
0
0
0
0
0
2
2
2
2
0
0
0
0
0
5.05
5.05
5.05
5.05
5.05
post40krad
5.09
post30krad
0
0
0
0
2
2
3
1
1
1
0
0
0
0
20
15
10
5
0
5.08
post20krad
0
0
0
0
0
1
2
2
2
1
1
0
0
0
Cpk(LL)
LL
1.797
1.666
1.576
2.085
1.331
Reference Line Reg; Vin8-40V
Bin
prerad
post10krad
Outliers
0
1.49
0
2.08
0
2.67
0
3.26
0
3.85
2
4.44
6
5.03
18
5.62
5
6.21
3
6.80
2
7.39
1
7.98
1
Outliers
0
Avg
12.718
12.906
12.857
12.803
12.718
Standby Supply Current; Vin15V
2.08
prerad
post10krad
post20krad
post30krad
post40krad
Min
0
0
0
1
1
1
3
0
3
2
0
0
0
0
5.07
Reference Output Voltage; Il1mA
Bin
prerad
post10krad
Outliers
0
5.07
0
5.08
0
5.09
0
5.10
3
5.11
4
5.12
8
5.12
8
5.13
8
5.14
6
5.15
1
5.16
0
5.17
0
Outliers
0
LL
-
post40krad
0
0
0
0
1
2
1
3
1
0
0
0
0
0
Outliers
Cpk(LL)
-
post30krad
0
0
0
0
0
3
1
2
1
2
1
0
0
0
1.49
prerad
post10krad
post20krad
post30krad
post40krad
post20krad
0
0
0
0
0
1
1
2
5
0
0
0
0
0
Outliers
Standby Supply Current; Vin15V
Bin
prerad
post10krad
Outliers
0
12.59
0
12.66
0
12.74
1
12.81
2
12.89
5
12.96
9
13.04
7
13.11
7
13.19
6
13.26
1
13.34
0
13.41
0
Outliers
0
Sigma
7.757
5.271
5.787
4.930
8.053
UL
0.881
0.351
0.608
0.340
1.180
19
19
19
19
19
Cpk(UL)
5.203
13.635
7.869
14.470
4.030
Please do not share without permission from T.I.
prerad
post10krad
post20krad
post30krad
post40krad
Avg
-2.540
-2.540
-2.457
-2.434
-2.488
Cpk(LL)
LL
15.029
25.174
16.596
14.398
15.981
T.I. Proprietary Information
Avg
-1.07
Outliers
-1.26
-1.45
-1.64
-1.83
-2.02
-2.21
-2.40
-2.59
-2.78
-2.97
-3.16
Outliers
post30krad
post20krad
Sigma
-1.377
-1.500
-1.906
-1.906
-2.113
0.334
0.381
0.205
0.185
0.120
UL
-
post10krad
prerad
Cpk(UL)
-
Outliers
-43.85
-44.03
-44.22
-44.41
-44.60
-44.78
-44.97
-45.16
-45.35
20
15
10
5
0
-45.54
Reference Short Circuit Current
post40krad
post30krad
post20krad
post10krad
prerad
ma
Max
-44.954
-44.931
-44.895
-44.855
-44.693
Sigma
-44.137
-44.583
-44.487
-44.280
-44.260
UL
0.348
0.322
0.370
0.311
0.314
-13
-13
-13
-13
-13
Cpk(UL)
30.616
33.018
28.729
34.155
33.686
post40krad
Min
0
0
1
1
2
3
3
1
0
0
0
0
0
0
Avg
8.137
8.372
8.169
8.253
8.003
*Oscillator Discharge Current
Outliers
8.75
8.67
8.60
8.52
8.44
8.37
8.29
post30krad
post20krad
post10krad
prerad
ma
Max
8.428
8.452
8.360
8.372
8.198
post40krad
8.22
30
20
10
0
8.14
0
0
0
0
0
1
3
1
2
0
0
1
0
0
8.06
post30krad
3.02
3.02
3.02
3.02
3.02
Max
0
0
0
0
0
2
1
3
1
2
2
0
0
0
-45.593
-45.422
-45.481
-45.182
-45.182
0
0
0
0
1
0
4
1
3
1
0
0
0
0
post40krad
10
0
post40krad
Min
post20krad
0
0
0
0
0
0
0
3
4
1
1
0
0
0
20
mv
-2.006
-2.117
-2.164
-2.188
-2.301
0
0
0
0
0
3
1
2
1
0
1
0
0
0
-147
-147
-147
-147
-147
30
-45.72
post30krad
0
0
0
1
1
2
0
3
2
1
0
0
0
0
>Reference Load Reg; Il1-10mA
-45.91
post20krad
0
0
0
0
2
1
1
2
3
0
0
0
0
0
Cpk(LL)
LL
97.771
105.542
91.968
109.519
108.741
*Oscillator Discharge Current
Bin
prerad
post10krad
Outliers
0
7.91
0
7.99
0
8.06
0
8.14
2
8.22
1
8.29
2
8.37
12
8.44
11
8.52
5
8.60
4
8.67
0
8.75
1
Outliers
0
Min
-14
-14
-14
-14
-14
0
0
0
0
0
5
4
2
0
0
0
0
0
0
7.99
prerad
post10krad
post20krad
post30krad
post40krad
post40krad
0
0
0
0
0
2
4
1
1
0
0
0
0
0
Outliers
Cpk(LL)
LL
11.962
10.405
19.290
21.234
32.609
Reference Short Circuit Current
Bin
prerad
post10krad
Outliers
0
-45.91
0
-45.72
0
-45.54
4
-45.35
4
-45.16
3
-44.97
12
-44.78
7
-44.60
4
-44.41
2
-44.22
2
-44.03
0
-43.85
0
Outliers
0
post30krad
0
0
0
0
0
3
2
4
1
0
0
0
0
0
7.91
prerad
post10krad
post20krad
post30krad
post40krad
post20krad
0
0
0
0
1
2
3
0
0
2
1
0
0
0
Outliers
>Reference Load Reg; Il1-10mA
Bin
prerad
post10krad
Outliers
0
-3.16
0
-2.97
0
-2.78
0
-2.59
4
-2.40
3
-2.21
10
-2.02
4
-1.83
7
-1.64
6
-1.45
4
-1.26
0
-1.07
0
Outliers
0
Sigma
8.767
8.592
8.506
8.636
8.370
UL
0.120
0.072
0.107
0.124
0.108
17.98
17.98
17.98
17.98
17.98
Cpk(UL)
26.549
44.162
29.899
25.849
30.189
Please do not share without permission from T.I.
prerad
post10krad
post20krad
post30krad
post40krad
Avg
41.937
45.399
45.382
45.437
44.871
Cpk(LL)
LL
15.643
59.463
27.896
36.591
8.267
T.I. Proprietary Information
Avg
47.76
Outliers
47.35
46.93
46.52
46.11
45.69
45.28
44.87
44.45
44.04
43.63
43.21
Outliers
post30krad
post20krad
Sigma
46.420
46.524
45.976
45.953
46.601
UL
0.826
0.327
0.166
0.178
0.487
46.75
46.75
46.75
46.75
46.75
post10krad
prerad
Cpk(UL)
0.510
0.931
2.321
2.070
0.771
Outliers
47.76
47.35
46.93
46.52
46.11
45.69
45.28
44.87
60
40
20
0
44.45
Oscillator Accuracy; 10K, 4.7nF
post40krad
post30krad
post20krad
post10krad
prerad
khz
Max
45.486
45.838
45.595
45.645
45.624
Sigma
46.420
46.524
45.976
45.953
46.601
UL
0.826
0.327
0.166
0.178
0.487
46.75
46.75
46.75
46.75
46.75
Cpk(UL)
0.510
0.931
2.321
2.070
0.771
post40krad
Min
0
0
0
0
0
3
6
1
0
0
0
0
1
0
Avg
0.995
1.243
1.220
1.195
1.168
Outliers
1.64
1.57
1.51
1.44
1.38
1.31
post40krad
post30krad
post20krad
post10krad
prerad
%
Max
1.268
1.274
1.261
1.257
1.281
1.25
60
40
20
0
1.18
Oscillator Voltage Stab; Vin8-40V
1.12
0
0
0
0
0
1
7
0
0
0
0
0
0
0
1.05
post30krad
-1.94
-1.94
-1.94
-1.94
-1.94
Max
0
0
0
0
0
2
1
6
1
1
0
0
0
0
41.937
45.399
45.382
45.437
44.871
0
0
0
0
0
0
8
1
1
0
0
0
0
0
post40krad
20
0
post40krad
Min
post20krad
0
0
0
0
0
0
5
4
0
0
0
0
0
0
40
khz
45.486
45.838
45.595
45.645
45.624
0
0
0
0
0
0
2
5
1
0
0
0
0
0
39.25
39.25
39.25
39.25
39.25
60
44.04
post30krad
0
0
0
0
0
0
2
7
1
0
0
0
0
0
INITIAL READING
43.63
post20krad
0
0
0
0
0
0
1
6
1
1
0
0
0
0
Cpk(LL)
LL
2.516
6.723
12.754
11.983
4.365
Oscillator Voltage Stab; Vin8-40V
Bin
prerad
post10krad
Outliers
0
0.92
0
0.99
1
1.05
1
1.12
0
1.18
1
1.25
23
1.31
9
1.38
3
1.44
0
1.51
0
1.57
0
1.64
0
Outliers
0
Min
39.25
39.25
39.25
39.25
39.25
0
0
0
0
0
2
1
6
1
1
0
0
0
0
0.99
prerad
post10krad
post20krad
post30krad
post40krad
post40krad
0
0
0
0
0
0
2
5
1
0
0
0
0
0
43.21
Cpk(LL)
LL
2.516
6.723
12.754
11.983
4.365
Oscillator Accuracy; 10K, 4.7nF
Bin
prerad
post10krad
Outliers
2
43.21
0
43.63
0
44.04
0
44.45
0
44.87
2
45.28
10
45.69
17
46.11
6
46.52
1
46.93
0
47.35
0
47.76
0
Outliers
0
post30krad
0
0
0
0
0
0
2
7
1
0
0
0
0
0
Outliers
prerad
post10krad
post20krad
post30krad
post40krad
post20krad
0
0
0
0
0
0
1
6
1
1
0
0
0
0
0.92
post10krad
2
0
0
0
0
2
10
17
6
1
0
0
0
0
Outliers
INITIAL READING
Bin
prerad
Outliers
43.21
43.63
44.04
44.45
44.87
45.28
45.69
46.11
46.52
46.93
47.35
47.76
Outliers
Sigma
1.388
1.296
1.349
1.278
1.650
UL
0.068
0.018
0.038
0.029
0.130
1.94
1.94
1.94
1.94
1.94
Cpk(UL)
3.277
12.325
5.914
7.821
1.691
Please do not share without permission from T.I.
prerad
post10krad
post20krad
post30krad
post40krad
Cpk(LL)
-
Avg
0.025
0.289
0.207
0.198
0.273
LL
-
T.I. Proprietary Information
Max
0.89
Outliers
0.81
0.73
0.65
0.57
0.49
0.41
0.33
0.25
0.16
0.08
0.00
Outliers
post30krad
post20krad
Sigma
0.705
0.629
0.594
0.575
0.575
0
0
0
0
2
1
3
4
0
0
0
1
0
0
Avg
4.255
4.257
4.251
4.248
4.241
UL
0.162
0.106
0.136
0.123
0.117
19
19
19
19
19
post10krad
prerad
Cpk(UL)
38.171
58.486
45.485
50.362
53.073
Outliers
4.32
4.31
4.30
4.29
4.28
4.27
4.26
4.25
4.24
30
20
10
0
4.23
SYNC Output High Level; Il-1.3mA
post40krad
post30krad
post20krad
post10krad
prerad
v
Max
4.278
4.277
4.266
4.265
4.264
Sigma
4.303
4.313
4.289
4.279
4.315
UL
0.014
0.018
0.014
0.012
0.020
5.09
5.09
5.09
5.09
5.09
Cpk(UL)
20.042
15.424
20.053
23.646
13.900
post40krad
Min
0
0
0
1
2
0
3
3
1
0
1
0
0
0
Avg
2.177
2.183
2.187
2.183
2.166
Outliers
2.25
2.24
2.23
2.22
2.21
2.20
post40krad
post30krad
post20krad
post10krad
prerad
v
Max
2.202
2.209
2.195
2.198
2.194
2.19
30
20
10
0
2.18
SYNC Output Low Level; Il0mA
2.17
0
0
0
0
0
1
1
5
1
0
0
0
0
0
2.16
post30krad
0
0
0
0
0
0
4
6
0
0
0
0
0
0
post40krad
10
0
post40krad
Min
post20krad
0
0
0
0
0
1
1
1
2
3
1
0
0
0
20
ua
0.448
0.448
0.374
0.348
0.381
0
0
0
0
0
2
2
3
1
0
0
0
0
0
3.91
3.91
3.91
3.91
3.91
30
4.22
post30krad
0
0
0
0
0
4
2
2
1
1
0
0
0
0
*Ct Leakage; Ct2.5V, RtVref
4.21
post20krad
0
0
0
0
0
0
3
2
3
0
0
1
0
0
Cpk(LL)
LL
9.077
6.954
8.676
10.191
5.967
SYNC Output Low Level; Il0mA
Bin
prerad
post10krad
Outliers
0
2.15
0
2.15
0
2.16
0
2.17
1
2.18
3
2.19
8
2.20
10
2.21
12
2.22
3
2.23
1
2.24
0
2.25
0
Outliers
0
Min
-19
-19
-19
-19
-19
0
0
0
0
4
2
2
1
2
0
0
0
0
0
2.15
prerad
post10krad
post20krad
post30krad
post40krad
post40krad
0
0
0
2
0
4
0
1
1
0
0
0
0
0
Outliers
Cpk(LL)
LL
40.013
61.313
47.313
52.242
55.246
SYNC Output High Level; Il-1.3mA
Bin
prerad
post10krad
Outliers
0
4.21
0
4.22
0
4.23
0
4.24
0
4.25
3
4.26
6
4.27
9
4.28
10
4.29
8
4.30
2
4.31
0
4.32
0
Outliers
0
post30krad
0
0
0
0
2
4
2
0
2
0
0
0
0
0
2.15
prerad
post10krad
post20krad
post30krad
post40krad
post20krad
0
0
0
0
0
3
2
3
0
1
0
0
0
0
Outliers
*Ct Leakage; Ct2.5V, RtVref
Bin
prerad
post10krad
Outliers
0
0.00
1
0.08
1
0.16
1
0.25
4
0.33
4
0.41
8
0.49
1
0.57
15
0.65
1
0.73
2
0.81
0
0.89
0
Outliers
0
Sigma
2.228
2.228
2.200
2.208
2.230
0.012
0.014
4.94E-03
7.53E-03
0.018
UL
2.48
2.48
2.48
2.48
2.48
Cpk(UL)
7.849
6.286
19.210
12.491
5.341
Please do not share without permission from T.I.
prerad
post10krad
post20krad
post30krad
post40krad
Cpk(LL)
LL
15.415
25.145
16.657
17.715
12.095
T.I. Proprietary Information
Avg
1.217
1.210
1.216
1.213
1.214
1.23
Outliers
1.22
1.22
1.21
1.21
1.20
1.20
1.19
1.19
1.18
1.18
1.17
Outliers
Sigma
UL
8.09E-03
4.11E-03
8.32E-03
9.03E-03
8.80E-03
1.49
1.49
1.49
1.49
1.49
Cpk(UL)
11.834
23.063
11.456
10.722
10.853
Outliers
0.05
0.05
0.05
0.05
0.05
0.05
0.05
0.05
20
15
10
5
0
0.05
*SYNC Leakage Current; 0.5V,Vref0
post40krad
post30krad
post20krad
post10krad
prerad
ma
Max
0.047
0.047
0.048
0.049
0.049
0.049
0.049
0.049
0.049
0.050
Sigma
UL
9.43E-04
1.06E-03
9.12E-04
8.47E-04
1.00E-03
1.49
1.49
1.49
1.49
1.49
Cpk(UL)
509.859
453.515
527.260
567.418
479.324
post40krad
Min
0
0
0
0
2
1
3
2
1
1
1
0
0
0
Avg
2.972
2.976
2.968
2.968
2.972
SYNC In High/Low Thresh.; CT0
Outliers
3.03
3.02
3.01
3.01
3.00
2.99
2.99
post30krad
post20krad
post10krad
prerad
v
Max
2.991
2.983
2.983
2.983
2.991
post40krad
2.98
30
20
10
0
2.97
0
0
0
1
1
3
2
1
0
0
0
0
0
0
2.97
post30krad
2.51
2.51
2.51
2.51
2.51
Max
0
0
0
0
0
1
0
3
2
3
2
0
0
0
0.045
0.046
0.046
0.047
0.047
0
0
0
1
2
3
3
0
1
0
0
0
0
0
post10krad
prerad
post40krad
Min
post20krad
0
0
0
0
2
3
3
1
0
0
0
0
0
0
post30krad
post20krad
ma
1.203
1.206
1.204
1.199
1.203
0
0
0
0
0
0
1
2
1
4
0
0
0
0
-1.5
-1.5
-1.5
-1.5
-1.5
post40krad
10
0
0.05
post30krad
0
0
0
0
1
1
0
4
4
0
0
0
0
0
20
0.04
post20krad
0
0
0
0
4
2
0
2
1
0
0
0
0
0
Cpk(LL)
LL
546.563
486.035
565.919
609.649
515.085
SYNC In High/Low Thresh.; CT0
Bin
prerad
post10krad
Outliers
0
2.95
0
2.96
0
2.97
0
2.97
1
2.98
10
2.99
8
2.99
10
3.00
5
3.01
1
3.01
2
3.02
1
3.03
0
Outliers
0
Avg
1.182
1.199
1.194
1.185
1.184
30
2.96
prerad
post10krad
post20krad
post30krad
post40krad
Min
SYNC Input Current; 5.25V,RTVREF,CT0
0.04
*SYNC Leakage Current; 0.5V,Vref0
Bin
prerad
post10krad
Outliers
0
0.04
0
0.04
0
0.05
3
0.05
9
0.05
4
0.05
12
0.05
6
0.05
4
0.05
0
0.05
0
0.05
0
0.05
0
Outliers
0
LL
-
0
0
0
1
0
1
2
1
4
2
0
0
0
0
Outliers
Cpk(LL)
-
post40krad
0
0
0
1
0
2
1
2
1
1
0
0
0
0
2.95
prerad
post10krad
post20krad
post30krad
post40krad
post30krad
0
0
0
0
0
3
1
1
3
1
1
0
0
0
Outliers
SYNC Input Current; 5.25V,RTVREF,CT0
Bin
prerad
post10krad post20krad
Outliers
0
0
1.17
0
0
1.18
0
0
1.18
2
0
1.19
1
0
1.19
5
0
1.20
8
2
1.20
7
1
1.21
10
6
1.21
3
0
1.22
2
0
1.22
0
0
1.23
0
0
Outliers
0
0
Sigma
3.020
2.992
3.003
2.997
3.011
0.010
6.27E-03
9.47E-03
8.90E-03
0.013
UL
3.89
3.89
3.89
3.89
3.89
Cpk(UL)
28.834
48.195
31.933
33.974
22.609
Please do not share without permission from T.I.
E/A Input Offset Voltage
Bin
prerad
post10krad post20krad post30krad post40krad
Outliers
0
0
0
0
0
-2.28
0
0
0
0
0
-2.04
1
0
0
0
0
-1.80
1
2
0
0
0
-1.56
0
0
0
0
0
-1.33
1
0
0
0
1
-1.09
5
1
3
2
4
-0.85
19
3
2
4
4
-0.61
8
3
4
1
1
-0.37
1
0
1
0
0
-0.13
1
0
0
1
0
0.11
1
0
0
0
1
0.35
0
0
0
0
0
Outliers
0
0
0
0
0
prerad
post10krad
post20krad
post30krad
post40krad
Min
Cpk(LL)
LL
7.725
8.158
10.713
6.108
8.146
T.I. Proprietary Information
Avg
0.35
Outliers
0.11
-0.13
-0.37
-0.61
-0.85
-1.33
-1.56
-1.80
-2.04
-2.28
Outliers
-1.09
Outliers
112.27
111.40
110.53
109.67
108.80
107.93
107.07
106.20
105.33
104.46
103.60
20
15
10
5
0
102.73
E/A Avol; Vout1.2-3V, Vcm2V
post40krad
post30krad
post20krad
post10krad
prerad
db
Max
107.952
108.748
107.500
107.186
107.499
Sigma
112.990
110.329
110.631
109.088
110.883
1.456
0.955
1.601
1.515
1.734
UL
-
Cpk(UL)
-
post40krad
Min
0
0
0
0
1
1
1
5
2
1
0
0
0
0
Avg
93.071
93.063
93.697
93.377
93.330
Outliers
96.12
95.79
post40krad
post30krad
post20krad
post10krad
prerad
db
Max
94.201
93.852
94.309
94.281
94.384
95.45
30
20
10
0
95.12
E/A PSRR; Vin8-40V
94.78
0
0
0
0
1
2
1
2
1
0
1
0
0
0
94.45
post30krad
82
82
82
82
82
0
0
0
0
1
2
5
1
0
0
2
0
0
0
105.263
107.135
105.532
105.224
105.058
0
0
0
0
0
2
3
3
2
0
0
0
0
0
Cpk(UL)
5.210
4.089
7.631
6.516
5.212
94.11
post20krad
0
0
0
1
2
1
4
0
1
0
0
0
0
0
4.9
4.9
4.9
4.9
4.9
93.78
post10krad
0
0
0
2
4
5
11
9
4
2
1
0
0
0
UL
0.368
0.478
0.248
0.291
0.369
post40krad
0
0
0
0
1
2
2
0
3
0
0
0
0
0
82
82
82
82
82
Sigma
0.121
-0.499
-0.291
-0.195
0.127
93.44
Cpk(LL)
LL
5.941
9.341
5.310
5.540
4.900
Max
-0.849
-0.967
-0.779
-0.793
-0.864
93.11
E/A PSRR; Vin8-40V
Bin
prerad
Outliers
92.44
92.77
93.11
93.44
93.78
94.11
94.45
94.78
95.12
95.45
95.79
96.12
Outliers
post30krad
0
0
0
0
2
2
1
2
2
0
1
0
0
0
post10krad
prerad
mv
92.77
prerad
post10krad
post20krad
post30krad
post40krad
post20krad
0
0
0
0
0
0
1
2
3
2
1
0
0
0
Avg
-2.003
-1.845
-1.152
-1.174
-1.348
post30krad
post20krad
Outliers
E/A Avol; Vout1.2-3V, Vcm2V
Bin
prerad
post10krad
Outliers
0
102.73
0
103.60
0
104.46
0
105.33
2
106.20
6
107.07
5
107.93
9
108.80
11
109.67
3
110.53
1
111.40
0
112.27
0
Outliers
1
Min
-4.9
-4.9
-4.9
-4.9
-4.9
post40krad
92.44
Cpk(LL)
LL
3.671
2.742
5.538
4.700
3.649
40
30
20
10
0
Outliers
prerad
post10krad
post20krad
post30krad
post40krad
E/A Input Offset Voltage
Sigma
95.446
94.687
94.897
95.520
95.096
0.526
0.484
0.383
0.670
0.507
UL
-
Cpk(UL)
-
Please do not share without permission from T.I.
post40krad
30
Max
121.585
116.050
123.279
121.250
118.202
Cpk(LL)
LL
85.634
56.824
57.248
96.294
19.675
T.I. Proprietary Information
Min
-245
-245
-245
-245
-245
147.36
Outliers
142.80
138.24
133.68
129.12
124.56
120.00
115.44
110.88
106.32
97.20
101.76
Cpk(UL)
-
Outliers
0.33
0.31
0.29
0.28
0.26
0.25
0.23
0.22
0.20
post40krad
post30krad
post20krad
post10krad
prerad
ua
Max
0.182
0.204
0.236
0.249
0.271
Sigma
UL
5.11E-03
4.95E-03
8.67E-03
5.92E-03
0.028
0.98
0.98
0.98
0.98
0.98
Cpk(UL)
53.079
52.650
29.084
41.443
8.599
Outliers
13.59
11.49
9.40
7.31
5.21
3.12
60
40
20
0
1.03
E/A Input Offset Current
post40krad
post30krad
post20krad
post10krad
prerad
na
Max
1.199
1.393
1.309
1.499
2.075
UL
-
0.19
30
20
10
0
0.166
0.198
0.224
0.245
0.248
Avg
-0.609
-1.217
-1.340
0.730
-1.643
post10krad
prerad
E/A Input Bias Current
E/A Input Offset Current
Bin
prerad
post10krad post20krad post30krad post40krad
Outliers
0
0
0
0
0
-9.44
0
0
0
0
0
-7.34
0
0
0
0
0
-5.25
0
0
0
0
0
-3.16
0
0
0
0
0
-1.06
3
1
1
0
3
1.03
29
6
5
7
6
3.12
6
2
4
1
1
5.21
0
0
0
0
0
7.31
0
0
0
0
0
9.40
0
0
0
0
0
11.49
0
0
0
0
0
13.59
0
0
0
0
1
Outliers
0
0
0
0
0
prerad
post10krad
post20krad
post30krad
post40krad
7.607
5.204
8.789
7.388
7.762
-1.06
Avg
0.156
0.191
0.207
0.232
0.166
Outliers
Sigma
140.009
126.649
140.009
132.970
127.593
-3.16
Min
-0.98
-0.98
-0.98
-0.98
-0.98
post30krad
post20krad
-5.25
Cpk(LL)
LL
74.689
79.381
46.292
69.001
14.419
post40krad
10
0
db
E/A Input Bias Current
Bin
prerad
post10krad post20krad post30krad post40krad
Outliers
0
0
0
0
0
0.16
21
0
0
0
0
0.17
16
0
0
0
1
0.19
1
3
0
0
0
0.20
0
6
1
0
0
0.22
0
0
5
0
0
0.23
0
0
4
2
0
0.25
0
0
0
6
5
0.26
0
0
0
0
5
0.28
0
0
0
0
0
0.29
0
0
0
0
0
0.31
0
0
0
0
0
0.33
0
0
0
0
0
Outliers
0
0
0
0
0
prerad
post10krad
post20krad
post30krad
post40krad
20
0.17
Avg
108.892
107.835
110.187
109.325
100.609
E/A CMRR; Vcm0-38; Vin40V
-7.34
Min
77
77
77
77
77
0
0
1
0
1
3
3
1
2
0
0
0
0
0
0.16
0
0
0
0
1
0
4
1
1
1
0
0
0
0
Outliers
Cpk(LL)
LL
1.954
2.501
1.755
1.996
1.769
post30krad
0
0
0
0
1
1
4
1
1
1
1
0
0
0
-9.44
prerad
post10krad
post20krad
post30krad
post40krad
post20krad
0
0
0
1
1
4
2
1
0
0
0
0
0
0
Outliers
E/A CMRR; Vcm0-38; Vin40V
Bin
prerad
post10krad
Outliers
0
97.20
0
101.76
0
106.32
0
110.88
4
115.44
8
120.00
11
124.56
7
129.12
5
133.68
0
138.24
3
142.80
0
147.36
0
Outliers
0
Sigma
3.289
3.773
3.227
3.469
13.999
UL
0.958
1.445
1.434
0.853
4.186
245
245
245
245
245
Cpk(UL)
84.800
56.181
56.639
95.123
19.345
Please do not share without permission from T.I.
30
Max
9.133
9.208
9.313
9.274
9.101
prerad
post10krad
post20krad
post30krad
post40krad
Min
Cpk(LL)
LL
11.137
9.848
10.326
12.615
7.931
T.I. Proprietary Information
Outliers
9.97
10.17
9.78
9.59
9.39
9.20
9.00
8.81
8.62
8.42
8.23
8.03
post10krad
prerad
Cpk(UL)
-
Outliers
-0.53
-0.53
-0.54
-0.54
-0.55
-0.55
-0.56
-0.56
30
20
10
0
-0.57
E/A Output Source Current; COMP2.5V
post40krad
post30krad
post20krad
post10krad
prerad
ma
Max
-0.557
-0.555
-0.556
-0.556
-0.555
-0.532
-0.549
-0.531
-0.548
-0.545
Sigma
UL
6.93E-03
4.14E-03
0.010
4.45E-03
7.66E-03
-0.408
-0.408
-0.408
-0.408
-0.408
Cpk(UL)
7.183
11.811
4.786
11.072
6.387
post40krad
0
0
0
0
2
1
2
3
2
0
0
1
0
0
Avg
4.694
4.698
4.690
4.694
4.685
Outliers
4.76
4.75
4.74
4.73
post40krad
post30krad
post20krad
post10krad
prerad
v
Max
4.715
4.718
4.707
4.708
4.707
4.72
20
15
10
5
0
4.71
E/A Output High Level; Rl15K
4.70
0
0
0
0
0
3
0
3
2
0
0
0
0
0
Min
4.31
4.31
4.31
4.31
4.31
UL
-
4.70
post30krad
0
0
0
0
1
2
4
0
2
1
0
0
0
0
0.235
0.185
0.175
0.122
0.388
4.69
post20krad
0
0
0
0
0
1
1
3
1
1
2
0
0
0
Avg
-0.571
-0.561
-0.570
-0.561
-0.565
Outliers
Sigma
9.826
9.521
9.634
9.471
9.500
4.68
E/A Output High Level; Rl15K
Bin
prerad
post10krad
Outliers
0
4.66
0
4.67
0
4.68
0
4.69
0
4.70
6
4.70
6
4.71
8
4.72
9
4.73
7
4.74
2
4.75
0
4.76
0
Outliers
0
LL
-
post30krad
post20krad
4.67
Cpk(LL)
-
post40krad
10
0
ma
E/A Output Source Current; COMP2.5V
Bin
prerad
post10krad post20krad post30krad post40krad
Outliers
0
0
0
0
0
-0.58
0
0
0
0
0
-0.58
0
0
0
0
0
-0.57
0
0
0
0
0
-0.57
4
0
1
0
0
-0.56
7
0
1
1
2
-0.56
14
3
3
3
3
-0.55
9
4
4
3
2
-0.55
3
2
0
1
3
-0.54
0
0
0
0
1
-0.54
0
0
0
0
0
-0.53
1
0
1
0
0
-0.53
0
0
0
0
0
Outliers
0
0
0
0
0
prerad
post10krad
post20krad
post30krad
post40krad
20
-0.57
Avg
8.640
8.917
9.060
9.108
8.096
E/A Output Sink Current; COMP1.2V
-0.58
Min
2.04
2.04
2.04
2.04
2.04
0
1
0
0
0
1
3
2
3
1
0
0
0
0
-0.58
Cpk(LL)
LL
10.069
12.896
13.882
19.745
6.065
post40krad
0
0
0
0
0
0
0
5
3
0
0
0
0
0
Outliers
post30krad
0
0
0
0
0
0
1
4
4
1
0
0
0
0
4.66
prerad
post10krad
post20krad
post30krad
post40krad
post20krad
0
0
0
0
0
0
2
4
2
1
0
0
0
0
Outliers
E/A Output Sink Current; COMP1.2V
Bin
prerad
post10krad
Outliers
0
8.03
0
8.23
0
8.42
0
8.62
2
8.81
3
9.00
13
9.20
12
9.39
6
9.59
1
9.78
1
9.97
0
10.17
0
Outliers
0
Sigma
4.736
4.740
4.726
4.724
4.745
0.012
0.014
0.013
0.011
0.017
UL
-
Cpk(UL)
-
Please do not share without permission from T.I.
Max
0.739
0.737
0.735
0.734
0.739
0.749
0.743
0.742
0.738
0.767
prerad
post10krad
post20krad
post30krad
post40krad
Cpk(LL)
LL
40.561
26.628
14.588
28.816
8.321
T.I. Proprietary Information
0.77
Outliers
0.76
0.76
0.75
0.75
0.74
0.73
0.73
0.72
0.72
0.71
0.74
Outliers
0.51
0.50
0.50
0.50
0.50
0.49
0.49
0.49
0.49
30
20
10
0
post40krad
post30krad
post20krad
post10krad
prerad
v
Max
0.494
0.492
0.492
0.490
0.492
0.504
0.496
0.496
0.494
0.506
Sigma
UL
3.81E-03
2.69E-03
3.76E-03
3.05E-03
5.08E-03
0.547
0.547
0.547
0.547
0.547
Cpk(UL)
4.640
6.827
4.902
6.194
3.615
post40krad
0
0
0
0
1
3
4
2
0
0
0
1
0
0
Avg
-7.348
-7.933
-8.827
-9.191
-9.823
C/L ADJ Input Bias Current; 0V
Outliers
-6.54
-6.97
-7.39
-7.82
-8.25
post30krad
post20krad
post10krad
prerad
ua
Max
-6.886
-7.586
-8.188
-8.876
-8.985
post40krad
-8.67
40
30
20
10
0
-9.10
0
0
0
0
0
0
5
3
0
0
0
0
0
0
Min
-29.4
-29.4
-29.4
-29.4
-29.4
C/L ADJ Offset Voltage
-9.52
post30krad
0
0
0
0
0
0
0
4
1
4
1
0
0
0
post10krad
prerad
Cpk(UL)
15.116
27.031
20.765
35.685
7.869
-9.95
post20krad
0
0
0
0
0
0
0
0
0
4
5
0
0
0
Avg
0.486
0.488
0.484
0.484
0.486
0.97
0.97
0.97
0.97
0.97
-10.37
C/L ADJ Input Bias Current; 0V
Bin
prerad
post10krad
Outliers
0
-11.23
0
-10.80
0
-10.37
0
-9.95
0
-9.52
0
-9.10
0
-8.67
0
-8.25
0
-7.82
0
-7.39
2
-6.97
28
-6.54
8
Outliers
0
Min
0.453
0.453
0.453
0.453
0.453
Sigma
UL
5.10E-03
2.88E-03
3.78E-03
2.20E-03
9.80E-03
-10.80
Cpk(LL)
LL
3.573
4.832
3.436
4.082
2.559
post30krad
post20krad
v
C/L ADJ Offset Voltage
Bin
prerad
post10krad post20krad post30krad post40krad
Outliers
0
0
0
0
0
0.48
0
0
0
0
0
0.48
0
0
0
0
0
0.48
0
0
1
1
0
0.49
1
0
0
0
1
0.49
3
2
1
1
2
0.49
8
3
1
3
3
0.49
10
2
4
3
4
0.50
9
2
3
0
0
0.50
4
0
0
0
0
0.50
2
0
0
0
0
0.50
1
0
0
0
0
0.51
0
0
0
0
1
Outliers
0
0
0
0
0
prerad
post10krad
post20krad
post30krad
post40krad
post40krad
Outliers
40
30
20
10
0
0.48
Avg
0.728
0.733
0.729
0.732
0.731
E/A Output Low Level; Rl15K
0.48
Min
0
0
0
0
0
3
4
3
0
0
0
0
1
0
0.48
LL
-
post40krad
0
0
0
0
0
4
4
0
0
0
0
0
0
0
Outliers
Cpk(LL)
-
post30krad
0
0
0
0
0
5
3
2
0
0
0
0
0
0
-11.23
prerad
post10krad
post20krad
post30krad
post40krad
post20krad
0
0
0
0
0
1
7
1
0
0
0
0
0
0
Outliers
E/A Output Low Level; Rl15K
Bin
prerad
post10krad
Outliers
0
0.71
0
0.72
0
0.72
0
0.73
1
0.73
4
0.74
13
0.74
14
0.75
5
0.75
1
0.76
0
0.76
0
0.77
0
Outliers
0
Sigma
-6.430
-7.199
-7.531
-8.466
-6.857
UL
0.185
0.273
0.485
0.237
0.818
29.4
29.4
29.4
29.4
29.4
Cpk(UL)
65.371
45.149
25.850
53.741
15.645
Please do not share without permission from T.I.
prerad
post10krad
post20krad
post30krad
post40krad
Cpk(LL)
-
Avg
0.373
0.366
0.381
0.376
0.391
LL
-
T.I. Proprietary Information
0.44
Outliers
0.43
0.43
0.42
0.41
0.40
0.39
0.38
0.38
0.37
0.36
0.35
Outliers
post30krad
post20krad
post10krad
prerad
Max
0.407
0.413
0.413
0.417
0.419
Sigma
UL
8.86E-03
0.015
0.012
0.017
0.010
29.4
29.4
29.4
29.4
29.4
Cpk(UL)
1091.424
651.679
808.858
581.792
925.212
post40krad
0
0
0
0
0
1
2
4
3
0
0
1
0
0
Avg
7.627
8.345
8.313
8.309
8.233
Outliers
8.75
8.67
8.59
8.51
8.43
8.35
8.27
8.20
8.12
60
40
20
0
8.04
*PWM Latch Test Output A
post40krad
post30krad
post20krad
post10krad
prerad
%
Max
8.314
8.402
8.366
8.381
8.377
Sigma
8.478
8.553
8.452
8.444
8.628
UL
0.157
0.071
0.043
0.044
0.107
25
25
25
25
25
Cpk(UL)
35.407
78.386
130.266
124.699
51.665
post40krad
Min
0
0
0
0
0
1
1
5
3
1
0
0
0
0
Avg
7.675
8.366
8.333
8.337
8.233
*PWM Latch Test Output B
Outliers
8.75
8.67
8.60
8.52
8.44
8.36
post30krad
post20krad
post10krad
prerad
%
Max
8.325
8.409
8.379
8.387
8.380
post40krad
8.29
60
40
20
0
8.21
0
0
0
0
0
0
0
6
2
0
0
0
0
0
8.13
post30krad
0
0
0
0
0
0
0
6
4
0
0
0
0
0
post40krad
10
0
ua
0.390
0.391
0.396
0.396
0.404
0
0
0
0
0
0
1
4
3
0
0
0
0
0
Min
post20krad
0
0
0
0
0
0
0
5
3
1
0
0
0
0
20
8.05
LL
-
30
7.96
post30krad
0
0
0
0
0
0
1
7
2
0
0
0
0
0
*C/L ADJ Input Bias Current; 5V
7.88
post20krad
0
0
0
0
0
0
0
6
1
1
1
0
0
0
Cpk(LL)
-
*PWM Latch Test Output B
Bin
prerad
post10krad
Outliers
2
7.90
0
7.98
0
8.05
0
8.13
0
8.21
1
8.29
8
8.36
20
8.44
6
8.52
1
8.60
0
8.67
0
8.75
0
Outliers
0
Min
-29.4
-29.4
-29.4
-29.4
-29.4
0
0
0
0
0
0
4
2
1
4
0
0
0
0
7.98
prerad
post10krad
post20krad
post30krad
post40krad
post40krad
0
0
0
0
2
2
0
1
1
2
0
0
0
0
Outliers
Cpk(LL)
LL
1120.761
669.255
830.918
597.682
951.019
*PWM Latch Test Output A
Bin
prerad
post10krad
Outliers
2
7.88
0
7.96
0
8.04
0
8.12
0
8.20
1
8.27
9
8.35
19
8.43
6
8.51
1
8.59
0
8.67
0
8.75
0
Outliers
0
post30krad
0
0
0
0
0
3
3
1
3
0
0
0
0
0
7.90
prerad
post10krad
post20krad
post30krad
post40krad
post20krad
0
0
0
1
1
2
1
3
1
0
0
0
0
0
Outliers
*C/L ADJ Input Bias Current; 5V
Bin
prerad
post10krad
Outliers
0
0.35
0
0.36
0
0.37
0
0.38
4
0.38
14
0.39
9
0.40
9
0.41
2
0.42
0
0.43
0
0.43
0
0.44
0
Outliers
0
Sigma
8.491
8.507
8.424
8.460
8.533
UL
0.155
0.044
0.034
0.042
0.084
25
25
25
25
25
Cpk(UL)
35.917
126.053
164.126
133.292
66.081
Please do not share without permission from T.I.
Avg
-7.115
-4.096
-3.835
-2.943
-10.719
Max
Cpk(LL)
LL
3.240
4.631
3.650
8.084
2.583
T.I. Proprietary Information
5.31
Outliers
3.88
2.45
1.02
-0.41
-1.84
-3.27
-4.70
-6.13
-7.56
-8.98
-10.41
Outliers
post30krad
post20krad
post10krad
prerad
Sigma
UL
1.715
1.250
1.450
1.270
2.858
23.4
23.4
23.4
23.4
23.4
Cpk(UL)
5.087
6.795
5.800
6.505
3.027
post40krad
0
0
0
0
1
4
1
3
1
0
0
1
0
0
Min
Max
Sigma
86.003
86.367
85.513
86.385
88.098
0.644
0.960
0.568
1.012
1.173
Outliers
88.42
87.83
87.24
86.66
86.07
85.49
84.90
84.31
83.73
83.14
UL
-
Cpk(UL)
-
Outliers
97.34
95.71
94.07
92.43
90.79
89.16
20
15
10
5
0
87.52
C/S AMP PSRR; Vin8-40V
post40krad
post30krad
post20krad
post10krad
prerad
db
Max
89.869
88.926
89.197
89.377
88.318
post40krad
post30krad
post20krad
post10krad
prerad
db
84.428
84.969
84.667
84.719
85.192
Avg
84.610
86.497
85.952
87.440
79.776
82.55
30
20
10
0
85.88
Avg
83.241
83.565
83.601
83.329
83.994
C/S AMP CMRR; Vcm1-12V
84.25
Min
63
63
63
63
63
post40krad
10
0
0.482
-0.157
1.097
1.109
0.181
C/S AMP PSRR; Vin8-40V
Bin
prerad
post10krad post20krad post30krad post40krad
Outliers
0
0
0
0
0
79.34
0
0
0
0
1
80.97
0
0
0
0
0
82.61
0
0
0
0
0
84.25
1
0
0
0
0
85.88
4
1
2
0
0
87.52
8
3
1
1
5
89.16
7
2
3
4
3
90.79
8
2
3
3
1
92.43
4
1
0
0
1
94.07
5
0
1
0
0
95.71
1
0
0
0
0
97.34
0
0
0
0
0
Outliers
0
0
0
0
0
prerad
post10krad
post20krad
post30krad
post40krad
20
mv
-2.778
-2.079
-1.823
-1.375
-2.554
0
0
0
1
1
3
1
0
1
1
0
0
0
0
63
63
63
63
63
30
81.97
post30krad
0
0
0
0
1
3
5
1
0
0
0
0
0
0
C/S AMP Input Offset Voltage
82.61
Cpk(LL)
LL
11.084
7.630
12.707
7.155
6.306
0
1
0
0
0
0
2
5
3
0
0
0
0
0
80.97
prerad
post10krad
post20krad
post30krad
post40krad
Min
-23.4
-23.4
-23.4
-23.4
-23.4
post20krad
0
0
0
0
2
1
2
2
1
1
0
0
0
0
post40krad
0
0
0
0
0
0
1
3
3
1
0
0
0
0
Outliers
Cpk(LL)
LL
4.008
5.686
4.961
5.783
2.431
C/S AMP CMRR; Vcm1-12V
Bin
prerad
post10krad
Outliers
0
81.97
0
82.55
0
83.14
3
83.73
6
84.31
15
84.90
11
85.49
2
86.07
1
86.66
0
87.24
0
87.83
0
88.42
0
Outliers
0
post30krad
0
0
0
0
0
0
3
4
2
1
0
0
0
0
79.34
prerad
post10krad
post20krad
post30krad
post40krad
post20krad
0
0
0
0
0
1
2
4
2
0
0
0
0
0
Outliers
C/S AMP Input Offset Voltage
Bin
prerad
post10krad
Outliers
0
-10.41
0
-8.98
0
-7.56
1
-6.13
3
-4.70
4
-3.27
15
-1.84
8
-0.41
6
1.02
1
2.45
0
3.88
0
5.31
0
Outliers
0
Sigma
95.406
91.724
94.216
90.758
93.141
2.764
1.866
2.392
1.088
3.267
UL
-
Cpk(UL)
-
Please do not share without permission from T.I.
prerad
post10krad
post20krad
post30krad
post40krad
Avg
0.918
1.195
1.378
1.619
0.980
Cpk(LL)
LL
3.402
3.968
3.334
2.676
3.688
T.I. Proprietary Information
Max
Avg
2.41
Outliers
2.28
2.15
2.02
1.88
1.75
1.62
1.49
1.35
1.22
1.09
0.96
Outliers
Sigma
1.041
1.290
1.552
1.701
1.889
UL
0.026
0.030
0.063
0.025
0.260
9.7
9.7
9.7
9.7
9.7
post10krad
prerad
Cpk(UL)
110.388
92.861
43.343
107.147
10.256
Outliers
0.17
0.12
0.08
0.04
0.00
-0.05
-0.09
-0.13
-0.18
-0.22
60
40
20
0
-0.26
C/S AMP Input Offset Current
post40krad
post30krad
post20krad
post10krad
prerad
ua
Max
-0.014
-0.034
-0.047
-0.067
-0.069
0.009
-0.021
-0.024
-0.017
0.105
Sigma
UL
9.66E-03
8.63E-03
0.012
0.042
0.086
0.7
0.7
0.7
0.7
0.7
Cpk(UL)
24.629
28.373
21.142
6.083
2.969
post40krad
Min
0
0
0
0
1
0
3
4
2
0
1
0
0
0
Avg
2.706
2.729
2.710
2.701
2.714
Outliers
2.82
2.81
2.80
2.78
2.77
2.75
2.74
post40krad
post30krad
post20krad
post10krad
prerad
v
Max
2.755
2.755
2.759
2.745
2.751
2.72
20
15
10
5
0
2.71
C/S AMP Gain
2.70
0
0
0
1
1
1
0
2
1
2
0
0
0
0
2.68
post30krad
2.515
2.515
2.515
2.515
2.515
post30krad
post20krad
ua
0
0
0
1
0
3
0
4
2
0
0
1
0
0
-0.042
-0.043
-0.061
-0.124
-0.238
0
0
0
0
1
0
1
4
2
0
2
0
0
0
post40krad
post40krad
Min
post20krad
40
30
20
10
0
0.970
1.240
1.455
1.660
1.700
0
0
0
0
0
1
2
3
2
0
0
0
0
0
-0.7
-0.7
-0.7
-0.7
-0.7
C/S AMP Input Bias Current
-0.31
post30krad
0
0
0
0
0
0
0
9
1
0
0
0
0
0
0
0
0
0
0
1
3
1
3
0
1
0
0
0
0
1
0
0
0
0
2
4
4
0
0
0
0
0
Outliers
post20krad
post10krad
0
0
0
0
3
3
8
8
8
4
4
0
0
0
Min
-9.7
-9.7
-9.7
-9.7
-9.7
0
0
0
0
0
0
0
6
3
0
0
0
0
0
Cpk(LL)
LL
23.668
25.729
18.472
5.019
2.434
prerad
post10krad
post20krad
post30krad
post40krad
post40krad
0
0
0
0
0
0
7
1
0
0
0
0
0
0
2.67
C/S AMP Input Offset Current
Bin
prerad
post10krad
Outliers
0
-0.31
0
-0.26
0
-0.22
0
-0.18
0
-0.13
0
-0.09
0
-0.05
3
0.00
35
0.04
0
0.08
0
0.12
0
0.17
0
Outliers
0
post30krad
0
0
0
0
3
7
0
0
0
0
0
0
0
0
Cpk(LL)
LL
134.916
120.085
58.634
151.376
14.616
prerad
post10krad
post20krad
post30krad
post40krad
C/S AMP Gain
Bin
prerad
Outliers
2.67
2.68
2.70
2.71
2.72
2.74
2.75
2.77
2.78
2.80
2.81
2.82
Outliers
post20krad
0
0
0
8
1
0
0
0
0
0
0
0
0
0
Outliers
C/S AMP Input Bias Current
Bin
prerad
post10krad
Outliers
0
0.96
37
1.09
1
1.22
0
1.35
0
1.49
0
1.62
0
1.75
0
1.88
0
2.02
0
2.15
0
2.28
0
2.41
0
Outliers
0
Sigma
2.801
2.792
2.793
2.779
2.794
UL
0.023
0.020
0.024
0.029
0.021
2.985
2.985
2.985
2.985
2.985
Cpk(UL)
3.270
3.792
3.094
2.787
3.644
Please do not share without permission from T.I.
C/S AMP Max Diff Input
Bin
prerad
post10krad post20krad post30krad post40krad
Outliers
0
0
0
0
0
1.21
0
0
0
0
0
1.22
0
0
0
0
0
1.23
0
0
0
0
0
1.24
4
1
2
1
1
1.24
3
1
1
0
3
1.25
5
1
2
2
0
1.26
10
1
2
2
3
1.27
7
3
2
1
3
1.27
6
2
0
1
1
1.28
2
0
1
1
0
1.29
1
0
0
0
0
1.29
0
0
0
0
0
Outliers
0
0
0
0
0
prerad
post10krad
post20krad
post30krad
post40krad
Cpk(LL)
-
Min
LL
-
T.I. Proprietary Information
0
0
0
0
0
2
7
1
0
0
0
0
1
0
Avg
347.383
358.035
350.831
357.652
356.044
1.29
Outliers
1.29
1.28
1.27
1.27
1.26
1.25
1.24
1.24
1.23
1.22
1.21
Outliers
0.013
0.011
0.014
0.013
0.012
UL
-
Cpk(UL)
-
Outliers
389.91
385.26
380.62
375.97
371.32
366.67
362.03
357.38
352.73
348.08
343.43
40
30
20
10
0
338.79
Shutdown Threshold Voltage
post40krad
post30krad
post20krad
post10krad
prerad
mv
Max
360.942
360.414
360.826
360.628
364.350
Sigma
370.674
364.682
369.634
363.670
390.968
UL
4.595
2.126
5.240
2.183
9.296
396
396
396
396
396
Cpk(UL)
2.543
5.580
2.237
5.401
1.135
post40krad
Min
0
0
0
0
0
2
7
1
0
0
0
0
1
0
Avg
0.112
0.116
0.116
0.115
0.117
Shutdown Latching Voltage; 3mA
Outliers
0.16
0.15
0.15
0.14
0.13
0.13
post30krad
post20krad
post10krad
prerad
v
Max
0.123
0.120
0.120
0.119
0.125
post40krad
0.12
40
30
20
10
0
0.11
0
0
0
0
0
4
4
0
0
0
0
0
0
0
0.11
post30krad
0
0
0
0
0
5
3
2
0
0
0
0
0
0
Sigma
1.284
1.275
1.282
1.280
1.273
post40krad
0
0
0
0
0
3
5
0
0
0
0
0
0
0
254
254
254
254
254
post20krad
0
0
0
0
0
2
6
1
0
0
0
0
0
0
Max
1.259
1.259
1.254
1.260
1.255
0.10
Cpk(LL)
LL
7.757
16.686
6.795
16.281
3.957
Shutdown Latching Voltage; 3mA
Bin
prerad
post10krad
Outliers
0
0.09
0
0.09
0
0.10
0
0.11
1
0.11
6
0.12
16
0.13
10
0.13
5
0.14
0
0.15
0
0.15
0
0.16
0
Outliers
0
post30krad
0
0
0
0
1
4
3
1
1
0
0
0
0
0
post10krad
prerad
v
0.09
prerad
post10krad
post20krad
post30krad
post40krad
post20krad
0
0
0
0
0
3
5
1
0
0
0
0
0
0
Avg
1.235
1.239
1.236
1.240
1.234
post30krad
post20krad
Outliers
Shutdown Threshold Voltage
Bin
prerad
post10krad
Outliers
0
338.79
0
343.43
0
348.08
1
352.73
1
357.38
13
362.03
15
366.67
6
371.32
2
375.97
0
380.62
0
385.26
0
389.91
0
Outliers
0
Min
1.12
1.12
1.12
1.12
1.12
post40krad
0.09
Cpk(LL)
LL
3.635
4.079
3.111
3.629
3.690
20
15
10
5
0
Outliers
prerad
post10krad
post20krad
post30krad
post40krad
C/S AMP Max Diff Input
0.137
0.127
0.125
0.124
0.163
Sigma
UL
6.06E-03
3.64E-03
3.49E-03
3.17E-03
0.013
1.995
1.995
1.995
1.995
1.995
Cpk(UL)
102.969
171.616
179.242
197.064
46.800
Please do not share without permission from T.I.
Avg
6.088
6.111
6.111
6.069
6.068
Cpk(LL)
LL
32.402
55.024
24.374
33.843
32.370
T.I. Proprietary Information
Avg
6.090
6.113
6.113
6.069
6.069
6.11
Outliers
6.11
6.10
6.10
6.10
6.09
6.09
6.08
6.08
6.08
6.07
6.07
Outliers
Sigma
UL
3.10E-04
5.55E-04
5.79E-04
2.59E-04
4.75E-04
7
7
7
7
7
post10krad
prerad
Cpk(UL)
980.189
533.849
511.314
1198.968
653.470
Outliers
-0.01
-0.01
-0.01
-0.01
-0.01
-0.01
-0.02
-0.02
-0.02
30
20
10
0
-0.02
*Shutdown Input Bias Current; 0V
post40krad
post30krad
post20krad
post10krad
prerad
ma
Max
-0.013
-0.013
-0.012
-0.014
-0.015
-0.011
-0.011
-0.011
-0.012
-0.013
Sigma
UL
1.01E-03
7.13E-04
9.90E-04
1.66E-03
2.02E-03
0.99
0.99
0.99
0.99
0.99
Cpk(UL)
331.427
468.571
337.182
201.436
165.785
post40krad
Min
0
0
0
2
0
0
4
5
0
0
0
0
0
0
Avg
2.640
2.663
2.638
2.640
2.637
Outliers
2.74
2.73
2.72
2.70
2.69
2.68
post40krad
post30krad
post20krad
post10krad
prerad
ma
Max
2.676
2.682
2.676
2.663
2.671
2.67
40
30
20
10
0
2.66
*Shutdown Input Bias Current; 15V
2.65
0
0
0
2
0
2
3
0
1
0
0
0
0
0
2.64
post30krad
1
1
1
1
1
Max
0
0
0
0
2
3
1
1
1
3
0
0
0
0
-0.015
-0.014
-0.014
-0.016
-0.018
0
0
0
1
1
1
0
4
2
1
0
0
0
0
post30krad
post20krad
post40krad
Min
post20krad
0
0
0
0
0
1
1
4
3
0
0
0
0
0
post40krad
v
6.089
6.112
6.112
6.069
6.069
0
0
0
0
0
2
1
2
1
2
0
0
0
0
-1
-1
-1
-1
-1
40
30
20
10
0
-0.02
post30krad
0
0
0
0
0
0
0
1
0
3
5
1
0
0
Shutdown NonLatching Volt; 0.8mA
-0.02
post20krad
0
0
0
0
0
0
0
0
3
3
3
0
0
0
Cpk(LL)
LL
326.151
461.549
332.544
197.650
162.453
*Shutdown Input Bias Current; 15V
Bin
prerad
post10krad
Outliers
0
2.61
0
2.62
0
2.64
1
2.65
5
2.66
4
2.67
4
2.68
16
2.69
7
2.70
0
2.72
1
2.73
0
2.74
0
Outliers
0
prerad
post10krad
post20krad
post30krad
post40krad
Min
5.01
5.01
5.01
5.01
5.01
0
11
0
0
0
0
0
0
0
0
0
0
0
0
2.62
prerad
post10krad
post20krad
post30krad
post40krad
post40krad
0
8
0
0
0
0
0
0
0
0
0
0
0
0
Outliers
Cpk(LL)
LL
1161.710
662.367
634.562
1364.395
742.986
*Shutdown Input Bias Current; 0V
Bin
prerad
post10krad
Outliers
0
-0.02
0
-0.02
0
-0.02
0
-0.02
0
-0.02
0
-0.02
1
-0.01
7
-0.01
10
-0.01
11
-0.01
9
-0.01
0
-0.01
0
Outliers
0
post30krad
0
0
0
0
0
0
0
0
0
0
0
0
10
0
2.61
prerad
post10krad
post20krad
post30krad
post40krad
post20krad
0
0
0
0
0
0
0
0
0
0
0
0
9
0
Outliers
Shutdown NonLatching Volt; 0.8mA
Bin
prerad
post10krad
Outliers
0
6.07
0
6.07
0
6.08
0
6.08
0
6.08
0
6.09
38
6.09
0
6.10
0
6.10
0
6.10
0
6.11
0
6.11
0
Outliers
0
Sigma
2.716
2.695
2.711
2.691
2.686
UL
0.017
0.010
0.023
0.016
0.017
4.99
4.99
4.99
4.99
4.99
Cpk(UL)
44.752
75.525
33.641
47.353
44.935
Please do not share without permission from T.I.
30
Max
86.735
86.531
88.952
86.603
86.634
Cpk(LL)
-
LL
-
T.I. Proprietary Information
Min
98.03
Outliers
96.26
94.48
92.70
90.93
89.15
87.37
85.59
82.04
80.26
78.49
83.82
Cpk(UL)
18.090
9.344
8.129
9.850
16.962
Outliers
0.16
0.16
0.15
0.15
0.15
0.14
0.14
0.13
0.13
post40krad
post30krad
post20krad
post10krad
prerad
v
Max
0.159
0.144
0.143
0.140
0.149
Sigma
UL
7.98E-03
5.74E-03
4.82E-03
4.78E-03
6.00E-03
0.392
0.392
0.392
0.392
0.392
Cpk(UL)
10.508
14.883
17.863
18.078
14.203
Outliers
0.82
0.81
0.79
0.77
0.76
20
15
10
5
0
0.74
>Output A Low; Il100mA
post40krad
post30krad
post20krad
post10krad
prerad
v
Max
0.734
0.714
0.708
0.708
0.720
0.13
20
15
10
5
0
0.140
0.136
0.134
0.133
0.136
Avg
0.665
0.689
0.685
0.686
0.690
post10krad
prerad
Output A Low; Il20mA
>Output A Low; Il100mA
Bin
prerad
post10krad post20krad post30krad post40krad
Outliers
0
0
0
0
0
0.65
0
0
0
0
0
0.66
1
0
0
0
0
0.68
2
0
1
0
0
0.69
3
4
4
3
2
0.71
3
2
2
3
5
0.73
9
1
2
1
0
0.74
12
2
1
1
2
0.76
2
0
0
0
2
0.77
2
0
0
0
0
0.79
2
0
0
0
0
0.81
2
0
0
0
0
0.82
0
0
0
0
0
Outliers
0
0
0
0
0
prerad
post10krad
post20krad
post30krad
post40krad
170
170
170
170
170
0.73
Avg
0.124
0.130
0.128
0.127
0.130
UL
1.534
2.978
3.324
2.822
1.638
0.71
Min
Outliers
Sigma
88.907
90.981
93.614
88.640
89.232
0.69
LL
-
post30krad
post20krad
0.68
Cpk(LL)
-
post40krad
10
0
ua
Output A Low; Il20mA
Bin
prerad
post10krad post20krad post30krad post40krad
Outliers
0
0
0
0
0
0.12
0
0
0
0
0
0.12
1
0
0
0
0
0.13
3
0
1
1
0
0.13
2
4
5
4
2
0.13
2
2
2
1
5
0.14
10
0
1
2
1
0.14
12
3
1
0
2
0.15
2
0
0
0
0
0.15
3
0
0
0
1
0.15
2
0
0
0
0
0.16
1
0
0
0
0
0.16
0
0
0
0
0
Outliers
0
0
0
0
0
prerad
post10krad
post20krad
post30krad
post40krad
20
0.12
Avg
82.743
81.904
83.180
80.776
84.125
Collector Leakage Current; Vc40V
0.66
Min
0
0
0
0
1
4
4
2
0
0
0
0
0
0
0.12
LL
-
post40krad
0
0
1
0
0
2
1
4
0
0
0
0
0
0
Outliers
Cpk(LL)
-
post30krad
0
0
0
0
2
0
2
1
4
0
1
0
0
0
0.65
prerad
post10krad
post20krad
post30krad
post40krad
post20krad
0
0
0
1
2
2
1
2
1
0
0
0
0
0
Outliers
Collector Leakage Current; Vc40V
Bin
prerad
post10krad
Outliers
0
78.49
0
80.26
0
82.04
1
83.82
5
85.59
7
87.37
17
89.15
8
90.93
0
92.70
0
94.48
0
96.26
0
98.03
0
Outliers
0
Sigma
0.803
0.749
0.743
0.736
0.760
UL
0.032
0.023
0.018
0.018
0.024
2.09
2.09
2.09
2.09
2.09
Cpk(UL)
14.101
19.875
26.250
25.388
18.884
Please do not share without permission from T.I.
>Output B Low; Il100mA
Bin
prerad
post10krad post20krad post30krad post40krad
Outliers
0
0
0
0
0
0.63
0
0
0
0
0
0.65
0
0
0
0
0
0.67
1
0
0
0
0
0.69
3
0
3
2
0
0.71
11
4
5
4
3
0.73
15
3
2
0
4
0.75
4
1
0
1
3
0.77
3
1
0
1
0
0.79
0
0
0
0
0
0.81
0
0
0
0
0
0.83
1
0
0
0
0
0.85
0
0
0
0
1
Outliers
0
0
0
0
0
Max
0.724
0.721
0.703
0.714
0.735
Cpk(LL)
LL
44.908
30.404
66.236
19.548
21.606
T.I. Proprietary Information
Min
13.045
13.045
13.045
13.045
13.045
Max
0.138
0.137
0.132
0.133
0.139
Avg
13.527
13.512
13.519
13.484
13.489
0.159
0.149
0.140
0.144
0.156
0.85
Outliers
0.83
0.81
0.79
0.77
0.75
0.73
0.71
0.69
0.67
0.65
0.63
Sigma
UL
7.03E-03
6.31E-03
4.03E-03
5.79E-03
7.67E-03
0.392
0.392
0.392
0.392
0.392
Outliers
0.16
0.16
0.15
0.15
0.14
0.14
0.14
0.13
0.13
Cpk(UL)
12.042
13.500
21.525
14.878
11.013
Outliers
13.55
13.54
13.53
13.53
13.52
20
15
10
5
0
13.52
Output B High; Il-20mA
post40krad
post30krad
post20krad
post10krad
prerad
v
Max
13.537
13.519
13.524
13.502
13.497
post40krad
post30krad
post20krad
post10krad
prerad
v
Output B High; Il-20mA
Bin
prerad
post10krad post20krad post30krad post40krad
Outliers
0
0
0
0
0
13.48
0
0
0
0
0
13.49
0
0
0
1
0
13.49
0
0
0
0
4
13.50
0
0
0
0
3
13.50
0
0
0
5
3
13.51
0
2
0
2
1
13.52
0
1
0
0
0
13.52
0
5
6
0
0
13.53
1
1
4
0
0
13.53
14
0
0
0
0
13.54
19
0
0
0
0
13.55
4
0
0
0
0
Outliers
0
0
0
0
0
prerad
post10krad
post20krad
post30krad
post40krad
0.13
20
15
10
5
0
0.12
Output B Low; Il20mA
13.51
Avg
0.123
0.130
0.127
0.127
0.130
Cpk(UL)
16.117
18.102
30.407
20.260
11.295
13.50
Min
2.09
2.09
2.09
2.09
2.09
13.50
LL
-
UL
0.028
0.025
0.015
0.023
0.040
13.49
Cpk(LL)
-
Outliers
Sigma
0.825
0.769
0.728
0.756
0.839
Output B Low; Il20mA
Bin
prerad
post10krad post20krad post30krad post40krad
Outliers
0
0
0
0
0
0.12
0
0
0
0
0
0.12
0
0
0
0
0
0.13
3
0
0
1
0
0.13
2
1
5
2
2
0.13
5
4
2
3
2
0.14
12
1
2
0
2
0.14
10
1
1
1
3
0.14
3
1
0
1
0
0.15
0
1
0
0
1
0.15
2
0
0
0
0
0.16
0
0
0
0
1
0.16
1
0
0
0
0
Outliers
0
0
0
0
0
prerad
post10krad
post20krad
post30krad
post40krad
post10krad
prerad
v
13.49
Avg
0.663
0.697
0.684
0.686
0.698
post30krad
post20krad
0.12
Min
post40krad
10
0
Outliers
LL
-
20
13.48
Cpk(LL)
-
30
Outliers
prerad
post10krad
post20krad
post30krad
post40krad
>Output B Low; Il100mA
13.547
13.527
13.527
13.509
13.512
Sigma
3.66E-03
5.19E-03
2.41E-03
7.80E-03
6.98E-03
UL
-
Cpk(UL)
-
Please do not share without permission from T.I.
>Output B High; Il-100mA
Bin
prerad
post10krad post20krad post30krad post40krad
Outliers
0
0
0
0
0
13.28
0
0
0
0
0
13.29
0
0
0
0
1
13.30
0
0
0
1
4
13.30
0
0
0
1
3
13.31
0
1
0
3
3
13.32
0
3
0
2
0
13.32
0
1
1
1
0
13.33
2
4
5
0
0
13.34
14
0
3
0
0
13.35
14
0
1
0
0
13.35
6
0
0
0
0
13.36
2
0
0
0
0
Outliers
0
0
0
0
0
Max
13.345
13.325
13.335
13.310
13.301
13.359
13.335
13.343
13.324
13.312
Output A High; Il-20mA
Bin
prerad
post10krad post20krad post30krad post40krad
Outliers
0
0
0
0
0
13.48
0
0
0
0
0
13.48
0
0
0
1
0
13.49
0
0
0
0
4
13.50
0
0
0
0
3
13.50
0
0
0
2
3
13.51
0
0
1
5
1
13.52
0
4
0
0
0
13.52
1
3
7
0
0
13.53
5
2
2
0
0
13.53
20
0
0
0
0
13.54
10
0
0
0
0
13.55
2
0
0
0
0
Outliers
0
0
0
0
0
Cpk(LL)
LL
29.442
42.497
37.452
39.799
34.463
T.I. Proprietary Information
Min
12.03
12.03
12.03
12.03
12.03
Max
13.547
13.529
13.528
13.509
13.512
Sigma
4.87E-03
5.62E-03
3.95E-03
8.15E-03
7.43E-03
13.36
Outliers
13.35
13.35
13.34
13.33
13.32
13.32
13.31
13.30
13.30
13.29
13.28
Outliers
13.55
13.54
13.53
13.53
13.52
13.52
13.51
13.50
13.50
13.49
UL
-
Cpk(UL)
-
>Output A High; Il-100mA
Outliers
13.37
13.36
13.35
13.34
13.33
13.33
post40krad
13.32
30
20
10
0
post30krad
post20krad
post10krad
prerad
v
Max
13.332
13.327
13.329
13.315
13.303
post40krad
post30krad
post20krad
post10krad
prerad
v
13.535
13.519
13.523
13.504
13.498
Avg
13.290
13.309
13.301
13.290
13.281
13.48
30
20
10
0
>Output A High; Il-100mA
Bin
prerad
post10krad post20krad post30krad post40krad
Outliers
0
0
0
0
0
13.27
0
0
0
0
0
13.28
0
0
0
0
1
13.29
1
0
0
1
1
13.30
0
0
1
0
3
13.31
1
1
0
1
2
13.32
8
1
0
3
4
13.33
4
3
4
3
0
13.33
15
4
4
0
0
13.34
4
0
1
0
0
13.35
4
0
0
0
0
13.36
1
0
0
0
0
13.37
0
0
0
0
0
Outliers
0
0
0
0
0
prerad
post10krad
post20krad
post30krad
post40krad
Outliers
Output A High; Il-20mA
13.31
Avg
13.522
13.513
13.512
13.484
13.488
Cpk(UL)
-
13.30
Min
13.045
13.045
13.045
13.045
13.045
UL
-
13.29
Cpk(LL)
LL
33.563
28.153
40.251
18.757
20.298
Sigma
6.44E-03
8.14E-03
4.87E-03
9.87E-03
7.97E-03
13.28
prerad
post10krad
post20krad
post30krad
post40krad
post10krad
prerad
v
13.48
Avg
13.334
13.313
13.325
13.292
13.288
post30krad
post20krad
Outliers
Min
12.03
12.03
12.03
12.03
12.03
post40krad
13.27
Cpk(LL)
LL
68.095
53.058
89.363
43.219
53.184
20
15
10
5
0
Outliers
prerad
post10krad
post20krad
post30krad
post40krad
>Output B High; Il-100mA
Sigma
13.362
13.338
13.341
13.323
13.319
0.015
0.010
0.012
0.011
0.012
UL
-
Cpk(UL)
-
Please do not share without permission from T.I.
Cpk(LL)
LL
9.688
16.098
11.610
17.711
13.199
T.I. Proprietary Information
0.000
0.000
0.000
0.000
0.000
0
0
0
0
0
0
0
0
0
0
0
0
0
11
Avg
0.00
Outliers
0.00
0.00
0.00
0.00
0.00
0.00
0.00
0.00
0.00
0.00
0.00
Outliers
Sigma
UL
0.00E+00
0.00E+00
0.00E+00
0.00E+00
0.00E+00
0.001
0.001
0.001
0.001
0.001
Cpk(UL)
Infinite
Infinite
Infinite
Infinite
Infinite
Outliers
0.00
0.00
0.00
0.00
0.00
0.00
0.00
0.00
0.00
80
60
40
20
0
0.00
*PWM Output B Minimum Duty Cycle
post40krad
post30krad
post20krad
post10krad
prerad
%
Max
0.000
0.000
0.000
0.000
0.000
0.000
0.000
0.000
0.000
0.000
Sigma
UL
0.00E+00
0.00E+00
0.00E+00
0.00E+00
0.00E+00
0.001
0.001
0.001
0.001
0.001
Cpk(UL)
Infinite
Infinite
Infinite
Infinite
Infinite
post40krad
Min
0
0
1
0
4
3
2
1
0
0
0
0
0
0
Avg
47.327
47.339
47.259
47.291
47.236
*PWM Output A Maximum Duty Cycle
Outliers
47.67
47.63
47.59
47.54
47.50
post30krad
post20krad
post10krad
prerad
%
Max
47.444
47.439
47.410
47.357
47.359
post40krad
47.46
30
20
10
0
47.42
0
0
0
1
3
2
2
0
0
0
0
0
0
0
47.37
post30krad
45.05
45.05
45.05
45.05
45.05
Max
post40krad
0.000
0.000
0.000
0.000
0.000
0
0
1
0
0
2
3
3
1
0
0
0
0
0
post10krad
prerad
%
0.000
0.000
0.000
0.000
0.000
0
0
0
0
0
0
0
0
0
0
0
0
0
8
Min
post20krad
0
0
0
0
1
0
3
4
1
0
0
0
0
0
post30krad
post20krad
47.33
LL
-
post40krad
0.00
post30krad
0
0
0
0
0
0
0
0
0
0
0
0
0
10
80
60
40
20
0
47.29
Cpk(LL)
-
*PWM Output A Maximum Duty Cycle
Bin
prerad
post10krad
Outliers
0
47.21
0
47.25
0
47.29
0
47.33
3
47.37
5
47.42
14
47.46
11
47.50
3
47.54
0
47.59
0
47.63
0
47.67
0
Outliers
2
prerad
post10krad
post20krad
post30krad
post40krad
post20krad
0
0
0
0
0
0
0
0
0
0
0
0
0
9
Avg
0.000
0.000
0.000
0.000
0.000
*PWM Output A Minimum Duty Cycle
47.25
prerad
post10krad
post20krad
post30krad
post40krad
Min
0
0
0
0
0
0
0
0
0
0
0
0
0
11
0.00
*PWM Output B Minimum Duty Cycle
Bin
prerad
post10krad
Outliers
0
0.00
0
0.00
0
0.00
0
0.00
0
0.00
0
0.00
0
0.00
0
0.00
0
0.00
0
0.00
0
0.00
0
0.00
0
Outliers
38
LL
-
post40krad
0
0
0
0
0
0
0
0
0
0
0
0
0
8
Outliers
Cpk(LL)
-
post30krad
0
0
0
0
0
0
0
0
0
0
0
0
0
10
47.21
prerad
post10krad
post20krad
post30krad
post40krad
post20krad
0
0
0
0
0
0
0
0
0
0
0
0
0
9
Outliers
*PWM Output A Minimum Duty Cycle
Bin
prerad
post10krad
Outliers
0
0.00
0
0.00
0
0.00
0
0.00
0
0.00
0
0.00
0
0.00
0
0.00
0
0.00
0
0.00
0
0.00
0
0.00
0
Outliers
38
Sigma
47.757
47.501
47.495
47.431
47.461
0.082
0.049
0.068
0.043
0.058
UL
-
Cpk(UL)
-
Please do not share without permission from T.I.
30
Max
47.427
47.397
47.385
47.352
47.348
prerad
post10krad
post20krad
post30krad
post40krad
Cpk(LL)
LL
66.690
113.049
113.964
42.676
51.386
T.I. Proprietary Information
47.69
Outliers
47.64
47.59
47.54
47.50
47.45
47.40
47.36
47.31
47.26
47.22
47.17
post10krad
prerad
Cpk(UL)
-
Outliers
7.88
7.87
7.86
7.84
7.83
7.82
7.80
7.79
20
15
10
5
0
7.78
UVLO Start-up Threshold
post40krad
post30krad
post20krad
post10krad
prerad
v
Max
7.818
7.823
7.807
7.812
7.800
Sigma
7.855
7.862
7.846
7.861
7.834
UL
0.021
0.021
0.020
0.026
0.022
7.99
7.99
7.99
7.99
7.99
Cpk(UL)
2.765
2.665
3.110
2.278
2.816
post40krad
0
0
1
1
1
0
7
0
1
0
0
0
0
0
Avg
0.816
0.823
0.818
0.817
0.812
Outliers
0.84
0.84
0.83
0.83
post40krad
post30krad
post20krad
post10krad
prerad
v
Max
0.824
0.826
0.822
0.823
0.820
0.83
30
20
10
0
0.82
UVLO Threshold Hysterisis
0.82
0
0
0
0
1
3
0
1
1
2
0
0
0
0
Min
0.11
0.11
0.11
0.11
0.11
UL
-
0.82
post30krad
0
0
0
0
0
3
5
2
0
0
0
0
0
0
0.094
0.036
0.053
0.037
0.044
0.82
post20krad
0
0
0
0
0
0
0
5
3
1
0
0
0
0
Avg
7.765
7.795
7.785
7.782
7.769
Outliers
Sigma
47.778
47.456
47.472
47.404
47.408
0.81
UVLO Threshold Hysterisis
Bin
prerad
post10krad
Outliers
0
0.81
0
0.81
0
0.81
0
0.82
1
0.82
5
0.82
12
0.82
12
0.83
4
0.83
4
0.83
0
0.84
0
0.84
0
Outliers
0
Min
6.01
6.01
6.01
6.01
6.01
post30krad
post20krad
0.81
Cpk(LL)
LL
28.990
28.927
30.565
23.118
26.561
post40krad
10
0
%
UVLO Start-up Threshold
Bin
prerad
post10krad post20krad post30krad post40krad
Outliers
0
0
0
0
0
7.74
0
0
0
0
0
7.75
0
0
0
0
0
7.77
1
0
0
0
2
7.78
1
0
0
2
1
7.79
5
1
4
1
2
7.80
8
3
2
1
3
7.82
12
1
2
2
1
7.83
4
3
1
1
2
7.84
3
0
1
0
0
7.86
4
1
0
1
0
7.87
0
0
0
0
0
7.88
0
0
0
0
0
Outliers
0
0
0
0
0
prerad
post10krad
post20krad
post30krad
post40krad
20
7.77
Avg
47.282
47.339
47.282
47.292
47.281
*PWM Output B Maximum Duty Cycle
7.75
Min
45.05
45.05
45.05
45.05
45.05
0
0
0
1
4
3
3
0
0
0
0
0
0
0
7.74
Cpk(LL)
LL
8.441
21.931
14.603
21.000
17.549
post40krad
0
0
0
0
2
4
2
0
0
0
0
0
0
0
Outliers
post30krad
0
0
0
1
0
4
3
2
0
0
0
0
0
0
0.81
prerad
post10krad
post20krad
post30krad
post40krad
post20krad
0
0
0
0
0
3
5
1
0
0
0
0
0
0
Outliers
*PWM Output B Maximum Duty Cycle
Bin
prerad
post10krad
Outliers
0
47.17
0
47.22
0
47.26
1
47.31
4
47.36
5
47.40
10
47.45
12
47.50
4
47.54
0
47.59
0
47.64
0
47.69
0
Outliers
2
0.831
0.829
0.825
0.831
0.827
Sigma
UL
3.57E-03
2.11E-03
2.08E-03
5.57E-03
4.61E-03
2
2
2
2
2
Cpk(UL)
109.894
185.506
188.752
70.404
85.350
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