19-2977; Rev 1; 1/04 Quad, Low-Power, 500Mbps ATE Driver/Comparator The MAX9963/MAX9964 four-channel, low-power, highspeed pin electronics driver and comparator ICs include, for each channel, a three-level pin driver, a dual comparator, and variable clamps. The driver features a wide voltage range and high-speed operation, includes high-Z and active-termination (3rd-level drive) modes, and is highly linear even at low-voltage swings. The dual comparator provides low dispersion (timing variation) over a wide variety of input conditions. The clamps provide damping of high-speed DUT waveforms when the device is configured as a high-impedance receiver. High-speed, differential control inputs compatible with ECL, LVPECL, LVDS, and GTL levels are provided for each channel. ECL/LVPECL or flexible open-collector outputs are available for the comparators. The A-grade version provides tight matching of gain and offset for the drivers and comparators, allowing reference levels to be shared across multiple channels in cost-sensitive systems. For system designs that incorporate independent reference levels for each channel, the B-grade version is available at reduced cost. Optional internal resistors at the high-speed inputs provide differential termination of LVDS inputs, while optional internal resistors provide the pullup voltage and source termination for open-collector comparator outputs. These features significantly reduce the discrete component count on the circuit board. Low-leakage, slew rate, and tri-state/terminate controls are operational configurations that are programmed through a 3-wire, low-voltage, CMOS-compatible serial interface. The MAX9963/MAX9964 operating range is -1.5V to +6.5V, with power dissipation of only 825mW per channel. These devices are available in a 100-pin, 14mm x 14mm body, 0.5mm pitch TQFP with an exposed 8mm x 8mm die pad on the top (MAX9963) or bottom (MAX9964) of the package for efficient heat removal. The MAX9963/MAX9964 are specified to operate with an internal die temperature of +70°C to +100°C, and feature a die temperature monitor output. Applications Flash Memory Testers Commodity DRAM Testers Low-Cost Mixed-Signal/System-on-Chip Testers Features ♦ ♦ ♦ ♦ ♦ ♦ Small Footprint—Four Channels in 0.4in2 Low Power Dissipation: 825mW/Channel (typ) High Speed: 500Mbps at 3VP-P Low Timing Dispersion Wide -1.5V to +6.5V Operating Range Active Termination (3rd-Level Drive) ♦ ♦ ♦ ♦ Low-Leakage Mode: 15nA (max) Integrated Clamps Interface Easily with Most Logic Families Digitally Programmable Slew Rate ♦ Internal Logic Termination Resistors ♦ Low Gain and Offset Error Ordering Information TEMP RANGE PIN-PACKAGE MAX9963ADCCQ* PART 0°C to +70°C 100 TQFP-EPR MAX9963AKCCQ* 0°C to +70°C 100 TQFP-EPR MAX9963AGCCQ* 0°C to +70°C 100 TQFP-EPR MAX9963AHCCQ* 0°C to +70°C 100 TQFP-EPR MAX9963AJCCQ 0°C to +70°C 100 TQFP-EPR MAX9963BDCCQ* 0°C to +70°C 100 TQFP-EPR MAX9963BKCCQ* 0°C to +70°C 100 TQFP-EPR MAX9963BGCCQ 0°C to +70°C 100 TQFP-EPR MAX9963BHCCQ* 0°C to +70°C 100 TQFP-EPR MAX9963BJCCQ* 0°C to +70°C 100 TQFP-EPR MAX9964ADCCQ* 0°C to +70°C 100 TQFP-EP** MAX9964AKCCQ* 0°C to +70°C 100 TQFP-EP** MAX9964AGCCQ* 0°C to +70°C 100 TQFP-EP** MAX9964AHCCQ* 0°C to +70°C 100 TQFP-EP** MAX9964AJCCQ* 0°C to +70°C 100 TQFP-EP** MAX9964BDCCQ* 0°C to +70°C 100 TQFP-EP** MAX9964BKCCQ* 0°C to +70°C 100 TQFP-EP** MAX9964BGCCQ 0°C to +70°C 100 TQFP-EP** MAX9964BHCCQ* 0°C to +70°C 100 TQFP-EP** MAX9964BJCCQ* 0°C to +70°C 100 TQFP-EP** *Future product—contact factory for availability. **EP = Exposed pad. Active Burn-In Systems Structural Testers Pin Configurations appear at end of data sheet. Selector Guide appears at end of data sheet. ________________________________________________________________ Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. 1 MAX9963/MAX9964 General Description MAX9963/MAX9964 Quad, Low-Power, 500Mbps ATE Driver/Comparator ABSOLUTE MAXIMUM RATINGS VCC to GND .........................................................-0.3V to +11.5V VEE to GND............................................................-7.0V to +0.3V All Other Pins ....................................(VEE - 0.3V) to (VCC + 0.3V) VCC - VEE ................................................................-0.3V to +18V DUT_ to GND.........................................................-2.5V to +7.5V DATA_, NDATA_, RCV_, NRCV_ to GND ..............-2.5V to +5.0V DATA_ to NDATA_ ..............................................................±1.5V RCV_ to NRCV_ ..................................................................±1.5V VCCO_ _ to GND ........................................................-0.3V to +5V SCLK, DIN, CS, RST to GND ...................................-1.0V to +5V DHV_, DLV_, DTV_, CHV_, CLV_ to GND .............-2.5V to +7.5V CPHV_ to GND ......................................................-2.5V to +8.5V CPLV_ to GND.......................................................-3.5V to +7.5V DHV_ to DLV_ ......................................................................±10V DHV_ to DTV_ ......................................................................±10V DLV_ to DTV_.......................................................................±10V CHV_ or CLV_ to DUT_ ........................................................±10V CH_, NCH_, CL_, NCL_ to GND...............................-2.5V to +5V Current into DHV_, DLV_, DTV_, CHV_, CLV_, CPHV_, CPLV_ ...................................................±10mA Current into TEMP ............................................-0.5mA to +20mA DUT_ Short Circuit to -1.5V to +6.5V..........................Continuous Power Dissipation (TA = +70°C) MAX9963_ _CCQ (derate 167mW/°C above TA = +70°C) ..................................................................13.3W* MAX9964_ _CCQ (derate 47.6mW/°C above TA = +70°C) ....................................................................3.8W* Storage Temperature Range .............................-65°C to +150°C Junction Temperature .....................................................+125°C Lead Temperature (soldering, 10s) .................................+300°C *Dissipation wattage values are based on still air with no heat sink for the MAX9963 and slug soldered to board copper for the MAX9964. Actual maximum power dissipation is a function of the user’s heat-extraction technique and will vary. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (VCC = +9.75V, VEE = -5.25V, VCCO_ _ = 2.5V, SC1 = SC0 = 0, VCPHV_ = 7.2V, VCPLV_ = -2.2V, TJ = +85°C, unless otherwise noted. All temperature coefficients are measured at TJ = +70°C to +100°C, unless otherwise noted.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS V POWER SUPPLIES Positive Supply VCC 9.5 9.75 10.5 Negative Supply VEE -6.5 -5.25 -4.5 V Positive Supply ICC (Note 2) 165 200 mA Negative Supply IEE (Note 2) -320 -380 mA PD Calculated at typical VCC and VEE (Notes 2, 3) 3.3 4.0 W +6.5 V Power Dissipation DUT_ CHARACTERISTICS Operating Voltage Range Maximum VDUT Leakage Current in High-Z Mode IDUT Leakage Current in Low-Leakage Mode Combined Capacitance 2 CDUT (Note 4) -1.5 LLEAK = 0, 0V ≤ VDUT_ ≤ 3V ±1.5 LLEAK = 0, VDUT_ = -1.5V, 6.5V ±3 LLEAK = 1, 0 ≤ VDUT_ ≤ 3V, TJ < +90°C ±10 LLEAK = 1, VDUT_ = -1.5V,TJ < +90°C ±15 LLEAK = 1, VDUT_ = 6.5V, VCHV_ = VCLV_ = -1.5V, TJ < +90°C ±15 Driver in term mode (DUT_ = DTV_) 3 Driver in high-Z mode 5 _______________________________________________________________________________________ µA nA pF Quad, Low-Power, 500Mbps ATE Driver/Comparator (VCC = +9.75V, VEE = -5.25V, VCCO_ _ = 2.5V, SC1 = SC0 = 0, VCPHV_ = 7.2V, VCPLV_ = -2.2V, TJ = +85°C, unless otherwise noted. All temperature coefficients are measured at TJ = +70°C to +100°C, unless otherwise noted.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Low-Leakage Enable Time (Notes 5, 7) 20 µs Low-Leakage Disable Time (Notes 6, 7) 20 µs Low-Leakage Recovery Time to return to the specified maximum leakage after a 3V, 4V/ns step at DUT_ (Note 7) 10 µs LEVEL PROGRAMMING INPUTS (DHV_, DLV_, DTV_, CHV_, CLV_, CPHV_, CPLV_) Input Bias Current ±25 IBIAS Settling Time To 5mV 1 µA µs DIFFERENTIAL CONTROL INPUTS (DATA_, NDATA_, RCV_, NRCV_) Input High Voltage VIH -1.6 +3.5 V Input Low Voltage VIL -2.0 +3.1 V ±0.15 ±1.00 V ±25 µA 104 Ω Differential Input Voltage VDIFF Input Bias Current IBIAS MAX996_ _DCCQ, MAX996_ _HCCQ MAX996_ _KCCQ, MAX996_ _GCCQ, and MAX996_ _JCCQ, between signal and complement Input Termination Resistor 96 SINGLE-ENDED CONTROL INPUTS (CS, RST, SCLK, DIN) Input High VIH 1.6 3.5 V Input Low VIL -0.1 +0.9 V 50 MHz SERIAL INTERFACE TIMING (Figure 5) SCLK Frequency fSCLK SCLK Pulse Width High tCH 8 ns SCLK Pulse Width Low tCL 8 ns CS Low to SCLK High Setup tCSS0 3.5 ns CS High to SCLK High Setup tCSS1 3.5 ns SCLK High to CS High Hold tCSH1 3.5 ns DIN to SCLK High Setup tDS 3.5 ns DIN to SCLK High Hold tDH 3.5 ns tCSWH 20 ns CS Pulse Width High TEMPERATURE MONITOR (TEMP) TJ = +70°C, RL ≥ 10MΩ Nominal Voltage Temperature Coefficient Output Resistance 3.43 V +10 mV/°C 15 kΩ _______________________________________________________________________________________ 3 MAX9963/MAX9964 ELECTRICAL CHARACTERISTICS (continued) MAX9963/MAX9964 Quad, Low-Power, 500Mbps ATE Driver/Comparator ELECTRICAL CHARACTERISTICS (continued) (VCC = +9.75V, VEE = -5.25V, VCCO_ _ = 2.5V, SC1 = SC0 = 0, VCPHV_ = 7.2V, VCPLV_ = -2.2V, TJ = +85°C, unless otherwise noted. All temperature coefficients are measured at TJ = +70°C to +100°C, unless otherwise noted.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS DRIVERS (Note 8) DC OUTPUT CHARACTERISTICS (RL ≥ 10MΩ ) DHV_, DLV_, DTV_, Output Offset Voltage VOS At DUT_ with VDHV_, MAX996_A VDLV_, VDTV_ independently MAX996_B tested at +1.5V ±15 mV ±100 DHV_, DLV_, DTV_, Output Offset Temperature Coefficient DHV_, DLV_, DTV_, Gain ±65 AV Measured with MAX996_A VDHV_, VDLV_, VDTV_ MAX996_B at 0 and 4.5V 0.999 0.960 DHV_, DLV_, DTV_, Gain Temperature Coefficient Linearity Error 1.00 µV/°C 1.001 V/V 1.001 ppm/°C -35 0 ≤ VDUT_≤ 3V (Note 9) ±5 Full range (Notes 9, 10) ±15 mV DHV_ to DLV_ Crosstalk VDLV_ = 0, VDHV_ = 200mV, 6.5V ±7 mV DLV_ to DHV_ Crosstalk VDHV_ = 5V, VDLV_ = -1.5V, 4.8V ±8 mV DTV_ to DLV_ and DHV_ Crosstalk VDHV_ = 3V, VDLV_ = 0, VDTV_ = -1.5V, 6.5V ±2 mV DHV_ to DTV_ Crosstalk VDTV_ = 1.5V, VDLV_ = 0, VDHV_ = 1.6V, 3V ±3 mV DLV_ to DTV_ Crosstalk VDTV_ = 1.5V, VDHV = 3V, VDLV_ = 0, 1.4V ±3 mV DHV_, DLV_, DTV_ DC PowerVCC and VEE independently set to their PSRR Supply Rejection Ratio minimum and maximum values Maximum DC Drive Current IDUT_ DC Output Resistance RDUT_ IDUT = ±30mA (Note 11) DC Output Resistance Variation ∆RDUT_ IDUT = ±1mA to ±40mA DYNAMIC OUTPUT CHARACTERISTICS (ZL = 50Ω ) Drive Mode Overshoot 40 ±60 49 dB 50 1 VDLV_ = 0V, VDHV_ = 0.1V 30 ±120 51 mA Ω Ω mV VDLV_ = 0V, VDHV_ = 1V 40 VDLV_ = 0V, VDHV_ = 3V 50 Term Mode Overshoot (Note 12) 0 mV Settling Time to Within 25mV 3V step (Note 13) 10 ns Settling Time to Within 5mV 3V step (Note 13) 20 ns 4 _______________________________________________________________________________________ Quad, Low-Power, 500Mbps ATE Driver/Comparator (VCC = +9.75V, VEE = -5.25V, VCCO_ _ = 2.5V, SC1 = SC0 = 0, VCPHV_ = 7.2V, VCPLV_ = -2.2V, TJ = +85°C, unless otherwise noted. All temperature coefficients are measured at TJ = +70°C to +100°C, unless otherwise noted.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS TIMING CHARACTERISTICS (Note 14) (ZL_ = 50Ω ) Prop Delay, Data to Output tPDD 2 ns Prop Delay Match, tLH vs. tHL 3VP-P ±50 ps Prop Delay Match, Drivers Within Package (Note 15) 40 ps +3 ps/°C Prop Delay Temperature Coefficient Prop Delay Change vs. Pulse Width 3VP-P, 40MHz, 2.5ns to 22.5ns pulse width, relative to 12.5ns pulse width ±60 ps Prop Delay Change vs. CommonMode Voltage VDHV_ - VDLV_ = 1V, VDHV_ = 0 to 6V 85 ps Prop Delay, Drive to High-Z tPDDZ VDHV_ = 1.0V, VDLV_ = -1.0V, VDTV_ = 0 2.9 ns Prop Delay, High-Z to Drive tPDZD VDHV_ = 1.0V, VDLV_ = -1.0V, VDTV_ = 0 2.9 ns Prop Delay, Drive to Term tPDDT VDHV_ = 3V, VDLV_ = 0, VDTV_ = 1.5V 2.2 ns Prop Delay, Term to Drive tPDTD VDHV_ = 3V, VDLV_ = 0, VDTV_ = 1.5V 1.8 ns 0.2VP-P, 20% to 80% 330 1VP-P, 10% to 90% 670 DYNAMIC PERFORMANCE (ZL = 50Ω) Rise and Fall Time tR, tF 3VP-P, 10% to 90% 1.1 1.3 ps 1.6 ns 5VP-P, 10% to 90% 2.0 SC1 = 0, SC0 = 1 Slew Rate Percent of full speed (SC0 = SC1 = 0), 3VP-P, 20% to 80% 75 % SC1 = 1, SC0 = 0 Slew Rate Percent of full speed (SC0 = SC1 = 0), 3VP-P, 20% to 80% 50 % SC1 = 1, SC0 = 1 Slew Rate Percent of full speed (SC0 = SC1 = 0), 3VP-P, 20% to 80% 25 % 0.2VP-P 650 ps 1VP-P 1.0 3VP-P 2.0 5VP-P 2.9 Minimum Pulse Width (Note 16) ns 0.2VP-P 1700 1VP-P 1000 3VP-P 500 5VP-P 350 Dynamic Crosstalk (Note 18) 20 mVP-P Rise and Fall Time, Drive to Term tDTR, tDTF VDHV_ = 3V, VDLV_ = 0, VDTV_ = 1.5V, 10% to 90% (Note 19) 1.6 ns Rise and Fall Time, Term to Drive tTDR, tTDF VDHV_ = 3V, VDLV_ = 0, VDTV_ = 1.5V, 10% to 90% (Note 19) 0.7 ns Data Rate (Note 17) Mbps _______________________________________________________________________________________ 5 MAX9963/MAX9964 ELECTRICAL CHARACTERISTICS (continued) MAX9963/MAX9964 Quad, Low-Power, 500Mbps ATE Driver/Comparator ELECTRICAL CHARACTERISTICS (continued) (VCC = +9.75V, VEE = -5.25V, VCCO_ _ = 2.5V, SC1 = SC0 = 0, VCPHV_ = 7.2V, VCPLV_ = -2.2V, TJ = +85°C, unless otherwise noted. All temperature coefficients are measured at TJ = +70°C to +100°C, unless otherwise noted.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS COMPARATORS (Note 20) DC CHARACTERISTICS Input Voltage Range VIN Differential Input Voltage VDIFF Hysteresis VHYST Input Offset Voltage VOS (Note 4) -1.5 VDUT_ = 1.5V mV MAX996_A ±15 MAX996_B ±100 ±50 CMRR VDUT_ = 0, 3V 47 78 VDUT_ = 0, 6.5V 54 78 VDUT_ = -1.5V, 6.5V 44 VCC Power-Supply Rejection Ratio PSRR VEE Power-Supply Rejection Ratio (Note 22) PSRR mV µV/°C dB 61 ±3 VDUT_ = 0 to 3V Linearity Error (Note 9) V V 0 Input Offset Voltage Temperature Coefficient Common-Mode Rejection Ratio (Note 21) +6.5 ±8 VDUT_ = 6.5V ±15 VDUT_ = -1.5V ±25 VDUT_ = -1.5V, 6.5V (Note 22) 57 82 VDUT_ = 0, 6.5V 44 70 VDUT_ = -1.5V 33 45 mV dB dB AC CHARACTERISTICS (Note 23) Minimum Pulse Width Prop Delay tPW(min) (Note 24) MAX996_ _GCCQ 0.75 MAX996_ _HCCQ, MAX996_ _JCCQ 1.3 2.2 ns Prop Delay Temperature Coefficient +6 ps/°C Prop Delay Match, High/Low vs. Low/High ±25 ps 35 ps Prop Delay Match, Comparators Within Package tPDL ns (Note 15) VCHV_ = VCLV_= 0, 6.4V ±75 VCHV_ = VCLV_= -1.4V ±175 Prop Delay Dispersion vs. Overdrive 100mV to 2V 200 Prop Delay Dispersion vs. Pulse Width MAX996_ _GCCQ 2.5ns to 22.5ns pulse width, relative to 12.5ns MAX996_ _HCCQ, pulse width MAX996_ _JCCQ ±35 Prop Delay Dispersion vs. Slew Rate 0.5V/ns to 2V/ns slew rate 100 Prop Delay Dispersion vs. Common-Mode Input (Note 25) 6 ±70 _______________________________________________________________________________________ ps ps ps ps Quad, Low-Power, 500Mbps ATE Driver/Comparator (VCC = +9.75V, VEE = -5.25V, VCCO_ _ = 2.5V, SC1 = SC0 = 0, VCPHV_ = 7.2V, VCPLV_ = -2.2V, TJ = +85°C, unless otherwise noted. All temperature coefficients are measured at TJ = +70°C to +100°C, unless otherwise noted.) (Note 1) PARAMETER SYMBOL CONDITIONS VDUT_ = 1.0VP-P, tR = tF = 1.0ns 10% to 90%, relative to timing at 50% point Waveform Tracking 10% to 90% MIN TYP Term mode 250 High-Z mode 500 MAX UNITS ps OPEN-COLLECTOR LOGIC OUTPUTS (CH_, NCH_, CL_, NCL_: MAX996_ _DCCQ, MAX996_ _KCCQ, and MAX996_ _GCCQ ) VCCO_ _ Voltage Range VVCCO_ _ 0 Output Low-Voltage Compliance Set by IOUT, RTERM, and VCCO_ _ Output High Voltage VOH ICH_ = INCH_ = ICL_ = INCL_ = 0mA, MAX996_ _GCCQ Output Low Voltage VOL ICH_ = INCH_ = ICL_ = INCL_ = 0mA, MAX996_ _GCCQ Output Voltage Swing VCCO_ - 0.10 0.30 Single-ended measurement from VCCO_ _ to CH_, NCH_, CL_, NCL_, MAX996_ _GCCQ 3.5 V -0.5 V VCCO_ - 0.04 V 0.33 47.5 VCCO_ - 0.38 V 0.40 V 52.5 Ω Termination Resistor RTERM Differential Rise Time tR 20% to 80% 350 ps Differential Fall Time tF 20% to 80% 350 ps OPEN-EMITTER LOGIC OUTPUTS (CH_, NCH_, CL_, NCL_: MAX996_ _HCCQ and MAX996_ _JCCQ) VCCO_ _ Voltage Range VVCCO_ _ VCCO_ _ Supply Current IVCCO_ _ -0.1 All outputs 50 Ω to (VVCCO_ _ - 2V) +3.5 V 330 mA Output High Voltage VOH 50Ω to (VVCCO_ _ - 2V) VCCO_ _ - 0.9 V Output Low Voltage VOL 50Ω to (VVCCO_ _ - 2V) VCCO_ _ - 1.7 V Output Voltage Swing 50Ω to (VVCCO_ _ - 2V) 750 850 950 mV Differential Rise Time tR 20% to 80% 600 ps Differential Fall Time tF 20% to 80% 600 ps CLAMPS High Clamp Input Voltage Range VCPH_ -0.3 +7.5 V Low Clamp Input Voltage Range VCPL_ -2.5 +5.3 V Clamp Offset Voltage VOS At DUT_ with IDUT_ = 1mA, VCPHV_ = 0 ±100 At DUT_ with IDUT_ = -1mA, VCPLV_ = 0 ±100 Offset Voltage Temperature Coefficient Clamp Power-Supply Rejection ±0.5 PSRR VCC and VEE independently varied full range, IDUT_ = 1mA, VCPHV_ = 0 40 VCC and VEE independently varied full range, IDUT_ = -1mA, VCPLV_ = 0 40 mV mV/°C dB _______________________________________________________________________________________ 7 MAX9963/MAX9964 ELECTRICAL CHARACTERISTICS (continued) MAX9963/MAX9964 Quad, Low-Power, 500Mbps ATE Driver/Comparator ELECTRICAL CHARACTERISTICS (continued) (VCC = +9.75V, VEE = -5.25V, VCCO_ _ = 2.5V, SC1 = SC0 = 0, VCPHV_ = 7.2V, VCPLV_ = -2.2V, TJ = +85°C, unless otherwise noted. All temperature coefficients are measured at TJ = +70°C to +100°C, unless otherwise noted.) (Note 1) PARAMETER Voltage Gain SYMBOL CONDITIONS AV MIN TYP 0.96 Voltage-Gain Temperature Coefficient MAX UNITS 1.00 V/V -100 IDUT = 1mA, VCPLV_ = -1.5V, VCPHV_ = -0.3 to 6.5V ±10 IDUT = -1mA, VCPHV_ = 6.5V, VCPLV_ = -1.5 to 5.3V ±10 ppm/°C Clamp Linearity Short-Circuit Output Current Clamp DC Impedance Note 1: Note 2: Note 3: Note 4: Note 5: Note 6: Note 7: Note 8: Note 9: Note 10: Note 11: Note 12: Note 13: Note 14: 8 mV VCPHV_ = 0, VCPLV_ = -1.5V, VDUT_ = 6.0V 50 VCPLV_ = 5V, VCPHV_ = 6.5V, VDUT_ = -1.0V -95 -50 VCPHV_ = 3V, VCPLV_ = 0, IDUT = -5mA and -15mA 50 55 VCPHV_ = 3V, VCPLV_ = 0, IDUT = 5mA and 15mA 50 55 95 mA Ω All MIN and MAX limits are 100% tested in production. Total for quad device at worst-case setting. RL_ ≥ 10MΩ. The applicable supply currents are measured with typical supply voltages. Does not include internal dissipation of the comparator outputs. With output loads of 50Ω to (VVCCO_ _ - 2V), this adds 240mW (typ) to the total chip power (MAX996_ _HCCQ, MAX996_ _JCCQ). Externally forced voltages may exceed this range provided that the absolute maximum ratings are not exceeded. Transition time from LLEAK being asserted to leakage current dropping below specified limits. Transition time from LLEAK being deasserted to output returning to normal operating mode. Based on simulation results only. With the exception of offset and gain/CMRR tests, reference input values are calibrated for offset and gain. Relative to straight line between 0 and 3V. Full ranges are -1.3V ≤ VDHV_ ≤ 6.5V, -1.5V ≤ VDTV_ ≤ 6.5V, -1.5V ≤ VDLV_ ≤ 6.3V. Nominal target value is 50Ω. Contact factory for alternate trim selections within the 45Ω to 51Ω range. V DTV_ = 1.5V, RS = 50Ω. External signal driven into T-line is a 0 to 3V edge with 1.2ns rise time (10% to 90%). Measurement is made using the comparator. Measured from the crossing point of DATA_ inputs to the settling of the driver output. Prop delays are measured from the crossing point of the differential input signals to the 50% point of expected output swing. Rise time of the differential inputs DATA_ and RCV_ is 250ps (10% to 90%). _______________________________________________________________________________________ Quad, Low-Power, 500Mbps ATE Driver/Comparator (VCC = +9.75V, VEE = -5.25V, VCCO_ _ = 2.5V, SC1 = SC0 = 0, VCPHV_ = 7.2V, VCPLV_ = -2.2V, TJ = +85°C, unless otherwise noted. All temperature coefficients are measured at TJ = +70°C to +100°C, unless otherwise noted.) (Note 1) Note 15: Rising edge to rising edge or falling edge to falling edge. Note 16: Specified amplitude is programmed. At this pulse width, the output reaches at least 95% of its nominal (DC) amplitude. The pulse width is measured at DATA_. Note 17: Specified amplitude is programmed. Maximum data rate specified in transitions per second. A square wave that reaches at least 95% of its programmed amplitude may be generated at one-half this frequency. Note 18: Crosstalk from any driver to the other three channels. Aggressor channel is driving 3VP-P into a 50Ω load. Victim channels are in term mode with VDTV_ = 1.5V. Note 19: Indicative of switching speed from DHV_ or DLV_ to DTV_ and DTV_ to DHV_ or DLV_ when VDLV_ < VDTV_ < VDHV_. If VDTV_ < VDLV_ or VDTV_ > VDHV_, switching speed is degraded by approximately a factor of 3. Note 20: Both high and low comparators are tested. Note 21: Change in offset voltage over input range. Note 22: Change in offset voltage with power supplies independently set to their minimum and maximum values. Note 23: Unless otherwise noted, all prop delays are measured at 40MHz, VDUT_ = 0 to 2V, VCHV_ = VCLV_ = 1V, slew rate = 2V/ns, ZS = 50Ω, driver in term mode with VDTV_ = 0V. Comparator outputs are terminated with 50Ω to GND at scope input with VCCO_ _=2V. Open-collector outputs are also terminated (internally or externally) with RTERM = 50Ω to VCCO_ _. Measured from VDUT_ crossing calibrated CHV_/CLV_ threshold to the crossing point of differential outputs. Note 24: VDUT_ = 0 to 1V, VCHV_ = VCLV_ = 0.5V. At this pulse width, the output reaches at least 90% of its DC voltage swing. The pulse width is measured at the crossing points of the differential outputs. Note 25: Relative to propagation delay at VCHV_ = VCLV_ = 1.5V. VDUT_ = 200mVP-P. Overdrive = 100mV. Typical Operating Characteristics DHV_ = 100mV DHV_ = 3V DHV_ TO DTV_ DHV_ = 1V DLV_ TO DTV_ 0 0 0 MAX9963 toc02 DHV_ = 5V V = 0.25V/DIV DHV_ = 200mV DLV_ = 0V RL = 50Ω V = 500mV/DIV V = 50mV/DIV DHV_ = 500mV MAX9963 toc01 DLV_ = 0V RL = 50Ω DRIVE TO TERM TRANSITION DRIVER LARGE-SIGNAL RESPONSE MAX9963 toc03 DRIVER SMALL-SIGNAL RESPONSE RL = 50Ω t = 2.50ns/div t = 2.50ns/div t = 5.0ns/div _______________________________________________________________________________________ 9 MAX9963/MAX9964 ELECTRICAL CHARACTERISTICS (continued) Typical Operating Characteristics (continued) -20 -40 60 50 TIME DELAY (ps) 0 LOW PULSE HIGH PULSE 0 5 HIGH-Z TO DRIVE TRANSITION 2.5 3.5 4.5 5.5 0 -2 3.5 VDUT_ (V) 4.5 5.5 6.5 4 2 -1.5 -0.5 0.5 1.5 2.5 3.5 4.5 5.5 VDUT_ (V) VOUT_ (V) CROSSTALK TO DUT_ FROM DLV_ WITH DUT_ = DHV_ CROSSTALK TO DUT_ FROM DTV_ WITH DUT_ = DHV_ 0.16 MAX9963 toc11 DHV_ = 5V DTV_ = 1.5V 0.14 5 4 3 2 DHV_ = 3V DLV_ = 0 0.12 6 6.5 0.10 0.08 0.06 0.04 0.02 0 0 -1 -0.02 -2 2.5 6 6 6.5 1 1.5 DUT_ = DLV_ 8 DUT_ ERROR (mV) 2 5 -2 1.5 7 DUT_ ERROR (mV) 4 4 0 9 MAX9963 toc10 6 3 10 LINEARITY ERROR (mV) 2 -1.5 -0.5 0.5 8 2 DRIVER LINEARITY ERROR vs. OUTPUT VOLTAGE 4 8 1 DRIVER LINEARITY ERROR vs. OUTPUT VOLTAGE -2 DUT_ = DTV_ 0 COMMON-MODE VOLTAGE (V) 6 DRIVER LINEARITY ERROR vs. OUTPUT VOLTAGE -1.5 -0.5 0.5 -1 0 10 NORMALIZED TO VCM = 1.5V -30 MAX9963 toc08 MAX9963 toc07 -20 25 20 8 LINEARITY ERROR (mV) V = 0.25V/DIV 15 DUT_ = DHV_ RL = 50Ω 10 10 10 t = 5.0ns/div FALLING EDGE 10 PULSE WIDTH (ns) VDUT = 0 TO 3V PULSE, CHV_ = CLV_ = 1.5V EXTERNAL LOAD = 50Ω HIGH-Z TO DLV_ 20 -10 NORMALIZED TO PW = 12.5ns PERIOD = 25ns, DHV_ = 3V, DLV_ = 0 -100 0 30 MAX9963 toc09 -80 HIGH-Z TO DHV_ RISING EDGE 40 0 -60 t = 2.50ns/div MAx9963 toc06 20 TIMING ERROR (ps) 0 70 MAX9963 toc05 40 MAX9963 toc04 VOUT = 250mV/DIV DRIVER TIME DELAY vs. COMMON-MODE VOLTAGE DRIVER TRAILING-EDGE TIMING ERROR vs. PULSE WIDTH MAX9963 toc12 COMPARATOR DIFFERENTIAL OUTPUT RESPONSE, MAX996_ _JCCQ LINEARITY ERROR (mV) MAX9963/MAX9964 Quad, Low-Power, 500Mbps ATE Driver/Comparator NORMALIZED AT DLV_ = 0 -0.04 -1.5 0 1.5 3.0 DLV_ VOLTAGE (V) 4.5 6.0 NORMALIZED AT DTV_ = 1.5V -1.5 -0.5 0.5 1.5 2.5 3.5 DTV_ VOLTAGE (V) ______________________________________________________________________________________ 4.5 5.5 6.5 Quad, Low-Power, 500Mbps ATE Driver/Comparator 1 0 -1 -2 -3 -4 0.02 -5 0 -0.02 -0.04 -0.06 NORMALIZED AT DHV_ = 5V 1.5 2.5 -0.12 3.5 4.5 5.5 6.5 1.5 2.5 3.5 -6 4.5 5.5 -1.5 6.5 0 1.5 4.5 3.0 DLV_ VOLTAGE (V) DRIVER OFFSET vs. TEMPERATURE DRIVER GAIN vs. TEMPERATURE 1.0 MAX9963 toc17 1.0020 MAX9963 toc16 DTV_ = 1.5V DLV_ = 0 0 1.0015 0.5 0 -1 -2 -3 -4 OFFSET (mV) 1.0010 GAIN (V/V) 1.0005 1.0000 -5 -0.5 -1.0 -1.5 -2.0 -6 0.9995 -2.5 -7 0.5 1.5 2.5 0.9990 3.5 4.5 5.5 -3.0 25 6.5 40 55 70 100 85 25 40 55 70 100 85 DHV_ VOLTAGE (V) TEMPERATURE (°C) TEMPERATURE (°C) COMPARATOR OFFSET vs. COMMON-MODE VOLTAGE COMPARATOR RISING-EDGE TIMING VARIATION vs. COMMON-MODE VOLTAGE COMPARATOR FALLING-EDGE TIMING VARIATION vs. COMMON-MODE VOLTAGE VEE = -4.5V 150 100 TIMING VARIATION (ps) VEE = -5.5V VEE = -6.5V VEE = -4.5V 50 VEE = -5.5V 0 -50 -150 1.5 2.5 3.5 100 VEE = -6.5V VEE = -4.5V 50 VEE = -5.5V 0 -50 VEE = -6.5V -100 NORMALIZED AT VCM = 1.5V AND VEE = -5.25V -1.5 -0.5 0.5 150 MAX9963 toc20 0.6 0.4 0.2 0 MAX9963 toc19 -0.5 NORMALIZED AT TJ = +85°C NORMALIZED AT +85°C NORMALIZED AT DHV_ = 3V MAX9963 toc21 DTL_ ERROR (mV) NORMALIZED AT DLV_ = 0 NORMALIZED AT DTV_ = 1.5V -1.5 -0.5 0.5 DTV_VOLTAGE (V) 2 OFFSET (mV) -2 MAX9963 toc18 0.5 CROSSTALK TO DUT_ FROM DHV_ WITH DUT_ = DTV_ -0.2 -0.4 -0.6 -0.8 -1.0 -1.2 -1.4 -1.6 -1.8 0 -4 DHV_ VOLTAGE (V) -8 2 -0.10 -0.5 1 DTV_ = 1.5V DHV_ = 3V 4 TIMING VARIATION (ps) -8 6 -0.08 -6 -7 DLV_ = 0 DHV_ = 3V 0.04 DUT_ ERROR (mV) DUT_ ERROR (mV) 0.06 DUT_ ERROR (mV) DLV_ = 0 DTV_ = 1.5V CROSSTALK TO DUT_ FROM DLV_ WITH DUT_ = DTV_ MAX9963 toc14 2 MAX9963 toc13 3 CROSSTALK TO DUT_ FROM DTV_ WITH DUT_ = DLV_ MAX9963 toc15 CROSSTALK TO DUT_ FROM DHV_ WITH DUT_ = DLV_ 4.5 COMMON-MODE VOLTAGE (V) 5.5 6.5 -100 NORMALIZED AT VCM = 1.5V AND VEE = -5.25V -1.5 -0.5 0.5 1.5 2.5 3.5 -150 4.5 COMMON-MODE VOLTAGE (V) 5.5 6.5 NORMALIZED AT VCM = 1.5V AND VEE = -5.25V -1.5 -0.5 0.5 1.5 2.5 3.5 4.5 5.5 6.5 COMMON-MODE VOLTAGE (V) ______________________________________________________________________________________ 11 MAX9963/MAX9964 Typical Operating Characteristics (continued) Typical Operating Characteristics (continued) COMPARATOR TRAILING-EDGE TIMING ERROR vs. PULSE WIDTH, MAX996_ _GCCQ 20 300 250 200 150 NORMALIZED TO OVERDRIVE = 0.5V 100 -10 HIGH PULSE LOW PULSE -30 -60 0 NORMALIZED TO PW = 12.5ns PERIOD = 25ns 5 10 15 25 20 0 5 10 15 25 PULSE WIDTH (ns) PULSE WIDTH (ns) COMPARATOR TIMING VARIATION vs. INPUT SLEW RATE, DUT_ RISING COMPARATOR TIMING VARIATION vs. INPUT SLEW RATE, DUT_ FALLING COMPARATOR DIFFERENTIAL OUTPUT RESPONSE, MAX996_ _GCCQ 0.8 1.0 1.2 1.4 VOUT = 50mV/DIV 10 0 -10 -20 -30 -40 -50 1.6 1.8 NORMALIZED TO SR = 0.84V/ns 0.4 2.0 0.6 0.8 1.0 1.2 1.4 1.6 SLEW RATE (V/ns) SLEW RATE (V/ns) COMPARATOR RESPONSE vs. HIGH SLEW RATE OVERDRIVE COMPARATOR OFFSET vs. TEMPERATURE 1.8 2.0 t = 2.50ns/div VDUT = 0 TO 3V PULSE, CHV_ = CLV_ = 1.5V EXTERNAL LOAD = 50Ω CLAMP RESPONSE MAX9963 toc28 0.8 MAX9963 toc27 0 MAX9963 toc29 0.6 20 -60 -70 NORMALIZED TO SR = 0.824V/ns MAX9963 toc026 40 30 PROPAGATION DELAY (ns) -10 -20 -30 -40 -50 MAX9963 toc25 50 MAX9963 toc24 10 0 HIGH-Z MODE 0.6 DIGITIZED OUTPUT RISING EDGE V = 500mV/DIV INPUT OFFSET (mV) 0.4 0.2 0.0 -0.2 FALLING EDGE -0.4 0 0 INPUT SLEW RATE = 6V/ns NORMALIZED TO TJ = +85°C -0.6 65 t = 2.50ns/div 12 20 OVERDRIVE (V) 30 20 0.4 LOW PULSE -100 -200 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 50 40 -60 -70 -50 -150 NORMALIZED TO PW = 12.5ns PERIOD = 25ns -50 0 HIGH PULSE 0 -40 50 PROPAGATION DELAY (ns) 0 -20 50 TIMING ERROR (ps) 10 TIMING ERROR (ps) 350 100 MAX9963 toc23 400 DELAY (ps) 30 MAX9963 toc22 450 COMPARATOR TRAILING-EDGE TIMING ERROR vs. PULSE WIDTH, MAX996_ _JCCQ MAX9963 toc23B COMPARATOR TIMING VARIATION vs. OVERDRIVE V = 500mV/DIV MAX9963/MAX9964 Quad, Low-Power, 500Mbps ATE Driver/Comparator 70 75 80 85 90 TEMPERATURE (°C) 95 100 105 t = 5.0ns/div VDUT = 0 TO 3V SQUARE WAVE RS = 25Ω CPLV_ = -0.1V, CPHV_ = +3.1V ______________________________________________________________________________________ Quad, Low-Power, 500Mbps ATE Driver/Comparator 0.2 0 -0.2 -0.4 -0.6 -0.8 1.5 2.5 3.5 4.5 5.5 6.5 3.0 3.1 3.2 3.3 3.4 3.5 3.6 3.7 3.8 3.9 4.0 DUT_ VOLTAGE (V) CPHV_ VOLTAGE (V) 1.4 1.3 INPUT CURRENT (µA) 7 LEAKAGE CURRENT (nA) 1.5 MAX9963 toc33 8 CHV_ = CLV_ = 6.5V 5 4 3 -0.50 -0.25 0 DRIVER REFERENCE INPUT CURRENT vs. INPUT VOLTAGE 9 6 -0.75 CPLV_ VOLTAGE (V) LOW-LEAKAGE CURRENT vs. DUT_ VOLTAGE CHV_ = CLV_ = 5V 2 1 100 0 -100 -200 -300 -400 -500 -600 -700 -800 -900 -1000 -1100 VDUT_ = 0 -1200 -1.50 -1.25 -1.00 CHV_ = CLV_ < 3V DTV_ DLV_ 1.2 1.1 1.0 DHV_ 0.9 0.8 0.7 0 0.6 -1 0.5 -1.5 -0.5 0.5 1.5 2.5 3.5 4.5 5.5 6.5 -1.5 -0.5 0.5 1.5 2.5 3.5 4.5 5.5 DUT_ VOLTAGE (V) INPUT VOLTAGE (V) COMPARATOR REFERENCE INPUT CURRENT vs. INPUT VOLTAGE INPUT CURRENT vs. INPUT VOLTAGE, CPHV_ 700 MAX9963 toc35 300 CPLV_ = -2.2V 600 CPHV_ CURRENT (nA) CHV 250 200 CLV 150 100 6.5 MAX9963 toc36 -1.5 -0.5 0.5 VDUT_ = 3V CPLV_ = 0 MAX9963 toc34 DUT_ CURRENT (µA) 0.4 INPUT CURRENT (pA) LEAKAGE CURRENT (µA) 0.6 1200 1100 1000 900 800 700 600 500 400 300 200 100 0 -100 DUT_ CURRENT (µA) MAX9963 toc30 0.8 CLAMP CURRENT vs. DIFFERENCE VOLTAGE MAX9963 toc31 CLAMP CURRENT vs. DIFFERENCE VOLTAGE MAX9963 toc32 HIGH-Z LEAKAGE CURRENT vs. DUT_ VOLTAGE 500 400 300 50 200 0 -1.5 -0.5 0.5 1.5 2.5 3.5 INPUT VOLTAGE (V) 4.5 5.5 6.5 -1.5 -0.5 0.5 1.5 2.5 3.5 4.5 5.5 6.5 CPHV_ VOLTAGE (V) ______________________________________________________________________________________ 13 MAX9963/MAX9964 Typical Operating Characteristics (continued) Typical Operating Characteristics (continued) INPUT CURRENT vs. INPUT VOLTAGE, CPLV_ SUPPLY CURRENT ICC vs. VCC 155 A B -240 -280 ICC (mA) 110 -3 50 CPHV_ = 7.2V 35 -5 C 95 80 -4 IEE (mA) 125 -2 A: DUT_ = DTV_ = 1.5V, DHV_ = 3V, A: DLV_ = 0, CHV_ = CLV_ = 0, A: CPHV_ = 7.2V, CPLV_ = -2.2V. B: SAME AS A EXCEPT DUT_ = HIGH-Z. C: SAME AS B EXCEPT DUT_ = LOW LEAK. 1.5 2.5 3.5 4.5 5.5 6.5 9.75 10.00 10.25 A -340 A: DUT_ = DTV_ = 1.5V, DHV_ = 3V, A: DLV_ = 0, CHV_ = CLV_ = 0, A: CPHV_ = 7.2V, CPLV_ = -2.2V. B: SAME AS A EXCEPT DUT_ = HIGH-Z. C: SAME AS B EXCEPT DUT_ = LOW LEAK. -380 10.50 -6.50 -6.25 -6.00 -5.75 -5.50 -5.25 -5.00 -4.75 -4.50 VEE (V) ICC vs. TEMPERATURE IEE vs. TEMPERATURE -313.2 SUPPLY CURRENT (mA) 165.0 164.5 164.0 DUT_ = DTV_ = 1.5V, DHV_ = 3V, DLV_ = 0, CHV_ = CLV_ = 0, CPHV_ = 7.2V, CPLV_ = -2.2V, VCC = 9.75V, VEE = -5.25V MAX9963 toc41 -313.0 MAX9963 toc40 165.5 SUPPLY CURRENT (mA) -320 VCC (V) 166.0 163.0 B -400 9.50 CPLV_ VOLTAGE (V) 163.5 -300 -360 20 -1.5 -0.5 0.5 C -260 140 65 -313.4 -313.6 -313.8 DUT_ = DTV_ = 1.5V, DHV_ = 3V, DLV_ = 0, CHV_ = CLV_ = 0, CPHV_ = 7.2V, CPLV_ = -2.2V, VCC = 9.75V, VEE = -5.25V -314.0 162.5 -314.2 60 70 80 90 TEMPERATURE (°C) 14 -220 MAX9963 toc39 170 MAX9963 toc38 -1 SUPPLY CURRENT IEE vs. VEE 185 MAX9963 toc37 0 CPLV_ CURRENT (µA) MAX9963/MAX9964 Quad, Low-Power, 500Mbps ATE Driver/Comparator 100 110 60 70 80 90 100 110 TEMPERATURE (°C) ______________________________________________________________________________________ Quad, Low-Power, 500Mbps ATE Driver/Comparator PIN MAX9963 MAX9964 NAME FUNCTION Collector Voltage Input, Channels 3 and 4. For open-collector outputs, this is the pullup voltage for the internal termination resistors. For open-emitter outputs, this is VCCO34 the collector voltage of the output transistors. Not internally connected on opencollector versions without internal termination resistors. VCCO34 services both channel 3 and channel 4. 1 25 2 24 3 23 4 22 RCV4 5 21 NRCV4 6 20 7 19 8 18 RCV3 9 17 NRCV3 10, 27, 54, 55, 60, 61, 65, 66, 71, 72, 99 16, 27, 54, 55, 60, 61, 65, 66, 71, 72, 99 VEE Negative Power-Supply Input 11, 28, 51, 56, 62, 64, 70, 75, 98 15, 28, 51, 56, 62, 64, 70, 75, 98 GND Ground Connection 12 14 RST Reset Input. Asynchronous reset input for the serial register. RST is active low and asserts low-leakage mode. At power-up, hold RST low until VCC and VEE have stabilized. 13 13 CS 14 12 SCLK Channel 4 Multiplexer Control Inputs. Differential controls DATA4 and NDATA4 select driver 4’s input from DHV4 or DLV4. Drive DATA4 above NDATA4 to select NDATA4 DHV4. Drive NDATA4 above DATA4 to select DLV4. DATA4 Channel 4 Multiplexer Control Inputs. Differential controls RCV4 and NRCV4 place channel 4 into receive mode. Drive RCV4 above NRCV4 to place channel 4 into receive mode. Drive NRCV4 above RCV4 to place channel 4 into drive mode. Channel 3 Multiplexer Control Inputs. Differential controls DATA3 and NDATA3 select driver 3’s input from DHV3 or DLV3. Drive DATA3 above NDATA3 to select NDATA3 DHV3. Drive NDATA3 above DATA3 to select DLV3. DATA3 Channel 3 Multiplexer Control Inputs. Differential controls RCV3 and NRCV3 place channel 3 into receive mode. Drive RCV3 above NRCV3 to place channel 3 into receive mode. Drive NRCV3 above RCV3 to place channel 3 into drive mode. Chip-Select Input. Serial-port activation input. CS is active low. Serial Clock Input. Clock for serial port. 15 11 DIN Data Input. Serial port data input. 16, 26, 52, 58, 68, 74, 100 10, 26, 52, 58, 68, 74, 100 VCC Positive Power-Supply Input 17 9 NRCV2 18 8 RCV2 19 7 20 6 Channel 2 Multiplexer Control Inputs. Differential controls RCV2 and NRCV2 place channel 2 into receive mode. Drive RCV2 above NRCV2 to place channel 2 into receive mode. Drive NRCV2 above RCV2 to place channel 2 into drive mode. NDATA2 Channel 2 Multiplexer Control Inputs. Differential controls DATA2 and NDATA2 select driver 2’s input from DHV2 or DLV2. Drive DATA2 above NDATA2 to select DATA2 DHV2. Drive NDATA2 above DATA2 to select DLV2. ______________________________________________________________________________________ 15 MAX9963/MAX9964 Pin Description Quad, Low-Power, 500Mbps ATE Driver/Comparator MAX9963/MAX9964 Pin Description (continued) PIN 16 NAME MAX9963 MAX9964 21 5 NRCV1 22 4 RCV1 23 3 24 2 FUNCTION Channel 1 Multiplexer Control Inputs. Differential controls RCV1 and NRCV1 place channel 1 into receive mode. Drive RCV1 above NRCV1 to place channel 1 into receive mode. Drive NRCV1 above RCV1 to place channel 1 into drive mode. NDATA1 Channel 1 Multiplexer Control Inputs. Differential controls DATA1 and NDATA1 select driver 1’s input from DHV1 or DLV1. Drive DATA1 above NDATA1 to select DATA1 DHV1. Drive NDATA1 above DATA1 to select DLV1. Collector Voltage Input, Channels 1 and 2. For open-collector outputs, this is the pullup voltage for the internal termination resistors. For open-emitter outputs, this is VCCO12 the collector voltage of the output transistors. Not internally connected on opencollector versions without internal termination resistors. VCCO12 services both channel 1 and channel 2. 25 1 29 97 NCL2 30 96 CL2 31 95 NCH2 32 94 CH2 33 93 NCL1 34 92 CL1 35 91 NCH1 36 90 CH1 37 89 CPHV2 Channel 2 High-Clamp Reference Input 38 88 CPLV2 Channel 2 Low-Clamp Reference Input 39 87 DHV2 Channel 2 Driver-High Reference Input 40 86 DLV2 Channel 2 Driver-Low Reference Input 41 85 DTV2 Channel 2 Driver-Termination Reference Input 42 84 CHV2 Channel 2 High-Comparator Reference Input 43 83 CLV2 Channel 2 Low-Comparator Reference Input 44 82 CPHV1 Channel 1 High-Clamp Reference Input 45 81 CPLV1 Channel 1 Low-Clamp Reference Input 46 80 DHV1 Channel 1 Driver-High Reference Input 47 79 DLV1 Channel 1 Driver-Low Reference Input 48 78 DTV1 Channel 1 Driver-Termination Reference Input 49 77 CHV1 Channel 1 High-Comparator Reference Input 50 76 CLV1 Channel 1 Low-Comparator Reference Input 53 73 DUT1 Channel 1 Device Under Test Input/Output. Combined I/O for driver, comparator, and clamp. 57, 69 57, 69 N.C. No Connection. Leave open. Channel 2 Low-Comparator Output. Differential output of channel 2 low comparator. Channel 2 High-Comparator Output. Differential output of channel 2 high comparator. Channel 1 Low-Comparator Output. Differential output of channel 1 low comparator. Channel 1 High-Comparator Output. Differential output of channel 1 high comparator. 59 67 DUT2 Channel 2 Device Under Test Input/Output. Combined I/O for driver, comparator, and clamp. 63 63 TEMP Temperature Monitor Output ______________________________________________________________________________________ Quad, Low-Power, 500Mbps ATE Driver/Comparator PIN NAME FUNCTION MAX9963 MAX9964 67 59 DUT3 Channel 3 Device Under Test Input/Output. Combined I/O for driver, comparator, and clamp. 73 53 DUT4 Channel 4 Device Under Test Input/Output. Combined I/O for driver, comparator, and clamp. 76 50 CLV4 Channel 4 Low-Comparator Reference Input 77 49 CHV4 Channel 4 High-Comparator Reference Input 78 48 DTV4 Channel 4 Driver-Termination Reference Input 79 47 DLV4 Channel 4 Driver-Low Reference Input 80 46 DHV4 Channel 4 Driver-High Reference Input 81 45 CPLV4 Channel 4 Low-Clamp Reference Input 82 44 CPHV4 Channel 4 High-Clamp Reference Input 83 43 CLV3 Channel 3 Low-Comparator Reference Input 84 42 CHV3 Channel 3 High-Comparator Reference Input 85 41 DTV3 Channel 3 Driver-Termination Reference Input 86 40 DLV3 Channel 3 Driver-Low Reference Input 87 39 DHV3 Channel 3 Driver-High Reference Input 88 38 CPLV3 Channel 3 Low-Clamp Reference Input 89 37 CPHV3 Channel 3 High-Clamp Reference Input 90 91 92 93 94 95 96 97 36 35 34 33 32 31 30 29 CH4 NCH4 CL4 NCL4 CH3 NCH3 CL3 NCL3 Channel 4 High-Comparator Output. Differential output of channel 4 high comparator. Channel 4 Low-Comparator Output. Differential output of channel 4 low comparator. Channel 3 High-Comparator Output. Differential output of channel 3 high comparator. Channel 3 Low-Comparator Output. Differential output of channel 3 low comparator. Detailed Description The MAX9963/MAX9964 four-channel, high-speed pin electronics driver and comparator ICs for automatic test equipment include, for each channel, a three-level pin driver, a dual comparator, and variable clamps (Figure 1). The driver features a -1.5V to +6.5V operating range and high-speed operation, including high-Z and active termination (3rd-level drive) modes, which is highly linear even at low-voltage swings. The comparator provides low timing dispersion regardless of changes in input slew rate and pulse width. The clamps provide damping of high-speed DUT_ waveforms when the device is configured as a high-impedance receiver. Each of the four channels has high-speed, differential inputs compatible with ECL, LVPECL, LVDS, and GTL signal levels, with optional 100Ω differential input terminations. Optional internal resistors at DATA_ and RCV_ provide differential termination of LVDS inputs. Optional internal resistors at CH_ and CL_ provide the pullup voltage and source termination for open-collector comparator outputs. These options significantly reduce the discrete component count on the circuit board. The MAX9963/MAX9964 are available in two grade options. An A-grade version provides tighter matching of gain and offset of the drivers, and tighter offset matching of the comparators. This allows reference levels to be shared across multiple channels in cost-sensitive systems. A B-grade version provides lower cost for system designs that incorporate independent reference levels for each channel. ______________________________________________________________________________________ 17 MAX9963/MAX9964 Pin Description (continued) MAX9963/MAX9964 Quad, Low-Power, 500Mbps ATE Driver/Comparator ONE OF FOUR IDENTICAL CHANNELS SHOWN DLV_ DHV_ DTV_ MAX9963 MAX9964 SLEWRATE CONTROL MULTIPLEXER BUFFER 50Ω DUT_ OPTIONAL SC0 SC1 LLEAK 100Ω DATA_ NDATA_ RCV_ NRCV_ HIGH-Z 100Ω TMSEL OPTIONAL CPHV_ CLAMPS CPLV_ CHV_ CH_ NCH_ 7Ω 4 x 43Ω OPTIONAL VCCO_ _ COMPARATORS 7Ω CL_ NCL_ CLV_ TEMP CH_ MODE BITS LLEAK CS SCLK DIN SERIAL INTERFACE RST SERIAL INTERFACE IS COMMON TO ALL FOUR CHANNELS. MODE BITS ARE INDEPENDENTLY LATCHED FOR EACH CHANNEL. SC0 VEE SC1 TMSEL Figure 1. MAX9963/MAX9964 Block Diagram 18 VCC ______________________________________________________________________________________ GND Quad, Low-Power, 500Mbps ATE Driver/Comparator MAX9963/MAX9964 HIGHSPEED INPUTS REFERENCE INPUTS 0 DLV_ 0 1 DHV_ SLEW RATE BUFFER 0 1 DTV_ 0 50Ω DUT_ 1 DATA_ HIGH-Z RCV_ CPHV_ CLAMPS MODE LLEAK SC1 SC0 TMSEL CPLV_ 4 COMPARATORS Figure 2. Simplified Driver Channel Table 1. Slew Rate Logic The MAX9963/MAX9964 modal operation is programmed through a 3-wire, low-voltage CMOS-compatible serial interface. SC1 SC0 DRIVER SLEW RATE (%) 0 0 100 0 1 75 Output Driver 1 0 50 1 1 25 The driver input is a high-speed multiplexer that selects one of three voltage inputs, DHV_, DLV_, or DTV_. This switching is controlled by high-speed inputs DATA_ and RCV_, and mode control bit TMSEL. A slew rate circuit controls the slew rate of the buffer input. One of four possible slew rates can be selected (Table 1). The slew rate of the internal multiplexer sets the 100% driver slew rate (see the Driver Large-Signal Response graph in the Typical Operating Characteristics). DUT_ can be toggled at high speed between the buffer output and high-impedance mode, or it can be placed in low-leakage mode (Figure 2, Table 2). In high-impedance mode, the clamps are connected. This switching is controlled by high-speed input RCV_ and mode control bits TMSEL and LLEAK. In high-impedance mode, the bias current at DUT_ is less than 3µA, while the node maintains its ability to track high-speed signals. In Table 2. Driver Logic EXTERNAL CONNECTIONS INTERNAL CONTROL REGISTER DRIVER OUTPUT DATA_ RCV_ TMSEL LLEAK 1 0 X 0 Drive to DHV_ 0 0 X 0 Drive to DLV_ X 1 1 0 Drive to DTV_ (term mode) X 1 0 0 High-impedance (high-z) mode X X X 1 Low-leakage mode ______________________________________________________________________________________ 19 MAX9963/MAX9964 Quad, Low-Power, 500Mbps ATE Driver/Comparator low-leakage mode, the bias current at DUT_ is further reduced to less than 15nA, and signal tracking slows. The nominal driver output resistance is 50Ω. Contact the factory for different resistance values within the 45Ω to 51Ω range. Clamps A pair of voltage clamps (high and low) can be configured to limit the voltage at DUT_, and to suppress reflections when the channel is configured as a highimpedance receiver. The clamps behave as diodes connected to the outputs of high-current buffers. Internal circuitry compensates for the diode drop at 1mA clamp current. Set the clamp voltages using external connections CPHV_ and CPLV_. The clamps are enabled only when the driver is in the high-impedance mode (Figure 2). For transient suppression, set the clamp voltages to approximately the minimum and maximum expected DUT_ voltage range. The optimal clamp voltages are application specific and must be empirically determined. If clamping is not desired, set the clamp voltages at least 0.7V outside the expected Table 3. Comparator Logic DUT_ > CHV_ DUT_ > CLV_ CH_ CL_ 0 0 0 0 0 1 0 1 1 0 1 0 1 1 1 1 DUT_ voltage range; overvoltage protection remains active without loading DUT_. Comparators The MAX9963/MAX9964 have two independent highspeed comparators for each channel. Each comparator has one input connected internally to DUT_ and the other input connected to either CHV_ or CLV_ (Figure 1). Comparator outputs are a logical result of the input conditions, as indicated in Table 3. Three configurations are available for the comparator differential outputs to ease interfacing with a wide variety of logic families. An open-collector configuration switches an 8mA current source between the two outputs. This configuration is available with and without internal termination resistors connected to VCCO_ _ (Figure 3). For versions without internal termination resistors, leave V CCO_ _ unconnected and add the required external resistors. These resistors are typically 50Ω to the pullup voltage at the receiving end of the output trace. Alternate configurations can be used, provided that the Absolute Maximum Ratings are not exceeded. For versions with internal terminations, connect VCCO_ _ to the desired VOH voltage. Each output provides a nominal 400mVP-P swing and 50Ω source termination. CH_ 100Ω DUT_ CH_ 8mA DUT_ CHV_ 100Ω CHV_ NCH_ VEE NCH_ VCCO_ _ 7Ω CL_ 4 x 43Ω OPTIONAL VCCO_ _ 100Ω 7Ω 8mA CL_ CLV_ 100Ω CLV_ VEE Figure 3. Open-Collector Comparator Outputs 20 NCL_ NCL_ Figure 4. Open-Emitter Comparator Outputs ______________________________________________________________________________________ Quad, Low-Power, 500Mbps ATE Driver/Comparator BIT NAME DESCRIPTION D7 1E Channel 1 Write Enable. Set to 1 to update the control byte for channel 1. Set to zero to make no changes to channel 1. D6 2E Channel 2 Write Enable. Set to 1 to update the control byte for channel 2. Set to zero to make no changes to channel 2. D5 3E Channel 3 Write Enable. Set to 1 to update the control byte for channel 3. Set to zero to make no changes to channel 3. D4 4E Channel 4 Write Enable. Set to 1 to update the control byte for channel 4. Set to zero to make no changes to channel 4. D3 LLEAK Low-Leakage Select. Set to 1 to put driver and clamps into a low-leakage mode. Comparators remain active in lowleakage mode. Set to zero for normal operation. D2 SC1 D1 SC0 D0 TMSEL Driver Slew-Rate Select. SC1 and SC0 set the driver slew rate. See Table 1. An open-emitter configuration is also available (Figure 4). Connect an external collector voltage to VCCO_ _ and add external pulldown resistors. These resistors are typically 50Ω to VCCO_ _ - 2V at the receiving end of the output trace. Alternate configurations can be used, provided that the Absolute Maximum Ratings are not exceeded. Low-Leakage Mode, LLEAK Asserting LLEAK through the serial port or with RST places the MAX9963/MAX9964 into a very-low-leakage state in which the DUT_ input current is less than 10nA over the 0 to 3V range. In this mode, the comparators still function at full speed but the driver and clamps are disabled. This mode is convenient for making IDDQ and PMU measurements without the need for an output disconnect relay. LLEAK is programmed independently for each channel. If DUT_ is driven with a high-speed signal while LLEAK is asserted, leakage current momentarily increases beyond the limits specified for normal operation. The low-leakage recovery specification in the Electrical Characteristics table indicates device behavior under this condition. Temperature Monitor Each device supplies a single temperature output signal, TEMP, that asserts a nominal output voltage of 3.43V at a die temperature of +70°C (343K). The output voltage increases proportionately with temperature at a rate of 10mV/°C. The temperature sensor output impedance is 15kΩ (typ). Driver Termination Select. Set to 1 to force the driver output to the DTV_ voltage (term mode) when RCV_ = 1. Set to zero to place the driver into a highimpedance state (high-Z mode) when RCV_ = 1. See Table 2. tCH SCLK tCSS0 tCSS1 tCL tCSH1 CS tCSWH tDH tDS DIN D7 D6 D5 D4 D3 D2 D1 D0 Figure 5. Serial Interface Timing ______________________________________________________________________________________ 21 MAX9963/MAX9964 Table 4. Shift Register Functions MAX9963/MAX9964 Quad, Low-Power, 500Mbps ATE Driver/Comparator Serial Interface and Device Control Heat Removal A CMOS-compatible serial interface controls the MAX9963/MAX9964 modes (Figure 6). Control data flow into an 8-bit shift register (MSB first) and are latched when CS is taken high, as shown in Figure 5. Data from the shift register are then loaded into any or all of a group of four quad latches, determined by bits D4 through D7, as indicated in Figure 6 and Table 4. The quad latches contain the 4 mode bits for each channel of the quad pin driver. The mode bits, in conjunction with external inputs DATA_ and RCV_, manage the features of each channel, as shown in Tables 1 and 2. RST sets LLEAK=1 for all channels, forcing them into lowleakage mode. All other bits are unaffected. At powerup, hold RST low until VCC and VEE have stabilized. These devices require heat removal under normal circumstances through the exposed pad, either by soldering to circuit board copper (MAX9964) or by use of an external heat sink (MAX9963). The exposed pad is electrically at VEE potential for both package types, and must be either connected to VEE or isolated. Chip Information TRANSISTOR COUNT: 6499 PROCESS: Bipolar Package Information For the latest package outline information, go to www.maxim-ic.com/packages. SHIFT REGISTER SCLK 0 DIN CS 1 2 3 4 5 6 7 ENABLE F/F 3 7 D F/F 3 Q 6 ENABLE D F/F 3 Q 5 ENABLE RST D F/F 3 Q 4 ENABLE RST D Q ENABLE RST RST RST F/F 0-2 7 D ENABLE F/F 0-2 Q 3 1 6 D ENABLE F/F 0-2 Q 3 1 5 D ENABLE F/F 0-2 Q 3 1 4 D ENABLE Q 3 1 TMSEL, SC0, SC1 LLEAK TMSEL, SC0, SC1 LLEAK TMSEL, SC0, SC1 LLEAK TMSEL, SC0, SC1 LLEAK MODE BITS CHANNEL 1 MODE BITS CHANNEL 2 MODE BITS CHANNEL 3 MODE BITS CHANNEL 4 Figure 6. Serial Interface 22 ______________________________________________________________________________________ Quad, Low-Power, 500Mbps ATE Driver/Comparator PART ACCURACY GRADE COMPARATOR OUTPUT TYPE COMPARATOR OUTPUT TERMINATION HIGH-SPEED DIGITAL INPUT TERMINATION HEAT EXTRACTION PIN-PACKAGE MAX9963ADCCQ* A Open collector None None Top 100 TQFP-EPR MAX9963AKCCQ* A Open collector None 100Ω LVDS Top 100 TQFP-EPR MAX9963AGCCQ* A Open collector 50Ω to VCCO_ _ 100Ω LVDS Top 100 TQFP-EPR MAX9963AHCCQ* A Open emitter None None Top 100 TQFP-EPR MAX9963AJCCQ A Open emitter None 100Ω LVDS Top 100 TQFP-EPR MAX9963BDCCQ* B Open collector None None Top 100 TQFP-EPR MAX9963BKCCQ* B Open collector None 100Ω LVDS Top 100 TQFP-EPR MAX9963BGCCQ B Open collector 50Ω to VCCO_ _ 100Ω LVDS Top 100 TQFP-EPR MAX9963BHCCQ* B Open emitter None None Top 100 TQFP-EPR MAX9963BJCCQ* B Open emitter None 100Ω LVDS Top 100 TQFP-EPR MAX9964ADCCQ* A Open collector None None Bottom 100 TQFP-EP MAX9964AKCCQ* A Open collector None 100Ω LVDS Bottom 100 TQFP-EP MAX9964AGCCQ* A Open collector 50Ω to VCCO_ _ 100Ω LVDS Bottom 100 TQFP-EP MAX9964AHCCQ* A Open emitter None None Bottom 100 TQFP-EP MAX9964AJCCQ* A Open emitter None 100Ω LVDS Bottom 100 TQFP-EP MAX9964BDCCQ* B Open collector None None Bottom 100 TQFP-EP MAX9964BKCCQ* B Open collector None 100Ω LVDS Bottom 100 TQFP-EP MAX9964BGCCQ B Open collector 50Ω to VCCO_ _ 100Ω LVDS Bottom 100 TQFP-EP MAX9964BHCCQ* B Open emitter None None Bottom 100 TQFP-EP MAX9964BJCCQ* B Open emitter None 100Ω LVDS Bottom 100 TQFP-EP *Future product—contact factory for availability. ______________________________________________________________________________________ 23 MAX9963/MAX9964 Selector Guide Quad, Low-Power, 500Mbps ATE Driver/Comparator MAX9963/MAX9964 Pin Configurations VCC VEE GND NCL3 CL3 NCH3 CH3 NCL4 CL4 NCH4 CH4 CPHV3 CPLV3 DHV3 DLV3 DTV3 CHV3 CLV3 CPHV4 CPLV4 DHV4 DLV4 DTV4 CHV4 CLV4 TOP VIEW 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 VCCO34 1 75 GND DATA4 2 74 VCC NDATA4 3 73 DUT4 RCV4 4 72 VEE NRCV4 5 71 VEE DATA3 6 70 GND NDATA3 7 69 N.C. RCV3 8 68 VCC NRCV3 9 67 DUT3 VEE 10 66 VEE GND 11 65 VEE RST 12 64 GND CS 13 63 TEMP SCLK 14 62 GND DIN 15 61 VEE VCC 16 60 VEE NRCV2 17 59 DUT2 RCV2 18 58 VCC NDATA2 19 57 N.C. DATA2 20 56 GND NRCV1 21 55 VEE MAX9963 37 38 39 40 41 42 43 44 45 46 47 48 49 50 DTV1 CLV1 36 CHV1 35 DLV1 34 DHV1 33 CPLV1 32 CPHV1 31 CLV2 30 CHV2 29 DTV2 28 DLV2 27 DHV2 26 CPLV2 GND CPHV2 51 CH1 25 NCH1 VCCO12 CL1 VCC NCL1 52 CH2 24 NCH2 DATA1 CL2 DUT1 GND VEE 53 NCL2 54 23 VEE 22 VCC RCV1 NDATA1 TQFP-EPR 24 ______________________________________________________________________________________ Quad, Low-Power, 500Mbps ATE Driver/Comparator VCC VEE GND NCL2 CL2 NCH2 CH2 NCL1 CL1 NCH1 CH1 CPHV2 CPLV2 DHV2 DLV2 DTV2 CHV2 CLV2 CPHV1 CPLV1 DHV1 DLV1 DTV1 CHV1 CLV1 TOP VIEW 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 VCCO12 1 75 GND DATA1 2 74 VCC NDATA1 3 73 DUT1 RCV1 4 72 VEE NRCV1 5 71 VEE DATA2 6 70 GND NDATA2 7 69 N.C. RCV2 8 68 VCC NRCV2 9 67 DUT2 VCC 10 66 VEE DIN 11 65 VEE SCLK 12 64 GND CS 13 63 TEMP RST 14 62 GND GND 15 61 VEE VEE 16 60 VEE NRCV3 17 59 DUT3 RCV3 18 58 VCC NDATA3 19 57 N.C. DATA3 20 56 GND NRCV4 21 55 VEE RCV4 22 54 VEE NDATA4 23 53 DUT4 DATA4 24 52 VCC VCCO34 25 51 GND 42 43 44 45 46 47 48 49 50 DTV4 CLV4 CH4 41 CHV4 CL4 NCH4 40 DLV4 NCL4 39 DHV4 CH3 38 CPLV4 NCH3 37 CPHV4 36 CLV3 35 DTV3 34 CHV3 33 DLV3 32 DHV3 31 CPLV3 30 CPHV3 29 CL3 VEE 28 GND 27 NCL3 26 VCC MAX9964 TQFP-EP Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 25 © 2004 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products. MAX9963/MAX9964 Pin Configurations (continued)