19-0383; Rev 0; 7/05 Quad, Low-Power, 1200Mbps ATE Driver The MAX9977 quad, low-power, high-speed, pin-electronics driver includes, for each channel, a three-level pin driver. The driver features a wide voltage range and high-speed operation, includes high-impedance and active-termination (3rd-level drive) modes, and is highly linear even at low voltage swings. The MAX9977 provides high-speed, differential control inputs with internal 50Ω (100Ω LVDS) termination resistors that allow compatibility with 1.8V and 3.5V terminated 0.4VP-P CML, reducing the discrete component count required on the circuit board. The MAX9977AD has no internal termination. A 3-wire, low-voltage, CMOS-compatible serial interface programs the low-leakage and tri-state/terminate operational configurations of the MAX9977. The MAX9977’s operating range is -1.5V to +6.5V (consult factory for other operating ranges), and features a maximum power dissipation of only 0.8W per channel. The device is available in a 100-pin, 14mm x 14mm x 0.1mm body, and 0.5mm pitch TQFP. An exposed 8mm x 8mm die pad on the top of the package facilitates efficient heat removal. The device is specified to operate with an internal die temperature of +60°C to +100°C, and features a die temperature monitor output. Applications Medium-Performance System-on-Chip ATE and Memory Applications Features ♦ Low Power Dissipation: 0.8W/Channel ♦ High Speed: 1200Mbps at 3VP-P and 1800Mbps at 1VP-P ♦ Low Timing Dispersion ♦ Wide -1.5V to +6.5V Operating Range ♦ Interfaces Easily with Most Logic Families ♦ Active Termination (3rd-Level Drive) ♦ Internal 50Ω Termination Resistors on Control Inputs ♦ Low Gain and Offset Errors ♦ Pin Compatible with the MAX9963 and MAX9965 Quad Drivers Ordering Information TEMP RANGE PART PINPACKAGE EXPOSED PAD VARIATION CODE MAX9977AKCCQ 0°C to +70°C 100 TQFP-IDP** C100E-8R MAX9977AKCCQ+ 0°C to +70°C 100 TQFP-IDP** C100E-8R MAX9977ADCCQ* 0°C to +70°C 100 TQFP-IDP** C100E-8R MAX9977ADCCQ+* 0°C to +70°C 100 TQFP-IDP** C100E-8R *Future product—contact factory for availability. **IDP = Inverted die pad. +Denotes lead-free package. Pin Configuration and Selector Guide appear at end of data sheet. Functional Diagram CH_ MODE BITS VCC CS SCLK DIN TMSEL SERIAL INTERFACE LLEAK RST VEE SERIAL INTERFACE IS COMMON TO ALL FOUR CHANNELS. MODE BITS INDEPENDENTLY LATCHED FOR EACH CHANNEL. TEMP GND THR DLV_ 47Ω DHV_ MULTIPLEXER BUFFER DUT_ 0 DTV_ LLEAK GS OPTIONAL RDATA 2 x 50Ω OPTIONAL RRCV 2 x 50Ω VT _ _ MAX9977 DATA_ NDATA_ RCV_ NRCV_ HIGH IMPEDANCE ONE OF FOUR IDENTICAL CHANNELS SHOWN. TMSEL ________________________________________________________________ Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. 1 MAX9977 General Description MAX9977 Quad, Low-Power, 1200Mbps ATE Driver ABSOLUTE MAXIMUM RATINGS VCC to GND ............................................................-0.3V to +11V VEE to GND..........................................................-5.75V to +0.3V VCC - VEE ...........................................................-0.3V to +16.75V DUT_ to GND.......................................................-2.75V to +7.5V DATA_, NDATA_, RCV_, NRCV_ to GND .................-2.5V to +5V DATA_ to NDATA_, RCV_ to NRCV_ ..................................±1.5V VT12, VT34 to GND...................................................-2.5V to +5V DATA_, NDATA_, RCV_, NRCV_ to VT12 or VT34 .................±2V SCLK, DIN, CS, RST to GND ......................................-1V to +5V DHV_, DLV_, DTV_ to GND ...................................-2.5V to +7.5V DHV_ to DLV_ ......................................................................±10V DHV_ to DTV_ ......................................................................±10V DLV_ to DTV_.......................................................................±10V GS to GND .............................................................................±1V All Other Pins to GND ......................(VEE - 0.3V) to (VCC + 0.3V) TEMP Current...................................................-0.5mA to +20mA DUT_ Short Circuit to -1.5V to +6.5V..........................Continuous Continuous Power Dissipation (TA = +70°C) 100-Pin TQFP (derate 167mW/°C above +70°C) .........13.3W* Storage Temperature Range .............................-65°C to +150°C Junction Temperature .....................................................+150°C Lead Temperature (soldering, 10s) .................................+300°C *Dissipation wattage values are based on still air with no heat sink. Actual maximum power dissipation is a function of heat extraction technique and may be substantially higher. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (VCC = +9.75V, VEE = -4.75V, VGS = 0, VT12 = VT34 = 1.8V, TJ = +85°C, unless otherwise noted. All temperature coefficients are measured at TJ = +60°C to +100°C, unless otherwise noted.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS POWER SUPPLIES Positive Supply VCC 9.5 9.75 10.5 V Negative Supply VEE -5.25 -4.75 -4.50 V Positive Supply Current (Note 2) ICC Drivers active 192 215 Drivers in high impedance 175 196 Negative Supply Current (Note 2) IEE Drivers active -224 -251 Drivers in high impedance -207 -232 Power Dissipation (Note 2) PD Drivers active 3.0 3.3 Drivers in high impedance 2.7 3.1 mA mA W DUT_ CHARACTERISTICS Operating Voltage Range VDUT (Note 3) Leakage Current in High-Impedance Mode IDUT LLEAK = 0; VDUT_ = -1.5V, 0, +3V, +6.5V Leakage Current in Low-Leakage Mode Combined Capacitance CDUT -1.5 +6.5 V ±3 µA nA LLEAK = 1; VDUT_ = -1.5V, 0, +3V, +6.5V ±5 ±50 Driver in term mode (DUT_ = DTV_) 2 5 Driver in high-impedance mode 4 6 pF Low-Leakage Enable Time (Notes 4, 5) 20 µs Low-Leakage Disable Time (Notes 5, 6) 0.1 µs Low-Leakage Recovery Time to return to the specified maximum leakage after a 3V, 4V/ns step at DUT_ (Notes 5, 6) 5 µs 2 _______________________________________________________________________________________ Quad, Low-Power, 1200Mbps ATE Driver (VCC = +9.75V, VEE = -4.75V, VGS = 0, VT12 = VT34 = 1.8V, TJ = +85°C, unless otherwise noted. All temperature coefficients are measured at TJ = +60°C to +100°C, unless otherwise noted.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS ±25 µA CONTROL AND LEVELS INPUTS LEVEL PROGRAMMING INPUTS (DHV_, DLV_, DTV_) Input Bias Current IBIAS Settling Time To 0.1% of full-scale change 1 µs DIFFERENTIAL CONTROL INPUTS (DATA_, NDATA_, RCV_, NRCV_) Input High Voltage VIHD 0 3.5 V Input Low Voltage VILD -0.2 +3.2 V ±0.15 ±1.00 Differential Input Voltage VDIFF Input Termination Voltage VT_ _ Between differential inputs Between a differential input and its termination voltage 0 Between signal and corresponding termination voltage input Input Termination Resistor ±1.9 V +3.5 V 47.5 50 52.5 Ω 1.05 1.25 1.45 V SINGLE-ENDED CONTROL INPUTS (CS, SCLK, DIN, RST) Internal Threshold Reference Internal Reference Output Resistance External Threshold Reference VTHRINT RO 20 kΩ VTHR 0.43 1.73 V Input High Voltage VIH VTHR + 0.2 3.5 V Input Low Voltage VIL -0.1 VTHR 0.2 V Input Bias Current IB ±25 µA 50 MHz SERIAL INTERFACE TIMING (Figure 4) SCLK Frequency fSCLK SCLK Pulse-Width High tCH 8 ns SCLK Pulse-Width Low tCL 8 ns tCSS0 3.5 ns CS High to SCLK High Setup tCSS1 3.5 ns SCLK High to CS High Hold tCSH1 3.5 ns tDS 3.5 ns tDH 3.5 ns tCSWH 20 ns CS Low to SCLK High Setup DIN to SCLK High Setup DIN to SCLK High Hold CS Pulse-Width High TEMPERATURE MONITOR (TEMP) TJ = +70°C, RL ≥ 10MΩ Nominal Voltage Temperature Coefficient Output Resistance 3.33 V +10 mV/°C 20 kΩ _______________________________________________________________________________________ 3 MAX9977 ELECTRICAL CHARACTERISTICS (continued) MAX9977 Quad, Low-Power, 1200Mbps ATE Driver ELECTRICAL CHARACTERISTICS (continued) (VCC = +9.75V, VEE = -4.75V, VGS = 0, VT12 = VT34 = 1.8V, TJ = +85°C, unless otherwise noted. All temperature coefficients are measured at TJ = +60°C to +100°C, unless otherwise noted.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS ±15 mV DRIVERS (Note 7) DC OUTPUT CHARACTERISTICS (RL ≥ 10MΩ) DHV_, DLV_, DTV_ Output Offset Voltage Output Offset Voltage Due to Ground Sense VOS VGSOS At DUT_ with VDHV_, VDTV_, VDLV_ independently tested at +1.5V VGS = +100mV, VDHV_ = 6.5V + 100mV ±2 VGS = -100mV, VDLV_ = -1.5V - 100mV ±2 DHV_, DLV_, DTV_ Output Offset Temperature Coefficient DHV_, DLV_, DTV_ Gain mV +200 AV Measured with VDHV_, VDLV_, and VDTV_ at 0 and 4.5V 0.997 DHV_, DLV_, DTV_ Gain Temperature Coefficient 1.00 µV/°C 1.003 ppm/°C -50 Linearity Error V/V VDUT_ = 1.5V, 3V (Note 8) ±5 Full range (Notes 8, 9) ±15 mV DHV_ to DLV_ Crosstalk VDLV_ = 0; VDHV_ = 200mV, 6.5V ±2 mV DLV_ to DHV_ Crosstalk VDHV_ = 5V; VDLV_ = -1.5V, +4.8V ±2 mV DTV_ to DLV_ and DHV_ Crosstalk VDHV_ = 3V; VDLV_ = 0; VDTV_ = -1.5V, +6.5V ±2 mV DHV_ to DTV_ Crosstalk VDTV_ = 1.5V; VDLV_ = 0; VDHV_ = 1.6V, 3V ±2 mV DLV_ to DTV_ Crosstalk VDTV_ = 1.5V; VDHV_ = 3V; VDLV_ = 0, 1.4V ±2 mV (Note 10) ±18 mV/V ±80 mA 48 Ω DHV_, DTV_, DLV_ DC Power-Supply Rejection Ratio PSRR Maximum DC Drive Current IDUT_ DC Output Resistance RDUT_ DC Output Resistance Variation ∆RDUT_ ±40 IDUT_ = ±30mA (Note 11) 46 47 IDUT_ = ±1mA, ±8mA 0.5 1 IDUT_ = ±1mA, ±8mA, ±15mA, ±40mA 0.75 1.5 VDLV_ = 0, VDHV_ = 0.1V 15 22 VDLV_ = 0, VDHV_ = 1V 110 130 VDLV_ = 0, VDHV_ = 3V Ω DYNAMIC OUTPUT CHARACTERISTICS (ZL = 50Ω) AC Drive Current Drive-Mode Overshoot Drive-Mode Undershoot Term-Mode Spike High-Impedance-Mode Spike 4 ±80 mA 210 370 VDLV_ = 0, VDHV_ = 0.1V 4 11 VDLV_ = 0, VDHV_ = 1V 20 65 VDLV_ = 0, VDHV_ = 3V 30 185 VDHV_ = VDTV_ = 1V, VDLV_ = 0 180 250 VDLV_ = VDTV_ = 0, VDHV_ = 1V 180 250 VDLV_ = -1.0V, VDHV_ = 0 100 VDLV_ = 0, VDHV_ = 1V 100 _______________________________________________________________________________________ mV mV mV mV Quad, Low-Power, 1200Mbps ATE Driver (VCC = +9.75V, VEE = -4.75V, VGS = 0, VT12 = VT34 = 1.8V, TJ = +85°C, unless otherwise noted. All temperature coefficients are measured at TJ = +60°C to +100°C, unless otherwise noted.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Settling Time to within 25mV 3V step (Note 12) 4 ns Settling Time to within 5mV 3V step (Note 12) 40 ns TIMING CHARACTERISTICS (ZL = 50Ω) (Note 13) Prop Delay, Data to Output tPDD 1.2 Prop Delay Match, tLH vs. tHL 3VP-P Prop Delay Match, Drivers within Package (Note 14) Prop-Delay Temperature Coefficient Prop Delay Change vs. Pulse Width Prop Delay Change vs. Common-Mode Voltage 1.5 1.9 ns ±40 ±100 ps 40 ps +1.6 ps/°C 0.2VP-P, 40MHz, 0.6ns to 24.4ns pulse width, relative to 12.5ns pulse width ±25 ±50 1VP-P, 40MHz, 0.6ns to 24.4ns pulse width, relative to 12.5ns pulse width ±25 ±50 2VP-P, 40MHz, 0.75ns to 24.25ns pulse width, relative to 12.5ns pulse width ±30 ±55 3VP-P, 40MHz, 0.9ns to 24.1ns pulse width, relative to 12.5ns pulse width ±35 ±60 5VP-P, ZL = 500Ω, 40MHz, 1.4ns to 23.6ns pulse width, relative to 12.5ns pulse width ±100 VDHV_ - VDLV_ = 1V, VDHV_ = 0 to 6V ps 50 75 ps Prop Delay, Drive to High Impedance tPDDZ VDHV_ = 1.0V, VDLV_ = -1.0V, VDTV_ = 0 1.6 2.1 2.6 ns Prop Delay, High Impedance to Drive tPDZD VDHV_ = 1.0V, VDLV_ = -1.0V, VDTV_ = 0 2.6 3.2 3.9 ns Prop Delay Match, tPDDZ vs. tPDZD -1.5 -1.1 -0.7 ns Prop Delay Match, tPDDZ vs. tLH 0.2 0.6 1.0 ns Prop Delay, Drive to Term tPDDT VDHV_ = 3V, VDLV_ = 0, VDTV_ = 1.5V 1.3 1.8 2.3 ns Prop Delay, Term to Drive tPDTD VDHV_ = 3V, VDLV_ = 0, VDTV_ = 1.5V 1.6 2.1 2.7 ns Prop Delay Match, tPDDT vs. tPDTD -0.7 -0.3 -0.1 ns Prop Delay Match, tPDDT vs. tLH -0.1 +0.3 +0.7 ns 0.2VP-P, 10% to 90% 260 310 360 1VP-P, 10% to 90% 330 390 450 2VP-P, 10% to 90% 430 500 570 3VP-P, 10% to 90% 500 650 750 5VP-P, ZL = 500Ω, 10% to 90% 800 1000 1200 DYNAMIC PERFORMANCE (ZL = 50Ω) Rise and Fall Time tR, tF Rise and Fall Time Match tR vs. tF 3VP-P, 10% to 90% ±50 ps ps _______________________________________________________________________________________ 5 MAX9977 ELECTRICAL CHARACTERISTICS (continued) MAX9977 Quad, Low-Power, 1200Mbps ATE Driver ELECTRICAL CHARACTERISTICS (continued) (VCC = +9.75V, VEE = -4.75V, VGS = 0, VT12 = VT34 = 1.8V, TJ = +85°C, unless otherwise noted. All temperature coefficients are measured at TJ = +60°C to +100°C, unless otherwise noted.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS 0.2VP-P 550 1VP-P 550 2VP-P 650 750 3VP-P 850 1000 5VP-P, ZL = 500Ω 1300 0.2VP-P 1800 1VP-P 1800 2VP-P 1500 3VP-P 1200 5VP-P, ZL = 500Ω 800 Dynamic Crosstalk (Note 17) 15 Rise and Fall Time, Drive to Term tDTR, tDTF VDHV_ = 3V, VDLV_ = 0, VDTV_ = 1.5V, 10% to 90%, Figure 1a (Note 18) 0.6 1.0 1.3 ns Rise and Fall Time, Term to Drive tTDR, tTDF VDHV_ = 3V, VDLV_ = 0, VDTV_ = 1.5V, 10% to 90%, Figure 1b (Note 18) 0.6 1.0 1.3 ns Minimum Pulse Width (Note 15) Data Rate (Note 16) 630 ps Mbps mVP-P GROUND SENSE GS Voltage Range GS Input Bias Current VGS ±250 VGS = 0 mV ±25 µA Note 1: Unless otherwise specified, all minimum and maximum DC and AC driver 3V rise and fall time test limits are 100% tested at production. All other test limits are guaranteed by design. All tests are performed at nominal supply voltages, unless otherwise noted. Note 2: Total is for a quad device and is specified at the worst-case setting. The supply currents are measured with typical supply voltages. Note 3: Externally forced voltages may exceed this range provided that the Absolute Maximum Ratings are not exceeded. Note 4: Transition time from LLEAK being asserted to leakage current dropping below specified limits. Note 5: Based on simulation results only. Note 6: Transition time from LLEAK being deasserted to output returning to normal operating mode. Note 7: With the exception of offset and gain/CMRR tests, reference input values are calibrated for offset and gain. Note 8: Specifications measured at the end points of the full range. Full range is -1.3V ≤ VDHV_ ≤ +6.5V, -1.5V ≤ VDLV_ ≤ +6.3V, -1.5V ≤ VDTV_ ≤ +6.5V. Note 9: Relative to straight line between 0 and 4.5V. Note 10: Change in offset voltage with power supplies independently set to their minimum and maximum values. Note 11: Nominal target value is 47Ω. Contact factory for alternate trim selections within the 45Ω to 51Ω range. Note 12: Measured from the crossing point of DATA_ inputs to the settling of the driver output. Note 13: Prop delays are measured from the crossing point of the differential input signals to the 50% point of the expected output swing. Rise time of the differential inputs DATA_ and RCV_ are 250ps (10% to 90%). Note 14: Rising edge to rising edge or falling edge to falling edge. Note 15: Specified amplitude is programmed. At this pulse width, the output reaches at least 90% of its nominal (DC) amplitude. The pulse width is measured at DATA_. Note 16: Specified amplitude is programmed. Maximum data rate is specified in transitions per second. A square wave that reaches at least 90% of its programmed amplitude may be generated at one-half of this frequency. Note 17: Crosstalk from one driver to any other. Aggressor channel is driving 3VP-P into a 50Ω load. Victim channel is in term mode with VDTV_ = +1.5V. Note 18: Indicative of switching speed from DHV_ or DLV_ to DTV_ and DTV_ to DHV_ or DLV_ when VDLV_ < VDTV_ < VDHV_. If VDTV_ < VDLV_ or VDTV_ > VDHV_, switching speed is degraded by a factor of approximately 3. 6 _______________________________________________________________________________________ Quad, Low-Power, 1200Mbps ATE Driver MAX9977 tDTF 90% DHV_ 10% DTV_ 90% DLV_ 10% tDTR (a) DRIVE-TO-TERM RISE AND FALL TIME tTDR 90% DHV_ 10% DTV_ 90% DLV_ 10% tTDF (b) TERM-TO-DRIVE RISE AND FALL TIME Figure 1. Drive-to-Term and Term-to-Drive Rise and Fall Times Typical Operating Characteristics (VCC = +9.75V, VEE = -4.75V, VGS = 0, TJ = +85°C, unless otherwise noted.) VDHV_ = 100mV VDHV_ = 3V t = 2.0ns/div MAX9977 toc03 VDHV_ = 5V VDHV_ = 3V VDHV_ = 1V VDHV_ = 1V 0 0 VDLV_ = 0 RL = 500Ω VDUT_ = 1V/div VDHV_ = 200mV VDHV_ = 5V MAX9977 toc02 VDHV_ = 500mV VDLV_ = 0 RL = 50Ω VDUT_ = 500mV/div VDUT_ = 50mV/div VDLV_ = 0 RL = 50Ω DRIVER LARGE-SIGNAL RESPONSE INTO 500Ω DRIVER LARGE-SIGNAL RESPONSE MAX9977 toc01 DRIVER SMALL-SIGNAL RESPONSE 0 t = 2.0ns/div t = 2.0ns/div _______________________________________________________________________________________ 7 Typical Operating Characteristics (continued) (VCC = +9.75V, VEE = -4.75V, VGS = 0, TJ = +85°C, unless otherwise noted.) 0 0 MAX9977 toc06 VDLV_ = 0 VDHV_ = 3V RL = 50Ω VDUT_ = 250mV/div VDUT_ = 100mV/div VDLV_ = 0, VDHV_ = 1V, RL = 50Ω VDUT_ = 100mV/div VDLV_ = 0, VDHV_ = 1V, RL = 50Ω DRIVER 3V, 400Mbps SIGNAL RESPONSE MAX9977 toc05 DRIVER 1V, 1800Mbps SIGNAL RESPONSE MAX9977 toc04 DRIVER 1V, 600Mbps SIGNAL RESPONSE 0 t = 500ps/div t = 1ns/div DRIVER 3V, 1200Mbps SIGNAL RESPONSE DRIVER DYNAMIC CURRENT-LIMIT RESPONSE DRIVER 3V TRAILING-EDGE TIMING ERROR vs. PULSE WIDTH MAX9977 toc09 20 0 DRIVER SOURCING TIMING ERROR (ps) IDUT_ = 50mA/div VDUT_ = 250mV/div 40 MAX9977 toc08 MAX9977 toc07 t = 1ns/div VDLV_ = 0 VDHV_ = 3V RL = 50Ω 0 DRIVER SINKING -20 -40 -60 -80 0 NORMALIZED AT PW = 12.5ns PERIOD = 25ns, VDHV_ = +3V, VDLV_ = 0 -100 RL = 10Ω -120 t = 500ps/div t = 50ns/div 0 5 10 15 20 25 PULSE WIDTH (ns) DRIVER TIME DELAY vs. COMMON-MODE VOLTAGE DRIVER 1V TRAILING-EDGE TIMING ERROR vs. PULSE WIDTH DHV_ TO DTV_ TIME DELAY (ps) 0 -5 -10 -15 VDUT_ = 250mV/div 40 5 30 20 10 0 -20 -25 -10 -30 -20 0 5 10 15 PULSE WIDTH (ns) 8 50 MAX9977 toc12 10 MAX9977 toc11 NORMALIZED AT PW = 12.5ns PERIOD = 25ns, VDHV_ = +1V, VDLV_ = 0 15 DRIVE TO TERM TRANSITION 60 MAX9977 toc10 20 TIMING ERROR (ps) MAX9977 Quad, Low-Power, 1200Mbps ATE Driver 20 25 DLV_ TO DTV_ 0 RL = 50Ω NORMALIZED AT VCM = 1.5V -1 0 1 2 3 4 5 6 t = 2.0ns/div COMMON-MODE VOLTAGE (V) _______________________________________________________________________________________ Quad, Low-Power, 1200Mbps ATE Driver DRIVER LINEARITY ERROR vs. OUTPUT VOLTAGE 8 6 4 2 0 -2 DLV_ TO HIGH IMPEDANCE RL = 50Ω 2 1 -2 -4 4.5 5.5 6.5 -1.5 -0.5 0.5 VDHV_ = 5V VDTV_ = 1.5V 1.0 0.4 0.8 0.2 0 -0.2 0 -0.2 -1.0 2.5 3.5 4.5 5.5 6.5 -1.5 -0.5 0.5 1.5 2.5 3.5 4.5 5.5 VDLV_ (V) VDHV_ (V) CROSSTALK TO DUT_ FROM DTV_ WITH DUT_ = DHV_ CROSSTALK TO DUT_ FROM DTV_ WITH DUT_ = DLV_ CROSSTALK TO DUT_ FROM DLV_ WITH DUT_ = DTV_ VDHV_ = 3V VDLV_ = 0 1.0 0.6 0.2 0 -0.2 0.4 0.2 0 -0.2 -0.4 -0.4 -0.6 -0.6 -0.8 -0.8 NORMALIZED AT VDTV_ = 1.5V -1.0 -1.5 -0.5 0.5 1.5 2.5 VDTV_ (V) 3.5 4.5 5.5 6.5 VDHV_ = 6.5V VDLV_ = 0 0.6 VDUT_ ERROR (mV) 0.4 0.8 1.0 0.8 6.5 MAX9977 toc21 VDUT_ (V) VDHV_ = 6.5V VDTV_ = 1.5V 0.6 VDUT_ ERROR (mV) 0.8 1.5 NORMALIZED AT VDHV_ = 5V -1.0 MAX9977 toc20 1.0 -0.8 NORMALIZED AT VDLV_ = 0 -1.5 -0.5 0.5 VDLV_ = 0 VDTV_ = 1.5V 0.2 -3 6.5 6.5 0.4 -0.6 5.5 5.5 0.6 -0.8 4.5 4.5 CROSSTALK TO DUT_ FROM DHV_ WITH DUT_ = DLV_ -2 3.5 3.5 CROSSTALK TO DUT_ FROM DLV_ WITH DUT_ = DHV_ -0.4 2.5 2.5 VDUT_ (V) -0.6 1.5 1.5 VDUT_ (V) -0.4 0 MAX9977 toc15 0 -1 -1.5 -0.5 0.5 VDUT_ ERROR (mV) 3.5 VDUT_ ERROR (mV) 3 2.5 0.6 VDUT_ ERROR (mV) 4 MAX9977 toc19 LINEARITY ERROR (mV) 5 0.8 1.5 MAX9977 toc17 DUT_ = DTV_ VDLV_ = -1.5V VDHV_ = +6.5V 6 1.0 MAX9977 toc16 7 2 -8 -1.5 -0.5 0.5 DRIVER LINEARITY ERROR vs. OUTPUT VOLTAGE 4 -6 -4 t = 2.0ns/div DUT_ = DLV_ VDHV_ = +6.5V VDTV_ = 0 6 LINEARITY ERROR (mV) 0 DUT_ = DHV_ VDLV_ = -1.5V VDTV_ = 0 10 8 MAX9977 toc14 MAX9977 toc13 12 LINEARITY ERROR (mV) VDUT_ = 200mV/div DHV_ TO HIGH IMPEDANCE DRIVER LINEARITY ERROR vs. OUTPUT VOLTAGE MAX9977 toc18 DRIVE TO HIGH-IMPEDANCE TRANSITION 0.4 0.2 0 -0.2 -0.4 -0.6 NORMALIZED AT VDTV_ = 1.5V -1.0 -1.5 -0.5 0.5 1.5 2.5 VDTV_ (V) 3.5 4.5 5.5 6.5 -0.8 NORMALIZED AT VDLV_ = 0 -1.0 -1.5 -0.5 0.5 1.5 2.5 3.5 4.5 5.5 6.5 VDLV_ (V) _______________________________________________________________________________________ 9 MAX9977 Typical Operating Characteristics (continued) (VCC = +9.75V, VEE = -4.75V, VGS = 0, TJ = +85°C, unless otherwise noted.) Typical Operating Characteristics (continued) (VCC = +9.75V, VEE = -4.75V, VGS = 0, TJ = +85°C, unless otherwise noted.) CROSSTALK TO DUT_ FROM DHV_ WITH DUT_ = DTV_ 1.0008 0.2 1.0004 0 -0.2 1.0000 0.9998 -0.6 0.9996 -0.8 0.9994 -1.0 -1.5 -0.5 0.5 1.5 2.5 3.5 4.5 5.5 1 1.0002 -0.4 NORMALIZED AT VDHV_ = 3V 2 0.9992 -2 -3 -4 NORMALIZED AT TJ = +85°C NORMALIZED AT TJ = +85°C -5 60 6.5 0 -1 65 70 75 80 85 90 100 95 60 65 70 75 80 90 95 DIE TEMPERATURE (°C) DIE TEMPERATURE (°C) HIGH-IMPEDANCE CURRENT vs. DUT_ VOLTAGE LOW-LEAKAGE CURRENT vs. DUT_ VOLTAGE DRIVE 1V TO LOW-LEAKAGE TRANSITION 2 MAX9977 toc25 -0.55 -0.60 DUT_ LEAKAGE (nA) -0.65 -0.70 1 -0.75 -0.80 -0.85 -0.90 -0.95 -1.00 0 -1 -2 -3 -4 -1.05 -1.10 0 -5 1.5 2.5 3.5 4.5 5.5 6.5 -1.5 -0.5 0.5 1.5 VDUT_ (V) 2.5 3.5 4.5 5.5 6.5 t = 1ns/div 0 VDUT_ (V) LOW-LEAKAGE TO DRIVE 1V TRANSITION 1.25 MAX9977 toc28 1.20 DHV_ VDUT_ = 100mV/div REFERENCE CURRENT (µA) RL = 50Ω CL = 10pF DRIVER REFERENCE CURRENT vs. DRIVER REFERENCE VOLTAGE 0 MAX9977 toc29 -1.5 -0.5 0.5 1.15 DLV_ 1.10 DTV_ 1.05 1.00 0.95 0.90 0.85 0 t = 1ns/div -1.5 -0.5 0.5 100 RL = 50Ω CL = 10pF VDUT_ = 100mV/div -0.50 1.5 2.5 3.5 4.5 5.5 6.5 REFERENCE VOLTAGE (V) 10 85 VDHV_ (V) ______________________________________________________________________________________ MAX9977 toc27 1.0006 3 OFFSET (mV) 0.4 MAX9977 toc24 1.0010 GAIN (V/V) VDUT_ ERROR (mV) 0.6 MAX9977 toc23 VDTV_ = 1.5V VDLV_ = -1.5V DRIVER OFFSET vs. TEMPERATURE 4 MAX9977 toc26 0.8 DRIVER GAIN vs. TEMPERATURE 1.0012 MAX9977 toc22 1.0 IDUT_ (µA) MAX9977 Quad, Low-Power, 1200Mbps ATE Driver Quad, Low-Power, 1200Mbps ATE Driver SUPPLY CURRENT IEE vs. VOLTAGE CURRENT VEE SUPPLY CURRENT ICC vs. VOLTAGE CURRENT VCC 195 -195 A 190 -200 B -205 IEE (mA) 185 180 B 175 -210 -215 170 -220 165 -225 A -230 160 9.5 9.7 9.9 10.1 10.3 -5.25 10.5 -5.10 -4.95 200 -200 -205 8 6 2 IEE (mA) 185 180 ERROR (mV) -215 190 -220 -225 175 160 -10 85 90 TEMPERATURE (°C) 95 100 VDTV_ = 1.5V, RL = 10kΩ, NORMALIZED AT VGS = 0 -12 -240 80 VDUT_ = VDLV_ = -1.5V -4 -8 -235 165 0 -2 -6 -230 170 VDUT_ = VDHV_ = 3V 4 -210 195 ICC (mA) VDUT_ = VDTV_ = 1.5V, VDHV_ = 3V, VDLV_ = 0, RL = 10kΩ, VCC = 9.75V, VEE = -4.75V MAX9977 toc33 VDUT_ = VDTV_ = 1.5V, VDHV_ = 3V, VDLV_ = 0, RL = 10kΩ, VCC = 9.75V, VEE = -4.75V 205 -4.50 DRIVER OUTPUT-VOLTAGE ERROR vs. GROUND-SENSE VOLTAGE SUPPLY CURRENT IEE vs. TEMPERATURE MAX9977 toc32 210 -4.65 A: VDUT_ = VDTV_ = 1.5V, VDHV_ = 3V, VDLV_ = 0, RL = 10kΩ, VCC = 9.75V B: SAME AS A EXCEPT DRIVER IN HIGH-IMPEDANCE MODE A: VDUT_ = VDTV_ = 1.5V, VDHV_ = 3V, VDLV_ = 0, RL = 10kΩ, VEE = -4.75V B: SAME AS A EXCEPT DRIVER IN HIGH-IMPEDANCE MODE SUPPLY CURRENT ICC vs. TEMPERATURE -4.80 VEE (V) VCC (V) MAX9977 toc34 ICC (mA) MAX9977 toc31 -190 MAX9977 toc30 200 80 85 90 TEMPERATURE (°C) 95 100 -250 -150 -50 50 150 250 VGS (mV) ______________________________________________________________________________________ 11 MAX9977 Typical Operating Characteristics (continued) (VCC = +9.75V, VEE = -4.75V, VGS = 0, TJ = +85°C, unless otherwise noted.) Quad, Low-Power, 1200Mbps ATE Driver MAX9977 Pin Description PIN NAME FUNCTION 1 VT34 2 DATA4 3 NDATA4 4 RCV4 5 NRCV4 6 DATA3 7 NDATA3 8 RCV3 9 NRCV3 10, 27, 54, 55, 60, 61, 65, 66, 71, 72, 99 VEE Negative Power-Supply Input 11, 28, 51, 56, 62, 64, 70, 75, 98 GND Ground Connection 12 13 RST Reset Input. Asynchronous reset input for the serial register. RST is active low. See Figure 3. CS Chip-Select Input. Serial-port activation input. CS is active low. 14 SCLK Channel 3/4 Termination Voltage Input Differential Inputs, DATA3, NDATA3, RCV3, NRCV3, DATA4, NDATA4, RCV4, and NRCV4. See the Functional Diagram. Channel 4 Multiplexer Control Inputs. Differential controls DATA4 and NDATA4 select driver 4’s input from DHV4 or DLV4. Drive DATA4 above NDATA4 to select DHV4. Drive NDATA4 above DATA4 to select DLV4. See Table 1. Channel 4 Multiplexer Control Inputs. Differential controls RCV4 and NRCV4 place channel 4 into receive mode. Drive RCV4 above NRCV4 to place channel 4 into receive mode. Drive NRCV4 above RCV4 to place channel 4 into drive mode. See Table 1. Channel 3 Multiplexer Control Inputs. Differential controls DATA3 and NDATA3 select driver 3’s input from DHV3 or DLV3. Drive DATA3 above NDATA3 to select DHV3. Drive NDATA3 above DATA3 to select DLV3. See Table 1. Channel 3 Multiplexer Control Inputs. Differential controls RCV3 and NRCV3 place channel 3 into receive mode. Drive RCV3 above NRCV3 to place channel 3 into receive mode. Drive NRCV3 above RCV3 to place channel 3 into drive mode. See Table 1. Serial-Clock Input. Clock for serial port. 15 DIN Data Input. Serial-port data input. 16, 26, 52, 58, 68, 74, 100 VCC Positive Power-Supply Input 17 NRCV2 18 RCV2 19 NDATA2 20 DATA2 21 NRCV1 22 RCV1 23 NDATA1 24 DATA1 25 VT12 Channel 1/2 Termination Voltage Input Differential Inputs, DATA1, NDATA1, RCV1, NRCV1, DATA2, NDATA2, RCV2, and NRCV2. See the Functional Diagram. 29–38, 43, 44, 45, 49, 50, 57, 69, 76, 77, 81, 82, 83, 88–97 N.C. No Connection. Leave unconnected. 12 Channel 2 Multiplexer Control Inputs. Differential controls RCV2 and NRCV2 place channel 2 into receive mode. Drive RCV2 above NRCV2 to place channel 2 into receive mode. Drive NRCV2 above RCV2 to place channel 2 into drive mode. See Table 1. Channel 2 Multiplexer Control Inputs. Differential controls DATA2 and NDATA2 select driver 2’s input from DHV2 or DLV2. Drive DATA2 above NDATA2 to select DHV2. Drive NDATA2 above DATA2 to select DLV2. See Table 1. Channel 1 Multiplexer Control Inputs. Differential controls RCV1 and NRCV1 place channel 1 into receive mode. Drive RCV1 above NRCV1 to place channel 1 into receive mode. Drive NRCV1 above RCV1 to place channel 1 into drive mode. See Table 1. Channel 1 Multiplexer Control Inputs. Differential controls DATA1 and NDATA1 select driver 1’s input from DHV1 or DLV1. Drive DATA1 above NDATA1 to select DHV1. Drive NDATA1 above DATA1 to select DLV1. See Table 1. ______________________________________________________________________________________ Quad, Low-Power, 1200Mbps ATE Driver PIN NAME 39 DHV2 Channel 2 Driver High Voltage Input FUNCTION 40 DLV2 Channel 2 Driver Low Voltage Input 41 DTV2 42 GS 46 DHV1 Channel 1 Driver High Voltage Input 47 DLV1 Channel 1 Driver Low Voltage Input 48 DTV1 Channel 1 Driver Termination Voltage Input 53 DUT1 Channel 1 Device-Under-Test Input/Output 59 DUT2 Channel 2 Device-Under-Test Input/Output 63 TEMP Temperature Monitor Output, One per Device 67 DUT3 Channel 3 Device-Under-Test Input/Output 73 DUT4 Channel 4 Device-Under-Test Input/Output 78 DTV4 Channel 4 Driver Termination Voltage Input 79 DLV4 Channel 4 Driver Low Voltage Input 80 DHV4 Channel 4 Driver High Voltage Input Channel 2 Driver Termination Voltage Input Ground-Sense Voltage Input for All Channels 84 THR Single-Ended Logic Threshold Reference for All Channels 85 DTV3 Channel 3 Driver Termination Voltage Input 86 DLV3 Channel 3 Driver Low Voltage Input 87 DHV3 Channel 3 Driver High Voltage Input Detailed Description The MAX9977 low-power, high-speed, pin-electronics IC includes four three-level pin drivers. The drivers feature a -1.5V to +6.5V operating range and high-speed operation, include high-impedance and active-termination (3rd-level drive) modes, and are highly linear even at low voltage swings. Optional internal resistors at the high-speed inputs provide compatibility with CML interfaces and reduce the discrete component count on the circuit board. Connect the termination voltage inputs, VT12 and VT34, to a voltage appropriate for the drive circuits to terminate the multiplexer control inputs (see the Functional Diagram). A 3-wire, low-voltage CMOS-compatible serial interface programs the low-leakage and tri-state/terminate operational configurations of the MAX9977. Compatibility with the MAX9963 and MAX9965 To upgrade from the MAX9963 or MAX9965 to the MAX9977 take these steps: 1) GS on the MAX9977 is in the position of CHV2 on the MAX9963/MAX9965. Program CHV2 to zero volts. 2) THR on the MAX9977 is in the position of CHV3 on the MAX9963/MAX9965. If CHV3 is being controlled by a DAC that is referenced to ground sense, reassign this input to a reference that is not affected by changes in ground sense. 3) MAX9977AK DRV_ and RCV_ inputs have center taps V T 12 and V T 34 for the internal termination resistors in the positions of VCCO12 and VCCO34 of the MAX9963/MAX9965, the comparator-output resistor termination points. Bias these termination points accordingly. Output Driver The driver input is a high-speed multiplexer that selects one of three voltage inputs: DHV_, DLV_, or DTV_. This switching is controlled by high-speed inputs DATA_ and RCV_ and mode-control bit TMSEL (Table 1). DUT_ can be toggled at high speed between the buffer output and high-impedance mode, or it can be placed into low-leakage mode (Figure 2, Table 1). High-speed input RCV_ and mode-control bits TMSEL and LLEAK control the switching. In high-impedance mode, the bias current at DUT_ is less than 3µA over the -1.5V to +6.5V range, while the node maintains its ability to track ______________________________________________________________________________________ 13 MAX9977 Pin Description (continued) HIGH-SPEED INPUTS REFERENCE INPUTS DLV_ DHV_ 0 0 47Ω BUFFER 1 DUT_ 0 1 HIGH IMPEDANCE DTV_ DATA_ TMSEL RCV_ LLEAK MAX9977 Quad, Low-Power, 1200Mbps ATE Driver 2 SERIAL INTERFACE MAX9977 Figure 2. Simplified Driver Channel Serial Interface and Device Control Table 1. Driver Logic EXTERNAL CONNECTIONS INTERNAL CONTROL REGISTER DRIVER OUTPUT DATA RCV TMSEL LLEAK 1 0 X 0 Drive to DHV_ 0 0 X 0 Drive to DLV_ X 1 1 0 Drive to DTV_ (term mode) X 1 0 0 High-impedance mode (high-Z) X X X 1 Low-leakage mode high-speed signals. In low-leakage mode, the bias current at DUT_ is further reduced to less than 50nA, and signal tracking slows. See the Low-Leakage Mode, LLEAK section for more details. The nominal driver output resistance is 47Ω. Contact the factory for custom resistance values within the 45Ω to 51Ω range. 14 A CMOS-compatible serial interface controls the MAX9977 modes (Figure 3 and Table 2). Control data flow into an 8-bit shift register (MSB first) and are latched when CS is taken high, as shown in Figure 4. Latches contain 2 control bits for each channel of the MAX9977. Data from the shift register are then loaded to any or all of a group of four quad latches as determined by bits D4 and D7. The control bits, in conjunction with external inputs DATA_ and RCV_, manage the features of each channel. RST sets LLEAK = 1 for all channels, forcing them into low-leakage mode. All other bits are unaffected. At power-up, hold RST low until VCC and VEE have stabilized. Analog control input THR sets the threshold for the input logic, allowing operation with CMOS logic as low as 0.9V. Leaving THR unconnected results in a nominal threshold of 1.25V from an internal reference, providing compatibility with 2.5V to 3.3V logic. Low-Leakage Mode, LLEAK Asserting LLEAK through the serial port or with RST places the MAX9977 into a low-leakage state (see the Electrical Characteristics table). This mode is convenient ______________________________________________________________________________________ Quad, Low-Power, 1200Mbps ATE Driver MAX9977 SCLK UNUSED (= 0) UNUSED (= 0) LLEAK CH4 CH3 CH2 CH1 DIN TMSEL SHIFT REGISTER 0 1 2 3 4 5 6 7 MAX9977 CS ENABLE F/F 3 7 F/F F/F 3 Q D 6 ENABLE D 3 Q 5 ENABLE 4 ENABLE SET SET F/F 3 D D ENABLE SET SET RST F/F 0 7 D F/F F/F 0 Q 6 ENABLE D 0 Q 5 ENABLE D F/F 0 Q 4 ENABLE D Q ENABLE 20kΩ VTHRINT = 1.25V THR TMSEL LLEAK TMSEL LLEAK TMSEL LLEAK TMSEL LLEAK CHANNEL 1 MODE BITS CHANNEL 2 MODE BITS CHANNEL 3 MODE BITS CHANNEL 4 MODE BITS Figure 3. Serial Interface Table 2. Serial Interface Bit Description DESCRIPTION BIT STATE AFTER RESET AND AT POWER-UP BIT NAME D7 CH1 Channel 1 Write Enable. Set to 1 to update the control byte for channel 1. Set to 0 to make no changes to channel 1. 0 D6 CH2 Channel 2 Write Enable. Set to 1 to update the control byte for channel 2. Set to 0 to make no changes to channel 2. 0 D5 CH3 Channel 3 Write Enable. Set to 1 to update the control byte for channel 3. Set to 0 to make no changes to channel 3. 0 D4 CH4 Channel 4 Write Enable. Set to 1 to update the control byte for channel 4. Set to 0 to make no changes to channel 4. 0 D3 LLEAK Low-Leakage Select. Set to 1 to put driver in low-leakage mode. Set to 0 for normal operation. D2 UNUSED D1 UNUSED D0 TMSEL These bits are not used. Their logic state has no effect. Termination Select. Driver termination select bit. 1 X X 0 ______________________________________________________________________________________ 15 MAX9977 Quad, Low-Power, 1200Mbps ATE Driver tCH SCLK tCSS0 tCSS1 tCL tCSH1 CS tCSWH tDH tDS DIN D7 D6 D5 D4 D3 D2 D1 D0 Figure 4. Serial-Interface Timing for making IDDQ and PMU measurements without the need for an output disconnect relay. LLEAK is programmed independently for each channel. When DUT_ is driven with a high-speed signal while LLEAK is asserted, the leakage current momentarily increases beyond the limits specified for normal operation. The low-leakage recovery specification in the Electrical Characteristics table indicates device behavior under this condition. GS Input The ground-sense input, GS, provides a ground reference for the mux inputs. Connect GS to the ground of the DAC circuits driving DHV_, DTV_, and DLV_. To maintain an 8V range in the presence of GS variations, GS offsets DHV_, DLV_, and DTV_ ranges. Adequate supply headroom must be maintained in the presence of GS variations. Ensure: VCC ≥ 9.5V + Max (VGS) VEE ≤ -4.5V + Min (VGS) Temperature Monitor The MAX9977 supplies a temperature output signal, TEMP, that asserts a 3.33V nominal output voltage at a +70°C (343K) die temperature. The output voltage changes proportionally with temperature at 10mV/°C. 16 Heat Removal Under normal circumstances, the MAX9977 requires heat removal through the exposed pad by use of an external heat sink. The exposed pad is electrically at VEE potential, and must be either connected to VEE or isolated. θ JC of the exposed-pad package is approximately 1°C/W to 2°C/W. Die temperature is thus highly dependent upon the heat removal techniques used in the application. Maximum total power dissipation occurs under the following conditions: • • • • VCC = +10.5V VEE = -5.25V VDHV_ = 6.5V, DATA = HIGH Short-circuit current = 60mA Under these extreme conditions, the total power dissipation is 5.8W. If the die temperature cannot be maintained at an acceptable level under these conditions, use software clamping to limit the load output currents to lower values and/or reduce the supply voltages. Power-Supply Considerations Bypass all VCC and VEE power input pins with 0.01µF capacitors, and use bulk bypassing of at least 10µF on each supply. ______________________________________________________________________________________ Quad, Low-Power, 1200Mbps ATE Driver N.C. N.C. DTV4 DLV4 DHV4 N.C. N.C. N.C. THR DTV3 DLV3 DHV3 N.C. N.C. N.C. N.C. N.C. N.C. N.C. N.C. N.C. N.C. GND VEE VCC TOP VIEW 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 VT34 1 75 GND DATA4 2 74 VCC NDATA4 3 73 DUT4 RCV4 4 72 VEE MAX9977 NRCV4 5 71 VEE DATA3 6 70 GND NDATA3 7 69 N.C. RCV3 8 68 VCC NRCV3 9 67 DUT3 VEE 10 66 VEE GND 11 65 VEE RST 12 64 GND CS 13 63 TEMP SCLK 14 62 GND DIN 15 61 VEE VCC 16 60 VEE NRCV2 17 59 DUT2 RCV2 18 58 VCC NDATA2 19 57 N.C. DATA2 20 56 GND NRCV1 21 55 VEE RCV1 22 54 VEE NDATA1 23 53 DUT1 DATA1 24 52 VCC VT12 25 51 GND N.C. N.C. DTV1 DLV1 DHV1 N.C. N.C. N.C. GS DTV2 DLV2 DHV2 N.C. N.C. N.C. N.C. N.C. N.C. N.C. N.C. N.C. N.C. GND VEE VCC 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 TQFP-IDP Selector Guide PART HEAT INTERNAL DATA_ AND RCV_ TERMINATIONS EXTRACTION MAX9977AKCCQ 100Ω with center tap Top MAX9977ADCCQ* None Top Package Information For the latest package outline information, go to www.maxim-ic.com/packages. *Future product—contact factory for availability. Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 17 © 2005 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products, Inc. MAX9977 Pin Configuration