Migration Note - Eon Silicon Solution Inc.

Eon Silicon Solution Inc.
Migration Note
Eon Flash
From
To
P/N
EN29LV640T/B
EN29LV640AT/B
This Application Note may be revised by subsequent versions
or modifications due to changes in technical specifications.
Datasheet Version
Rev. H
Rev. B
1
©2010 Eon Silicon Solution Inc.
Rev. A, Issue Date: 2010/ 08/09
www.eonssi.com
Eon Silicon Solution Inc.
1. INTRODUCTION
The migration note introduces how to implement a system design from Eon flash
EN29LV640T/B to EN29LV640AT/B.
2. GENERAL FUNCTION COMPARISON TABLE:
The following table is major features of these two devices.
Features
Voltage Range
Pin to Pin
Access Time
EN29LV640T/B
EN29LV640AT/B
2.7V ~ 3.6V
48-pin TSOP (Type 1)
48-ball 6mm x 8mm TFBGA
- Full voltage range
(2.7V~3.6V):
Access times as fast as 90 ns
- Regulated voltage range
(3.0V~3.6V):
Access times as fast as 70ns
2.7V ~ 3.6V
48-pin TSOP (Type 1)
48-ball 6mm x 8mm TFBGA
90ns
Sector
Architecture
Secured Silicon
Sector
Byte/Word Mode
VID and VHH
Range
Erase
Suspend/Resume
8K-byte x8
32K-Word/64K-byte x127
8K-byte x8
32K-Word/64K-byte x127
N/A
128-Word/256-byte x1
Yes
Yes
10.5V – 11.5V
8.5V – 9.5V
Yes
Yes
Minimum
Endurance Cycle
100K
100K
48-pin TSOP (Type 1)
48-ball 6mm x 8mm TFBGA
48-pin TSOP (Type 1)
48-ball 6mm x 8mm TFBGA
Package
This Application Note may be revised by subsequent versions
or modifications due to changes in technical specifications.
2
©2010 Eon Silicon Solution Inc.
Rev. A, Issue Date: 2010/ 08/09
www.eonssi.com
Eon Silicon Solution Inc.
3. HARDWARE CONSIDERATIONS
3.1. ICC Comparison
Current
EN29LV640T/B
EN29LV640AT/B
Unit
Typ
Max
Typ
Max
Read ICC1
9
16
9
16
mA
Write ICC2
20
30
20
30
mA
Standby ICC3
1
5.0
1
5.0
μA
Note:There is no difference between EN29LV640T/B and EN29LV640AT/B.
3.2. Pin Descriptions
Pin Name
A0-A21
DQ0-DQ14
DQ15 / A-1
CE#
OE#
WE#
WP# / ACC
RESET#
BYTE#
RY/BY#
Vcc
Vss
NC
EN29LV640T/B
Function
22 Address inputs
15 Data Inputs/Outputs
DQ15 (data input/output, word
mode),
A-1 (LSB address input, byte
mode)
Chip Enable
Output Enable
Write Enable
Write Protect / Acceleration Pin
Hardware Reset Pin
Byte/Word Mode Selection
Ready/Busy Output
Supply Voltage (2.7-3.6V)
Ground
Not Connected to anything
EN29LV640AT/B
Pin Name
Function
A0-A21
22 Address inputs
DQ0-DQ14 15 Data Inputs/Outputs
DQ15 (data input/output, word
mode),
DQ15 / A-1
A-1 (LSB address input, byte
mode)
CE#
Chip Enable
OE#
Output Enable
WE#
Write Enable
WP# / ACC Write Protect / Acceleration Pin
RESET#
Hardware Reset Pin
BYTE#
Byte/Word Mode Selection
RY/BY#
Ready/Busy Output
Vcc
Supply Voltage (2.7-3.6V)
Vss
Ground
NC
Not Connected to anything
Note:There is no difference between EN29LV640T/B and EN29LV640AT/B.
This Application Note may be revised by subsequent versions
or modifications due to changes in technical specifications.
3
©2010 Eon Silicon Solution Inc.
Rev. A, Issue Date: 2010/ 08/09
www.eonssi.com
Eon Silicon Solution Inc.
4. Autoselect Codes (Using High Voltage, VID)
64M FLASH MANUFACTURER/DEVICE ID TABLE
Description
CE# OE# WE#
Manufacturer ID:
Eon
L
L
H
Device Word
ID
(top boot
Byte
sector)
L
L
H
L
L
H
Device
Word
ID
L
L
H
(bottom
boot
sector)
L
L
H
Byte
Sector
Protection
Verification
A21 A11
A5
DQ8
to
to A9 2 A8 A7 A6 to A1 A0
to
A12 A10
A2
DQ15
X
X
V ID
X
X
V ID
X
L
L
H
SA
X
X
B
B
V ID
B
V ID
B
DQ7
to
DQ0
P
P
H1
P
B
B
B
B
L
X
X
X
P
X
L
X
L
L
X
L
X
L
H
X
X
L
L
X
X
L
H
1Ch
X
7Fh
22h
C9h
X
C9h
22h
CBh
X
CBh
H
L
X
X
01h
(Protected)
00h
(Unprotected)
L=logic low= VIL, H=Logic High= VIH, VID = 9 ± 0.5V, X=Don’t Care (either L or H, but not
floating!), SA=Sector Addresses
Note:
1. A8 = H is recommended for Manufacturing ID check. If a manufacturing ID is read with
A8=L, the chip will output a configuration code 7Fh.
A9 must be ≤ Vcc (CMOS logic level) for
2.
A9 = VID is for HV A9 Autoselect mode only.
Command Autoselect Mode.
3.
There is no difference between EN29LV640T/B and EN29LV640AT/B.
This Application Note may be revised by subsequent versions
or modifications due to changes in technical specifications.
4
©2010 Eon Silicon Solution Inc.
Rev. A, Issue Date: 2010/ 08/09
www.eonssi.com
Eon Silicon Solution Inc.
5. SOFTWARE CONSIDERATIONS
5.1. 64M FLASH SECURED SILICON SECTOR TABLE 1
P
Description CE# OE# WE#
P
A21 A11
A5
DQ8
to
to
to A92 A8 A7 A6 to A1 A0
A12 A10
A2
DQ15
P
DQ7
to
DQ0
Secured
Silicon
L
X H L
X
X
L
V ID
X
X
V ID X X
Sector
Lock 3
Secured
X1h
Silicon
(Locked)
Sector
L
X H L
X
L
L
H
X
X
V ID X X
Lock Bit
X0h
Verification
(Unlocked)
3
(DQ0)
L=logic low= VIL, H=Logic High= VIH, VID = 9 ± 0.5V, X=Don’t Care (either L or H, but not
floating!), SA=Sector Addresses
B
P
B
B
B
B
B
P
P
P
Note:
1. 64M FLASH SECURED SILICON SECTOR TABLE is valid only in Secured Silicon
Sector which exists at EN29LV640AT/B.
A9 must be ≤ Vcc (CMOS logic level) for
2.
A9 = VID is for HV A9 Autoselect mode only.
Command Autoselect Mode.
3.
AC Waveform for Secured Silicon Sector Lock / Verification Operations Timings.
VID
Vcc
0V
0V
tVIDR
tVIDR
A6, A1, A0
Valid
Valid
Valid
Secured Silicon Sector Lock
Valid
Verify
>0.4μs
>1μs
Lock : 150μs
VID
This Application Note may be revised by subsequent versions
or modifications due to changes in technical specifications.
5
©2010 Eon Silicon Solution Inc.
Rev. A, Issue Date: 2010/ 08/09
www.eonssi.com
Eon Silicon Solution Inc.
5.1.1.
Top Boot Security Sector Address Table
Sector Address
A21 ~ A12
Sector Size
(bytes / words)
Address Range (h)
Byte Mode (x8)
Address Range (h)
Word Mode (x16)
1111111111
256 / 128
7FFF00–7FFFFF
3FFF80–3FFFFF
5.1.2.
Bottom Boot Security Sector Address Table
Sector Address
A21 ~ A12
Sector Size
(bytes / words)
Address Range (h)
Byte Mode (x8)
Address Range (h)
Word Mode (x16)
0000000000
256 / 128
000000–0000FF
000000–00007F
This Application Note may be revised by subsequent versions
or modifications due to changes in technical specifications.
6
©2010 Eon Silicon Solution Inc.
Rev. A, Issue Date: 2010/ 08/09
www.eonssi.com
Eon Silicon Solution Inc.
Command
Sequence
Cycles
5.2. Command Definitions
Bus Cycles
stP
Read
1
RA
RD
Reset
1
XXX
F0
Word
555
Manufacturer ID
4
Autoselect
Byte
Device ID
Top Boot
Device ID
Bottom Boot
Word
Byte
Word
Byte
4
4
Byte
4
Word
Chip Erase
6
Byte
Word
Byte
Sector Erase
6
AA
555
AAA
555
AAA
555
AAA
XXX
30
Enter Secured Silicon
Sector*
Exit Secured Silicon
Sector*
3
4
55
2AA
555
2AA
555
AA
1
AA
555
AAA
555
AAA
2AA
555
AA
Sector Erase Resume
1
55
555
AAA
555
AAA
90
90
555
55
AA
B0
Word
55
555
XXX
90
AAA
2AA
AA
1
Byte
Word
Byte
Word
Byte
555
2AA
555
2AA
555
AA
Sector Erase Suspend
CFI Query
2AA
55
AAA
Byte
3P Cycle
Addr Data
555
555
4
Word
Program
555
AAA
555
AAA
rdP
2P Cycle
Addr Data
AA
AAA
Word
Sector Protect
Verify
ndP
1P Cycle
Addr Data
90
AAA
55
55
55
555
A0
AAA
555
80
AAA
555
AAA
80
thP
4P Cycle
Addr Data
000
100
000
200
x01
x02
x01
x02
(SA)
X02
(SA)
X04
PA
555
AAA
555
AAA
thP
thP
5P Cycle
Addr Data
6P Cycle
Addr Data
2AA
555
7F
1C
7F
1C
22C9
C9
22CB
CB
00
01
00
01
08*
PD
AA
AA
55
555
2AA
555
55
AAA
SA
98
2AA
555
2AA
555
AA
AA
55
55
555
AAA
555
AAA
88
90
xxx
xxx
00
00
Address and Data values indicated are in hex. Unless specified, all bus cycles are write cycles
RA = Read Address: address of the memory location to be read. This is a read cycle.
RD = Read Data: data read from location RA during Read operation. This is a read cycle.
PA = Program Address: address of the memory location to be programmed. X = Don’t-Care
PD = Program Data: data to be programmed at location PA
SA = Sector Address: address of the Sector to be erased or verified.
Address bits A20-A12 uniquely select any Sector.
Note:
*
Only available at EN29LV640AT/B.
This Application Note may be revised by subsequent versions
or modifications due to changes in technical specifications.
7
©2010 Eon Silicon Solution Inc.
Rev. A, Issue Date: 2010/ 08/09
www.eonssi.com
10
30
Eon Silicon Solution Inc.
6. PERFORMANCE DIFFERENCES
6.1. Power-On and Hardware Reset (RESET#) Timings
Parameter
Description
tVCS
Vcc Setup Time
RESET# Pulse Width (During
Embedded Algorithms)
RESET# Pulse Width (NOT During
Embedded Algorithms)
Reset# High Time Before Read
RY/BY# Recovery Time ( to CE#,
OE# go low)
RY/BY# Recovery Time ( to WE#
go low)
Reset# Pin Low (During Embedded
Algorithms) to Read or Write
Reset# Pin Low (NOT During
Embedded Algorithms) to Read or
Write
tRP1
tRP2
tRH
tRB1
tRB2
tREADY1
tREADY2
EN29LV640T/B EN29LV640AT/B
50µs
50µs
10us
10µs
500ns
500ns
50ns
50ns
0ns
0ns
50ns
50ns
20µs
20µs
500ns
500ns
6.2. ERASE AND PROGRAM PERFORMANCE
The ERASE and PROGRAM Performance Comparison
EN29LV640T/B
Typ
Max
Parameter
EN29LV640AT/B
Typ
Max
Unit
Sector Erase Time
0.1
2
0.1
2
sec
Chip Erase Time
16
140
16
140
sec
Byte Programming Time
8
200
8
200
µs
Word Programming Time
8
200
8
200
µs
Accelerated Byte/Word Program
Time
7
120
7
200
µs
Byte
67.2
201.6
67.2
201.6
sec
Word
33.6
100.8
33.6
100.8
sec
Chip Programming Time
Word Programming Time
100K
100K
Cycles
Notes:
1. Typical program and erase times assume the following conditions: room temperature, 3V and checkerboard pattern
programmed.
2. Maximum program and erase times assume the following conditions: worst case Vcc, 90°C and 100,000 cycles.
This Application Note may be revised by subsequent versions
or modifications due to changes in technical specifications.
8
©2010 Eon Silicon Solution Inc.
Rev. A, Issue Date: 2010/ 08/09
www.eonssi.com
Eon Silicon Solution Inc.
Revisions List
Revision No Description
Date
A
2010/08/09
Initial Release
This Application Note may be revised by subsequent versions
or modifications due to changes in technical specifications.
9
©2010 Eon Silicon Solution Inc.
Rev. A, Issue Date: 2010/ 08/09
www.eonssi.com