CMLT5554 SURFACE MOUNT SILICON DUAL, COMPLEMENTARY HIGH VOLTAGE TRANSISTOR w w w. c e n t r a l s e m i . c o m The CENTRAL SEMICONDUCTOR CMLT5554 consists of one 2N5551 NPN silicon transistor and one individual isolated complementary 2N5401 PNP silicon transistor, manufactured by the epitaxial planar process and epoxy molded in an SOT-563 surface mount package. This device has been designed for high voltage amplifier applications. MARKING CODE: 5C4 SOT-563 CASE MAXIMUM RATINGS: (TA=25°C) Collector-Base Voltage Collector-Emitter Voltage Emitter-Base Voltage Continuous Collector Current Power Dissipation Operating and Storage Junction Temperature Thermal Resistance SYMBOL VCBO VCEO VEBO IC PD TJ, Tstg ΘJA ELECTRICAL CHARACTERISTICS: (TA=25°C unless otherwise noted) NPN (Q1) SYMBOL TEST CONDITIONS MIN MAX ICBO VCB=120V 50 ICBO VCB=100V ICBO VCB=120V, TA=100°C 50 ICBO VCB=100V, TA=150°C BVCBO IC=100μA 180 BVCEO IC=1.0mA 160 BVEBO IE=10μA 6.0 VCE(SAT) IC=10mA, IB=1.0mA 0.15 VCE(SAT) IC=50mA, IB=5.0mA 0.2 VBE(SAT) IC=10mA, IB=1.0mA 1.0 VBE(SAT) IC=50mA, IB=5.0mA 1.0 hFE VCE=5.0V, IC=1.0mA 80 hFE VCE=5.0V, IC=10mA 80 250 hFE VCE=5.0V, IC=50mA 30 fT VCE=10V, IC=10mA, f=100MHz 100 300 Cob VCB=10V, IE=0, f=1.0MHz 6.0 hfe VCE=10V, IC=1.0mA, f=1.0kHz 50 200 NF VCE=5.0V, IC=200μA, RS=10Ω, f=10Hz to 15.7kHz 8.0 NPN (Q1) 180 160 6.0 PNP (Q2) 160 150 5.0 600 350 -65 to +150 357 PNP MIN 160 150 5.0 50 60 50 100 40 (Q2) MAX 50 50 0.2 0.5 1.0 1.0 240 300 6.0 200 - 8.0 UNITS V V V mA mW °C °C/W UNITS nA nA μA μA V V V V V V V MHz pF dB R3 (29-June 2015) CMLT5554 SURFACE MOUNT SILICON DUAL, COMPLEMENTARY HIGH VOLTAGE TRANSISTOR SOT-563 CASE - MECHANICAL OUTLINE PIN CONFIGURATION LEAD CODE: 1) Emitter Q1 2) Base Q1 3) Collector Q2 4) Emitter Q2 5) Base Q2 6) Collector Q1 MARKING CODE: 5C4 R3 (29-June 2015) w w w. c e n t r a l s e m i . c o m