austriamicrosystems AG is now ams AG The technical content of this austriamicrosystems datasheet is still valid. Contact information: Headquarters: ams AG Tobelbaderstrasse 30 8141 Unterpremstaetten, Austria Tel: +43 (0) 3136 500 0 e-Mail: [email protected] Please visit our website at www.ams.com Datasheet AS3676 Flexible Lighting Management (CP, DCDC, 13 Current Sinks, ADC, LED Test, LDO, DLS and Ambient Light sensing) 1 General Description The AS3676 is part of the austriamicrosystems AS3675, AS3687/87XM and AS3689 lighting management unit family. It is software compatible to AS3687/87XM and AS3689 and pin and software compatible to AS3675. 2 Key Features High-Efficiency al id am lc s on A te G nt st il The AS3676 incorporates one Step Up DC/DC Converter for white backlight LEDs, one high-power Charge Pump, one Analog-to-Digital Converter, 13 current sinks, LED in-circuit function test, a two wire serial interface, and control logic all onto a single device. It supports ambient light sensor processing and a Dynamic Luminance Scaling (DLS) input. Output voltages and output currents are fully programmable. - Light Sensor input with internal hardware processing to control backlight according to ambient light using 3 groups - any current source can select one of the groups or no light sensor control Internal PWM Generation - 8 Bit resolution - Autonomous Logarithmic up/down dimming Led Pattern Generator - Autonomous driving for Fun RGB LEDs - Support indicator LEDs 10-bit Successive Approximation ADC - 27µs Conversion Time - Selectable Inputs: VANA/GPI, GPIO1/DLS, GPIO2/LIGHT, all current sources, VBAT, CPOUT, DCDC_FB - Internal Temp. Measurement - Light Sensor input with Java support (JSR-256): read ADC processed value Support for automatic LED testing (open and shorted LEDs can be identified) Strobe Timeout protection - Up to 1600ms - Three different timing modes Two General Purpose Inputs/Output - GPIO1/DLS, GPIO2/LIGHT - Digital Input, Digital Output using VANA/GPI supply and Tristate - GPIOs Programmable Pull-Up/Down Programmable LDO - 1.8 to 3.35V, 150mA - Programmable via Serial Interface Standby LDO always on - Regulated 2.5V max. output 10mA - 3µA Quiescent Current Audio can be used to drive RGB LED(s) - Color and Brightness depends on audio amplitude Wide Battery Supply Range: 3.0 to 5.5V Two Wire Serial Interface Control Over current and Thermal Protection WL-CSP30 3x2.5mm, 0.5mm pitch Package lv The AS3676 is a highly-integrated CMOS Power and Lighting Management Unit for mobile telephones, and other 1-cell Li+ or 3-cell NiMH powered devices. Step Up DC/DC Converter Te ch ni ca - Up to 26V/50mA for White LEDs - Programmable Output Voltage with External Resistors and Serial Interface - Over voltage Protection High-Efficiency High-Power Charge Pump - 1:1, 1:1.5, and 1:2 Mode - Automatic Up Switching (can be disabled and 1:2 mode can be blocked) - Output Current up to 400mA/500mA pulsed - Efficiency up to 95% - Very Low effective Resistance (2.5 typ. in 1:1.5) - Only 4 External Capacitors Required: 2 x 1µF Flying Capacitors, 2 x 2.2µF Input/Output Capacitors - Supports LCD White Backlight LEDs, or RGB LEDs 13 Current Sinks - All 13 current sinks fully Programmable (8-bit) from: 0.15mA to 38.5mA (up to 75.6mA for CURR30...CURR33) - Three current sinks are High Voltage capable (CURR1, CURR2, CURR6) - Programmable Hardware Control (Strobe, and Preview or PWM) - Selectively Enable/Disable Current Sinks - Dynamic Luminance Scaling (DLS) support to improve backlight operating time (can adjust any current source) www.austriamicrosystems.com/AS3676 (ptr) 3 Applications Power- and lighting-management for mobile telephones and other 1-cell Li+ or 3-cell NiMH powered devices. 1v1-4 1 - 91 AS3676 Datasheet - A p p l i c a t i o n s Figure 1. AS3676 Block Diagram &&= '!787 #$$!! 2' ; '&# 6%5& $ 1 2. C 8 -6%/= D(4(%56/& 04A+)64 am lc s on A te G nt st il %&'(%)* ,!- $ " $ $ 78 ! $! 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Pin Description for AS3676 Pin Name Type Description A1 GPIO1/DLS AIO Digital Luminance Scaling PWM input and General Purpose Input Output 1 A2 VANA/GPI AIO LDO Output/General Purpose Input A3 C2_N AIO Charge Pump flying capacitor; connect a ceramic capacitor of 500nF to this pin. A4 C1_P AIO Charge Pump flying capacitor; connect a ceramic capacitor of 500nF to this pin. A5 CPOUT AO Output voltage of the Charge Pump; connect a ceramic capacitor of 1µF (±20%). A6 DATA DIO Serial interface data input/output. B1 GPIO2/LIGHT AIO Ambient Light Sensor input and General Purpose Input Output 2 B2 VSS_CP B3 C1_N B4 C2_P B5 am lc s on A te G nt st il lv al id Pin Number Ground Pad for Charge Pump AIO Charge Pump flying capacitor; connect a ceramic capacitor of 500nF to this pin. AIO Charge Pump flying capacitor; connect a ceramic capacitor of 500nF to this pin. DCDC_GATE AO DCDC gate driver. B6 CLK DI Clock input for serial interface. C1 CURR41 AI Analog current sink input C2 RGB3 AI Analog current sink input C3 VSS GND Ground pad C4 VBAT S Supply pad. Connect to battery. C5 CURR30 AI Analog current sink input, intended for activity icon LED C6 DCDC_SNS AI Sense input of shunt resistor for Step Up DC/DC Converter. D1 CURR43 AI Analog current sink input D2 RGB1 AI Analog current sink input D3 CURR33 AI Analog current sink input, intended for activity icon LED D4 CURR31 AI Analog current sink input, intended for activity icon LED D5 CURR2 AI_HV Analog current sink input (intended for Keyboard backlight) DCDC_FB AI DCDC feedback. Connect to resistor string. CURR42 AI Analog current sink input ch E1 ni D6 ca GND RGB2 AI Analog current sink input E3 CURR32 AI Analog current sink input, intended for activity icon LED E4 CURR6 AI_HV Analog current sink input (intended for Keyboard backlight) Te E2 E5 CURR1 AI_HV Analog current sink input (intended for Keyboard backlight) E6 V2_5 AO3 Output voltage of the Low-Power LDO; always connect a ceramic capacitor of 1µF (±20%) or 2.2µF (+100%/-50%). www.austriamicrosystems.com/AS3676 1v1-4 4 - 91 AS3676 Datasheet - P i n o u t 4.1 Pin Definitions DI Digital Input DO Digital Output DIO Digital Input/Output AIO Analog Pad AI Analog Input AI_HV High-Voltage (26V) Pin AO3 Analog Output (3.3V) S Supply Pad GND Ground Pad lv Description Te ch ni ca am lc s on A te G nt st il Type al id Table 2. Pin Type Definitions www.austriamicrosystems.com/AS3676 1v1-4 5 - 91 AS3676 Datasheet - A b s o l u t e M a x i m u m R a t i n g s 5 Absolute Maximum Ratings Stresses beyond those listed in Table 3 may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in Table 4, “Operating Conditions,” on page 6 is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Table 3. Absolute Maximum Ratings Parameter Min Max Units Comments VIN_HV 26V Pins -0.3 26 V Applicable for high-voltage current sink pins CURR1, CURR2, CURR6 V Applicable for 5V pins VBAT, CURR30-33, CURR41-43, RGB1-3, C1_N, C2_N, C1_P, C2_P, CPOUT, DCDC_FB, DCDC_GATE, CLK, DATA; -0.3 7.0 lv 5V Pins VIN_MV al id Symbol -0.3 5.0 V Applicable for 3.3V pins V2_5; DCDC_SNS, GPIO1/ DLS, GPIO2/LIGHT, VANA/ GPI Input Pin Current -25 +25 mA At 25ºC, Norm: JEDEC 17 Tstrg Storage Temperature Range -55 125 ºC IIN Humidity 5 85 % Non-condensing Electrostatic Discharge -2000 2000 V Norm: MIL 883 E Method 3015 Total Power Dissipation 0.75 W TA = 70 ºC, Tjunc_max = 125ºC Peak Body Temperature 260 ºC T = 20 to 40s, in accordance with IPC/JEDEC J-STD 020. am lc s on A te G nt st il 3.3V Pins VIN_LV VESD Pt TBODY MSL Moisture Sensitivity Level MSL 1 Represents a max. floor life time of unlimited 6 Electrical Characteristics ca Table 4. Operating Conditions Symbol Parameter Condition Min High Voltage Applicable for high-voltage current sink pins CURR1, CURR2 and CURR6. 0.0 Battery Voltage Pin VBAT 3.0 Typ Max Unit 26.0 V 5.5 V 5.5 V VHV ch VBAT ni General Operating Conditions 3.6 VPERI Periphery Supply Voltage For serial interface pins. 1.5 V2_5 Voltage on Pin V2_5 Internally generated 2.4 2.5 2.6 V -30 25 85 ºC Operating Temperature Range IACTIVE Battery current Normal Operating current (see Operating Modes on page 80) 110 ISTANDBY Standby Mode Current Current consumption in standby mode. Only 2.5V regulator on, interface active 8 13 µA ISHUTDOWN Shutdown Mode Current interface inactive (CLKand DATA set to 0V) 0.1 3 µA Te TAMB www.austriamicrosystems.com/AS3676 1v1-4 µA 6 - 91 AS3676 Datasheet - Ty p i c a l O p e r a t i n g C h a r a c t e r i s t i c s 7 Typical Operating Characteristics Figure 2. DCDC Step Up Converter: Efficiency of +15V, Figure 3. Charge Pump: Efficiency vs. VBAT Step Up to 15V vs. Load Current at VBAT=3.8V 100 VOUT=14.2V VOUT= 14.2V fclk=550kHz 80 VOUT=22V Efficiency of CP [% ] VOUT=17.2V 80 75 70 60 ILOAD=305mA 50 ILOAD=80mA 40 ILOAD=40mA lv 85 Efficien cy o f D CDC [%] ILOAD=150mA 90 30 20 70 10 0 0.01 am lc s on A te G nt st il 0 65 al id 90 0.02 0.03 0.04 0.05 2.8 0.06 3 3.2 Figure 4. Charge Pump: Battery Current vs. VBAT 3.4 3.6 3.8 4 4.2 VBAT [V] Lo ad Cu rrent [A] Figure 5. Current Sink CURR1 vs. V(CURRx) 40.0 600 ICURR1=38.25mA 35.0 500 IBat[m A] ICURR1 [mA] 30.0 400 ILOAD=305mA 300 200 25.0 ICURR1=19.2mAm 20.0 15.0 ILOAD=150mA 10.0 ILOAD=80mA 100 ILOAD=40mA 0 2.8 3 3. 2 3.4 3.6 3.8 5.0 4 ICURR1=2.4mA 0.0 4.2 0.0 VBat[V] 0.5 1.0 1.5 2.0 ca V CURR1 [V] Figure 7. Current Sink CURR3x vs. VBAT 40.0 ICURR30=38.25mA 35.0 30.0 ICURR30 [mA] Te ch ni Figure 6. 25.0 ICURR30=19.2mAm 20.0 15.0 10.0 5.0 ICURR30=2.4mA 0.0 0.0 0.5 1.0 1.5 2.0 VCURR30 [V] www.austriamicrosystems.com/AS3676 1v1-4 7 - 91 AS3676 Datasheet - Ty p i c a l O p e r a t i n g C h a r a c t e r i s t i c s Figure 8. Charge Pump Input and Output Ripple 1:1.5 Mode, 100mA load Figure 9. Charge Pump Input and Output Ripple 1:2 Mode, 100mA load !"#$% !&'( ) !"#$% lv am lc s on A te G nt st il %&' !"#$ al id !"#$ Te ch ni ca VBAT = 3.6V, TA = +25ºC (unless otherwise specified). www.austriamicrosystems.com/AS3676 1v1-4 8 - 91 AS3676 Datasheet - D e t a i l e d D e s c r i p t i o n 8 Detailed Description 8.1 Analog LDO The LDO is a general purpose LDO and the output pin connected to VANA/GPI. The design is optimized to deliver the best compromise between quiescent current and regulator performance for battery powered devices. al id Stability is guaranteed with ceramic output capacitors of 1µF ±20% (X5R) or 2.2µF +100/-50%(Z5U). The low ESR of these capacitors ensures low output impedance at high frequencies. The low impedance of the power transistor enables the device to deliver up to 150mA even at nearly discharged batteries without any decrease in performance. The LDO is off by default after start-up. Figure 10. Analog LDO Block Diagram am lc s on A te G nt st il lv AS3676 Table 5. Electrical Characteristics Symbol Parameter VBAT Supply Voltage Range RON On Resistance VDROPOUT Dropout Voltage Supply Current IOFF Shutdown Current tstart Start-up Time Vout_tol Output Voltage Tolerance Typ Unit 5.5 V @150mA, full operating temperature range 1.0 @150mA 150 mV 50 mV 3.0 @50mA ni Te 1 Min Without load 50 With 150mA load 150 Without load µA 100 nA 200 µs -3 +3 % VBAT = 3.0V and IOUT=150mA 1.8 2.85 V Output Voltage Full Programmable Range; VBAT > VOUT+ 150mV and IOUT<=150mA 1.8 3.35 V LDO Current Limit Pin VANA/GPI. LDO acts as current source if the output current exceeds ILIMIT. 300 ch VOUT ILIMIT Max ca ION Condition 2 450 mA 1. Not production tested – guaranteed by design and laboratory verification 2. During startup of the LDO the current limit is half the value of ILIMIT www.austriamicrosystems.com/AS3676 1v1-4 9 - 91 AS3676 Datasheet - D e t a i l e d D e s c r i p t i o n 8.1.1 LDO Registers Table 6. Reg. control Register Reg. control Addr: 00 This register enables/disables the LDOs, Charge Pumps, Charge Pump LEDs, current sinks, the Step Up DC/DC Converter, and low-power mode. Bit Name 0 ldo_on Default Access 0 R/W Description 0 Analog LDO is switched off 1 Analog LDO is switched on al id Bit Table 7. LDO Voltage Register Bit lv LDO Voltage Addr: 07h This register sets the output voltage (VANA/GPI) for the LDO. Bit Name Default Access Description am lc s on A te G nt st il Controls LDO voltage selection. ldo_voltage 00000b R/W 00000b 1.8V ... LSB=50mV 11111b 3.35V Te ch ni ca 4:0 www.austriamicrosystems.com/AS3676 1v1-4 10 - 91 AS3676 Datasheet - D e t a i l e d D e s c r i p t i o n 8.2 Step Up DC/DC Converter The Step Up DC/DC Converter is a high-efficiency current mode PWM regulator, providing output voltage up to e.g. 1 25V/50mA . A constant switching-frequency results in a low noise on the supply and output voltages. Figure 11. Step Up DCDC Converter Block Diagram Option: Current Feedback with Over voltage protection / 2 # $%&' ) *+ !" 01 %( ' am lc s on A te G nt st il 1 lv *,-. al id &' 3 & *'/ 1 (% !42 5 6 "!47869!6 ( ' # % $ ca AS3676 Table 8. Step Up DC/DC Converter Parameters Parameter Condition IVDD Quiescent Current Pulse skipping mode. Feedback Voltage for External Resistor Divider For constant voltage control. step_up_res = 1 1.20 1.25 1.30 V Feedback Voltage for Current Sink Regulation on CURR1, CURR2 or CURR6 in regulation. step_up_res = 0 0.4 0.5 0.6 V ch VFB1 ni Symbol Typ Max 140 Unit µA Te VFB2 Min 1. The AS3676 internal driver structure allows output voltage higher than 25V. The Over voltage Protection in Current Feedback Mode (see page 13) or Voltage Feedback (see page 14) should be set to fit to the external components used (maximum voltage rating of Q1, C9 and D1). www.austriamicrosystems.com/AS3676 1v1-4 11 - 91 AS3676 Datasheet - D e t a i l e d D e s c r i p t i o n Table 8. Step Up DC/DC Converter Parameters Parameter IDCDC_FB Additional Tuning Current at Pin DCDC_FB and over voltage protection Condition Accuracy of Feedback Current at full scale Vrsense_max Min Typ Max Unit Adjustable by software using Register DCDC control1 1µA step size (0-31µA) VPROTECT = 1.25V + IDCDC_FB * R2 0 31 µA -6 6 % e.g., 1.32A for 0.1 sense resistor R1. 92 132 For fixed startup time of 500us 50 66 If step_up_lowcur= 1 60 86 Current Limit Voltage at R1 al id Symbol 170 86 mV 114 1 50 mA 1.1 MHz Switch Resistance ON-resistance of external switching transistor. ILOAD Load Current At 26V output voltage 0 fIN Switching Frequency Internally trimmed 0.9 COUT Output Capacitor Ceramic, ±20%. Use nominal 4.7µF capacitors to obtain at least 0.7µF under all conditions (voltage dependence of capacitors) 0.7 4.7 L Inductor Use inductors with small Cparasitic (<100pF) to get high efficiency. 7 10 13 µH tMIN_ON Minimum on Time 90 140 190 ns MDC Maximum Duty Cycle 90 1 am lc s on A te G nt st il Vripple lv RSW Voltage ripple >20kHz Voltage ripple <20kHz Efficiency Cout=4.7µF,Iout=0..45mA, VBAT=3.0...4.2V Efficiency Iout=20mA,Vout=17V,VBAT=3.8V µF % 160 mV 40 mV 85 % To ensure soft startup of the dcdc converter, the over current limits are reduced for a fixed time after enabling the dcdc converter. The total startup time for an output voltage of e.g. 26V is less than 2ms. If C7 and C8 are mounted and the bit step_up_prot is set, the total startup time can exceed 2ms. Note: If the DCDC converter is only used in current feedback mode (CURR1, CURR2 or CURR6 - and not used for a constant voltage source), the capacitors C7 and C8 can be removed. 8.2.1 Feedback Selection ca Register DCDC control1 and DCDC control2 selects the type of feedback for the Step Up DC/DC Converter. ni The feedback for the DC/DC converter can be selected either by current sinks (CURR1, CURR2, CURR6) or by a voltage feedback at pin DCDC_FB. If the register bit step_up_fb_auto is set, the feedback path is automatically selected between CURR1, CURR2 and CURR6 (the lowest voltage of these current sinks is used). ch Setting step_up_fb enables feedback on the pins CURR1, CURR2 or CURR6. The Step Up DC/DC Converter is regulated such that the required current at the feedback path can be supported. (Bit step_up_res should be set to 0 in this configuration) Te Note: Always choose the path with the highest voltage drop as feedback to guarantee adequate supply for the other (unregulated) paths or enable the register bit step_up_fb_auto. www.austriamicrosystems.com/AS3676 1v1-4 12 - 91 AS3676 Datasheet - D e t a i l e d D e s c r i p t i o n 8.2.2 Over voltage Protection in Current Feedback Mode The over voltage protection in current feedback mode (step_up_fb = 01, 10 or 11 or step_up_fb_auto = 1) works as fol2 lows: Only resistor R2 and C7/C8 is soldered and R3 is omitted. An internal current source (sink) is used to generate a voltage drop across the resistor R2. If then the voltage on DCDC_FB is above 1.25V and step_up_prot=1, the DCDC is momentarily disabled to avoid too high voltages on the output of the DCDC converter. When the voltage on DCDC_FB drops below 1.25V, the DCDC automatically resumes operation. The protection voltage can be calculated according to the following formula: (EQ 1) al id VPROTECT = 1.25V + IDCDC_FB * R2 Note: The voltage on the pin DCDC_FB is limited by an internal protection diode to VBAT + one diode forward voltage (typ. 0.6V). lv If the over voltage protection is not used in current feedback mode, connect DCDC_FB to ground. Figure 12. Step Up DC/DC Converter Detail Diagram; Option: Regulated Output Current, Feedback is automatically selected between CURR1, CURR2, CURR6 (step_up_fb_auto=1); over voltage protection is enabled (step_up_prot=1); 1MHz clock frequency (step_up_frequ=0) am lc s on A te G nt st il * - !" . ! /%/%3 8 : 56+ .21 /:%/ 20 22 20%02:1 +9 9 $$%'() ' $ 0 20% $ $$%& %7 , /%/%01 +, $$%"* /%/%/ 2 / 20 222/ , ca $ $ $ $ $ ch Te $ /%/%34 2 3;4: <==> AS3676 A " $ A B 2:- 8 ; 02:13;42; $ ni /%/%34%2 A " $ 2 2 !" # ?2; ?%2%/@ 2. If the DCDC converter is only used in current feedback mode (CURR1, CURR2 or CURR6 - and not used for a constant voltage source), the capacitors C7 and C8 can be removed. www.austriamicrosystems.com/AS3676 1v1-4 13 - 91 AS3676 Datasheet - D e t a i l e d D e s c r i p t i o n 8.2.3 Voltage Feedback Setting bit step_up_fb (see page 15) = 00 enables voltage feedback at pin DCDC_FB. Capacitors C7 and C8 have to be soldered in this operating mode. The output voltage is regulated to a constant value, given by (Bit step_up_res should be set to 1 in this configuration) UStep up_out = (R2+R3)/R3 *1.25 + IDCDC_FB * R2 (EQ 2) If R3 is not used, the output voltage is by (Bit step_up_res should be set to 0 in this configuration) (EQ 3) al id UStep up_out = 1.25 + IDCDC_FB * R2 Where: UStep up_out = Step Up DC/DC Converter output voltage R2 = Feedback resistor R2 R3 = Feedback resistor R3 lv IDCDC_FB = Tuning current at ball DCDC_FB; 0 to 31µA Table 9. Voltage Feedback Example Values UStep up_out R2 = 1M, R3 not used R2 = 500k, R3 = 50k - 13.75 - 14.25 - 14.75 - 15.25 - 15.75 6.25 16.25 7.25 16.75 8.25 17.25 9.25 17.75 10.25 18.25 11.25 18.75 12.25 19.25 13.25 19.75 14.25 20.25 15.25 20.75 16.25 21.25 … … … 30 31.25 28.75 32.25 29.25 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 ch ni 15 ca µA UStep up_out am lc s on A te G nt st il IDCDC_FB 31 Te Note: The voltage on CURR1, CURR2 and CURR6 must not exceed 26V (see page 25) 8.2.4 PCB Layout Hints To ensure good EMC performance of the DCDC converter, keep its external power components C6, R1, L1, Q1, D1 and C9 close together. Connect the ground of C6, R1 and C9 locally together and connect this with a short path to AS3676 VSS. This ensures that local high-frequency currents will not flow to the battery. 8.2.5 Unused DCDC converter 3 If the DCDC converter is not used, connect DCDC_SNS to GND. DCDC_FB and DCDC_GATE can be left open. www.austriamicrosystems.com/AS3676 1v1-4 14 - 91 AS3676 Datasheet - D e t a i l e d D e s c r i p t i o n 8.2.6 Step up Registers Table 10. Reg. control Register Reg. control Addr: 00 Bit Name Default Access Description al id Bit This register enables/disables the Charge Pump and the Step Up DC/DC Converter. Enable the step up converter 0 R/W 0b Disable the Step Up DC/DC Converter 1b Enable the Step Up DC/DC Converter Table 11. DCDC control1 Register DCDC control1 Addr: 21h This register controls the Step Up DC/DC Converter. Bit Name Default Access Description am lc s on A te G nt st il Bit lv step_up_on 3 Defines the clock frequency of the Step Up DC/DC Converter. step_up_frequ 0 0 R/W 0 1MHz 1 500kHz Controls the feedback source if step_up_fb_auto = 0 step_up_fb 2:1 00 R/W 00 DCDC_FB enabled (external resistor divider). Set step_up_fb=00 (DCDC_FB) 01 CURR1 feedback enabled (feedback via LEDs) 10 CURR2 feedback enabled (feedback via LEDs) 11 CURR6 feedback enabled (feedback via LEDs) Defines the tuning current at pin DCDC_FB. step_up_vtuning 00000 R/W 0 µA 00001 1 µA 00010 2 µA .... 10000 15 µA ..... 11111 31 µA Te ch ni ca 7:3 00000 3. DCDC_FB can be used as a general purpose ADC input (see Analog-to-Digital Converter on page 65) www.austriamicrosystems.com/AS3676 1v1-4 15 - 91 AS3676 Datasheet - D e t a i l e d D e s c r i p t i o n Table 12. DCDC control2 Register DCDC control2 Addr: 22h Bit This register controls the Step Up DC/DC Converter and low-voltage current sinks CURR3x. Bit Name Default Access Description Gain selection for Step Up DC/DC Converter R/W 0 1 Select 1 if DCDC_FB is used with external resistor divider using 2 resistors: R2 and R3 al id 0 lv step_up_res 0 Select 0 if Step Up DC/DC Converter is used with current feedback (CURR1, CURR2, CURR6) or if DCDC_FB is used with current feedback only – R2, C7, C8 connected, R3 not used Step Up DC/DC Converter output voltage at low loads, when pulse skipping is active skip_fast 0 R/W 0 Accurate output voltage, more ripple 1 Elevated output voltage, less ripple am lc s on A te G nt st il 1 Step Up DC/DC Converter protection step_up_prot 2 1 R/W 0 No over voltage protection 1 Over voltage protection on pin DCDC_FB enabled voltage limitation =1.25V on DCDC_FB Step Up DC/DC Converter coil current limit step_up_lowcur 3 step_up_fb_auto 7 0 R/W 0 Normal current limit 1 Current limit reduced by approx. 33% 0 step_up_fb selects the feedback of the DCDC converter 1 If step_up_fb is not DCDC_FB (00), then feedback is automatically chosen within the current sinks CURR1, CURR2 and CURR6. Only those are used for this selection, which are enabled (currX_mode must not be 00) and not connected to the charge pump (currX_on_cp must be 0). R/W Charge Pump ca 8.3 0 The Charge Pump uses two external flying capacitors C3, C4 to generate output voltages higher than the battery voltage. There are three different operating modes of the charge pump itself: ni Bypass Mode - Battery input and output are connected by a low-impedance switch - battery current = output current. 1:1.5 Mode - The output voltage is up to 1.5 times the battery voltage (without load), but is limited to VCPOUTmax all the time - battery current = 1.5 times output current. 1:2 Mode - The output voltage is up to 2 times the battery voltage (without load), but is limited to VCPOUTmax all the time - battery current = 2 times output current As the battery voltage decreases, the Charge Pump must be switched from 1:1 mode to 1:1.5 mode and eventually in 1:2 mode in order to provide enough supply for the current sinks. Depending on the actual current the mode with best overall efficiency can be automatically or manually selected: Te ch 1:1 Examples: www.austriamicrosystems.com/AS3676 1v1-4 16 - 91 AS3676 Datasheet - D e t a i l e d D e s c r i p t i o n Battery voltage = 3.7V, LED dropout voltage = 3.5V. The 1:1 mode will be selected and there is 200mV drop on the current sink and on the Charge Pump switch. Efficiency 95%. Battery voltage = 3.5V, LED dropout voltage = 3.5V. The 1:1.5 mode will be selected and there is 1.5V drop on the current sink and 250mV on the Charge Pump. Efficiency 66%. The efficiency is dependent on the LED forward voltage given by: Eff=(V_LED*Iout)/(Uin*Iin) (EQ 4) The charge pump mode switching can be done manually or automatically with the following possible software settings: up all modes allowed (1:1, 1:1.5, 1:2) - Start with 1:1 mode - Switch up automatically 1:1 to 1:1.5 to 1:2 Automatic up, but only 1:1 and 1:1.5 allowed - Start with 1:1 mode - Switch up automatically only from 1:1 to 1:1.5 mode; 1:2 mode is not used Manual - Set modes 1:1, 1:1.5, 1:2 by software lv al id Automatic am lc s on A te G nt st il Figure 13. Charge Pump Pin Connections ca AS3676 The Charge Pump requires the external components listed in the following table: Table 13. Charge Pump External Components Parameter ni Symbol Condition Min Typ Max Unit External Decoupling Capacitor Ceramic low-ESR capacitor between pins VBAT and VSS. 1.0 µF C3, C4 External Flying Capacitor (2x) Ceramic low-ESR capacitor between pins C1_P and C1_N, between pins C2_P and C2_N and between VBAT and VSS 1.0 µF C5 External Storage Capacitor Ceramic low-ESR capacitor between pins CPOUT and VSS, pins CPOUT and VSS. Use nominal 2.2µF capacitors (size 0603) 2.2 µF Te ch C2 Note: The connections of the external capacitors C2, C3, C4 and C5 should be kept as short as possible. www.austriamicrosystems.com/AS3676 1v1-4 17 - 91 AS3676 Datasheet - D e t a i l e d D e s c r i p t i o n The maximum voltage on the flying capacitors C3 and C4 is VBAT. Table 14. Charge Pump Characteristics ICPOUT Parameter Condition Min Output Current Continuous Depending on PCB layout max. 200ms VCPOUT= VBAT * CPMODE – ILOAD * RCP Output Current Pulsed Typ Max Unit 0.0 400 mA 0.0 500 mA VCPOUTmax Output Voltage Internally limited, Including output ripple Efficiency Including current sink loss; ICPOUT < 100mA. ICP1_1.5 Power Consumption without Load fclk = 1 MHz 1:1.5 Mode 3.4 1:2 Mode 3.8 1:1 Mode; VBAT 3.5V Rcp1_2 Effective Charge Pump Output Resistance (Open Loop, fclk = 1MHz) fclk Accuracy Accuracy of Clock Frequency currhv_switch CURR1, 2, 6 minimum voltage Rcp1_1.5 currlv_switch 8.3.1 90 % mA 0.57 2.65 1:1.2 Mode; VBAT 3.1V 3.25 -10 CURR30-33, RGB1If the voltage drops below this threshold, the 3, CURR41-3, charge pump will use the next available minimum voltage mode CURR30-33 (1:1 -> 1:1.5 or 1:1.5 -> 1:2) 0-75.6mA range for strobe if curr3x_strobe_high= 1 CP automatic upswitching debounce time tdeb 1:1.5 Mode; VBAT 3.3V V lv Rcp1_1 5.6 am lc s on A te G nt st il ICP1_2 60 al id Symbol 10 % 0.45 V 0.2 V 0.4 V cp_start_debounce=0 240 µsec After switching on CP (cp_on set to 1), if cp_start_debounce=1 2000 µsec Charge Pump Mode Switching ni ca If automatic mode switching is enabled (cp_mode_switching (see page 20) = 00 or cp_mode_switching = 01) the charge pump monitors the current sinks, which are connected via a led to the output CPOUT. To identify these current sources (sinks), the registers CP mode Switch1 and CP mode Switch2 (register bits curr30_on_cp (see page 21) … curr33_on_cp, rgb1_on_cp … rgb3_on_cp, curr1_on_cp, curr2_on_cp, curr41_on_cp … curr43_on_cp and curr6_on_cp) should be setup before starting the charge pump (cp_on (see page 20) = 1). If any of the voltage on these current sources drops below the threshold (currlv_switch, currhv_switch), the next higher mode is selected after the debounce time. ch To avoid switching into 1:2 mode (battery current = 2 times output current), set cp_mode_switching = 01. Te If the currX_on_cp=0 and the according current sink is connected to the charge pump, the current sink will be functional, but there is no up switching of the charge pump, if the voltage compliance is too low for the current sink to supply the specified current. www.austriamicrosystems.com/AS3676 1v1-4 18 - 91 AS3676 Datasheet - D e t a i l e d D e s c r i p t i o n Figure 14. Automatic Mode Switching 0- 1 02 / -% "# $% &'(&) &)'(& # *& ( &.&).& / %! 30 %! 30 %! 30 ca ! am lc s on A te G nt st il lv $$ al id ch ni , + + Te AS3676 8.3.2 Soft Start An implemented soft start mechanism reduces the inrush current. Battery current is smoothed when switching the charge pump on and also at each switching condition. This precaution reduces electromagnetic radiation significantly. www.austriamicrosystems.com/AS3676 1v1-4 19 - 91 AS3676 Datasheet - D e t a i l e d D e s c r i p t i o n 8.3.3 Unused Charge Pump If the charge pump is not used, capacitors C3, C4 and C5 can be removed. The pins C1_P, C1_N, C2_P, C2_N and CPOUT should be left open and keep register cp_on and cp_auto_on at 0 (default value). 8.3.4 Charge Pump Registers Table 15. Reg. control Register This register controls the Charge Pump. Bit Name 2 cp_on Default Access 0 R/W Description 0 Set Charge Pump into 1:1 mode (off state) unless cp_auto_on is set 1 Enable manual or automatic mode switching Table 16. CP control Register Bit am lc s on A te G nt st il CP control Addr: 23h lv Bit al id Reg. control Addr: 00h Bit Name This register enables/disables the Charge Pump and the Step Up DC/DC Converter. Default Access Description Clock frequency selection. cp_clk 0 0 R/W 0 1 MHz 1 500 kHz Charge Pump mode (in manual mode sets this mode, in 1 automatic mode reports the actual mode used) cp_mode 2:1 00b R/W 00 1:1 mode 01 1:1.5 mode 10 1:2 mode 11 NA cp_mode_switching 00b R/W ch ni 4:3 ca Set the mode switching algorithm cp_start_debounce Te 5 6 cp_auto_on 0 0 R/W R/W 00 Automatic Mode switching; 1:1, 1:1.5 and 1:2 allowed 01 Automatic Mode switching; only 1:1 and 1:1.5 allowed 10 Manual Mode switching; register cp_mode defines the actual charge pump mode used 11 Reserved 0 Mode switching debounce timer is always 240µs 1 Upon startup (cp_on set to 1) the mode switching debounce time is first started with 2ms then reduced to 240µs 0 Charge Pump is switched on/off with cp_on 1 Charge Pump is automatically switched on if a current sink, which is connected to the charge pump (defined by registers CP Mode Switch 1 & 2) is switched on 1. Direct switching from 1:1.5 mode into 1:2 in manual mode and vice versa is not allowed. Always switch over 1:1 mode. www.austriamicrosystems.com/AS3676 1v1-4 20 - 91 AS3676 Datasheet - D e t a i l e d D e s c r i p t i o n Table 17. CP mode Switch1 Register CP mode Switch1 Setup which current sinks are connected (via leds) to the charge pump; if set to ‘1’ the correspond current source (sink) is used for automatic mode selection of the charge pump Bit Name 0 curr30_on_cp Default Access 0 curr31_on_cp 1 0 curr32_on_cp 0 curr33_on_cp 3 0 rgb1_on_cp 4 0 rgb2_on_cp 5 0 rgb3_on_cp 6 R/W R/W 0 current Sink CURR30 is not connected to charge pump 1 current sink CURR30 is connected to charge pump 0 current Sink CURR31 is not connected to charge pump 1 current sink CURR31 is connected to charge pump 0 current Sink CURR32 is not connected to charge pump 1 current sink CURR32 is connected to charge pump am lc s on A te G nt st il 2 R/W Description al id Bit lv Addr: 24h 0 R/W R/W R/W R/W 0 current Sink CURR33 is not connected to charge pump 1 current sink CURR33 is connected to charge pump 0 current Sink RGB1 is not connected to charge pump 1 current sink RGB1 is connected to charge pump 0 current Sink RGB2 is not connected to charge pump 1 current sink RGB2 is connected to charge pump 0 current Sink RGB3 is not connected to charge pump 1 current sink RGB3 is connected to charge pump Table 18. CP mode Switch2 Register CP mode Switch2 Setup which current sinks are connected (via LEDs) to the charge pump; if set to ‘1’ the correspond current source (sink) is used for automatic mode selection of the charge pump ca Addr: 25h Bit Name 0 curr1_on_cp Default Access ch ni Bit Te 1 2 3 curr2_on_cp curr41_on_cp curr42_on_cp www.austriamicrosystems.com/AS3676 0 0 0 0 R/W R/W R/W R/W Description 0 current Sink CURR1is not connected to charge pump 1 current sink CURR1 is connected to charge pump 0 current Sink CURR2 is not connected to charge pump 1 current sink CURR2 is connected to charge pump 0 current Sink CURR41 is not connected to charge pump 1 current sink CURR41 is connected to charge pump 0 current Sink CURR42 is not connected to charge pump 1 current sink CURR42 is connected to charge pump 1v1-4 21 - 91 AS3676 Datasheet - D e t a i l e d D e s c r i p t i o n Table 18. CP mode Switch2 Register (Continued) CP mode Switch2 Setup which current sinks are connected (via LEDs) to the charge pump; if set to ‘1’ the correspond current source (sink) is used for automatic mode selection of the charge pump Bit Name Default Access curr43_on_cp 4 0 curr6_on_cp 7 0 R/W R/W Description 0 current Sink CURR43 is not connected to charge pump 1 current sink CURR43 is connected to charge pump 0 current Sink CURR6 is not connected to charge pump 1 current sink CURR6 is connected to charge pump al id Bit lv Addr: 25h Table 19. Curr low voltage status1 Register am lc s on A te G nt st il Curr low voltage status1 Indicates the low voltage status of the current sinks. If the currX_low_v bit is set, the voltage on the current sink is too low, to drive the selected output current Addr: 2Ah Bit Name 0 curr30_low_v NA R 1 curr31_low_v NA R 2 curr32_low_v NA R 3 curr33_low_v NA R 4 rgb1_low_v NA R 5 rgb2_low_v NA R 6 rgb3_low_v NA R NA R ni curr6_low_v ch 7 Default Access ca Bit Description 0 voltage of current Sink CURR30 >currlv_switch 1 voltage of current Sink CURR30 <currlv_switch 0 voltage of current Sink CURR31 >currlv_switch 1 voltage of current Sink CURR31 <currlv_switch 0 voltage of current Sink CURR32 >currlv_switch 1 voltage of current Sink CURR32 <currlv_switch 0 voltage of current Sink CURR33 >currlv_switch 1 voltage of current Sink CURR33 <currlv_switch 0 voltage of current Sink RGB1 >currlv_switch 1 voltage of current Sink RGB1 <currlv_switch 0 voltage of current Sink RGB2 >currlv_switch 1 voltage of current Sink RGB2 <currlv_switch 0 voltage of current Sink RGB3 >currlv_switch 1 voltage of current Sink RGB31 <currlv_switch 0 voltage of current Sink CURR6 >currlv_switch 1 voltage of current Sink CURR6 <currlv_switch Table 20. Curr low voltage status2 Register Curr low voltage status2 Indicates the low voltage status of the current sinks. If the currX_low_v bit is set, the voltage on the current sink is too low, to drive the selected output current Te Addr: 2Bh Bit Bit Name 0 curr1_low_v Default Access www.austriamicrosystems.com/AS3676 NA R Description 0 voltage of current Sink CURR1 >currhv_switch 1 voltage of current Sink CURR1 <currhv_switch 1v1-4 22 - 91 AS3676 Datasheet - D e t a i l e d D e s c r i p t i o n Table 20. Curr low voltage status2 Register (Continued) Curr low voltage status2 Indicates the low voltage status of the current sinks. If the currX_low_v bit is set, the voltage on the current sink is too low, to drive the selected output current Bit Name 1 curr2_low_v Default Access NA R curr41_low_v NA R 3 curr42_low_v NA R 4 curr43_low_v NA R 0 voltage of current Sink CURR2 >currhv_switch 1 voltage of current Sink CURR2 <currhv_switch 0 voltage of current Sink CURR41 >currlv_switch 1 voltage of current Sink CURR41 <currlv_switch 0 voltage of current Sink CURR42 >currlv_switch 1 voltage of current Sink CURR42 <currlv_switch 0 voltage of current Sink CURR43 >currlv_switch 1 voltage of current Sink CURR43 <currlv_switch Te ch ni ca am lc s on A te G nt st il 2 Description al id Bit lv Addr: 2Bh www.austriamicrosystems.com/AS3676 1v1-4 23 - 91 AS3676 Datasheet - D e t a i l e d D e s c r i p t i o n 8.4 Current Sinks The AS3676 contains general purpose current sinks intended to control RGB LEDs, white LEDs (e.g. backlights) and can also be used for buzzers or vibrators. All current sinks have an integrated over voltage protection. CURR1, CURR2 and CURR6 are also used as feedback for the Step Up DC/DC Converter (regulated to 0.5V in this configuration) see Feedback Selection on page 12. sinks CURR1, CURR2 and CURR6 are high-voltage compliant (26V) current sinks, used e.g., for series of white LEDs Current sinks CURR3x (CURR30, CURR31, CURR32 and CURR33) are parallel 5V current sinks, used for backlighting, indicator LEDs or RGB LEDs. Current sinks RGB1, RGB2, and RGB3 are general purpose current sinks e.g. for a fun LED. Current sinks CURR4x (CURR41, CURR42, and CURR43) are general purpose current sinks. al id Current Current Sink Max. Current (mA) Resolution (Bits) (mA) Software Current Control Hardware On/Off Control Can be assigned to Audio Controlled LED Channel LED Pattern; Internal PWM; external PWM at GPIO1/DLS ch1 am lc s on A te G nt st il CURR1 Max. Voltage (V) lv Table 21. Current Sink Function Overview CURR2 26.0 CURR6 CURR30 38.25 8 0.15 Separate 38.25 (75.6mA for strobe if curr3x_str obe_high= 1) CURR31 CURR32 CURR33 8 0.15 Combined in Strobe/ Preview or Separated VBAT (5.5V) RGB1 RGB2 38.25 RGB3 CURR41 CURR42 38.25 8 0.15 0.15 Separate Separate ch3 Flash LED Strobe (CURR1 or CURR30) & Completely individual Preview assignment of the (CURR2); audio channels Internal PWM; ch1,ch2 and ch3 to the outputs LED Pattern; external PWM at GPIO1/DLS LED Pattern; Internal PWM; external PWM at GPIO1/DLS ch1 LED Pattern; Internal PWM; external PWM at GPIO1/DLS ch1 ch2 ch3 ch2 ch3 ca CURR43 8 ch2 8.4.1 Unused Current Sinks Te ch ni Unused current sinks can be left open or used as a ADC input (see Analog-to-Digital Converter on page 65). www.austriamicrosystems.com/AS3676 1v1-4 24 - 91 AS3676 Datasheet - D e t a i l e d D e s c r i p t i o n 8.4.2 High Voltage Current Sinks CURR1, CURR2, CURR6 The high voltage current sinks have a resolution of 8 bits. Table 22. HV Current Sinks Characteristics Parameter IBIT7 Current sink if Bit7 = 1 19.2 IBIT6 Current sink if Bit6 = 1 9.6 IBIT5 Current sink if Bit5 = 1 4.8 IBIT4 Current sink if Bit4 = 1 IBIT3 Current sink if Bit3 = 1 IBIT2 Current sink if Bit2 = 1 0.6 IBIT1 Current sink if Bit1 = 1 0.3 IBIT0 Current sink if Bit0 = 1 VCURR1,2,6x 2.4 For V(CURRx) > 0.45V 1.2 Max Unit mA 0.15 IBIT7 and IBIT6 +5 % matching Accuracy Typ lv 1 Min am lc s on A te G nt st il m Condition al id Symbol CURR1,CURR2,CURR6 all other bits -5 -10 +10 % absolute Accuracy -15 +15 % Voltage compliance 0.45 26 V 1. Variation between currents within this group 2. Variation between the programmed current and the actual current High Voltage Current Sinks CURR1, CURR2, CURR6 Registers Table 23. Curr1 current Register Addr: 09h Bit Bit Name Curr1 current This register controls the High voltage current sink current. Default Access Description Defines current into current sink curr1 curr1_current 0 R/W ca 7:0 00h 0 mA 01h 0.15 mA .... .... FFh 38.25 mA ni Table 24. Curr2 current Register Curr2 current ch Addr: 0Ah Te Bit 7:0 Bit Name This register controls the High voltage current sink current. Default Access curr2_current www.austriamicrosystems.com/AS3676 Description Defines current into current sink curr2 0 R/W 00h 0 mA 01h 0.15 mA .... .... FFh 38.25 mA 1v1-4 25 - 91 AS3676 Datasheet - D e t a i l e d D e s c r i p t i o n Table 25. curr6 current Register curr6 current Addr: 2Fh Bit This register controls the High voltage current sink current. Bit Name Default Access Description 0 R/W 0 mA 01h 0.15 mA .... .... FFh 38.25 mA Table 26. curr12 control Register curr12 control Bit This register select the mode of the current sinks controls High voltage current sink current. am lc s on A te G nt st il Addr: 01h lv curr6_current 7:0 00h al id Defines current into current sink CURR6 Bit Name Default Access Description Select the mode of the current sink curr1 curr1_mode 1:0 0 R/W 00b off 01b on 10b PWM controlled 11b LED pattern controlled Select the mode of the current sink curr2 00b curr2_mode 3:2 0 R/W off 01b on 10b PWM controlled 11b LED pattern controlled Table 27. curr rgb control Register Bit Name This register select the mode of the current sinks CURR6. Default Access ni Bit curr6_mode 0 Description Select the mode of the current sink CURR6 R/W 00b off 01b on 10b PWM controlled 11b LED pattern controlled Te ch 7:6 curr rgb control ca Addr: 02h www.austriamicrosystems.com/AS3676 1v1-4 26 - 91 AS3676 Datasheet - D e t a i l e d D e s c r i p t i o n 8.4.3 Current Sinks CURR30, CURR31, CURR32, CURR33 These current sinks have a resolution of 8 bits and can sink up to 38.25mA. The current values can be controlled individually with curr30_current – curr33_current or common with curr3x_strobe or curr3x_preview. Table 28. Current Sinks CURR30,31,32,33 Parameters Parameter IBIT7 Current sink if Bit7 = 1 19.2 IBIT6 Current sink if Bit6 = 1 9.6 IBIT5 Current sink if Bit5 = 1 4.8 IBIT4 Current sink if Bit4 = 1 IBIT3 Current sink if Bit3 = 1 IBIT2 Current sink if Bit2 = 1 IBIT1 Current sink if Bit1 = 1 IBIT0 Current sink if Bit0 = 1 1 2.4 1.2 Max mA 0.3 0.15 CURR30-33 Voltage compliance Unit lv 0.6 IBIT7 and IBIT6 -5 all other bits absolute Accuracy VCURR3X Typ For V(CURR3x) > 0.2V matching Accuracy Min +5 % -10 +10 % -15 +15 % 0.2 CPO UT V am lc s on A te G nt st il m Condition al id Symbol curr3x_strobe_high=1 and strobe function 0.4 1. Variation between currents within this group 2. Variation between the programmed current and the actual current Current Sinks CURR3x Registers Table 29. Curr3 control2 Register Addr: 12h Bit Bit Name Curr3 control2 This register selects the modes of the current sinks30..33 current. Default Access Description preview_off_after strobe 0b R/W ch ni 0 ca Select the switch off mode after strobe pulse preview_ctrl Te 2:1 5 curr3x_strobe_high www.austriamicrosystems.com/AS3676 0 normal preview/strobe mode 1 switch off preview after strobe duration has expired. To reinitiate the torch mode the preview_ctrl has to be set off and on again Preview is triggered by 00b R/W 00b off 01b software trigger (setting this bit automatically triggers preview) 10b CURR2 active high; set gpi_curr2_en=1 11b CURR2 active low; set gpi_curr2_en=1 Double current on CURR30...CURR33 during strobe function 0b R/W 0 normal strobe current (0-37.8mA) 1 double strobe current (0-75.6mA) 1v1-4 27 - 91 AS3676 Datasheet - D e t a i l e d D e s c r i p t i o n Table 29. Curr3 control2 Register (Continued) Curr3 control2 Addr: 12h Bit This register selects the modes of the current sinks30..33 current. Bit Name Default Access Description Select strobe input pin and current sink outputs (only if strobe_ctrl=10 or 11) 0 R/W 0 CURR1 is strobe input; CURR30...CURR33 flash output; set gpi_curr1_en=1 1 CURR30 is strobe input; CURR1, CURR2, CURR6 flash output; set gpi_curr30_en=1 al id strobe_pin 7 Curr3 strobe control Addr: 11h This register selects the modes of the current sinks30..33 current. Bit Name Default Access Description am lc s on A te G nt st il Bit lv Table 30. Curr3 strobe control Register Strobe is triggered by strobe_ctrl 1:0 00b R/W 00b off 01b software trigger (setting this bit automatically triggers strobe) 10b CURR1 (or CURR30 see strobe_pin) active high 11b CURR1 (or CURR30 see strobe_pin) active low Selects strobe mode strobe_mode 00b R/W Mode1 (Tstrobe=Ts; strobe trigger signal 10µs) 01b Mode 2 (Tstrobe=max Ts) 10b Mode 3 (Tstrobe = strobe signal) 11b not used Te ch ni ca 3:2 00b www.austriamicrosystems.com/AS3676 1v1-4 28 - 91 AS3676 Datasheet - D e t a i l e d D e s c r i p t i o n Table 30. Curr3 strobe control Register (Continued) Curr3 strobe control Addr: 11h Bit This register selects the modes of the current sinks30..33 current. Bit Name Default Access Description R/W 0001b 200 msec 0010b 300 msec 0011b 400 msec 0100b 500 msec 0101b 600 msec 0110b 700 msec 0111b 800 msec 1000b 900 msec 1001b 1000 msec 1010b 1100 msec 1011b 1200 msec 1100b 1300 msec 1101b 1400 msec 1110b 1500 msec 1111b 1600 msec am lc s on A te G nt st il 0000b 100 msec lv strobe_timing 7:4 0000b al id Selects strobe time (Ts) Table 31. Curr3x strobe Register Curr3x strobe Addr: 0Eh Bit Bit Name This register selects the strobe current of the current sinks30..33 Default Access Description ca Defines Strobe current of Current sinks curr30-33 curr3x_strobe 00 R/W ni 5:0 00h 0 mA 01h 0.6 mA (1.2mA if curr3x_strobe_high=1) .... .... 3Fh 37.8 mA (75.6mA if curr3x_strobe_high=1) ch Table 32. Curr3x preview Register Curr3x preview Addr: 0Fh Te Bit 5:0 Bit Name This register selects the preview current of the current sinks30..33 Default Access Description Defines Preview current of Current sinks curr30-33 curr3x_preview www.austriamicrosystems.com/AS3676 00 R/W 00h 0 mA 01h 0.6 mA .... .... 3Fh 37.8 mA 1v1-4 29 - 91 AS3676 Datasheet - D e t a i l e d D e s c r i p t i o n Table 33. Curr3x other Register Curr3x other Addr: 10h Bit This register selects the current of the current sinks30..33 Bit Name Default Access Description 00 R/W 00h 0 mA 01h 0.6 mA .... .... 3Fh 37.8 mA Table 34. Curr30 current Register Bit Curr30 current am lc s on A te G nt st il Addr: 40h lv curr3x_other 5:0 al id Selects CURR30...33 current, if CURR30...33 is not programmed for strobe/preview (curr30_mode...curr33_mode=11b) Bit Name This register selects the current of the current sink30 Default Access Description Selects curr30 current, if curr30 is not used for strobe/ preview (curr30_mode=11b) curr30_current 7:0 00 R/W 00h 0 mA 01h 0.15 mA .... .... FFh 38.25 mA Table 35. Curr31 current Register Addr: 41h Bit Bit Name Curr31 current This register selects the current of the current sink31 Default Access Description ca Selects curr31 current, if curr31 is not used for strobe/ preview (curr31_mode=11b) curr31_current 00 R/W ni 7:0 00h 0 mA 01h 0.15 mA .... .... FFh 38.25 mA ch Table 36. Curr32 current Register Curr32 current Addr: 42h Te Bit 7:0 Bit Name This register selects the current of the current sink32 Default Access Description Selects CURR32 current, if CURR32 is not used for strobe/ preview (curr32_mode=11b) curr32_current www.austriamicrosystems.com/AS3676 00 R/W 00h 0 mA 01h 0.15 mA .... .... FFh 38.25 mA 1v1-4 30 - 91 AS3676 Datasheet - D e t a i l e d D e s c r i p t i o n Table 37. Curr33 current Register Curr33 current Addr: 43h Bit This register selects the current of the current sink33 Bit Name Default Access Description 00 R/W 00h 0 mA 01h 0.15 mA .... .... FFh 38.25 mA Table 38. curr3 control1 Register curr3 control1 Addr: 03h lv curr33_current 7:0 al id Selects curr33 current, if curr33 is not used for strobe/ preview (curr33_mode=11b) This register select the mode of the current sinks30 - 33 am lc s on A te G nt st il Bit Bit Name Default Access Description Select the mode of the current sink curr30 curr30_mode 1:0 0 R/W 00b off 01b strobe/preview 10b curr30_current or curr3x_other PWM controlled 11b curr30_current or curr3x_other - don’t use curr3x_other if softdim_pattern=1, use curr30_current instead Select the mode of the current sink curr31 curr31_mode 3:2 0 R/W 00b off 01b strobe/preview 10b curr31_current or curr3x_other PWM controlled 11b curr31_current - don’t use curr3x_other if softdim_pattern=1, use curr31_current instead ca Select the mode of the current sink CURR32 curr32_mode 0 R/W ch ni 5:4 Te 7:6 curr33_mode www.austriamicrosystems.com/AS3676 00b off 01b strobe/preview 10b curr32_current or curr3x_other PWM controlled 11b curr32_current or curr3x_other - don’t use curr3x_other if softdim_pattern=1, use curr32_current instead Select the mode of the current sink curr33 0 R/W 00b off 01b strobe/preview 10b curr33_current or curr3x_other PWM controlled 11b curr33_current or curr3x_other- don’t use curr3x_other if softdim_pattern=1, use curr33_current instead 1v1-4 31 - 91 AS3676 Datasheet - D e t a i l e d D e s c r i p t i o n Table 39. Pattern control Register Pattern control Addr: 18h Bit This register controls the LED pattern Bit Name Default Access Description Additional CURR33 LED pattern control bit 0b R/W 0b CURR30 controlled according curr30_mode register 1b CURR30 controlled by LED pattern generator al id curr30_pattern 4 Additional CURR33 LED pattern control bit 0b R/W 0b CURR31 controlled according curr31_mode register 1b CURR31 controlled by LED pattern generator lv curr31_pattern 5 Additional CURR33 LED pattern control bit curr32_pattern 0b R/W 0b CURR32 controlled according curr33_mode register 1b CURR32 controlled by LED pattern generator am lc s on A te G nt st il 6 Additional CURR33 LED pattern control bit curr33_pattern 0b R/W 0b CURR33 controlled according curr33_pattern register 1b CURR33 controlled by LED pattern generator Te ch ni ca 7 www.austriamicrosystems.com/AS3676 1v1-4 32 - 91 AS3676 Datasheet - D e t a i l e d D e s c r i p t i o n 8.4.4 Current Sinks RGB1, RGB2, RGB3 These current sinks have a resolution of 8 bits and can sink up to 38.25mA. Table 40. Current Sinks RGB1, RGB2, RGB3 Parameters Parameter IBIT7 Current sink if Bit7 = 1 19.2 IBIT6 Current sink if Bit6 = 1 9.6 IBIT5 Current sink if Bit5 = 1 4.8 IBIT4 Current sink if Bit4 = 1 IBIT3 Current sink if Bit3 = 1 IBIT2 Current sink if Bit2 = 1 0.6 IBIT1 Current sink if Bit1 = 1 0.3 IBIT0 Current sink if Bit0 = 1 VRGBX 2.4 For V(RGBx) > 0.2V 1.2 Max Unit mA 0.15 IBIT7 and IBIT6 +5 % matching Accuracy Typ lv 1 Min am lc s on A te G nt st il m Condition al id Symbol RGB1, RGB2, RGB3 -5 all other bits -10 +10 % absolute Accuracy -15 +15 % Voltage compliance 0.2 CPO UT V 1. Variation between currents within this group 2. Variation between the programmed current and the actual current RGB Current Sinks Registers Table 41. curr rgb control Register Addr: 02h Bit Bit Name curr rgb control This register select the mode of the current sinks RGB1, RGB2, RGB3 Default Access Description Select the mode of the current sink RGB1 rgb1_mode 0 R/W ch ni ca 1:0 Te 3:2 5:4 rgb2_mode 00b off 01b on 10b PWM controlled 11b LED pattern controlled Select the mode of the current sink RGB2 0 R/W 00b off 01b on 10b PWM controlled 11b LED pattern controlled Select the mode of the current sink RGB3 rgb3_mode www.austriamicrosystems.com/AS3676 0 R/W 00b off 01b on 10b PWM controlled 11b LED pattern controlled 1v1-4 33 - 91 AS3676 Datasheet - D e t a i l e d D e s c r i p t i o n Table 42. Rgb1 current Register Rgb1 current Addr: 0Bh Bit Bit Name This register controls the RGB current sink current. Default Access Description 0 R/W 0 mA 01h 0.15 mA .... .... FFh 38.25 mA Table 43. Rgb2 current Register Rgb2 current Addr: 0Ch Bit Name This register controls the RGB current sink current. Default Access Description am lc s on A te G nt st il Bit lv rgb1_current 7:0 00h al id Defines current into Current sink RGB1 Defines current into Current sink RGB2 rgb2_current 7:0 0 R/W 00h 0 mA 01h 0.15 mA .... .... FFh 38.25 mA Table 44. Rgb3 current Register Rgb3 current Addr: 0Dh Bit Bit Name This register controls the RGB current sink current. Default Access Description Defines current into Current sink RGB3 rgb3_current 0 R/W 00h 0 mA 01h 0.15 mA .... .... FFh 38.25 mA Te ch ni ca 7:0 www.austriamicrosystems.com/AS3676 1v1-4 34 - 91 AS3676 Datasheet - D e t a i l e d D e s c r i p t i o n 8.4.5 General Purpose Current Sinks CURR4x These low voltage current sinks have a resolution of 8 bits and can sink up to 38.25mA. Table 45. CURR4x Sinks Characteristics Parameter IBIT7 Current sink if Bit7 = 1 19.2 IBIT6 Current sink if Bit6 = 1 9.6 IBIT5 Current sink if Bit5 = 1 4.8 IBIT4 Current sink if Bit4 = 1 IBIT3 Current sink if Bit3 = 1 IBIT2 Current sink if Bit2 = 1 0.6 IBIT1 Current sink if Bit1 = 1 0.3 IBIT0 Current sink if Bit0 = 1 VCURR41,42,43x 2.4 For V(CURRx) > 0.2V 1.2 Max Unit mA 0.15 IBIT7 and IBIT6 +5 % matching Accuracy Typ lv 1 Min am lc s on A te G nt st il m Condition al id Symbol CURR4x all other bits -5 -10 +10 % absolute Accuracy -15 +15 % Voltage compliance 0.2 CPO UT V 1. Variation between currents within this group 2. Variation between the programmed current and the actual current General Purpose Current Sinks CURR4x Registers Table 46. curr4 control Register curr4 control Addr: 04h Bit Bit Name This register selects the mode of the current sinks CURR41, CURR42, CURR43 Default Access Description ca Select the mode of the current sink CURR41 curr41_mode 0 R/W ch ni 1:0 Te 3:2 5:4 curr42_mode 00b off 01b on 10b PWM controlled 11b LED pattern controlled Select the mode of the current sink CURR42 0 R/W 00b off 01b on 10b PWM controlled 11b LED pattern controlled Select the mode of the current sink CURR43 curr43_mode www.austriamicrosystems.com/AS3676 0 R/W 00b off 01b on 10b PWM controlled 11b LED pattern controlled 1v1-4 35 - 91 AS3676 Datasheet - D e t a i l e d D e s c r i p t i o n Table 47. Curr41 current Register Curr41 current Addr: 13h Bit This register controls the curr41 current sink current. Bit Name Default Access Description curr41_current 7:0 0 R/W 00h 0 mA 01h 0.15 mA .... .... FFh 38.25 mA Curr42 current Addr: 14h This register controls the curr42 current sink current. Bit Name Default Access Description am lc s on A te G nt st il Bit lv Table 48. Curr42 current Register al id Defines current into Current sink CURR41 Defines current into Current sink CURR42 curr42_current 7:0 0 R/W 00h 0 mA 01h 0.15 mA .... .... FFh 38.25 mA Table 49. Curr43 current Register Addr: 15h Bit Bit Name Curr43 current This register controls the curr43 current sink current. Default Access Description Defines current into Current sink CURR43 curr43_current 8.4.6 0 ca 7:0 R/W 00h 0 mA 01h 0.15 mA .... .... FFh 38.25 mA LED Pattern Generator ni The LED pattern generator is capable of producing a pattern with 32 bits length and 1 second duration (31.25ms for nd rd th 4 each bit). The pattern itself can be started every second, every 2 , 3 up to 7 second . ch With this pattern all current sinks can be controlled. The pattern itself switches the configured current sources between 0 and their programmed current. Te If everything else is switched off, the current consumption in this mode is IACTIVE. (excluding current through switched on current source) and the charge pump, if required. The charge pump can be automatically switched on/off depending on the pattern (set register cp_auto_on on page 20=1) to reduce the overall current consumption. LED pattern start/stop depends on writing the pattern registers in correct order - it is recommended to use austriamicrosystems Android driver to ensure this. 4. All times can be extended by a factor of 8 by setting pattern_slow=1 (this result in a delay of up to 56s) www.austriamicrosystems.com/AS3676 1v1-4 36 - 91 AS3676 Datasheet - D e t a i l e d D e s c r i p t i o n Figure 15. LED Pattern Generator AS3676 for pattern_color = 0 $!! "# "% &" ' "% ()* !"# al id lv To select the different current sinks to be controlled by the LED pattern generator, see the ‘xxxx’_mode registers (where ‘xxxx’ stands for the to be controlled current sink, e.g. curr1_mode for CURR1 current sink). See also the description of the different current sinks. To allow the generator of a color patterns set the bit pattern_color to ‘1’. Then the pattern can be connected to CURRx as follows: am lc s on A te G nt st il Figure 16. LED Pattern Generator AS3676 for pattern_color = 1 &'()(*+,' *-*. ' $ % % $ !"# /*') % .( ,' Only those current sinks will be controlled, where the ‘xxxx’_mode register is configured for LED pattern. If the register bit pattern_slow is set, all pattern times are increased by a factor of eight. (bit duration: 250ms if pattern_color=0 / 800ms if pattern_color=1, delays between pattern up to 56s). Soft Dimming for Pattern ca The internal pattern generator can be combined with the internal pwm dimming modulator to obtain as shown in the following figure: ch ni Figure 17. Soft dimming Architecture for the AS3676 (softdim_pattern=1 and pattern_color = 1) Te www.austriamicrosystems.com/AS3676 1v1-4 !!"# $!"$#$ %!$&!!"!#! '(()( * +,-./ 37 - 91 AS3676 Datasheet - D e t a i l e d D e s c r i p t i o n With the AS3676 smooth fade-in and fade-out effects can be automatically generated. As there is only one dimming ramp generator and one pwm modulator following constraints have to be considered when setting up the pattern (applies only if pattern_color=1): Figure 18. Soft dimming example Waveform for CURR30-32 am lc s on A te G nt st il lv al id However using the identical dimming waveform for two channels is possible as shown in the following figure: Figure 19. Soft dimming example Waveform for CURR30-32 LED Pattern Registers Table 50. Pattern data0...Pattern data3 Registers Pattern data0, Pattern data1, Pattern data2, Pattern data3 ca Addr: 19h,1Ah,1Bh,1Ch Bit Bit Name 7:0 pattern_data[7:0] 1 7:0 Description 0 R/W Pattern data0 pattern_data[15:8] 0 R/W Pattern data1 pattern_data[23:16] 0 R/W Pattern data2 0 R/W Pattern data3 ch 7:0 Default Access ni 7:0 This registers contains the pattern data for the current sinks. pattern_data[31:24] Te 1. Update any of the pattern register only if none of the current sources is connected to the pattern generator ('xxxx'_mode must not be 11b). The pattern generator is automatically started at the same time when any of the current sources is connected to the pattern generator www.austriamicrosystems.com/AS3676 1v1-4 38 - 91 AS3676 Datasheet - D e t a i l e d D e s c r i p t i o n Table 51. Pattern control Register Pattern control Addr: 18h Bit This register controls the LED pattern Bit Name Default Access Description Defines the pattern type for the current sinks 0 pattern_delay 2:1 R/W 00b R/W 0b single 32 bit pattern (also set currX_mode = 11) 1b RGB pattern with each 10 bits (set all currX_mode = 11) al id pattern_color 0 Delay between pattern, details (see Table 54); together with pattern_delay2 sets the delay time between patterns 1 3 0b R/W 0 Pattern generator directly control current sources 1 ‘Soft Dimming’ is performed (see page 37) am lc s on A te G nt st il softdim_pattern lv Enable the ‘soft’ dimming feature for the pattern generator 1. If softdim_pattern=1, don’t set curr30_mode, curr31_mode, curr32_mode or curr33_mode to 11b. Table 52. gpio current Register Addr: 2Ch Bit Bit Name 4 pattern_delay2 gpio current Default Access 0 R/W Description Delay between pattern (see Table 54 on page 39); together with pattern_delay sets the delay time between patterns Pattern timing control pattern_slow 6 0 R/W 0b normal mode 1b slow mode (all pattern times are increased by a factor of eight) Table 53. Pattern End Register Addr: 54h Bit Name Default Access ca Bit Pattern End pattern_end 0 R ni 0 Description pattern_end is toggled from 0 to 1 (or from 1 to 0) at each end of the pattern just before restarting of the internal pattern generator at the first bit of the pattern data (can be used to synchronize the baseband software to the 1 pattern generator) ch 1. pattern_end toggles whenever the AS3676 is in active mode (see Section 8.12 Operating Modes on page 80) even if no pattern data has been setup. Table 54. LED Pattern timing Te pattern_delay2 pattern_slow pattern_delay[1..0] delay between patterns bit duration [ms] pattern [s] delay [s] duration (total cycle between time: pattern_color=0 pattern_color=1 patterns pattern + delay) 0 0 00 31 100 0 1 1 0 0 01 31 100 1 2 www.austriamicrosystems.com/AS3676 1v1-4 39 - 91 AS3676 Datasheet - D e t a i l e d D e s c r i p t i o n Table 54. LED Pattern timing pattern_delay2 pattern_slow pattern_delay[1..0] delay between patterns bit duration [ms] pattern [s] delay [s] duration cycle between (total time: pattern_color=0 pattern_color=1 patterns pattern + delay) 0 10 31 100 2 3 0 0 11 31 100 3 0 1 00 31 100 4 0 1 01 31 100 5 0 1 10 31 100 6 0 1 11 31 100 7 1 0 00 250 800 1 0 01 250 800 1 0 10 250 800 16 24 1 0 11 250 800 24 32 1 1 00 250 800 32 40 1 1 01 250 800 40 48 1 1 10 250 800 48 56 1 1 11 250 800 56 64 al id 0 4 5 6 7 lv 8 8 8 16 am lc s on A te G nt st il 0 1. Even by setting 000 for pattern delay, there is a small delay before the new patterns starts. 8.4.7 PWM Generator The PWM generator can be used for any current sink. The setting applies for all current sinks, which are controlled by the pwm generator (e.g. CURR1 is pwm controlled if curr1_mode = 10). The pwm modulated signal can switch on/off the current sinks and therefore depending on its duty cycle change the brightness of an attached LED. Internal PWM Generator ca The internal PWM generator uses the 2MHz internal clock as input frequency and its dimming range is 6 bits digital (2MHz / 2^6 = 31.3kHz pwm frequency) and 2 bits analog. Depending on the actual code in the register pwm_code the following algorithm is used: If pwm_code bit 7 = 1 ni Then the upper 6 bits (Bits 7:2) of pwm_code are used for the 6 bits PWM generation, which controls the selected currents sinks directly If pwm_code bit 7 =0 and bit 6 = 1 ch Then bits 6:1 of pwm_code are used for the 6 bits PWM generation. This signal controls the selected current sinks, but the analog current of these sinks is divided by 2 If pwm_code bit 7 and bit 6 = 0 Te Then bits 5:0 of pwm_code are used for the 6 bits PWM generation. This signal controls the selected current sinks, but the analog current of these sinks is divided by 4 www.austriamicrosystems.com/AS3676 1v1-4 40 - 91 AS3676 Datasheet - D e t a i l e d D e s c r i p t i o n Figure 20. PWM Control ! " # ! " # al id lv Automatic Up/Down Dimming If the register pwm_dim_mode is set to 01 (up dimming) or 10 (down dimming) the value within the register pwm_code th th am lc s on A te G nt st il is increased (up dimming) or decreased (down dimming) every time and amount (either 1/4 or 1/8 ) defined by the register pwm_dim_speed. The maximum value of 255 (completely on) and the minimum value of 0 (off) is never exceeded. It is used to smoothly and automatically dim the brightness of the LEDs connected to any of the current sinks. The PWM code is readable all the time (also during up and down dimming). The waveform for up dimming looks as follows (cycles omitted for simplicity): Figure 21. PWM Dimming Waveform for up dimming (pwm_dim_mode = 01); currX_mode = PWM controlled (not all steps shown) The internal pwm modulator circuit controls the current sinks as shown in the following figure: ca Figure 22. PWM Control Circuit (currX_mode = 10b (PWM controlled)); X = any current sink *"! ch ni Te $ % ! & !!" # %' AS3676 !&!() ) The adder logic (available for all current sinks) is intended to allow dimming not only from 0% to 100% (or 100% to 0%) of currX_current, but also e.g. from 10% to 110% (or 110% to 10%) of currX_current. The starting current for up dimming is defined by 0 + currX_adder and the end current is defined by currX_current + currX_adder. www.austriamicrosystems.com/AS3676 1v1-4 41 - 91 AS3676 Datasheet - D e t a i l e d D e s c r i p t i o n An overflow of the internal bus (8 Bits wide to the IDAC) has to be avoided by the register settings (currX_current + currX_adder must not exceed 255). If the register subX_en is set, the result from the pwm modulator is inverted logically. That means for up dimming the starting current is defined by currX_adder - 1 and the end current is defined by currX_adder - currX_current - 1. An overflow of the internal bus (8 Bits wide to the IDAC) has to be avoided by the register settings (currX_adder currX_current - 1 must not be below zero). al id Its purpose is to dim one channel e.g. CURR30 from e.g. 110% to 10% of curr30_current and at the same time dim another channel e.g. CURR31 from 20% to 120% of curr31_current. Note: The adder logic operates independent of the currX_mode setting, but its main purpose is to work together with the pwm modulator (improved up/down dimming) If the adder logic is not used anymore, set the bit currX_adder to 0. (Setting adder_currentX to 0 is not sufficient) lv At the end of up/down dimming, the pwm_code register keeps its final value (for up-dimming 255 and for downdimming 0). This can be used to identify the exact time, when up/down dimming is finished. am lc s on A te G nt st il Table 55. PWM Dimming Table Decrease by 1/4th every step Decrease by 1/8th every step Seconds Seconds Seconds Seconds Step %Dimming PWM %Dimming PWM 50msec/ Step 25msec/ Step 5msec/ Step 2.5msec/ Step 1 100,0 255 100,0 255 0,00s 0,00s 0,000s 0,000s 2 75,3 192 87,8 224 0,05s 0,03s 0,005s 0,003s 3 56,5 144 76,9 196 0,10s 0,05s 0,010s 0,005s 108 67,5 172 0,15s 0,08s 0,015s 0,008s 81 59,2 151 0,20s 0,10s 0,020s 0,010s 61 52,2 133 0,25s 0,13s 0,025s 0,013s 42,4 5 31,8 6 23,9 7 18,0 8 13,7 9 10,6 8,2 11 6,3 12 4,7 13 3,5 14 2,7 15 117 0,30s 0,15s 0,030s 0,015s 103 0,35s 0,18s 0,035s 0,018s 27 35,7 91 0,40s 0,20s 0,040s 0,020s 21 31,4 80 0,45s 0,23s 0,045s 0,023s 16 27,5 70 0,50s 0,25s 0,050s 0,025s 12 24,3 62 0,55s 0,28s 0,055s 0,028s 9 21,6 55 0,60s 0,30s 0,060s 0,030s 7 19,2 49 0,65s 0,33s 0,065s 0,033s 2,4 6 16,9 43 0,70s 0,35s 0,070s 0,035s 2,0 5 14,9 38 0,75s 0,38s 0,075s 0,038s 17 1,6 4 13,3 34 0,80s 0,40s 0,080s 0,040s 18 1,2 3 11,8 30 0,85s 0,43s 0,085s 0,043s 19 0,8 2 10,6 27 0,90s 0,45s 0,090s 0,045s 20 0,4 1 9,4 24 0,95s 0,48s 0,095s 0,048s 21 0,0 0 8,2 21 1,00s 0,50s 0,100s 0,050s 22 7,5 19 1,05s 0,53s 0,105s 0,053s 23 6,7 17 1,10s 0,55s 0,110s 0,055s 24 5,9 15 1,15s 0,58s 0,115s 0,058s Te ch 16 45,9 40,4 ni 10 46 35 ca 4 www.austriamicrosystems.com/AS3676 1v1-4 42 - 91 AS3676 Datasheet - D e t a i l e d D e s c r i p t i o n Table 55. PWM Dimming Table Decrease by 1/4th every step Decrease by 1/8th every step Seconds Seconds Seconds Seconds PWM 50msec/ Step 25msec/ Step 5msec/ Step 2.5msec/ Step 25 5,5 14 1,20s 0,60s 0,120s 0,060s 26 5,1 13 1,25s 0,63s 0,125s 0,063s 27 4,7 12 1,30s 0,65s 0,130s 0,065s 28 4,3 11 1,35s 0,68s 0,135s 0,068s 29 3,9 10 1,40s 0,70s 0,140s 0,070s 30 3,5 9 1,45s 0,73s 0,145s 0,073s 31 3,1 8 1,50s 0,75s 32 2,7 7 1,55s 0,78s 33 2,4 6 1,60s 0,80s 2,0 5 1,65s 1,6 4 1,2 34 35 36 37 38 39 lv PWM 0,150s 0,075s 0,155s 0,078s 0,160s 0,080s 0,83s 0,165s 0,083s 1,70s 0,85s 0,170s 0,085s 3 1,75s 0,88s 0,175s 0,088s 0,8 2 1,80s 0,90s 0,180s 0,090s 0,4 1 1,85s 0,93s 0,185s 0,093s 0,0 0 1,90s 0,95s 0,190s 0,095s am lc s on A te G nt st il %Dimming al id %Dimming Step PWM Generator Registers Table 56. Pwm control Register Addr: 16h Bit Bit Name Pwm control This register controls PWM generator Default Access Description ca Selects the dimming mode pwm_dim_mode 00b no dimming; actual content of register pwm_code is used for pwm generator 01b logarithmic up dimming (codes are increased). Start value is actual pwm_code 10b logarithmic down dimming (codes are decreased). Start value is actual pwm_code; switch off the dimmed current source after dimming is finished to avoid unnecessary quiescent current 11b NA R/W Te ch ni 2:1 00b www.austriamicrosystems.com/AS3676 1v1-4 43 - 91 AS3676 Datasheet - D e t a i l e d D e s c r i p t i o n Table 56. Pwm control Register (Continued) Pwm control Addr: 16h Bit This register controls PWM generator Bit Name Default Access Description Defines dimming speed by increase/decrease pwm_code R/W by 1/8 every 50 msec (total dim time 1.9s) 010b by 1/4 every 25 msec (total dim time 0.5s) 011b by 1/8 every 25 msec (total dim time 0.95s) 100b by 1/4 every 5 msec (total dim time 100ms) 101b by 1/8 every 5 msec (total dim time 190ms) al id 000b 001b th th th lv pwm_dim_speed by 1/4 every 50 msec (total dim time 1.0s) th th am lc s on A te G nt st il 5:3 th 000b th 110b by 1/4 every 2.5 msec (total dim time 50ms) 111b by 1/8 every 2.5 msec (total dim time 95ms) th Table 57. pwm code Register Addr: 17h Bit Bit Name pwm code This register controls the Pwm code. Default Access Description Selects the PWM code pwm_code 7:0 00b R/W 00h 0% duty cycle .... .... FFh 100% duty cycle Table 58. Adder Current 1 Register Adder Current 1 Bit Name Default Access ni Bit adder_current1 00b Description Selects the added current value – do not exceed together with currX_current the internal 8 Bit range (see text) R/W 00h 0 (represents 0mA) .... .... FFh 255 (represents 38.25mA) Te ch 7:0 This register defines the current which can be added to CURR1, CURR30, CURR41, RGB1 ca Addr: 30h www.austriamicrosystems.com/AS3676 1v1-4 44 - 91 AS3676 Datasheet - D e t a i l e d D e s c r i p t i o n Table 59. Adder Current 2 Register Adder Current 2 Addr: 31h Bit This register defines the current which can be added to CURR2, CURR31, CURR42, RGB2 Bit Name Default Access Description 00b R/W 00h 0 (represents 0mA) .... .... FFh 255 (represents 38.25mA) Table 60. Adder Current 3 Register Adder Current 3 Addr: 32h This register defines the current which can be added to CURR6, CURR32, CURR43, RGB3 am lc s on A te G nt st il Bit lv adder_current2 7:0 al id Selects the added current value – do not exceed together with currX_current the internal 8 Bit range (see text) Bit Name Default Access Description Selects the added current value – do not exceed together with currX_current the internal 8 Bit range (see text) adder_current3 7:0 00b R/W 00h 0 (represents 0mA) .... .... FFh 255 (represents 38.25mA) Table 61. Adder Current 4 Register Addr: 52h Bit Bit Name Adder Current 4 This register defines the current which can be added to CURR33 Default Access Description Selects the added current value – do not exceed together with currX_current the internal 8 Bit range (see text) adder_current4 00b R/W ca 7:0 00h 0 (represents 0mA) .... .... FFh 255 (represents 38.25mA) ni Table 62. Adder Enable 1 Register Addr: 33h Bit Name ch Bit Te 0 1 Adder Enable 1 Enables the adder circuit for the selected current sources Default Access rgb1_adder Description Enables adder circuit for current source RGB1 0 R/W 0 Normal Operation of the current source 1 adder_current1 gets added to the current source current Enables adder circuit for current source RGB2 rgb2_adder www.austriamicrosystems.com/AS3676 0 R/W 0 Normal Operation of the current source 1 adder_current2 gets added to the current source current 1v1-4 45 - 91 AS3676 Datasheet - D e t a i l e d D e s c r i p t i o n Table 62. Adder Enable 1 Register (Continued) Adder Enable 1 Addr: 33h Bit Enables the adder circuit for the selected current sources Bit Name Default Access Description Enables adder circuit for current source RGB3 0 R/W 0 Normal Operation of the current source 1 adder_current3 gets added to the current source current al id rgb3_adder 2 Enables adder circuit for current source CURR41 0 R/W 0 Normal Operation of the current source 1 adder_current1 gets added to the current source current lv curr41_adder 3 Enables adder circuit for current source CURR42 curr42_adder 0 R/W 0 Normal Operation of the current source 1 adder_current2 gets added to the current source current am lc s on A te G nt st il 4 Enables adder circuit for current source CURR43 curr43_adder 5 0 Normal Operation of the current source R/W adder_current3 gets added to the current source current Table 63. Adder Enable 2 Register Addr: 34h Bit Bit Name Adder Enable 2 Enables the adder circuit for the selected current sources Default Access Description Enables adder circuit for current source CURR1 curr1_adder curr2_adder ni 1 curr6_adder Te ch 2 3 4 0 ca 0 curr30_adder 0 R/W 0 Normal Operation of the current source 1 adder_current1 gets added to the current source current Enables adder circuit for current source CURR2 R/W 0 Normal Operation of the current source 1 adder_current2 gets added to the current source current Enables adder circuit for current source CURR6 0 R/W 0 Normal Operation of the current source 1 adder_current3 gets added to the current source current Enables adder circuit for current source CURR30 0 R/W 0 Normal Operation of the current source 1 adder_current1 gets added to the current source current Enables adder circuit for current source CURR31 curr31_adder www.austriamicrosystems.com/AS3676 0 R/W 0 Normal Operation of the current source 1 adder_current2 gets added to the current source current 1v1-4 46 - 91 AS3676 Datasheet - D e t a i l e d D e s c r i p t i o n Table 63. Adder Enable 2 Register (Continued) Adder Enable 2 Addr: 34h Bit Enables the adder circuit for the selected current sources Bit Name Default Access Description Enables adder circuit for current source CURR32 0 R/W 0 Normal Operation of the current source 1 adder_current3 gets added to the current source current al id curr32_adder 5 Enables adder circuit for current source CURR33 0 R/W 0 Normal Operation of the current source 1 adder_current4 gets added to the current source current lv curr33_adder 6 Addr: 35h Bit am lc s on A te G nt st il Table 64. Subtract Enable Register Bit Name Subtract Enable Enable the inversion from the signal from the pwm generator Default Access Description Inverts the signal from the pwm generator sub_en1 0 0 0 Direct Operation (no inversion) 1 The signal from the pwm generator for which the adder is enabled (curr1_adder = 1, curr30_adder = 1, rgb1_adder = 1, curr41_adder = 1) is inverted R/W Inverts the signal from the pwm generator sub_en2 1 0 0 Direct Operation (no inversion) 1 The signal from the pwm generator for which the adder is enabled (curr2_adder = 1, curr31_adder = 1, rgb2_adder = 1, curr42_adder = 1) is inverted R/W Inverts the signal from the pwm generator ca sub_en3 sub_en4 ch 3 ni 2 Direct Operation (no inversion) 1 The signal from the pwm generator for which the adder is enabled (curr6_adder = 1, curr32_adder = 1, rgb3_adder = 1, curr43_adder = 1) is inverted R/W Inverts the signal from the pwm generator 0 R/W 0 Direct Operation (no inversion) 1 The signal from the pwm generator for which the adder is enabled (curr33_adder = 1) is inverted ALS - Ambient Light Sensing Te 8.4.8 0 0 5 The ADC converts every 1ms the ambient light sensor signal from pin GPIO2/LIGHT . This signal is pre-processed with a offset defined by amb_offset and a gain defined by amb_gain (1/4, 1/2, 1, 2). Then it is low-pass filtered with a programmable cut-off frequency going from 0.25Hz to 32Hz. Increasing signals and decreasing signal can have individual cut-off frequencies adjustable from 0.25Hz to 32Hz (amb_filter_up and amb_filter_down). When setting amb_on=1, this filter is pre-loaded with the initial value from the ADC to startup the filter at a defined condition. 5. adc_select=0 (select GPIO2/LIGHT input) www.austriamicrosystems.com/AS3676 1v1-4 47 - 91 AS3676 Datasheet - D e t a i l e d D e s c r i p t i o n This filtered signal can be readout from the register amb_result<7:0>. Each of the available three channels (N=1, 2 or 3) has six 8-bit registers: al id - groupN_y0: define current multiplier for values below groupN_X1 - groupN_y3: define current multiplier for high values (actual starting point defined by groupN_x1,groupN_k1 and groupN_x2,groupN_k2) - groupN_x1, groupN_k1: If ADC reading is > groupN_x1 then groupN_k1 divided by 32 defines the slope of the first ramp - groupN_x2, groupN_k2: If ADC reading is > groupN_x2 then groupN_k2 divided by 32 defines the slope of the second ramp Each current sources has a 2 bit register (currX_amb_group) to select None, Group1, Group2 or Group3 of ambient light sensing. The calculations are done every 1ms resulting in a flicker-free 1000Hz update rate of the current sources. Te ch ni ca am lc s on A te G nt st il lv Note: A current source should not use adder or subtractor current at the same time together with ALS (e.g. curr1_adder=1 and curr1_amb_group=01, 10 or 11). For details see austriamicrosystems application note AN3676_ALS_with_adder_current. www.austriamicrosystems.com/AS3676 1v1-4 48 - 91 AS3676 Datasheet - D e t a i l e d D e s c r i p t i o n Figure 23. Ambient Light Sensor internal circuit AS3676 ",0&$215 ? >>C ./#$0$/& ) ) ",0&$2.!4? >>C )* !""#$&&' ( #&12&$' 3 ,- ,0&$2' 0!45##",0&$2 2,#$"00&,$.6 al id lv * +,- am lc s on A te G nt st il ,&= > !1& +2!157 2$#10&&' ( +2!153 +2!158 +2!153 +2!158 +2!157 ,- +2!15 +2!15 +2!15 /122: +2!15 &!00!&<$2 /122$-&#!12/$# ca "2!/122$-&#$&&,-+ 2$+,#&$29:/122$-& ;; ) &<$2"1-/&,!-# ?@AB.,,-+C 9: ni Ambient Light Sensor Registers ch Table 65. ALS control Register ALS control Addr: 90h Te Bit 0 Bit Name control ambient light sensing Default Access amb_on www.austriamicrosystems.com/AS3676 Description Enables the ambient light sensing feature 0 R/W 0 ambient light sensor disabled 1 ambient light sensor enabled 1v1-4 49 - 91 AS3676 Datasheet - D e t a i l e d D e s c r i p t i o n Table 65. ALS control Register (Continued) ALS control Addr: 90h Bit control ambient light sensing Bit Name Default Access Description 0 R/W gain = 1/4 01 gain = 1/2 10 gain = 1 11 gain = 2 Table 66. ALS filter Register ALS filter Addr: 91h control for ambient light sensor filtering Bit Name Default Access Description am lc s on A te G nt st il Bit lv amb_gain 2:1 00 al id Control Ambient Light Sensor preprocessing gain Controls the filter cut off (-3dB) frequency (increasing) amb_filter_up 2:0 000 R/W 000 0.25Hz 001 0.5Hz 010 1Hz 011 2Hz 100 4Hz 101 8Hz 110 16Hz 111 32Hz Controls the filter cut off (-3dB) frequency (decreasing) amb_filter_down 000 R/W ch ni ca 6:4 000 0.25Hz 001 0.5Hz 010 1Hz 011 2Hz 100 4Hz 101 8Hz 110 16Hz 111 32Hz Table 67. ALS offset Register Addr: 92h Bit Name Te Bit 7:0 ALS offset Default Access amb_offset 00h R/W Description Controls the offset of the ambient light sensor Table 68. ALS result Register Addr: 93h Bit Bit Name 7:0 amb_result ALS result Default Access www.austriamicrosystems.com/AS3676 00h R/W Description Filtered result of the ambient light sensor value 1v1-4 50 - 91 AS3676 Datasheet - D e t a i l e d D e s c r i p t i o n Table 69. ALS curr12 group Register ALS curr12 group Addr: 94h Bit controls the group mapping for CURR1 and CURR2 Bit Name Default Access Description CURR1 is mapped to ambient light sensor group curr1_amb_group 00 R/W None - no ambient light sensor control 01 Group 1 10 Group 2 11 Group 3 al id 1:0 00 curr2_amb_group 00 R/W 00 None - no ambient light sensor control 01 Group 1 10 Group 2 am lc s on A te G nt st il 3:2 lv CURR2 is mapped to ambient light sensor group 11 Group 3 Table 70. ALS rgb group Register Addr: 95h Bit Bit Name ALS rgb group controls the group mapping for RGB1, RGB2, RGB3 and CURR6 Default Access Description RGB1 is mapped to ambient light sensor group 1:0 rgb1_amb_group 00 R/W 00 None - no ambient light sensor control 01 Group 1 10 Group 2 11 Group 3 RGB2 is mapped to ambient light sensor group rgb2_amb_group 00 R/W rgb3_amb_group 00 Te 7:6 curr6_amb_group www.austriamicrosystems.com/AS3676 None - no ambient light sensor control 01 Group 1 10 Group 2 11 Group 3 RGB3 is mapped to ambient light sensor group R/W ch 5:4 ni ca 3:2 00 00 None - no ambient light sensor control 01 Group 1 10 Group 2 11 Group 3 CURR6 is mapped to ambient light sensor group 00 R/W 00 None - no ambient light sensor control 01 Group 1 10 Group 2 11 Group 3 1v1-4 51 - 91 AS3676 Datasheet - D e t a i l e d D e s c r i p t i o n Table 71. ALS curr3x group Register ALS curr3x group Addr: 96h Bit controls the group mapping for CURR30, CURR31, CURR32 and CURR33 Bit Name Default Access Description CURR30 is mapped to ambient light sensor group curr30_amb_group 00 R/W None - no ambient light sensor control 01 Group 1 10 Group 2 11 Group 3 al id 1:0 00 curr31_amb_group 00 R/W 00 None - no ambient light sensor control 01 Group 1 10 Group 2 am lc s on A te G nt st il 3:2 lv CURR31 is mapped to ambient light sensor group 11 Group 3 CURR32 is mapped to ambient light sensor group 5:4 curr32_amb_group 00 R/W 00 None - no ambient light sensor control 01 Group 1 10 Group 2 11 Group 3 CURR33 is mapped to ambient light sensor group 7:6 curr33_amb_group 00 R/W 00 None - no ambient light sensor control 01 Group 1 10 Group 2 11 Group 3 Table 72. ALS curr4x group Register controls the group mapping for CURR41, CURR42 and CURR43 Bit Name Default Access ni Bit curr41_amb_group 00 Te 3:2 curr42_amb_group www.austriamicrosystems.com/AS3676 Description CURR41 is mapped to ambient light sensor group R/W ch 1:0 ALS curr4x group ca Addr: 97h 00 None - no ambient light sensor control 01 Group 1 10 Group 2 11 Group 3 CURR42 is mapped to ambient light sensor group 00 R/W 00 None - no ambient light sensor control 01 Group 1 10 Group 2 11 Group 3 1v1-4 52 - 91 AS3676 Datasheet - D e t a i l e d D e s c r i p t i o n Table 72. ALS curr4x group Register (Continued) ALS curr4x group Addr: 97h Bit controls the group mapping for CURR41, CURR42 and CURR43 Bit Name Default Access Description CURR43 is mapped to ambient light sensor group 00 R/W 01 Group 1 10 Group 2 11 Group 3 Group1 Table 73. ALS group 1 Y0 Register ALS group 1 Y0 am lc s on A te G nt st il Addr: 98h al id curr43_amb_group None - no ambient light sensor control lv 5:4 00 Bit Bit Name 7:0 group1_y0 Default Access 00h Description R/W Group 1 y0 value - divided by 256 Table 74. ALS group 1 Y3 Register Addr: 99h Bit Bit Name 7:0 group1_y3 ALS group 1 Y3 Default Access 00h Description R/W Group 1 y3 value - divided by 256 Table 75. ALS group 1 X1 Register Addr: 9Ah Bit Bit Name 7:0 group1_x1 ALS group 1 X1 Default Access 00h Description R/W Group 1 x1 value Table 76. ALS group 1 K1 Register Addr: 9Bh Bit Name 7:0 group1_k1 Default Access ca Bit ALS group 1 K1 00h R/W Description Group 1 k1 value - divided by 32 defines first slope ni Table 77. ALS group 1 X2 Register Addr: 9Ch Bit Default Access group1_x2 00h ch 7:0 Bit Name ALS group 1 X2 Description R/W Group 1 x2 value Table 78. ALS group 1 K2 Register Te Addr: 9Dh Bit Bit Name 7:0 group1_k2 ALS group 1 K2 Default Access www.austriamicrosystems.com/AS3676 00h R/W Description Group 1 k2 value- value divided by 32 defines second slope 1v1-4 53 - 91 AS3676 Datasheet - D e t a i l e d D e s c r i p t i o n Group2 Table 79. ALS group 2 Y0 Register Addr: 9Eh Bit Name 7:0 group2_y0 Default Access 00h Description R/W Group 2 y0 value - divided by 256 Table 80. ALS group 2 Y3 Register Addr: 9Fh Bit Name 7:0 group2_y3 Default Access 00h Description R/W Group 2 y3 value - divided by 256 Table 81. ALS group 2 X1 Register Addr: A0h Bit Name 7:0 group2_x1 Default Access Description am lc s on A te G nt st il Bit ALS group 2 X1 lv Bit ALS group 2 Y3 al id Bit ALS group 2 Y0 00h R/W Group 2 x1 value Table 82. ALS group 2 K1 Register Addr: A1h Bit Bit Name 7:0 group2_k1 ALS group 2 K1 Default Access 00h R/W Description Group 2 k1 value - divided by 32 defines first slope Table 83. ALS group 2 X2 Register Addr: A2h Bit Bit Name 7:0 group2_x2 ALS group 2 X2 Default Access 00h Description R/W Group 2 x2 value Table 84. ALS group 2 K2 Register Addr: A3h Bit Name 7:0 group2_k2 Default Access 00h ca Bit ALS group 2 K2 Group3 R/W Description Group 2 k2 value- value divided by 32 defines second slope ni Table 85. ALS group 3 Y0 Register Addr: A4h Bit Name ch Bit ALS group 3 Y0 Default Access group3_y0 7:0 00h Description R/W Group 3 y0 value - divided by 256 Te Table 86. ALS group 3 Y3 Register Addr: A5h Bit Bit Name 7:0 group3_y3 ALS group 3 Y3 Default Access www.austriamicrosystems.com/AS3676 00h Description R/W Group 3 y3 value - divided by 256 1v1-4 54 - 91 AS3676 Datasheet - D e t a i l e d D e s c r i p t i o n Table 87. ALS group 3 X1 Register Addr: A6h Bit Bit Name 7:0 group3_x1 ALS group 3 X1 Default Access 00h Description R/W Group 3 x1 value Table 88. ALS group 3 K1 Register Bit Bit Name 7:0 group3_k1 ALS group 3 K1 Default Access 00h R/W al id Addr: A7h Description Group 3 k1 value - divided by 32 defines first slope Addr: A8h Bit Name 7:0 group3_x2 Default Access 00h Description R/W Group 3 x2 value am lc s on A te G nt st il Bit ALS group 3 X2 lv Table 89. ALS group 3 X2 Register Table 90. ALS group 3 K2 Register Addr: A9h Bit Bit Name 7:0 group3_k2 8.4.9 ALS group 3 K2 Default Access 00h R/W Description Group 3 k2 value- value divided by 32 defines second slope DLS - Dynamic Luminance Scaling Input The pin GPIO1/DLS can be used for dynamic backlight scaling input. Dynamic backlight scaling is used to reduce the power of the backlight especially when showing dark picture contents on the display. The control unit to operate DLS is the display processor sending a PWM signal to the AS3676 and in parallel changing the display content to compensate for a reduced brightness backlight. Table 91. DLS Input Parameters Symbol fDLS Parameter Condition Min DLS input frequency range pin GPIO1/DLS if used for DLS (any bit set in register DLS mode control1 or DLS mode control2) 25 Typ Max Unit 1000 kHz ca Note: If the input signal from the PWM (e.g. for DLS) is '0', the voltage on the current sink is captured with a S/H. Do not enable DLS operation using the DCDC step up converter if the input GPIO1/DLS is continuously at 0. Te ch ni When this feature is enabled, the current sink current is disabled when the pin GPIO1/DLS is at 0. If GPIO1/DLS=1, the current sink operates at its programmed current as shown in Figure 24: www.austriamicrosystems.com/AS3676 1v1-4 55 - 91 AS3676 Datasheet - D e t a i l e d D e s c r i p t i o n Figure 24. DLS (Dynamic Luminance Scaling) internal circuit shown for a single current sink "#$%"&' AS3676 %* " ! ( ) +!), am lc s on A te G nt st il lv "-$%* +!), al id Table 92. DLS mode control1 Register DLS mode control1 Addr: 56h Setup which current sinks are connected to the DLS; if set to '1' the correspond current source (sink) is combined with the DLS input Bit Name 0 curr30_on_dls 0 R/W 1 curr31_on_dls 0 R/W 2 curr32_on_dls 0 R/W 3 curr33_on_dls 0 R/W 4 rgb1_on_dls 0 R/W 5 rgb2_on_dls 0 R/W 0 R/W ni rgb3_on_dls ch 6 Default Access ca Bit Description 0 CURR30 current sink is not combined with DLS 1 CURR30 current sink is combined with DLS 0 CURR31 current sink is not combined with DLS 1 CURR31 current sink is combined with DLS 0 CURR32 current sink is not combined with DLS 1 CURR32 current sink is combined with DLS 0 CURR33 current sink is not combined with DLS 1 CURR33 current sink is combined with DLS 0 RGB1 current sink is not combined with DLS 1 RGB1 current sink is combined with DLS 0 RGB2 current sink is not combined with DLS 1 RGB2 current sink is combined with DLS 0 RGB3 current sink is not combined with DLS 1 RGB3 current sink is combined with DLS Te Table 93. DLS mode control2 Register DLS mode control2 Addr: 57h Bit Bit Name 0 curr1_on_dls Setup which current sinks are connected to the DLS; if set to '1' the correspond current source (sink) is combined with the DLS input Default Access www.austriamicrosystems.com/AS3676 0 R/W Description 0 CURR1 current sink is not combined with DLS 1 CURR1 current sink is combined with DLS 1v1-4 56 - 91 AS3676 Datasheet - D e t a i l e d D e s c r i p t i o n Table 93. DLS mode control2 Register (Continued) DLS mode control2 Addr: 57h Setup which current sinks are connected to the DLS; if set to '1' the correspond current source (sink) is combined with the DLS input curr2_on_dls 0 R/W 2 curr41_on_dls 0 R/W 3 curr42_on_dls 0 R/W 4 curr43_on_dls 0 R/W 7 curr6_on_dls Description 0 CURR2 current sink is not combined with DLS 1 CURR2 current sink is combined with DLS 0 CURR41 current sink is not combined with DLS 1 CURR41 current sink is combined with DLS 0 CURR42 current sink is not combined with DLS 1 CURR42 current sink is combined with DLS 0 CURR43 current sink is not combined with DLS 1 CURR43 current sink is combined with DLS 0 CURR6 current sink is not combined with DLS 1 CURR6 current sink is combined with DLS al id 1 8.5 Default Access lv Bit Name am lc s on A te G nt st il Bit 0 R/W General Purpose Input / Output The GPIOs are a highly-configurable general purpose input/output pins which can be used for the following functionality: Digital Schmitt Trigger Input Output with 4mA Driving Capability at 2.8V Supply (VANA) Tristate Output Analog Input to the ADC Default Mode for GPIO1/DLS, GPIO2/LIGHT and VANA/GPI is Input (Pull-Down) Digital Table 94. GPIO Pin Function Summary GPIO1/DLS GPIO2/LIGHT Additional Function Digital Input, Totem-Pole Output (Push/Pull), ADC Input, PWM Input, DLS input (see page Open Drain (PMOS or NMOS), High-Z, Pull55) Down or Pull-Up Resistor Digital Input, Totem-Pole Output (Push/Pull), ADC Input, ALS - light sensor input (see page Open Drain (PMOS or NMOS), High-Z, Pull47) Down or Pull-Up Resistor Digital Input 1 ADC Input, LDO output ni VANA/GPI Configuration ca GPIO Pin Te ch 1. As VANA/GPI is used as a power supply for GPIO1/DLS, GPIO2/LIGHT, it is not recommended to use it as a digital input. www.austriamicrosystems.com/AS3676 1v1-4 57 - 91 AS3676 Datasheet - D e t a i l e d D e s c r i p t i o n Figure 25. GPIOs and VANA/GPI Blockdiagram !"#"$ "%!%#&' !%#$"(!' 12 *("+" *("+!', .#*("+/#, .#)'*("+(!%,- /.0 + al id *("+ ' *("+(!% *("+" *("+3+1! *("+!', .#*("+/#, .#)'*("+(!%,- lv AS3676 '*("+(!%, am lc s on A te G nt st il ' )!%*("+(!%,- *("+!', .#*("+/#, .#)'*("+(!%,- *("+(!% *("+" *("+3+1! 4 *("+!', .#*("+/#, .#)'*("+(!%,- '*("+(!%, ' )!%*("+(!%,- 8.5.1 Unused GPIO Pins If the pins GPIO1/DLS or GPIO2/LIGHT are not used, they can be left open (an internal pulldown, which is enabled by default, will pull them to GND). 8.5.2 GPIO Characteristics ca Table 95. GPIO DC Characteristics Symbol VGPIO Min Pull up/Pull down Resistance enabled by gpio1_pulls and gpio2_pulls Supply Voltage =VANA/GPI High Level Input Voltage ch VIH Condition ni Rpull Parameter Te VIL VHYS ILEAK VOH Low Level Input Voltage pins GPIO1/DLS and GPIO2/ LIGHT Max Unit 30 75 k 1.8 3.35 V 55% of VANA/ GPI 5% of VANA/ GPI Input Leakage Current To V2_5 or VANA/GPI and VSS www.austriamicrosystems.com/AS3676 V 28% of VANA/ GPI Hysteresis High Level Output Voltage Typ -5 0.8·VANA /GPI at Iout 1v1-4 V V 5 µA V 58 - 91 AS3676 Datasheet - D e t a i l e d D e s c r i p t i o n Table 95. GPIO DC Characteristics Parameter Low Level Output Voltage VOL IOUT Min Typ at Iout Driving Capability VANA/GPI = 2.8V, gpio1_low_curr or gpio2_low_curr= 1 4 VANA/GPI = 2.8V, gpio1_low_curr or gpio2_low_curr = 0 16 V am lc s on A te G nt st il GPIO output 1 pF lv Table 96. GPIO output 1 Register Bit Unit 0.2· VANA/ GPI 50 GPIO Registers Addr: 05h Max mA Capacitive Load CLOAD 8.5.3 Condition al id Symbol Bit Name This register controls GPIO outputs. Default Access Description Enables the CURR1 input gpi_curr1_en 0 0 R/W 0 input disabled 1 input enabled Enables the CURR2 input gpi_curr2_en 1 0 R/W 0 input disabled 1 input enabled Enables the CURR6 input gpi_curr6_en 2 0 R/W 0 input disabled 1 input enabled Enables the VANA/GPI input gpi_en gpi_curr30_en ni 4 gpi_curr31_en ch 5 Te 6 7 0 ca 3 gpi_curr32_en 0 R/W 0 input disabled 1 input enabled Enables the CURR30 input R/W 0 input disabled 1 input enabled Enables the CURR31 input 0 R/W 0 input disabled 1 input enabled Enables the CURR32 input 0 R/W 0 input disabled 1 input enabled Enables the CURR33 input gpi_curr33_en www.austriamicrosystems.com/AS3676 0 R/W 0 input disabled 1 input enabled 1v1-4 59 - 91 AS3676 Datasheet - D e t a i l e d D e s c r i p t i o n Table 97. GPIO signal 1 Register GPIO signal 1 Addr: 06h This register controls GPIO outputs. Bit Name Default Access Description 0 gpi_curr1_in N/A R Reads a logic signal from pin CURR1; if gpi_curr1_en=1 1 gpi_curr2_in N/A R Reads a logic signal from pin CURR2; if gpi_curr2_en=1 2 gpi_curr6_in N/A R Reads a logic signal from pin CURR6; if gpi_curr6_en=1 3 gpi_in N/A R Reads a logic signal from pin CURR6; if gpi_en=1 4 gpi_curr30_in N/A R Reads a logic signal from pin CURR30; if gpi_curr30_en=1 5 gpi_curr31_in N/A R Reads a logic signal from pin CURR31; if gpi_curr31_en=1 6 gpi_curr32_in N/A R Reads a logic signal from pin CURR32; if gpi_curr32_en=1 7 gpi_curr33_in N/A R Reads a logic signal from pin CURR33; if gpi_curr33_en=1 lv al id Bit Addr: 50h am lc s on A te G nt st il Table 98. GPIO output 2 Register GPIO output 2 This register controls GPIO outputs. Bit Bit Name Default Access Description 0 gpio1_out 0 R/W Writes a logic signal to pin GPIO1/DLS; this is independent of any other bit setting e.g., gpio1_mode Table 100. 1 gpio2_out 0 R/W Writes a logic signal to pin GPIO1/DLS; this is independent of any other bit setting e.g., gpio2_mode Table 100 Enables the RGB1 input gpi_rgb1_en 2 0 R/W 0 input disabled 1 input enabled Enables the RGB2 input gpi_rgb2_en 3 0 R/W 0 input disabled 1 input enabled Enables the RGB3 input gpi_rgb3_en ni gpi_curr41_en ch 5 Te 6 7 0 ca 4 gpi_curr42_en 0 R/W 0 input disabled 1 input enabled Enables the CURR41 input R/W 0 input disabled 1 input enabled Enables the CURR42 input 0 R/W 0 input disabled 1 input enabled Enables the CURR43 input gpi_curr43_en www.austriamicrosystems.com/AS3676 0 R/W 0 input disabled 1 input enabled 1v1-4 60 - 91 AS3676 Datasheet - D e t a i l e d D e s c r i p t i o n Table 99. GPIO signal 2 Register GPIO signal 2 Addr: 51h This register controls GPIO outputs. Bit Name Default Access Description 0 gpio1_in N/A R Reads a logic signal from pin GPIO1/DLS; this is independent of any other setting e.g.,Table 100 except gpio1_pulls=11 1 gpio2_ in N/A R Reads a logic signal from pin GPIO2/LIGHT; this is independent of any other setting e.g.,Table 100 except gpio2_pulls=11 2 gpi_rgb1_in N/A R Reads a logic signal from pin RGB1; if gpi_rgb1_en=1 3 gpi_rgb2_in N/A R Reads a logic signal from pin RGB2; if gpi_rgb2_en=1 4 gpi_rgb3_in N/A R Reads a logic signal from pin RGB3; if gpi_rgb3_en=1 5 gpi_curr41_in N/A R Reads a logic signal from pin CURR41; if gpi_curr41_en=1 6 gpi_curr42_in N/A R Reads a logic signal from pin CURR42; if gpi_curr42_en=1 7 gpi_curr43_in N/A R Reads a logic signal from pin CURR43; if gpi_curr43_en=1 am lc s on A te G nt st il lv al id Bit Table 100. GPIO control Register GPIO control Addr: 1Eh Bit Bit Name This register controls GPIO and GPIO1 pin functions. Default Access Description Defines the direction for pin GPIO1/DLS gpio1_mode 1:0 00 R/W 00 Input only 01 Output (push and pull) 10 Output (open drain, only push; only NMOS is active) 11 Output (open drain, only pull; only PMOS is active) ca Adds the following pullup/pulldown to pin GPIO1/DLS; this is independent of setting of bits gpio1_mode gpio1_pulls 01 R/W ch ni 3:2 gpio2_mode Te 5:4 www.austriamicrosystems.com/AS3676 00 None 01 Pulldown 10 Pullup 11 ADC input (gpio1_mode = XX); recommended for analog signals Defines the direction for pin GPIO2/LIGHT 00 R/W 00 Input only 01 Output (push and pull) 10 Output (open drain, only push; only NMOS is active) 11 Output (open drain, only pull; only PMOS is active) 1v1-4 61 - 91 AS3676 Datasheet - D e t a i l e d D e s c r i p t i o n Table 100. GPIO control Register (Continued) GPIO control Addr: 1Eh Bit Bit Name This register controls GPIO and GPIO1 pin functions. Default Access Description Adds the following pullup/pulldown to pin GPIO2/LIGHT; this is independent of setting of bits gpio2_mode R/W 01 Pulldown 10 Pullup 11 ADC input (gpio2_mode = XX); recommended for analog signals Table 101. GPIO driving cap Register Bit GPIO driving cap am lc s on A te G nt st il Addr: 20h al id 01 None lv gpio2_pulls 7:6 00 Bit Name This register enables low current mode for GPIOs. Default Access Description Defines the driving capability of pin GPIO1/DLS gpio1_low_curr 0 0 R/W 0 Iout 1 Iout /4 Defines the driving capability of pin GPIO2/LIGHT gpio2_low_curr 0 R/W 0 Iout 1 Iout /4 Te ch ni ca 1 www.austriamicrosystems.com/AS3676 1v1-4 62 - 91 AS3676 Datasheet - D e t a i l e d D e s c r i p t i o n 8.6 LED Test Figure 26. LED Function Testing al id % $$ %&' )"!"!* + " lv ! am lc s on A te G nt st il ((( ((( AS3676 The AS3676 supports the verification of the functionality of all the connected LEDs (open and shorted LEDs can be detected). This feature is especially useful in production test to verify the correct assembly of the LEDs, all its connectors and cables. It can also be used in the field to verify if any of the LEDs is damaged. A damaged LED can then be disabled (to avoid unnecessary currents). The current sources, charge pump, dcdc converter and the internal ADC are used to verify the forward voltage of the LEDs. If this forward voltage is within the specified limits of the LEDs, the external circuitry is assumed to operate. 8.6.1 Function Testing for single LEDs connected to the Charge Pump For any current source connected to the charge pump (CURR30-33) where only one LED is connected between the charge pump and the current sink (see Figure 1) use: ca Table 102. Function Testing for LEDs connected to the Charge Pump Action Example Code Switch on the charge pump and set it into manual 1:2 mode (to avoid automatic mode switching during measurements) Reg 23h 14h (cp_mode = 1:2, manual) Reg 00h 04h (cp_on = 1) 2 Switch on the current sink for the LED to be tested e.g. for register CURR31set to 9mA use Reg 10h 0Fh (curr3x_other = 9mA) Reg 03h 0ch (curr31_mode = curr31_other) 3 Measure with the ADC the voltage on CPOUT Reg 26h 95h (adc_select=CPOUT,start ADC) Fetch the ADC result from Reg 27h and 28h 4 Measure with the ADC the voltage on the switched on current sink Reg 26h 8bh (adc_select=CURR31,start ADC) Fetch the ADC result from Reg 27h and 28h 5 Switch off the current sink for the LED to be tested Reg 03h 00h (curr31_mode = off) 6 Compare the difference between the ADC measurements (which is the actual voltage across the tested LED) against the specification limits of the tested LED Calculation performed in baseband uProcessor Te ch 1 ni Step www.austriamicrosystems.com/AS3676 1v1-4 63 - 91 AS3676 Datasheet - D e t a i l e d D e s c r i p t i o n Table 102. Function Testing for LEDs connected to the Charge Pump Action Example Code 7 Do the same procedure for the next LED starting from point 2 Jump to 2. If not all the LEDs have been tested 8 Switch off the charge pump set charge pump automatic mode Reg 00h 00h (cp_on = 0) Reg 23h 00h 8.6.2 Function Testing for LEDs connected to the Step Up DCDC Converter al id Step For LEDs connected to the DCDC converter (usually current sinks CURR1,CURR2 and CURR6) use the following procedure: Table 103. Function Testing for LEDs connected to the DCDC converter Action Example Code 1 Switch on the current sink for the LED string to be tested (CURR1,2 or 6) e.g. Test LEDs on CURR1: Reg 01h 01h (curr1_mode=on) Reg 09h 3ch (curr1_current = 9mA) 2 Select the feedback path for the LED string to be tested (e.g. step_up_fb = 01 for LED string on CURR1) Reg 21h 02h (step_up_fb=curr1) am lc s on A te G nt st il 3 lv Step Set the current for step_up_vtuning exactly above e.g. 4 LEDs with UfMAX = 4.1V gives 17.25V +6% = the maximum forward voltage of the tested LED 18.29V; if R2=1M and R3 = open, then select string + 0.6V (for the current sink) + 0.25V; add 6% step_up_vtuning = 18 (Reg 21h 92h; results in margin (accuracy of step_up_vtuning); this sets the 19.25V over voltage protection voltage – Table 9 on maximum output voltage limit for the DCDC page 14) converter Set step_up_prot = 1 Reg 22h 04h 5 Switch on the DCDC converter Reg 00h 08h 6 Wait 80ms (DCDC_FB settling time) 7 Measure the voltage on DCDC_FB (ADC) Reg 26h 96h (adc_select=DCDC_FB, start ADC; Fetch the ADC result from Reg 27h and 28h) 8 If the voltage on DCDC_FB is above 1.0V, the tested LED string is broken – then skip the following steps (Code >199h) 9 Switch off the over voltage protection (step_up_prot=0) Reg 22h 00h 10 Reduce step_up_vtuning step by step until the measured voltage on DCDC_FB (ADC) is above 1.0V. After changing step_up_vtuning always wait 80ms, before AD-conversion e.g.: Reg 21h 62h (step_up_vtuning=12): ADC result=1,602V Measure voltage on DCDC_FB e.g. DCDC_FB=1.602V Switch off the DCDC converter Reg 00h 00h ch 12 ni 11 ca 4 Te 13 The voltage on the LED string can be calculated now as follows (R4 = open): VLEDSTRING = V(DCDC_FB) + I(step_up_vtuning) * R2 – 0.5V (current sinks feedback voltage: VFB2). V(DCDC_FB) = ADC Measurement from point 11 I(step_up_vtuning) = last setting used for point 10 14 e.g.: VLED = (1.602V + 12V – 0.5V) / 4 = 3.276V Compare the calculated value against the specification limits of the tested LEDs Note: With the above described procedures electrically open and shorted LEDs can be automatically detected www.austriamicrosystems.com/AS3676 1v1-4 64 - 91 AS3676 Datasheet - D e t a i l e d D e s c r i p t i o n 8.7 Analog-to-Digital Converter The AS3676 has a built-in 10-bit successive approximation analog-to-digital converter (ADC). It is internally supplied by V2_5, which is also the full-scale input range (0V defines the ADC zero-code). For input signals exceeding V2_5 (typ. 2.5V) a resistor divider with a gain of 0.4 (Ratioprescaler) is used to scale the input of the ADC converter. Consequently the resolution is: Table 104. ADC Input Ranges, Compliances and Resolution Input Range VLSB Note DCDC_FB, GPIO1/DLS, GPIO2/ LIGHT, VANA/GPI, audio controlled LED buffer output 0V-2.5V 2.44mV VLSB=2.5/1024 ADCTEMP_CODE -30°C to 125°C 1 / ADCTC junction temperature CURR3x, CURR4x, RGBx VBAT, CPOUT 0V-5.5V 6.1mV VLSB=(2.5/1024)/0.4; internal resistor divider used CURR1, CURR2, CURR6 0V-1.0V 2.44mV VLSB=2.5/1024 lv am lc s on A te G nt st il Table 105. ADC Parameters al id Channels (Pins) Symbol Parameter Condition Resolution Min Typ Max 10 see Table 104 Input Voltage Range DNL Differential NonLinearity ± 0.25 LSB INL Integral Non-Linearity ± 0.5 LSB Vos Input Offset Voltage ± 0.25 LSB Rin Input Impedance Cin Input Capacitance VSUPPLY (V2_5) Power Supply Range ± 2%, internally trimmed. 2.5 V Idd Power Supply Current During conversion only. 300 µA Idd Power Down Current 100 nA TTOL Temperature Sensor Accuracy ADCTOFFSET ADC temperature measurement offset value 9 ca ni R 100 @ 25 C -10 +10 V M pF C 375 C C/ Code Code temperature coefficient Temperature change per ADC LSB 1.293 9 Ratio of Prescaler For all low voltage current sinks, CPOUT and VBAT 0.4 ch RatioPRESCALE VSS Bit VIN ADCTC VSUPPLY = V2_5 Unit Transient Parameters (2.5V, 25 ºC) Te Tc Conversion Time fc Clock Frequency ts Settling Time of S&H All signals are internally generated and triggered by start_conversion 27 µs 1.0 MHz 16 µs The junction temperature (TJUNCTION) can be calculated with the following formula (ADCTEMP_CODE is the adc conversion result for channel 17h selected by register adc_select = 010111b): TJUNCTION [C] = ADCTOFFSET - ADCTC · ADCTEMP_CODE www.austriamicrosystems.com/AS3676 1v1-4 (EQ 5) 65 - 91 AS3676 Datasheet - D e t a i l e d D e s c r i p t i o n ADC Registers Table 106. ADC_MSB result Register ADC_MSB result Addr: 27h Together with Register 27h, this register contains the results (MSB) of an ADC cycle. Bit Name 6:0 D9:D3 Default Access N/A Description R ADC results register. al id Bit Indicates end of ADC conversion cycle N/A R 0 Result is ready 1 Conversion is running Table 107. ADC_LSB result Register ADC_LSB result Together with Register 28h, this register contains the results (LSB) of an ADC cycle am lc s on A te G nt st il Addr: 28h lv result_not_ready 7 Bit Name 2:0 D2:D0 Default Access N/A Description R ADC result register Te ch ni ca Bit www.austriamicrosystems.com/AS3676 1v1-4 66 - 91 AS3676 Datasheet - D e t a i l e d D e s c r i p t i o n Table 108. ADC_control Register ADC_control Addr: 26h Bit This register input source selection and initialization of ADC Bit Name Default Access Description GPIO2/LIGHT 000001 (01h) VANA/GPI 000010 (02h) GPIO1/DLS 000011 (03h) audio controlled LED buffer output 000100 (04h) reserved 000101 (05h) 000111 (07h) 001000 (08h) CURR1 001001 (09h) CURR2 001010 (0Ah) CURR30 001011 (0Bh) CURR31 001100 (0Ch) CURR32 001101 (0Dh) CURR33 001110 (0Eh) CURR41 001111 (0Fh) CURR42 010000 (10h) CURR43 010001 (11h) reserved 010010 (12h) reserved 010011 (13h) CURR6 010100 (14h) VBAT 010101 (15h) CPOUT 010110 (16h) DCDC_FB 010111 (17h) ADCTEMP_CODE (junction temperature) 011xxx, 1xxxxx reserved 1 5:0 03h R/W ca adc_select start_conversion ch 7 ni 6 RGB1 RGB2 RGB3 am lc s on A te G nt st il 000110 (06h) al id 000000 (00h) lv Selects input source as ADC input NA N/A W Writing a 1 into this bit starts one ADC conversion cycle. Te 1. See Table Table 104 for ADC ranges and resolution. www.austriamicrosystems.com/AS3676 1v1-4 67 - 91 AS3676 Datasheet - D e t a i l e d D e s c r i p t i o n Figure 27. ADC Circuit )24 55" -(./ 2 30-(. -(./02.-+' *+, ) )) ) al id !" lv - - -& & & & && 2 2 2& ' ( #$% am lc s on A te G nt st il $% AS3676 8.8 Audio controlled LEDs Te ch ni ca Up to four RGB LEDs and/or up to 13 LEDs (number of LEDs is fully configurable) can be controlled by an audio source (connected to the pin CURR33, DCDC_FB or GPIO2/LIGHT). The color of the RGB LED(s) or the brightness of the single color LED(s) is depending on the input amplitude. For the RGB LEDs it starts from black transitions to blue, green, cyan, yellow, red and for high amplitudes white is used (internal lookup table if audio_color=000b). www.austriamicrosystems.com/AS3676 1v1-4 68 - 91 AS3676 Datasheet - D e t a i l e d D e s c r i p t i o n Figure 28. Audio controlled LED internal circuit ( )*+,/ )*+,).. !' # $ $ # $ !" am lc s on A te G nt st il lv al id % & AS3676 $" ca The audio controlled LED block is enabled if any of the registers curr30_aud_src[1:0]...curr33_aud_src[1:0], curr126_aud_on, rgbx_aud_on or curr4x_aud_on not equal zero. Symbol VIN Parameter Condition Input Voltage Range min. Input Impedance ch Rin_min ni The audio input amplifier (enabled by aud_buf_on=1) is used to allow the attenuation (or amplification of the input signal) and has the following parameters: Table 109. Audio input Parameters Min Typ 0 at max. input gain (30dB) 20 Max Unit 2.5 V k Te The signal is converted with the ADC (If the audio controlled LED is active, the internal ADC is continuously running. In this case the ADC cannot be used for any other purpose). The digital processing converts this signal into 3 channels (ch1, ch2, ch3): www.austriamicrosystems.com/AS3676 1v1-4 69 - 91 AS3676 Datasheet - D e t a i l e d D e s c r i p t i o n Figure 29. Audio controlled LED digital processing internal circuit AS3676 " # ! " $% % al id ! &""%! lv These three output channels (ch1, ch2, ch3) can be routed to any of the current sources according to Figure 28. am lc s on A te G nt st il The input amplitude is mapped into different colors (Look Up Table in Figure 29) for RGB LED(s) or brightness for single color LED(s). The mapping is controlled by the register audio_color. If audio_color = 000, then the mapping is done as follows: Very low amplitudes are mapped to black, for higher amplitudes, the color smoothly transitions from blue, green, cyan, yellow, red and eventually to white (for high input amplitudes). 8.8.1 AGC The AGC is used to ‘compress’ the input signal and to attenuate very low input amplitude signals (this is performed to ensure no light output for low signals especially for noisy input signals). The AGC monitors the input signal amplitude and filters this amplitude with a filter with a short attack time, but a long decay time (decay time depends on the register agc_ctrl). This amplitude measurement (represented by an integer value from 0 to 15) is then used to amplify or attenuate the input signal with one of the following amplification ratios (output to input ratio) – the curve A, B, or C is selected depending on the register agc_ctrl: ch ni ca Figure 30. AGC curve A (x-axis: input amplitude, y-axis: output amplitude; actual value: gain between output to input) Te www.austriamicrosystems.com/AS3676 1v1-4 70 - 91 AS3676 Datasheet - D e t a i l e d D e s c r i p t i o n am lc s on A te G nt st il lv al id Figure 31. AGC curve B (x-axis: input amplitude, y-axis: output amplitude; actual value: gain between output to input) 8.8.2 ca Figure 32. AGC curve C (x-axis: input amplitude, y-axis: output amplitude; actual value: gain between output to input) Audio Controlled LED Registers ni Table 110. Audio Control Register Audio Control Addr: 46h Bit Name ch Bit Te 0 4:2 Audio Sync Mode control Default Access aud_buf_on Description Audio input buffer enable 0b R/W 0 off; for audio direct input to ADC use adc_select = 00h (AUDIO_IN) 1 on; set adc_select = 03h (buffer output) audio controlled LED color selection (amplitude mode) audio_color www.austriamicrosystems.com/AS3676 000b R/W 000 color scheme defined by lookup table 001-111 single color scheme (b2=R, b1=G, b0=B) 1v1-4 71 - 91 AS3676 Datasheet - D e t a i l e d D e s c r i p t i o n Table 110. Audio Control Register (Continued) Audio Control Addr: 46h Bit Audio Sync Mode control Bit Name Default Access Description audio_speed_down 00b R/W none 01 200ms 10 400ms 11 800ms Table 111. Audio input Register Audio input Addr: 47h Bit Name Default Access Description am lc s on A te G nt st il Bit Audio Sync input control lv 7:6 00 al id Audio controlled LED persistence time (ramping down) Audio input buffer gain control audio_gain 2:0 000b R/W 000 -12dB 001 -6dB 010 0dB 011 +6dB 100 +12dB 101 +18dB 110 +24dB 111 +30dB ca Audio input buffer AGC function controls AGC switching threshold agc_ctrl 000b R/W ch ni 5:3 audio_man_start Te 6 7 audio_dis_start 1 2 www.austriamicrosystems.com/AS3676 000 AGC off 001 Attenuate low amplitude signals otherwise linear response (to remove e.g. noise) 010 AGC curve A; slow decay of amplitude detection 011 AGC curve A; fast decay of amplitude detection 100 AGC curve B; slow decay of amplitude detection 101 AGC curve B; fast decay of amplitude detection 110 AGC curve C; slow decay of amplitude detection 111 AGC curve C; fast decay of amplitude detection Startup Control of audio input buffer (used to charge optional external dc blocking capacitor) 0b R/W 0 automatic precharging 300us (if audio_dis_start = 0) 1 continuously precharging (if aud_buf_on = 1) Disable Startup Control of audio input buffer (used to charge optional external dc blocking capacitor) 0b R/W 0 precharging enabled 1 precharging disabled 1v1-4 72 - 91 AS3676 Datasheet - D e t a i l e d D e s c r i p t i o n 1. Its safe to keep default value 2. Its safe to keep default value Table 112. Audio output Register Bit Audio Sync input control Bit Name Default Access Description al id Audio output Addr: 48h LED(s) output amplitude control (in percent of selected output current) R/W 001 12.5% 010 25% 011 50% am lc s on A te G nt st il 000b 6.25% lv aud_amplitude 2:0 000 100 75% 101 87.5% 110 93.75% 111 100% Audio controlled LED enable for CURR1, CURR2, CURR6 curr126_aud_on 4 0b R/W 0 off 1 on, audio controlled LED is enabled Audio controlled LED enable for RGB1-RGB3 rgbx_aud_on 5 0b R/W 0 off 1 on, audio controlled LED is enabled Audio controlled LED enable for CURR41-CURR43 curr4x_aud_on 6 0b R/W 0 off 1 on, audio controlled LED is enabled ca Table 113. CURR3x audio source Register Addr: 53h ni Bit Name Controls CURR30,31,32,33 audio outputs and enables audio controlled LED Default Access ch Bit curr30_aud_src[1:0] Te 1:0 CURR3x audio source www.austriamicrosystems.com/AS3676 Description Audio controlled LED source for CURR30 00b R/W 00 All other modes 01 ch1 connected to CURR30, audio controlled LED on 10 ch2 connected to CURR30, audio controlled LED on 11 ch3 connected to CURR30, audio controlled LED on 1v1-4 73 - 91 AS3676 Datasheet - D e t a i l e d D e s c r i p t i o n Table 113. CURR3x audio source Register (Continued) CURR3x audio source Addr: 53h Bit Controls CURR30,31,32,33 audio outputs and enables audio controlled LED Bit Name Default Access Description Audio controlled LED source for CURR31 00b R/W 01 ch1 connected to CURR31, audio controlled LED on 10 ch2 connected to CURR31, audio controlled LED on 11 ch3 connected to CURR32, audio controlled LED on al id curr31_aud_src[1:0] All other modes lv 3:2 00 Audio controlled LED source for CURR32 5:4 All other modes am lc s on A te G nt st il 00 curr32_aud_src[1:0] 00b R/W 01 ch1 connected to CURR32, audio controlled LED on 10 ch2 connected to CURR32, audio controlled LED on 11 ch3 connected to CURR32, audio controlled LED on Audio controlled LED source for CURR33 7:6 curr33_aud_src[1:0] 00b R/W 00 All other modes 01 ch1 connected to CURR33, audio controlled LED on 10 ch2 connected to CURR33, audio controlled LED on 11 ch3 connected to CURR33, audio controlled LED on Table 114. Audio Control 2 Register Audio Control 2 Audio Mode Control Register ca Addr: 55h Bit Bit Name Description NA not used ch ni 0 Default Access audio_speed_up Te 3:1 www.austriamicrosystems.com/AS3676 Audio controlled LED filtering time (ramping up) 000 000b R/W none 001 50ms 010 100ms 011 150ms 100 200ms 101 250ms 110 400ms 111 800ms 1v1-4 74 - 91 AS3676 Datasheet - D e t a i l e d D e s c r i p t i o n Table 114. Audio Control 2 Register (Continued) Audio Control 2 Addr: 55h Bit Audio Mode Control Register Bit Name Default Access Description 8.9 00b R/W CURR33 01 DCDC_FB 10 GPIO1/DLS 11 GPIO2/LIGHT lv audio_source 5:4 00 Power-On Reset The internal reset is controlled by two sources: Supply Serial interface state (CLK, DATA) The internal reset is forced if VBAT is low or if both interface pins (CLK, DATA) are low for more than tPOR_DEB (typ. am lc s on A te G nt st il VBAT al id Audio Buffer input source 6 100ms) . Then device enters shutdown mode. For details see section Operating Modes on page 80. The reset levels control the state of all registers. As long as VBAT and CLK/DATA are below their reset thresholds, the register contents are set to default. Access by serial interface is possible once the reset thresholds are exceeded. Figure 33. Zero Power Device Wakeup block diagram AS3676 &" ( * -' . / !" # $%& / ()%**(+ / (()%*" ' ca Te ch -' -' ni *+% , ,(,( -' / Table 115. Power On Reset Parameters Symbol Parameter Condition Min Typ Max VPOR_VBAT Overall Power-On Reset Monitor voltage on V2_5; power-on reset for all internal functions. 1.8 2.15 2.4 1 Unit V 6. Only if shutdwn_enab=1 www.austriamicrosystems.com/AS3676 1v1-4 75 - 91 AS3676 Datasheet - D e t a i l e d D e s c r i p t i o n Table 115. Power On Reset Parameters Parameter Condition Min Typ Max Unit VPOR_PERI Reset Level for pins CLK, DATA Monitor voltage on pins CLK, DATA 0.29 1.0 1.38 V tPOR_DEB Reset debounce time for pins CLK, DATA 80 100 120 ms tstart Interface Startup Time 4 6 8 ms al id Symbol 1. Guaranteed by design - min./max. limits not production tested 8.9.1 Reset control register Reset and Overtemp control Addr: 29h This register reads and resets the overtemperature flag. Bit Name Default Access Description am lc s on A te G nt st il Bit lv Table 116. Reset and Overtemp control Register Enable Shutdown mode and serial interface reset. shutdwn_enab 4 8.10 0 R/W 0 Serial Interface reset disabled. Device does not enter Shutdown mode 1 Serial Interface reset enabled, device enters shutdown when SCL and SDA remain low for tPOR_DEB Temperature Supervision An integrated temperature sensor provides over-temperature protection for the AS3676. This sensor generates a flag if the device temperature reaches the overtemperature threshold of 140º. The threshold has a hysteresis to prevent oscillation effects. If the device temperature exceeds the T140 threshold all current sources, the charge pump and the dcdc converter is disabled and the ov_temp flag is set. After decreasing the temperature by THYST operation is resumed. The ov_temp flag can only be reset by first writing a 1 and then a 0 to the register bit rst_ov_temp. Bit ov_temp_on = 1 activates temperature supervision (Table 118). It is recommend to leave this bit set (default state). Table 117. Overtemperature Detection Parameter Condition Min T140 ov_temp Rising Threshold 140 ºC THYST ov_temp Hysteresis 5 ºC ni ca Symbol Typ Max Unit Table 118. Reset and Overtemp control Register Reset and Overtemp control ch Addr: 29h Te Bit 0 Bit Name This register reads and resets the overtemperature flag. Default Access ov_temp_on www.austriamicrosystems.com/AS3676 Description Activates/deactivates device temperature supervision. Default: Off - all other bits are only valid if this bit is set to 1 1 W 0 Temperature supervision is disabled. No reset will be generated if the device temperature exceeds 140ºC 1 Temperature supervision is enabled 1v1-4 76 - 91 AS3676 Datasheet - D e t a i l e d D e s c r i p t i o n Table 118. Reset and Overtemp control Register (Continued) Reset and Overtemp control Addr: 29h This register reads and resets the overtemperature flag. Bit Name Default Access 1 ov_temp N/A R 2 rst_ov_temp 0 R/W 8.11 Serial Interface Description 1 Indicates that the overtemperature threshold has been reached; this flag is not cleared by an overtemperature reset. It has to be cleared using rst_ov_temp al id Bit The ov_temp flag is cleared by first setting this bit to 1, and then setting this bit to 0. lv The AS3676 is controlled using serial interface pins CLK and DATA: Figure 34. Serial interface block diagram am lc s on A te G nt st il AS3676 The clock line CLK is never held low by the AS3676 (as the AS3676 does not use clock stretching of the bus). Table 119. Serial Interface Voltages and Timings Symbol Parameter VIHI/F High Level Input Voltage VILI/F Low Level Input Voltage Hysteresis tRISE tFALL Min Max Unit 1.38 VBAT V 0.0 0.52 V Pins DATA and CLK ca VHYSTI/F Condition Typ 0.1 V Rise Time 0 1000 ns Fall Time 0 300 ns Spike Filter on CLK 100 ns tDATA_FILTER Spike Filter on DATA 300 ns ch ni tCLK_FILTER The AS3676 is compatible to the NXP two wire specification http://www.nxp.com/acrobat_download/literature/9398/ 39340011.pdf, Version 2.1, January 2000 for standard and fast mode (no high speed mode). Te 8.11.1 Serial Interface Features Fast Mode Capability (Maximum Clock Frequency is 400 kHz) Addressing Mode Write Formats - Single-Byte Write - Page-Write 7-bit www.austriamicrosystems.com/AS3676 1v1-4 77 - 91 AS3676 Datasheet - D e t a i l e d D e s c r i p t i o n Read Formats - Current-Address Read - Random-Read - Sequential-Read DATA Input Delay and CLK spike filtering by integrated RC components 8.11.2 Device Address Selection al id The serial interface address of the AS3676 has the following address: 80h – 81h Write Commands – Read Commands lv Figure 35. Complete Serial Data Transfer CLK S Start Condition am lc s on A te G nt st il DATA 1-7 8 Address 9 R/W 8 1-7 ACK 9 Data 1-7 ACK 8 Data 9 P ACK Stop Condition Serial Data Transfer Formats Definitions used in the serial data transfer format diagrams are listed in the following table: Table 120. Serial Data Transfer Byte Definitions S Sr DW DR WA A R/W (AS3676 Slave) Note Start Condition after Stop R 1 bit Repeated Start R 1 bit Device Address for Write R 10000000b (80h). Device Address for Read R 10000001b (81h) Word Address R 8 bits Acknowledge W 1 bit Not Acknowledge R 1 bit ni N Definition ca Symbol Register Data/Write R 8 bits data (n) Register Data/read R 1 bit P Stop Condition R 8 bits WA++ Increment Word Address Internally R During Acknowledge ch reg_data Te Figure 36. Serial Interface Byte Write S DW A WA A AS3675 (= Slave) receives data AS3675 (= Slave) transmits data www.austriamicrosystems.com/AS3676 1v1-4 reg_data A P Write Register WA++ 78 - 91 AS3676 Datasheet - D e t a i l e d D e s c r i p t i o n Figure 37. Serial Interface Page Write S DW A WA A reg_data 1 A reg_data 2 Write Register WA++ A reg_datan … Write Register WA++ A P Write Register WA++ AS3675 (= Slave) receives data AS3675 (= Slave) transmits data al id Byte Write and Page Write formats are used to write data to the slave. The transmission begins with the START condition, which is generated by the master when the bus is in IDLE state (the bus is free). The device-write address is followed by the word address. After the word address any number of data bytes can be sent to the slave. The word address is incremented internally, in order to write subsequent data bytes on subsequent address locations. am lc s on A te G nt st il lv For reading data from the slave device, the master has to change the transfer direction. This can be done either with a repeated START condition followed by the device-read address, or simply with a new transmission START followed by the device-read address, when the bus is in IDLE state. The device-read address is always followed by the 1st register byte transmitted from the slave. In Read Mode any number of subsequent register bytes can be read from the slave. The word address is incremented internally. The following diagrams show the serial read formats supported by the AS3676. Figure 38. Serial Interface Random Read S DW A WA A Sr DR A data N P Read Register WA++ AS3675 (= slave) receives data AS3675 (= slave) transmits data Random Read and Sequential Read are combined formats. The repeated START condition is used to change the direction after the data transfer from the master. The word address transfer is initiated with a START condition issued by the master while the bus is idle. The START condition is followed by the device-write address and the word address. In order to change the data direction a repeated START condition is issued on the 1st CLKpulse after the ACKNOWLEDGE bit of the word address transfer. After the reception of the device-read address, the slave becomes the transmitter. In this state the slave transmits register data located by the previous received word address vector. The master responds to the data byte with a NOT ACKNOWLEDGE, and issues a STOP condition on the bus. DW A WA A Sr DR A data 1 A data 2 ... A data n N P Read Register WA++ ni S ca Figure 39. Serial Interface Sequential Read ch AS3675 (= slave) receives data AS3675 (= slave) transmits data Sequential Read is the extended form of Random Read, as multiple register-data bytes are subsequently transferred. Te In contrast to the Random Read, in a sequential read the transferred register-data bytes are responded by an acknowledge from the master. The number of data bytes transferred in one sequence is unlimited (consider the behavior of the word-address counter). To terminate the transmission the master has to send a NOT ACKNOWLEDGE following the last data byte and subsequently generate the STOP condition. www.austriamicrosystems.com/AS3676 1v1-4 79 - 91 AS3676 Datasheet - D e t a i l e d D e s c r i p t i o n Figure 40. Serial Interface Current Address Read S DR A data 1 Read Register WA++ A data 2 Read Register WA++ … A data n N P Read Register WA++ al id AS3675 (= slave) receives data AS3675 (= slave) transmits data To keep the access time as small as possible, this format allows a read access without the word address transfer in advance to the data transfer. The bus is idle and the master issues a START condition followed by the Device-Read address. lv Analogous to Random Read, a single byte transfer is terminated with a NOT ACKNOWLEDGE after the 1st register byte. Analogous to Sequential Read an unlimited number of data bytes can be transferred, where the data bytes must be responded to with an ACKNOWLEDGE from the master. For termination of the transmission the master sends a NOT ACKNOWLEDGE following the last data byte and a subsequent STOP condition. Operating Modes am lc s on A te G nt st il 8.12 If the voltages on CLK and DATA is less than VPOR_PERI for > tPOR_DEB (see Table 115 on page 75), the AS3676 is in shutdown mode and its current consumption is minimized (IBAT = ISHUTDOWN) and all internal registers are reset to their default values. If the voltage at CLK or DATA rises above VPOR_PERI, the AS3676 serial interface is enabled and the AS3676 and the standby mode is selected. The AS3676 is switched automatically from standby mode (IBAT = ISTANBY) into normal mode (IBAT = IACTIVE) and back, if one of the following blocks are activated: Charge pump up regulator Any current sink ADC conversion started PWM active Pattern mode active. If any of these blocks are already switched on the internal oscillator is running and a write instruction to the registers is directly evaluated within 1 internal CLK cycle (typ. 1µs) Step Te ch ni ca If all these blocks are disabled, a write instruction to enable these blocks is delayed by 64 CLK cycles (oscillator will startup, within max 200µs). www.austriamicrosystems.com/AS3676 1v1-4 80 - 91 AS3676 Datasheet - D e t a i l e d D e s c r i p t i o n The mode switching is shown in Figure 41: Figure 41. Startup and Operating Mode Selection 23 + $$%&'& am lc s on A te G nt st il "$785, + lv !"# 23 al id ! "$,- !! !)*.,/0 1) 2 1 ! 13)* 1)5 156)5 12)5 "( ! !)*)+ Te ch ni ca !!!! !)*.99/0 1) 2 1 ! 13)* 1)5 156)5 12)5 www.austriamicrosystems.com/AS3676 1v1-4 81 - 91 AS3676 Datasheet - R e g i s t e r M a p 9 Register Map Table 121. Registermap Addr Default Register Definition Reg. control 00h 00 curr12 control 01h 00h curr rgb control 02h 00h curr6_mode curr3 control1 03h 00h curr33_mode curr4 control 04h 00h GPIO output 1 05h 00h gpi_curr 33_en gpi_curr 32_en gpi_curr 31_en gpi_curr 30_en gpi_en gpi_curr 6_en gpi_curr 2_en gpi_curr 1_en GPIO signal 1 06h 00h gpi_curr 33_in gpi_curr 32_in gpi_curr 31_in gpi_curr 30_in gpi_in gpi_curr 6_in gpi_curr 2_in gpi_curr 1_in LDO Voltage 07h 00h Curr1 current 09h 00h curr1_current Curr2 current 0Ah 00h curr2_current Rgb1 current 0Bh 00h rgb1_current Rgb2 current 0Ch 00h rgb2_current Rgb3 current 0Dh 00h rgb3_current Curr3x strobe 0Eh 00h curr3x_strobe Curr3x preview 0Fh 00h curr3x_preview Curr3x other 10h 00h curr3x_other Curr3 strobe control 11h 00h Curr3 control2 12h 00h Curr41 current 13h 00h curr41_current Curr42 current 14h 00h curr42_current Curr43 current 15h 00h curr43_current Pwm control 16h 00h pwm code 17h 00h Pattern control 18h 00h Pattern data0 19h 00h pattern_data[7:0] Pattern data1 1Ah 00h pattern_data[15:8] Pattern data2 1Bh 00h pattern_data[23:16] Pattern data3 1Ch 00h pattern_data[31:24] GPIO control 1Eh 44h GPIO driving cap 20h 00h b3 b2 step_up _on cp_on b1 b0 ldo_on al id b4 curr2_mode curr1_mode rgb3_mode rgb2_mode rgb1_mode curr32_mode curr31_mode curr30_mode curr43_mode curr42_mode curr41_mode ldo_voltage strobe_timing strobe_p in ca ch Te b5 lv b6 am lc s on A te G nt st il b7 ni Name Content strobe_mode curr3x_s trobe_hi gh preview_ctrl pwm_dim_speed www.austriamicrosystems.com/AS3676 preview_ off_after strobe pwm_dim_mode pwm_code curr33_p curr32_p curr31_p curr30_p softdim_ attern attern attern attern pattern gpio2_pulls strobe_ctrl gpio2_mode pattern_delay gpio1_pulls pattern_ color gpio1_mode gpio2_lo gpio1_lo w_curr w_curr 1v1-4 82 - 91 AS3676 Datasheet - R e g i s t e r M a p Table 121. Registermap Addr Default Register Definition DCDC control1 21h 00h DCDC control2 22h 04h CP control 23h 00h cp_start cp_mode_switchin cp_auto _deboun _on g ce CP mode Switch1 24h 00h rgb3_on rgb2_on rgb1_on curr33_o curr32_o curr31_o curr30_o _cp _cp _cp n_cp n_cp n_cp n_cp CP mode Switch2 25h 00h curr6_on _cp ADC_control 26h 03h start_co nversion ADC_MSB result 27h NA ADC_LSB result 28h NA Reset and Overtemp control 29h 01h Curr low voltage status1 2Ah NA Curr low voltage status2 2Bh NA gpio current 2Ch 00h curr6 current 2Fh 00h curr6_current Adder Current 1 30h 00h adder_current1 (can be enabled for CURR30, CURR1, RGB1, CURR41) Adder Current 2 31h 00h adder_current2 (can be enabled for CURR31, CURR2, RGB2, CURR42) Adder Current 3 32h 00h adder_current3 (can be enabled for CURR32, CURR6, RGB3, CURR43) Adder Enable 1 33h 00h curr43_a curr42_a curr41_a rgb3_ad rgb2_ad rgb1_ad dder dder dder der der der Adder Enable 2 34h 00h curr33_a curr32_a curr31_a curr30_a curr6_ad curr2_ad curr1_ad dder dder dder dder der der der Subtract Enable 35h 00h sub_en4 sub_en3 sub_en2 sub_en1 ASIC ID1 3Eh AEh 1 0 1 0 ASIC ID2 3Fh 5Xh 0 1 0 1 Curr30 current 40h 00h curr30_current Curr31 current 41h 00h curr31_current Curr32 current 42h 00h curr32_current Curr33 current 43h 00h curr33_current Audio Control 46h 00h audio_speed_down Audio input 47h 00h audio_di audio_m s_start an_start b5 b4 b3 step_up_vtuning b2 b1 step_up_fb step_up _lowcur b0 step_up _frequ step_up skip_fast step_up _prot _res cp_mode cp_clk lv step_up _fb_auto curr43_o curr42_o curr41_o curr2_on curr1_on n_cp n_cp n_cp _cp _cp am lc s on A te G nt st il adc_select result_n ot_ready D9:D3 D2:D0 shutdwn _enab rst_ov_t ov_temp ov_temp emp _on curr6_lo rgb3_low rgb2_low rgb1_low curr33_l w_v _v _v _v ow_v curr43_l ow_v pattern_ slow ca ch Te b6 al id b7 ni Name Content www.austriamicrosystems.com/AS3676 curr42_l ow_v curr32_l ow_v curr31_l ow_v curr30_l ow_v curr41_l ow_v curr2_lo w_v curr1_lo w_v pattern_ delay2 1 1 1 revision aud_buf _on audio_color agc_ctrl 1v1-4 0 audio_gain 83 - 91 AS3676 Datasheet - R e g i s t e r M a p Table 121. Registermap Addr Default Register Definition Audio output 48h 00h GPIO output 2 50h 00h gpi_curr 43_en gpi_curr 42_en gpi_curr gpi_rgb3 gpi_rgb2 gpi_rgb1 gpio2_o 41_en _en _en _en ut GPIO signal 2 51h 00h gpi_curr 43_in gpi_curr 42_in gpi_curr gpi_rgb3 gpi_rgb2 gpi_rgb1 gpio2_ in gpio1_in 41_in _in _in _in Adder Current 4 52h 00h adder_current4 (can be enabled for CURR33) CURR3x audio source 53h 00h curr33_aud_src[1:0 curr32_aud_src[1:0 curr31_aud_src[1:0 curr30_aud_src[1:0 ] ] ] ] Pattern End 54h 00h pattern_ end Audio Control 2 55h 00h DLS mode control1 56h 00h DLS mode control2 57h 00h ALS control 90h 00h ALS filter 91h 00h ALS offset 92h 00h amb_offset ALS result 93h 00h amb_result ALS curr12 group 94h 00h ALS rgb group 95h 00h curr6_amb_group ALS curr3x group 96h 00h curr33_amb_group curr32_amb_group curr31_amb_group curr30_amb_group ALS curr4x group 97h 00h curr43_amb_group curr42_amb_group curr41_amb_group ALS group 1 Y0 98h 00h group1_y0 ALS group 1 Y3 99h 00h group1_y3 ALS group 1 X1 9Ah 00h group1_x1 ALS group 1 K1 9Bh 00h group1_k1 ALS group 1 X2 9Ch 00h group1_x2 b6 b5 b4 b3 curr4x_a rgbx_au curr126_ ud_on d_on aud_on b1 b0 aud_amplitude gpio1_o ut lv am lc s on A te G nt st il audio_source audio_speed_up rgb3_on rgb2_on rgb1_on curr33_o curr32_o curr31_o curr30_o n_dls _dls _dls _dls n_dls n_dls n_dls curr43_o curr42_o curr41_o curr2_on curr1_on _dls n_dls n_dls n_dls _dls curr6_on _dls amb_gain amb_filter_down ca rgb3_amb_group curr1_amb_group rgb2_amb_group rgb1_amb_group 00h group1_k2 ALS group 2 Y0 9Eh 00h group2_y0 ch curr2_amb_group 9Dh ALS group 2 Y3 9Fh 00h group2_y3 ALS group 2 X1 A0h 00h group2_x1 ALS group 2 K1 A1h 00h group2_k1 ALS group 2 X2 A2h 00h group2_x2 ALS group 2 K2 A3h 00h group2_k2 ALS group 3 Y0 A4h 00h group3_y0 ALS group 3 Y3 A5h 00h group3_y3 ALS group 3 X1 A6h 00h group3_x1 www.austriamicrosystems.com/AS3676 1v1-4 amb_on amb_filter_up ALS group 1 K2 Te b2 al id b7 ni Name Content 84 - 91 AS3676 Datasheet - R e g i s t e r M a p Table 121. Registermap Addr Default ALS group 3 K1 A7h 00h group3_k1 ALS group 3 X2 A8h 00h group3_x2 ALS group 3 K2 A9h 00h group3_k2 Name Content b7 b6 b5 Note: If writing to register, write 0 to unused bits Write to read only bits will be ignored b3 b2 b1 b0 Te ch ni ca am lc s on A te G nt st il lv yellow color = read only b4 al id Register Definition www.austriamicrosystems.com/AS3676 1v1-4 85 - 91 AS3676 Datasheet - E x t e r n a l C o m p o n e n t s 10 External Components Table 122. External Components List Part Number Value Typ Min Max tol. (min.) Rating (max) Notes Package 1 (min.) 1µF ±20% 6.3V Ceramic, X5R (V2_5 output) (e.g. Taiyo Yuden JMK105BJ105KV-F) 0402 C2 1µF ±20% 6.3V Ceramic, X5R (VBAT) (e.g. Taiyo Yuden JMK105BJ105KVF) 0402 C3 1µF ±20% 6.3V Ceramic, X5R (Charge Pump) (e.g. Taiyo Yuden JMK105BJ105KV-F) 0402 C4 1µF ±20% 6.3V Ceramic, X5R (Charge Pump) (e.g. Taiyo Yuden JMK105BJ105KV-F) 0402 C6 C7 - optional C8 - optional only required in voltage feedback mode of DCDC 2.2µF ±20% 6.3V Ceramic, X5R (Charge Pump Output) (e.g. Taiyo Yuden JMK107BJ225MA-T) 0403 1µF ±20% 6.3V Ceramic, X5R (Step Up DCDC input) (e.g. Taiyo Yuden JMK105BJ105KV-F) 0402 1.5nF ±20% 25V Ceramic, X5R (Step Up DCDC Feedback, 150pF for over voltage protection) 0402 15nF ±20% 6.3V Ceramic, X5R (Step Up DCDC Feedback, 1.5nF for over voltage protection) 0402 Ceramic, X5R, X7R (Step Up DCDC output) e.g. Murata 2 GRM188R61E106MA73 0603 e.g. Taiyo Yuden TMK316BJ475KD 3.2x1.6x 0.85mm Ceramic, X5R (VANA/GPI output) (e.g. Taiyo Yuden JMK107BJ225MA-T) 0402 10µF C9 ±20% 25V 4.7µF ch R3 Te R4, R5 L1 ±20% 100m ±5% Shunt Resistor 0603 1M ±1% Step Up DC/DC Converter Voltage Feedback 0201 100k ±1% Step Up DC/DC Converter Voltage Feedback - not required for over voltage protection 0201 1-10k ±1% DATA, CLK Pullup resistor – usually already inside master 0201 ±20% Recommended Type: Coilcraft 4 LPS3010-123 or Murata LQH3NPN100NJ0, LQH3NPN150NJ0 or Panasonic ELLSFG100MA or TDK VLF3012Aor Taiyo Yuden NRH3012T100MN 3x3x1mm ni R1 R2 2.2µF ca C10 lv am lc s on A te G nt st il C5 al id C1 10µH 3 (15µH ) www.austriamicrosystems.com/AS3676 6.3V 1v1-4 86 - 91 AS3676 Datasheet - E x t e r n a l C o m p o n e n t s Table 122. External Components List Max tol. (min.) Rating (max) Fairchild FDFMA3N109 Q1 (+ D1) Package 1 (min.) Integrated NMOS and Schottky diode MicroFET 2x2mm Integrated NMOS and Schottky MicroFET diode; recommended for configurations up to 12 LEDs 1.6x1.6mm Fairchild FDFME3N311ZT or OnSemi NTLUF4189NZ D2:D20 Notes LED As required by application 1. in 1/100 inch (unless otherwise specified) 2. Specified >1µF at 20V; use up to 20V DCDC output voltage 3. Results in improved efficiency compared to 10µH 4. For highest efficiency al id Value Typ Min lv Part Number Te ch ni ca am lc s on A te G nt st il As system efficiency is depending on LED configurations, external components and operating conditions, see austriamicrosystems application note ‘Mobile Backlight Selection Guide 1vx.pdf’ for optimizing efficiency and components size (coil L1, transistor Q1, diode D1). www.austriamicrosystems.com/AS3676 1v1-4 87 - 91 AS3676 Datasheet - P a c k a g e D r a w i n g s a n d M a r k i n g s 11 Package Drawings and Markings Figure 42. WL-CSP30 3x2.5mm 6x5 Balls Package Drawing " # # " ! ! AS3676 <Code> ! ! " # # " ! ! am lc s on A te G nt st il lv Line 1: Line 2: Line 3: ! Note: ! al id austriamicrosystems logo AS3676 <Code> Encode datecode 4 characters Figure 43. WL-CSP30 3x2.5mm 6x5 Balls Detail Dimensions %% % % % % % % % % % % % %& & & )& ) ) ) ) ) ) ) ) ) ) )& *& * +& + 3 * * * * * * * *& + + + + + + + + + +& * ,%%-++ %(. %/,%"#)(%!,%( 0!1 %%%%, % %%%"%1!%(%, 2! Te ch ca * ni %& & !" #%%& '%( www.austriamicrosystems.com/AS3676 1v1-4 88 - 91 AS3676 Datasheet - P a c k a g e D r a w i n g s a n d M a r k i n g s 11.1 Tape & Reel Information www.austriamicrosystems.com/AS3676 1v1-4 &3$.37(/7' 70 Te ch ni ca am lc s on A te G nt st il lv al id Figure 44. Tape & Reel Dimensions 89 - 91 AS3676 Datasheet - O r d e r i n g I n f o r m a t i o n 12 Ordering Information The devices are available as the standard products shown in Table 123. Table 123. Ordering Information Description Delivery Form Package AS3676-ZWLT AS3676 Wafer Level Chip Scale Package, size 3x2.5mm, 6x5 balls, 0.5mm pitch, Pb-Free Tape & Reel 30pin WL-CSP (3x2.5mm) RoHS compliant / Pb-Free al id Model Note: All products are RoHS compliant and austriamicrosystems green. Buy our products or get free samples online at ICdirect: http://www.austriamicrosystems.com/ICdirect am lc s on A te G nt st il Note: AS3676-ZWLT lv Technical support is found at http://www.austriamicrosystems.com/Technical-Support For further information and requests, please contact us mailto:[email protected] or find your local distributor at http://www.austriamicrosystems.com/distributor Te ch ni ca AS3676Z Temperature Range: -30ºC - 85ºC WL Package: Wafer Level Chip Scale Package (WL-CSP) 3x2.5mm T Delivery Form: Tape & Reel www.austriamicrosystems.com/AS3676 1v1-4 90 - 91 AS3676 Datasheet - O r d e r i n g I n f o r m a t i o n Copyrights Copyright © 1997-2012, austriamicrosystems AG, Schloss Premstaetten, 8141 Unterpremstaetten, Austria-Europe. Trademarks Registered ®. All rights reserved. The material herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. al id All products and companies mentioned are trademarks or registered trademarks of their respective companies. Disclaimer am lc s on A te G nt st il lv Devices sold by austriamicrosystems AG are covered by the warranty and patent indemnification provisions appearing in its Term of Sale. austriamicrosystems AG makes no warranty, express, statutory, implied, or by description regarding the information set forth herein or regarding the freedom of the described devices from patent infringement. austriamicrosystems AG reserves the right to change specifications and prices at any time and without notice. Therefore, prior to designing this product into a system, it is necessary to check with austriamicrosystems AG for current information. This product is intended for use in normal commercial applications. Applications requiring extended temperature range, unusual environmental requirements, or high reliability applications, such as military, medical life-support or lifesustaining equipment are specifically not recommended without additional processing by austriamicrosystems AG for each application. For shipments of less than 100 parts the manufacturing flow might show deviations from the standard production flow, such as test flow or test location. ca The information furnished here by austriamicrosystems AG is believed to be correct and accurate. However, austriamicrosystems AG shall not be liable to recipient or any third party for any damages, including but not limited to personal injury, property damage, loss of profits, loss of use, interruption of business or indirect, special, incidental or consequential damages, of any kind, in connection with or arising out of the furnishing, performance or use of the technical data herein. No obligation or liability to recipient or any third party shall arise or flow out of austriamicrosystems AG rendering of technical or other services. ni Contact Information ch Headquarters austriamicrosystems AG Te Tobelbaderstrasse 30 Schloss Premstaetten A-8141 Austria Tel: +43 (0) 3136 500 0 Fax: +43 (0) 3136 525 01 For Sales Offices, Distributors and Representatives, please visit: http://www.austriamicrosystems.com/contact www.austriamicrosystems.com/AS3676 1v1-4 91 - 91