ROHM BU1572GUW

AIE Adaptive Image Enhancer Series
Real Time
Video Processor ICs
BU1572GUW, BU1573KV, BU1574KU
No.09060EBT02
●Description
BU1572GUW/BU1573KV/BU1574KU is AIE : Adaptive Image Enhancer (image processing technology by ROHM’s
hardware). Camera video images are optimized for maximum visibility.
●Features
1) Compatible with image data from QCIF size (176  144) up to WVGA+ size (864  480)
2) Compatible with 80-system CPU bus interface and RGB interface.(BU1572GUW/BU1573KV)
3) Compatible with Input/Output data formats with RGB 5:6:5 and 6:6:6.(BU1572GUW/BU1573KV)
4) Multiple operation modes: Image Enhance, Analysis, Through and Sleep. *1
5) Two selectable register settings: indirect addressing through the 80-system CPU bus interface
2
or the 2-wire serial interface (I C) *2
6) PWM output for image adjustment LCD backlight control.
7) Built-in edge-enhancement and gamma filters.
*1: BU1574KU is an analysis mode setting interdiction.
*2: BU1574KU becomes only the register set by the two-wire system serial interface.
* Extra document is prepared separately about each register setup. Please refer to the Development Scheme on page 10.
●Application
Portable media player, Mobile phone, car display, Car navigation system, and portable DVD etc.
●Lineup
Supply power
source voltage
Input
Interface
Control
Interface
Output
Interface
PWM Output
Package
BU1572GUW
1.4-1.6(VDDCore)
1.65-3.3(VDDIo)
Supported up to Max
WVGA+(864×480)
I2C BUS
(At RGB interface)
18bit RGB interface
or bus interface
Image adjustment
PWM output
VBGA063W050
BU1573KV
1.4-1.6(VDDCore)
2.7-3.6(VDDIo)
Supported up to Max
WVGA+(864×480)
I2C BUS
(At RGB interface)
18bit RGB interface
or bus interface
Image adjustment
PWM output
VQFP64
BU1574KU
1.4-1.6(VDDCore)
2.7-3.6(VDDIo)
Supported up to Max
WVGA+(864×480)
I2C BUS
image adjustment
PWM output
UQFP64
Parameter
●Absolute maximum ratings
Parameter
8bit
YUV=4:2:2 parallel
・ CCIR601
・ CCIR656
●Recommended operating range
(Ta=25℃)
Symbol
Rating
Unit
VDDIO
-0.3~+4.2
V
VDD
-0.3~+2.1
V
Input voltage
VIN
-0.3~VDDIO+0.3
V
Input voltage range VIN-VDDIO
Storage
temperature range
Tstg
-40~+125
℃
Operating
temperature range
Power dissipation
PD
310 *1
mW
Supply power
source voltage 1
Supply power
source voltage 2
Parameter
Supply power source
voltage 1(IO)
Supply power source
voltage 2(CORE)
www.rohm.com
Rating
Unit
VDDIO
1.65~3.30(Typ:2.85V) *1
V
VDD
1.40~1.60(Typ:1.50V)
V
0~VDDIO
V
-20~+70 *2
℃
Topr
*Please supply power source in order of VDD→VDDIO.
*In the case exceeding 25ºC, 3.1mW should be reduced at the rating 1ºC.
(BU1573KV: 7.5mW / BU1574KU: 7mW should be reduced at the rating.)
*1: BU1573KV is 750mW, and BU1574KU is 700mW.
© 2009 ROHM Co., Ltd. All rights reserved.
Symbol
1/12
*1 : BU1573KV and BU1574KU correspond to 2.70~3.60V(Typ:3.00V)
*2 : BU1573KV and BU1574KU correspond to –40~+85℃
2009.04- Rev.B
Technical Note
BU1572GUW, BU1573KV, BU1574KU
●Electric characteristics
(Unless otherwise specified, VDD=1.50V,VDDIO=2.85V,GND=0.0V,Ta=25℃,fIN=36.0MHz) *1
Limits
TYP.
24
-
Parameter
Symbol
Input frequency
Operating consumption current
Static consumption current
Input ”H” current
Input ”L” current
fIN
IDD1
IDDst
IIH
IIL
Input ”H” voltage 1
VIH1
Input ”L” voltage 1
VIL1
-0.3
-
Input ”H” voltage 2
VIH2
VDDIO
0.85
-
VDDIO
+0.3
V
Input ”L” voltage 2
VIL2
-0.3
-
VDDIO
0.15
V
Hysteresis voltage width
Vhys
-
0.7
-
V
Output ”H” voltage
VOH
VDDIO
-0.4
-
VDDIO
V
Output ”L” voltage
VOL
0.0
-
0.4
V
MIN.
-10
-10
VDDIO
0.8
-
MAX.
36.0
30
10
10
VDDIO
+0.3
VDDIO
0.2
Unit
Condition
MHz
mA
μA
μA
μA
DCKI (DUTY45%~55%) *2
At enhance mode setting (36MHz)
At sleep mode setting, input terminal=GND setting
VIH=VDDIO
VIL=GND
V
Normal input (including input mode of I/O terminal)
V
Normal input (including input mode of I/O terminal)
Hysteresis input *3
(RESETB, DCKI, LCDCSBI/SDA, LCDWRBI/SDC,
LCDRDBI/I2CDEV0)
Hysteresis input *4
(RESETB, DCKI, LCDCSBI/SDA, LCDWRBI/SDC,
LCDRDBI/I2CDEV0)
Hysteresis input *5
(RESETB, DCKI, LCDCSBI/SDA, LCDWRBI/SDC,
LCDRDBI/I2CDEV0)
IOH=-1.0mA(DC)
(including output mode of I/O terminal)
IOL=1.0mA(DC)
(including output mode of I/O terminal)
*1 : VDDIO=3.00V in case of BU1573KV / BU1574KU
*2 : CAMCKI in case of BU1574KU
*3,*4,*5 : It corresponds with RESETB CAMCKI SDA SDC I2CDEV0 for BU1574KU
●Block Diagram
(BU1572GUW/BU1573KV)
(BU1574KU)
CAMDI[17:0]
LCDDI[17:0]
Color correction
Color correction
Luminance
distinction
LCDRS0/1I
LCDCSBI
LCDWRBI
LCDRDBI
Register
SDA
SDC
I2C interface
LCDVSI
LCDHSI
VLDI
ENAI
DCKI
Timing generator
Image enhance
Luminance
distinction
LCDDO[17:0]
Register
Edge
enhancement
Gamma control
PWM control
generation
SDA
SDC
PWMO
LCDRS0O
LCDCSBO
LCDWRBO
LCDVSO
LCDHSO
VLDO
ENAO
DCKO
MSEL0/1/2
RESETB
CPU
BU1572GUW/BU1573KV
LCDDI[17:0]
LCDRS/
LCDCSB/
LCDWRB
LCDRS0I/
LCDCSBI/
LCDWRBI
LCDRDB
LCDRDBI
VSYNC/
HSYNC/
DOTCLOCK
LCDVSI/
LCDHSI/
DCKI
PWM control
generation
PWMO
CAMVSO
CAMHSO
CAMCKO
Timing generator
CAMVSI
CAMHSI
CAMCKI
MSEL0/1/2
RESETB
(BU1574KU)
CAMDI[7:0]
LCD Controller
LCDDO[17:0]
D[17:0]
LCDRS0O/
LCDCSBO/
LCDWRBO
RS/
CSB/
WRB
Camera
Module
RDB
LCDVSO/
LCDHSO/
DCKO
CAMDO[17:0]
Edge
enhancement
Gamma control
I2C interface
●Recommended Application Circuit
(BU1572GUW/BU1573KV)
LCDDATA[17:0]
Image enhance
CAMHSI
CAMVSI
CAMCKI
VSYNC/
HSYNC/
CLK
CAMDO[7:0]
CAMDI[7:0] CAMDO[7:0]
CAMHSI
CAMHSO
CAMHSO
BU1574KU
CAMVSI
CAMVSO
CAMCKI
CAMCKO
Image
Processing
CAMVSO
IC
CAMCKO
SDA
SDC
SDA/SDC
SDA/SDC
LED Driver
PWMO
www.rohm.com
© 2009 ROHM Co., Ltd. All rights reserved.
PWM IN
2/12
2009.04- Rev.B
Technical Note
BU1572GUW, BU1573KV, BU1574KU
●Terminal functions (BU1572GUW/BU1573KV)
PIN
No.
Interface Type *1
PIN
Name
TYPE 1
TYPE 2
In/Out
Active
Level
Init
Description
1
LCDVSI
LCDVSI
LCDVSI
In
*
-
Vertical timing input
2
N.C.*2
-
-
-
-
-
-
*3
LCDHSI
In
*
-
LCDCSBI
SDA
In/Out
LCDWRBI
SDC
In
LCDRDBI
I2CDEV0
In
Low/ *
-
3
4
5
6
LCDHSI/
LCDRS01
LCDCSBI/
SDA
LCDWRDBI/
SDC
LCDRDBI/
I2CDEV0
Low/
DATA
Low/
CLK
In
-
In/output
type
C *1
-
Horizontal timing input/
Register select input signal 0
Chip select input signal /
In/output serial data
Write enable input signal /
In/output serial clock
Read enable input signal /
I2C device address setting
C *1
G
D *1
D *1
7
LCDDI0
LCDDI0
LCDDI0
In/Out
DATA
In
Data input:
bit 0
H *1
8
LCDDI1
LCDDI1
LCDDI1
In/Out
DATA
In
Data input:
bit 1
H *1
9
LCDDI2
LCDDI2
LCDDI2
In/Out
DATA
In
Data input:
bit 2
H *1
10
LCDDI3
LCDDI3
LCDDI3
In/Out
DATA
In
Data input:
bit 3
H *1
11
LCDDI4
LCDDI4
LCDDI4
In/Out
DATA
In
Data input:
bit 4
H *1
12
LCDDI5
LCDDI5
LCDDI5
In/Out
DATA
In
Data input:
bit 5
H *1
13
LCDDI6
LCDDI6
LCDDI6
In/Out
DATA
In
Data input:
bit 6
H *1
14
LCDDI7
LCDDI7
LCDDI7
In/Out
DATA
In
Data input:
bit 7
H *1
15
LCDDI8
LCDDI8
LCDDI8
In/Out
DATA
In
Data input:
bit 8
H *1
16
LCDDI9
LCDDI9
LCDDI9
In/Out
DATA
In
Data input:
bit 9
H *1
17
LCDDI10
LCDDI10
LCDDI10
In/Out
DATA
In
Data input:
bit 10
H *1
18
LCDDI11
LCDDI11
LCDDI11
In/Out
DATA
In
Data input:
bit 11
H *1
19
LCDDI12
LCDDI12
LCDDI12
In/Out
DATA
In
Data input:
bit 12
H *1
20
LCDDI13
LCDDI13
LCDDI13
In/Out
DATA
In
Data input:
bit 13
H *1
21
LCDDI14
LCDDI14
LCDDI14
In/Out
DATA
In
Data input:
bit 14
H *1
22
LCDDI15
LCDDI15
LCDDI15
In/Out
DATA
In
Data input:
bit 15
H *1
23
LCDDI16
LCDDI16
LCDDI16
In/Out
DATA
In
Data input:
bit 16
H *1
24
LCDDI17
LCDDI17
LCDDI17
In/Out
DATA
In
Data input:
bit 17
H *1
25
ENAI
*3
ENAI
In
*
-
RAM write enable input signal
C *1
26
VLDI
*3
VLDI
In
*
-
VLD input signal
C *1
27
VDDIO
VDDIO
VDDIO
-
PWR
-
DIGITAL IO power source
28
DCKI
DCKI
DCKI
In
CLK
-
Clock input
29
GND
GND
GND
-
GND
-
Common GROUND
-
30
VDD
VDD
VDD
-
PWR
-
CORE power source
-
LCDRS0I
MSEL0 *3
In
*
-
LCDRS1I
MSEL1 *3
In
*
-
31
32
MSEL0/
LCDRS0I
MSEL1/
LCDRS1I
Mode select 0/
Register select input signal 0
Mode select 1/
Register select input signal 1
D *1
A
A
※Change by setup by the register is possible for the "*" display in the column of an Active level. Moreover, Init is a pin state under reset.
*1 : It suspends during reset (initial state)
*2 : With no ball(Please connect it with GND for BU1573KV)
*3 : Please connect with GND.
www.rohm.com
© 2009 ROHM Co., Ltd. All rights reserved.
3/12
2009.04- Rev.B
Technical Note
BU1572GUW, BU1573KV, BU1574KU
PIN
PIN
No.
Name
33
34
35
36
Interface Type *1
TYPE 1
MSEL2
MSEL2 *3
LCDRS0O/
LCDRS0O/
PWMO1 *5
PWM_O(1)
PWMO3 *5/
VLDO
PWM_O(3)
In/Out
TYPE 2
Active
Level
Init
MSEL2 *4
In
*
-
PWM_O(1)
Out
*
Low
Out
*
Low
Out
*
Low
In/Out
DATA
Low
PWM_O(3)/
VLDO
Description
Mode select 2
In/output
type
A
Register select output signal 0/
PWM output for the LCD backlight
PWM output for the LCD backlight/
VLD output signal
E
ENAO
-
ENAO
LCDDO17/
LCDDO17/
LCDDO17/
PWMO2 *5
PWM_O(2)
PWM_O(2)
38
LCDDO16
LCDDO16
LCDDO16
In/Out
DATA
Low
Data output:
bit 16
F
39
LCDDO15
LCDDO15
LCDDO15
In/Out
DATA
Low
Data output:
bit 15
F
40
LCDDO14
LCDDO14
LCDDO14
In/Out
DATA
Low
Data output:
bit 14
F
41
LCDDO13
LCDDO13
LCDDO13
In/Out
DATA
Low
Data output:
bit 13
F
37
RAM write enable output signal
E
Data output: bit 17/
PWM output for the LCD backlight
E
F
42
LCDDO12
LCDDO12
LCDDO12
In/Out
DATA
Low
Data output:
bit 12
F
43
LCDDO11
LCDDO11
LCDDO11
In/Out
DATA
Low
Data output:
bit 11
F
44
LCDDO10
LCDDO10
LCDDO10
In/Out
DATA
Low
Data output:
bit 10
F
45
LCDDO9
LCDDO9
LCDDO9
In/Out
DATA
Low
Data output:
bit 9
F
In/Out
DATA
Low
Data output:
bit 8
F
-
GND
-
46
LCDDO8
LCDDO8
LCDDO8
47
GND
GND
GND
48
LCDDO7
LCDDO7
LCDDO7
In/Out
DATA
49
LCDDO6
LCDDO6
LCDDO6
In/Out
50
LCDDO5
LCDDO5
LCDDO5
In/Out
51
LCDDO4
LCDDO4
LCDDO4
52
LCDDO3
LCDDO3
53
LCDDO2
LCDDO2
54
LCDDO1
55
LCDDO0
56
57
58
59
LCDWRBO/
I2CDEV6B
LCDCSBO
SDA /
LCDHSO
SDC/
LCDVSO
Common GROUND
-
Low
Data output:
bit 7
F
DATA
Low
Data output:
bit 6
F
DATA
Low
Data output:
bit 5
F
In/Out
DATA
Low
Data output:
bit 4
F
LCDDO3
In/Out
DATA
Low
Data output:
bit 3
F
LCDDO2
In/Out
DATA
Low
Data output:
bit 2
F
LCDDO1
LCDDO1
In/Out
DATA
Low
Data output:
bit 1
F
LCDDO0
LCDDO0
In/Out
DATA
Low
Data output:
bit 0
F
LCDWRBO
I2CDEV6B *3
LCDCSBO
"H" *6
In/Out
*
Out
*
High/
In
High
-
LCDHSO
Out
*
Low
-
LCDVSO
Out
*
Low
Write enable output signal
F
Chip select output signal
E
In/output serial clock/
Horizontal timing output signal
In/output serial clock/
Vertical timing output signal
G
G
60
RESETB
RESETB
RESETB
In
Low
-
System reset signal
B
61
VDDIO
VDDIO
VDDIO
-
PWR
-
DIGITAL IO power source
-
62
DCKO
DCKO
DCKO
Out
CLK
Low
Clock output
E
63
GND
GND
GND
-
GND
-
Common GROUND
-
64
VDD
VDD
VDD
-
PWR
-
CORE power source
-
※Change by setup by the register is possible for the "*" display in the column of an Active level. Moreover, Init is a pin state under reset.
*3 : Please connect with GND
*4 : Please connect with VDDIO
*5 : It selects it according to PWMCNT register (40h).
*6 : “High”output
www.rohm.com
© 2009 ROHM Co., Ltd. All rights reserved.
4/12
2009.04- Rev.B
Technical Note
BU1572GUW, BU1573KV, BU1574KU
●Terminal functions (BU1574KU)
PIN
No.
PIN
Name
In/
Out
Active
Level
Init
Descriptions
In/Output
type
1
CAMVSI
In
*
-
Vertical timing input
C *1
2
N.C. *2
-
*
-
-
3
CAMHSI
In
*
-
Horizontal timing input
4
SDA
In/Out
DATA
In
In/Output serial data
G
5
SDC
In
CLK
-
In/Output serial clock
D *1
6
I2CDEV0
In
*
-
I2C device address setting
D *1
7
CAMDI0
In
DATA
-
Data input: bit 0
H *1
8
CAMDI1
In
DATA
-
Data input: bit 1
H *1
9
CAMDI2
In
DATA
-
Data input: bit 2
H *1
10
CAMDI3
In
DATA
-
Data input: bit 3
H *1
11
CAMDI4
In
DATA
-
Data input: bit 4
H *1
12
CAMDI5
In
DATA
-
Data input: bit 5
H *1
13
CAMDI6
In
DATA
-
Data input: bit 6
H *1
14
CAMDI7
In
DATA
-
Data input: bit 7
H *1
15
RESERVEI0 *3
In
*
-
RESERVE
C *1
16
RESERVEI1 *3
In
*
-
RESERVE
C *1
17
RESERVEI2 *3
In
*
-
RESERVE
C *1
18
RESERVEI3 *3
In
*
-
RESERVE
C *1
19
RESERVEI4 *3
In
*
-
RESERVE
C *1
20
RESERVEI5 *3
In
*
-
RESERVE
C *1
21
RESERVEI6 *3
In
*
-
RESERVE
C *1
22
RESERVEI7 *3
In
*
-
RESERVE
C *1
23
RESERVEI8 *3
In
*
-
RESERVE
C *1
24
RESERVEI9 *3
In
*
-
RESERVE
C *1
25
RESERVEI10 *3
In
*
-
RESERVE
C *1
26
RESERVEI11 *3
In
*
-
RESERVE
C *1
27
VDDIO
-
PWR
-
DIGITAL IO power source
28
CAMCKI
In
CLK
-
Clock input
29
GND
-
GND
-
Common GROUND
-
30
VDD
-
PWR
-
CORE power source
-
31
MSEL0 *3
In
*
-
Mode select 0
A
32
MSEL1 *3
In
*
-
Mode select 1
A
C *1
D *1
※Change by setup by the register is possible for the "*" display in the column of an Active level. Moreover, Init is a pin state under
reset.
*1 : It suspends during reset (initial state)
*2 : Please connect with GND
*3 : Please connect with GND.
www.rohm.com
© 2009 ROHM Co., Ltd. All rights reserved.
5/12
2009.04- Rev.B
Technical Note
BU1572GUW, BU1573KV, BU1574KU
PIN
No.
PIN
Name
In/Out
Active
Level
Init
In
*
-
33
MSEL2 *4
34
PWMO
Out
*
35
RESERVEO11 *5
Out
36
RESERVEO10 *5
37
Descriptions
In/Output
type
Mode select 2
A
Low
PWM output for LCD backlight
E
*
Low
RESERVE
E
Out
*
Low
RESERVE
E
RESERVEO9 *5
Out
*
Low
RESERVE
E
38
RESERVEO8 *5
Out
*
Low
RESERVE
E
39
RESERVEO7 *5
Out
*
Low
RESERVE
E
40
RESERVEO6 *5
Out
*
Low
RESERVE
E
41
RESERVEO5 *5
Out
*
Low
RESERVE
E
42
RESERVEO4 *5
Out
*
Low
RESERVE
E
43
RESERVEO3 *5
Out
*
Low
RESERVE
E
44
RESERVEO2 *5
Out
*
Low
RESERVE
E
45
RESERVEO1 *5
Out
*
Low
RESERVE
E
46
RESERVEO0 *5
Out
*
Low
RESERVE
E
47
GND
-
GND
-
Common GROUND
-
48
CAMDO7
Out
DATA
Low
Data output: bit 7
E
49
CAMDO6
Out
DATA
Low
Data output: bit 6
E
50
CAMDO5
Out
DATA
Low
Data output: bit 5
E
51
CAMDO4
Out
DATA
Low
Data output: bit 4
E
52
CAMDO3
Out
DATA
Low
Data output: bit 3
E
53
CAMDO2
Out
DATA
Low
Data output: bit 2
E
54
CAMDO1
Out
DATA
Low
Data output: bit 1
E
55
CAMDO0
Out
DATA
Low
Data output: bit 0
E
56
I2CDEV6B *3
In
*
-
RESERVE
A
57
RESERVEO12 *5
Out
*
High
RESERVE
E
58
CAMHSO
Out
*
Low
Horizontal timing output signal
E
59
CAMVSO
Out
*
Low
Vertical timing output signal
E
60
RESETB
In
Low
-
System reset signal
B
61
VDDIO
-
PWR
-
DIGITAL IO power source
-
62
CAMCKO
Out
CLK
Low
Clock output
E
63
GND
-
GND
-
Common GROUND
-
64
VDD
-
PWR
-
CORE power source
-
※Change by setup by the register is possible for the "*" display in the column of an Active level. Moreover, Init is a pin state under
reset.
*3 : Please connect with GND
*4 : Please connect with VDDIO
*5 : Please leave OPEN
www.rohm.com
© 2009 ROHM Co., Ltd. All rights reserved.
6/12
2009.04- Rev.B
Technical Note
BU1572GUW, BU1573KV, BU1574KU
●Equivalent Circuit Structures of input / output pins
Type
The equivalent circuit structure
Type
The equivalent circuit structure
VDDIO
VDDIO
VDDIO
A
B
To internal
To internal
GND
GND
GND
Input pin
Input pin with the hysteresis function
VDDIO
VDDIO
Internal signal
VDDIO
C
To internal
D
GND
Internal signal
GND
Internal signal
GND
Input pin with the suspend function
VDDIO
Input pin with the hysteresis and suspend functions
VDDIO
VDDIO
VDDIO
VDDIO
Internal signal
To internal
E
Internal signal
F
GND
Internal signal
Internal signal
GND
GND
GND
Output pin
GND
In/output pin
VDDIO
VDDIO
VDDIO
To internal
To internal
Internal signal
Internal signal
VDDIO
VDDIO
Internal signal
Internal signal
G
H
Internal signal
Internal signal
GND
GND
GND
In/output pin with the hysteresis function
www.rohm.com
© 2009 ROHM Co., Ltd. All rights reserved.
GND
Internal signal
In/output pin with the suspend function
7/12
2009.04- Rev.B
Technical Note
BU1572GUW, BU1573KV, BU1574KU
●Terminal Layout
(BU1572GUW
Bottom View)
(BU1573KV/BU1574KU Top View)
H
36
ENAO
38
LCDDO1
6
9
LCDDI2
10
LCDDI3
12
LCDDI5
28
DCKI
39
37
40
LCDDO1 LCDDO17/ LCDDO1
5
4
PWMO2
8
LCDDI1
5
LCDWRBI/
SDC
7
LCDDI0
60
RESETB
44
LCDDO1
0
42
LCDDO1
2
43
LCDDO1
1
41
LCDDO1
3
6
4
3
LCDDRBI/ LCDCSBI/ LCDHSI/
I2CDEV0
SDA
LCDRS01
58
55
SDA/
LCDDO0
LCDHSO
51
LCDDO4
46
LCDDO8
45
LCDDO9
64
VDD
62
DCKO
57
LCDCSB
O
53
LCDCSB
O
52
LCDDO3
48
LCDDO7
47
GND
63
GND
61
VDDIO
59
56
54
SDC/ LCDWRBO/ LCDDO1
LCDVSO I2CDEV6B
50
LCDDO5
49
LCDDO6
49
51
52
53
50
42
41
9
40
UQFP64 39
(BU1574KU)
38
12
37
13
36
14
35
15
34
16
33
17
B
(BU1573KV)
8
11
C
43
VQFP64 10
D
54
44
7
11
LCDDI4
55
45
5
6
E
56
46
4
32
35
PWMO3/
VLDO
31
26
VLDI
30
23
LCDDI16
29
19
LCDDI12
47
3
28
14
LCDDI7
48
2
27
13
LCDDI6
1
26
F
57
64
34
LCDRS0O/
PWMO1
25
32
MSEL1/
LCDRS1I
58
30
VDD
24
25
ENAI
59
21
LCDDI14
23
20
LCDDI13
60
16
LCDDI9
G
22
15
LCDDI8
33
MSEL2
61
31
MSEL0/
LCDRS01
21
29
GND
62
27
VDDIO
20
24
LCDDI17
63
22
LCDDI15
19
18
LCDDI11
18
17
LCDDI10
A
1
LCDVSI
1
2
3
4
5
6
7
8
*The terminal arrangement follows terminal function table of P.3-6.
● Timing Chart
1.
I2C interface
1.1 I2C interface timing
SDA
tSU;DAT
tLOW
tBUF
tHD;ST
SDC
tHD;STA
tSU;STA
tHD;DAT
Table 1.1-1
Symbol
fSCL
tHD;STA
tSU;STO
tHIGH
I2C Interface timing
Parameter
SDC Clock Frequency
Hold-time(repetition)『START』conditions
(The first clock pulse is generated after this period.)
MIN.
TYP.
MAX.
Unit
0
-
400
kHz
0.6
-
-
us
fLOW
The "L" period of SDC clock
1.3
-
-
us
tHIGH
The "H" period of SDC clock
0.6
-
-
us
tSU;STA
Setup time of repetitive 『START』conditions
0.6
-
-
us
tHD;DAT
Hold time of SDA
0
-
tSU;DAT
Setup time of SDA
100
-
-
ns
tSU;STO
Setup time of the 『STOP』conditions
0.6
-
-
us
tBUF
Bus free time between 『STOP』conditions and the 『START』conditions
1.3
-
-
us
www.rohm.com
© 2009 ROHM Co., Ltd. All rights reserved.
8/12
us
2009.04- Rev.B
Technical Note
BU1572GUW, BU1573KV, BU1574KU
2.
RGB interface
2.1. RGB interface timing
The input timing of image signal on RGB I/F is shown in Table 2.1-1.
Table 2.1-1
LCDVSI
LCDHSI
BU1572GUW/BU1573KV
Explanation
MIN.
TYP.
MAX
UN
tDS
Camera setup period
(between the DCKI rising and falling edges)
8
-
-
ns
tDH
Camera holding period
(between the DCKI rising and falling edges)
8
-
–
ns
Symbol
LCDDI0
-LCDDI17
DCKI
(CKPOL=“0”)
RGB interface input timing
DCKI
(CKPOL=“1”)
tDH
tDS
The output timing of image signal on RGB I/F is shown in Table 2.1-2.
Table 2.1-2
BU1572GUW/BU1573KV Image signal output timing
tDCLK
Symbol
DCKO
LCDVSO
LCDHSO
tOCD
MIN.
TYP.
MAX.
UNIT
tDCLK
Clock Cycle
27.7
-
-
ns
dDCLK
Clock Duty
40
50
60
%
tODD
Decision of LCDDO from DCKO
-
-
5
ns
tOCD
Decision of LCDVSO or LCDHSO from DCKO
-
-
5
ns
tOCD
tODD
LCDDO
[17:0]
3.
Explanation
YUV interface
3.1. YUV interface timing
The input timing of image signal on YUV I/F is shown in Table 3.1-1.
Table 3.1-1
BU1574KU
YUV interface input timing
CAMVSI
Explanation
MIN.
TYP
MAX
UNI
tDS
Camera setup period
(between the CAMCKI rising and falling edges)
8
-
-
ns
tDH
Camera holding period
(between the CAMCKI rising and falling edges)
8
-
–
ns
CAMHSI
Symbol
CAMDI0
-CAMDI7
CAMCKI
(CKPOL=“1”)
CAMCKI
(CKPOL=“0”)
tDH
tDS
The output timing of image signal on YUV I/F is shown in Table 3.1-2.
Table 3.1-2
tPCLK
Symbol
BU1574KU Image signal output timing
Explanation
MIN.
TYP.
MAX.
UNIT
CAMCKO
CAMVSO
CAMHSO
tOCD
tOCD
tODD
tPCLK
Clock Cycle
27.7
-
-
ns
dPCLK
Clock Duty
40
50
60
%
tODD
Decision of CAMDO from CAMCKO
-
-
5
ns
tOCD
Decision of CAMVSO or CAMHSO from CAMCKO
-
-
5
ns
CAMDO[7:0]
www.rohm.com
© 2009 ROHM Co., Ltd. All rights reserved.
9/12
2009.04- Rev.B
Technical Note
BU1572GUW, BU1573KV, BU1574KU
●Development Scheme
This technical note is aimed at trying the connectivity in the hardware between customer’s system and our AIE Adaptive
Image Enhancer series.
We prepare various data and tools for every development STEP as follows other than this technical note, please
contact the sales staff in your duty also including the support system.
(1) Demonstration STEP
(You can try the standard image processing functions by the standard Demonstration kit at once.)
You can confirm on TV screen what carried out AIE processing of a camera image and the DVD video image.
・Standard Demonstration board kit
◎Demonstration board(TV-IN→BU1573KV→TV-OUT board)
◎Demonstration board operation manual
◎Demonstration software
If the software for the trial board is installed in your Windows PC(Windows 2000/XP), more detailed setting
is possible.
◎USB cable
(2) Confirmation STEP
(We will respond to customer’s camera module.)
・Specifications
We will provide specifications for AIE Adaptive Image Enhancer according to customer’s requirements.
・Function explanation
We will deliver you the function explanation describing detailed functions, register settings, external
interfaces, timing, and so forth of AIE Adaptive Image Enhancer according to your requests.
・Application note
We will deliver you the detailed explanation data on application development of AIE Adaptive Image
Enhancer according to your requests.
(3) System check STEP
(You can check the application operation as a system by the kit of system check tools and your camera
module.)
You can check the interface with your camera module and the application operation on the system check board using
the tools for user’s only.
・System check tools kit
◎Board for system evaluation
◎Manual for system evaluation
◎Macro command file for reference
*You can check the detailed functions of the application operation by your PC using the macro command file.
(4) Integrated check STEP with user’s system
(You can check the application operation as a system on your system check board using the integrated
check software.)
You can check the application operation on the sample LSI-equipped system check board by your camera
module using the integrated check software.
・On line Support;We will answer your questions about the software development.
●Cautions on use
(1) Absolute Maximum Ratings
An excess in the absolute maximum ratings, such as supply voltage, temperature range of operating conditions, etc., can break
down devices, thus making impossible to identify breaking mode such as a short circuit or an open circuit. If any special mode
exceeding the absolute maximum ratings is assumed, consideration should be given to take physical safety measures
including the use of fuses, etc.
(2) Operating conditions
These conditions represent a range within which characteristics can be provided approximately as expected. The electrical
characteristics are guaranteed under the conditions of each parameter.
(3) Reverse connection of power supply connector
The reverse connection of power supply connector can break down ICs. Take protective measures against the breakdown due
to the reverse connection, such as mounting an external diode between the power supply and the IC’s power supply terminal.
(4) Power supply line
Design PCB pattern to provide low impedance for the wiring between the power supply and the GND lines.
In this regard, for the digital block power supply and the analog block power supply, even though these power supplies has the
same level of potential, separate the power supply pattern for the digital block from that for the analog block, thus suppressing
the diffraction of digital noises to the analog block power supply resulting from impedance common to the wiring patterns. For
the GND line, give consideration to design the patterns in a similar manner.
Furthermore, for all power supply terminals to ICs, mount a capacitor between the power supply and the GND terminal. At the
same time, in order to use an electrolytic capacitor, thoroughly check to be sure the characteristics of the capacitor to be used
present no problem including the occurrence of capacity dropout at a low temperature, thus determining the constant.
www.rohm.com
© 2009 ROHM Co., Ltd. All rights reserved.
10/12
2009.04- Rev.B
Technical Note
BU1572GUW, BU1573KV, BU1574KU
(5)GND voltage
Make setting of the potential of the GND terminal so that it will be maintained at the minimum in any operating state.
Furthermore, check to be sure no terminals are at a potential lower than the GND voltage including an actual electric transient.
(6)Short circuit between terminals and erroneous mounting
In order to mount ICs on a set PCB, pay thorough attention to the direction and offset of the ICs. Erroneous mounting can break
down the ICs. Furthermore, if a short circuit occurs due to foreign matters entering between terminals or between the terminal
and the power supply or the GND terminal, the ICs can break down.
(7)Operation in strong electromagnetic field
Be noted that using ICs in the strong electromagnetic field can malfunction them.
(8)Inspection with set PCB
On the inspection with the set PCB, if a capacitor is connected to a low-impedance IC terminal, the IC can suffer stress.
Therefore, be sure to discharge from the set PCB by each process. Furthermore, in order to mount or dismount the set PCB
to/from the jig for the inspection process, be sure to turn OFF the power supply and then mount the set PCB to the jig. After the
completion of the inspection, be sure to turn OFF the power supply and then dismount it from the jig. In addition, for protection
against static electricity, establish a ground for the assembly process and pay thorough attention to the transportation and the
storage of the set PCB.
(9)Input terminals
In terms of the construction of IC, parasitic elements are inevitably formed in relation to potential. The operation of the parasitic
element can cause interference with circuit operation, thus resulting in a malfunction and then breakdown of the input terminal.
Therefore, pay thorough attention not to handle the input terminals, such as to apply to the input terminals a voltage lower than
the GND respectively, so that any parasitic element will operate. Furthermore, do not apply a voltage to the input terminals
when no power supply voltage is applied to the IC. In addition, even if the power supply voltage is applied, apply to the input
terminals a voltage lower than the power supply voltage or within the guaranteed value of electrical characteristics.
(10)Ground wiring pattern
If small-signal GND and large-current GND are provided, It will be recommended to separate the large-current GND pattern
from the small-signal GND pattern and establish a single ground at the reference point of the set PCB so that resistance to the
wiring pattern and voltage fluctuations due to a large current will cause no fluctuations in voltages of the small-signal GND. Pay
attention not to cause fluctuations in the GND wiring pattern of external parts as well.
(11)External capacitor
In order to use a ceramic capacitor as the external capacitor, determine the constant with consideration given to a degradation
in the nominal capacitance due to DC bias and changes in the capacitance due to temperature, etc.
●Order Model Name Selection
B
U
1
ROHM model name
5
7
2
Product number
●Tape and Reel information
E
G U W
2
Package type
Taping model name
GUW: VBGA063W050
KV: VQFP64
KU: UQFP64
E2: Embossed reel tape
None: Tray
VBGA063W050
<Tape and Reel information>
<Dimension>
Tape
Embossed carrier tape (With dry pack)
Quantity
2500pcs
Direction
of feed
E2
(The direction is the 1pin of product is at the upper left when you hold
reel on the left hand and you pull out the tape on the right hand.)
1234
1234
Reel
(Unit:mm)
www.rohm.com
© 2009 ROHM Co., Ltd. All rights reserved.
1234
1Pin
1234
1234
1234
Direction of feed
※When you order , please order in times the amount of package quantity.
11/12
2009.04- Rev.B
Technical Note
BU1572GUW, BU1573KV, BU1574KU
VQFP64
<Dimension>
<Packing information>
Container
33
17
64
1.6Max.
1.4 ± 0.05
0.1 ± 0.05
1
0.5 ± 0.15
1.0 ± 0.2
32
1.25
12.0 ± 0.2
10.0 ± 0.1
48
49
16
1.25
0.145 +0.05
−0.03
4° +6
−4
0.08 S
°
°
0.5 ± 0.1
0.2 +0.05
−0.04
Tray(with dry pack)
Quantity
1000pcs
Direction
of feed
Direction of product is fixed in a tray.
1pin
12.0 ± 0.2
10.0 ± 0.1
0.08 M
(Unit:mm)
※When you order , please order in times the amount of package quantity.
UQFP64
<Dimension>
<Packing information>
1000pcs
48
Direction
of feed
Direction of product is fixed in a tray.
0.5 ± 0.15
1.0 ± 0.2
33
17
1
0.5
32
16
0.4
0.145 +0.05
−0.03
1pin
49
0.5
Tray(with dry pack)
Quantity
64
1.4 ± 0.05
0.1 ± 0.05
1.6Max.
9.0 ± 0.2
7.0 ± 0.1
Container
9.0 ± 0.2
7.0 ± 0.1
+6°
4° −4
°
0.08
0.17 +0.05
−0.03
0.08 M
(Unit:mm)
※When you order , please order in times the amount of package quantity.
www.rohm.com
© 2009 ROHM Co., Ltd. All rights reserved.
12/12
2009.04- Rev.B
Notice
Notes
No copying or reproduction of this document, in part or in whole, is permitted without the
consent of ROHM Co.,Ltd.
The content specified herein is subject to change for improvement without notice.
The content specified herein is for the purpose of introducing ROHM's products (hereinafter
"Products"). If you wish to use any such Product, please be sure to refer to the specifications,
which can be obtained from ROHM upon request.
Examples of application circuits, circuit constants and any other information contained herein
illustrate the standard usage and operations of the Products. The peripheral conditions must
be taken into account when designing circuits for mass production.
Great care was taken in ensuring the accuracy of the information specified in this document.
However, should you incur any damage arising from any inaccuracy or misprint of such
information, ROHM shall bear no responsibility for such damage.
The technical information specified herein is intended only to show the typical functions of and
examples of application circuits for the Products. ROHM does not grant you, explicitly or
implicitly, any license to use or exercise intellectual property or other rights held by ROHM and
other parties. ROHM shall bear no responsibility whatsoever for any dispute arising from the
use of such technical information.
The Products specified in this document are intended to be used with general-use electronic
equipment or devices (such as audio visual equipment, office-automation equipment, communication devices, electronic appliances and amusement devices).
The Products specified in this document are not designed to be radiation tolerant.
While ROHM always makes efforts to enhance the quality and reliability of its Products, a
Product may fail or malfunction for a variety of reasons.
Please be sure to implement in your equipment using the Products safety measures to guard
against the possibility of physical injury, fire or any other damage caused in the event of the
failure of any Product, such as derating, redundancy, fire control and fail-safe designs. ROHM
shall bear no responsibility whatsoever for your use of any Product outside of the prescribed
scope or not in accordance with the instruction manual.
The Products are not designed or manufactured to be used with any equipment, device or
system which requires an extremely high level of reliability the failure or malfunction of which
may result in a direct threat to human life or create a risk of human injury (such as a medical
instrument, transportation equipment, aerospace machinery, nuclear-reactor controller,
fuel-controller or other safety device). ROHM shall bear no responsibility in any way for use of
any of the Products for the above special purposes. If a Product is intended to be used for any
such special purpose, please contact a ROHM sales representative before purchasing.
If you intend to export or ship overseas any Product or technology specified herein that may
be controlled under the Foreign Exchange and the Foreign Trade Law, you will be required to
obtain a license or permit under the Law.
Thank you for your accessing to ROHM product informations.
More detail product informations and catalogs are available, please contact us.
ROHM Customer Support System
http://www.rohm.com/contact/
www.rohm.com
© 2009 ROHM Co., Ltd. All rights reserved.
R0039A