MCIMX6SLEVK board

5
4
3
2
1
MCIMX6SLEVK board
Table of Content
D
Page 1
Title and Rev History
Page 2
Block Diagram
Page 3
SYS Power
Page 4
PMIC
Page 5
iMX6SL Power
Page 6
iMX6SL SoC
Page 7
LPDDR2
Page 8
EMMC, SD and SPI NOR
Page 9
USB
Page 10
Audio
Page 11
LDC + EPDC Connectors
Page 12
Wireless
Page 13
MISC
Page 14
UART & JTAG
Page 15
ENET
Page 16
IOMUX
Revision History
Rev. Code
Date
Description
D
A
2012/05/11
Rev A
B
2012/09/27
ENGR00225877. Replaced D24 with BAT54C-7-F
ENGR00225876. DNP standoffs H1, H2, H3 and H4
ENGR00225878. Replaced R11, R129 and R130 with SH14, SH15 and SH16 respectively
ENGR00225879.
1. Replaced U3 - MMPF0100NPEP with MMPF0100F1EP
2. Replaced C23 (0.1uF, 0402) with 0.22uF, 0201
3. Added C410, C412 per PMIC datasheet
4. Replaced C40 (0.1uF, 0402) with 0.22uF, 0201
5. Replaced C27, C28 and C32 (0.1uF) with 0.22uF
6. Replaced C70 (22uF, 0603, 6.3V) with 47uF, 0805, 10V
ENGR00226044. Replaced P4 - WM-64PNT with WM-64PCT
ENGR00226043. Replaced U2 - K4P8G304EB-AGC1 with MT42L256M32D2LG-25WT
ENGR00225880.
1. Replaced C146 (10uF) with 47uF
2. Replaced C159 and C160 (0402, 6.3V) with 0603, 10V
ENGR00225881.
1. Move PMIC SW1AB feedback to the load side of SH2 to compensate for SH2 voltage drops during current measurement.
2. Move PMIC SW1C feedback to the load side of SH3 to compensate for SH3 voltage drops during current measurement.
3. Move PMIC SW2 feedback to the load side of SH1 to compensate for SH1 voltage drops during current measurement.
4. Move PMIC SW3 feedback to the load side of SH5 to compensate for SH5 voltage drops during current measurement.
ENGR00225088. Connected J12.117 to POR_B
ENGR00226215. Renamed PFUSE_VIN net to PF0100_VIN
ENGR00227037. Replaced all capacitors in PF0100_VIN net whose voltage rating is less than 10V with 10V capacitors:
C46, C47, C66, C41, C48, C63, C58.
ENGR00227038. Flipped the capacitors whose polarity was inverted: C4, C2, C11, C21, C36, C46, C47, C58,
C66, C156, C166, C178, C218, C200.
ENGR00223967:
1. Added test points TP42, 43, 44 and 45
2. The following pins were changed to NC in J8: CLKREQ#, UIM_C8, UIM_C4W, SMB_CLK, SMB_DATA, LED_WLAN#,
LED_WPAN#, Reserved1-8, Reserved10
3. DNP C140, C191, C192 and C210
ENGR00229277: Y1 (CC7V-T1A) 9pF is selected as default/preferred part. However, 12pF version may be used for
production board.
ENGR229701:
1. Removed R195.
2. Replaced C152 (150uF) with 2.2uF
C
C
Page 17
Page 18
Page 19
B
B
A
A
ICAP Classification:
Drawing Title:
FCP: ___
FIUO: X
PUBI: ___
MCIMX6SLEVK board
Page Title:
Title and Rev History
5
4
3
2
Size
C
Document Number
Date:
Monday, October 15, 2012
Rev
B
SCH-27452 PDF: SPF-27452
Sheet
1
1
of
16
5
4
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2
1
MCIMX6SLEVK board Diagram
D
D
C
C
B
B
A
A
ICAP Classification:
Drawing Title:
FCP: ___
FIUO: X
PUBI: ___
MCIMX6SLEVK board
Page Title:
Block Diagram
5
4
3
2
Size
B
Document Number
Date:
Wednesday, October 10, 2012
Rev
B
SCH-27452 PDF: SPF-27452
Sheet
1
2
of
16
5
4
DC JACK
5V
3
2
Over Voltage
Protection
1
Lithium Charger
D
D
TP74
DNP
JP1
1
1
2
3
D2
MMSZ5231BT1G
A
C
ESD9L5.0ST5G
5
R5
10K wall_ctl_base1
0402_CC
Q2B
MBT3906DW1T1
C
C2
1.0UF
0402_CC
10V
C10
10uF
CC0603_OV
10V
C3
100UF
CC1210
10V
3
4
C11
1.0UF
0402_CC
10V
1
2
chg_bst
C13
0.1UF
0402_CC
chg_lx
16V
GND
GND
wall_ctl_base2
D3
RB521CS-30
A
C1
0.1UF
0402_CC
16V
6
DC1
DC2
DCM
VL
R9
470K
0603_CC
chg_dcm
CHG_VL
R37
BST
UOK
LX1
LX2
DOK
CHG
L2
1UH
ind_vls252010
THM
Forward Voltage 0.8
Use diode if bypasing charger.
C12
1.0UF
0402_CC
10V
PG1
PG2
FLT
27
28
5
9
18
CHG_FLT
19
CHG_UOK
0
0402_CC
R39
0
0402_CC
R45
0
0402_CC
8
CHG_DOK
22
CHG_STATUS
16
BATT_TEMP
13
chg_iset
R33 1% 1.0K
0402_CC
11
chg_idc
R35 1% 3.0K
0603_CC
R25
10K
0402_CC
GND
ECSPI2_MISO
(6,11)
ECSPI2_MOSI
(6,11)
PSU_V1_5.0V
charge complete
A
Q2A
MBT3906DW1T1
D1
2
6
SHUTDOWN_B
R24
10K
0402_CC
5
4
1
R4
10K wall_ov_base 2
0402_CC
C
wall_filter
wall_ov_ctl
C4
1.0UF
10V
0402_CC
DNP
R3
10K
0402_CC
PSU_V1_5.0V
U4
4
R2
2.7K
0805_CC
R1
0.1
DNP
0603_CC
CON_1_PWR
PSU_V1_5.0V
Q1
FDMS6681Z
WALL_5V_DC_JACK
3
1
2
3
A
TP73
J6
2
ECSPI2_SS0
D4
1N5400
DNP
in fast-charge
(6,11)
C
GND
WALL_5V_DC_JACK GND
R12
2.2K
0402_CC
chg_ct
C18
0.15uF
0402_CC
10V
GND
led1_1
A
Over-Voltage
LED
R36
10K
0402_CC
chg_iusb
10
7
15
R180
0
0402_CC
D6
LED Red
3 C
CHG_USB 17
CHG_USB
C17
4.7uF
0402_CC
6.3V
C
25
26
chg_en
14
12
29
led1_2
GND
CS1
CS2
ISET
PF0100_VIN
RT1
10K
t 0603_CC
USB
IDC
CT
SYS1
SYS2
IUSB
USUS
BAT1
BAT2
GND
EP
C
SYS_4V325
GND
SOLDER SHORT
GND
CEN
GND
24
23
C19
22UF
0805_CC
10V
SH14
SH0805_40
J2
21
20
3
2
1
C20
10uF
CC0603_OV
10V
MAX8903B
R34
2.2K
0402_CC
BATT
Main PWR
LED
CON_1X3
GND
BATT_TEMP
J1
1
2
led1_3
1
BATT
2
SW14
B
R22
100K
0402_CC
R23
100K
0402_CC
SHUTDOWN_B
D11
LED Green
C
GND
WALL_OV_LED
A
1
MAXIMUM CHARGE CURRENT = 1.2A
chg_cs
GND
Q3
NTS4001NT1G
2
1
USB_5V_OTG
GND
J16
3
2
1
3
GND
B2B-PH-K-S
A
SPDT_PWR_SWITCH
GND
GND
PWR Cut Switch
For SW Development
HDR_1X3
GND
Secondary Charge Source
USB or Wireless Charger
Lithium single cell
battery connectors
B
B
Note:
Shunt 2-3 to experiment with USB
charging.
Use cable to pins 1 and 2 to
experiment with wireless charging
NEED TO FIGURE OUT THIS BETTER
PWRCTRL3 is the capacitive touch interrupt.
MISO and SSO might be OK.
must permanently decide to eliminate ability to use ECSPI2
Also should use pullups inside the processor
A
A
ICAP Classification:
Drawing Title:
FCP: ___
FIUO: X
PUBI: ___
MCIMX6SLEVK board
Page Title:
SYS Power
5
4
3
2
Size
C
Document Number
Date:
Thursday, October 18, 2012
Rev
B
SCH-27452 PDF: SPF-27452
1
Sheet
3
of
16
5
4
3
2
Note:
MMPF0100 erratum ER19 can affect some of the systems, depending on the
system characteristics. Please check this erratum and its workaround to see
if applies.
1
Freescale MMPF0100NPEP PMIC
Note:
This device is factory configurable for voltage and timings.
This reference design is configured to run from factory pre-programmed parts.
Ordering selections with common i.MX6SL voltages/timings are available.
Please check the device datasheet for latest ordering info.
PF0100_VIN
C21
1.0UF
0402_CC
10V
P3V0_STBY
DNP
R745
47K
0402_CC
D
GND
D
U3A
C22
10V
1.0UF
0402_CC
C23
6.3V
1.0UF
0402_CC
GND
C24
10V
GND
0.22UF
0201_CC
VCOREDIG
50
51
pf0100_vcoreref
52
pf0100_vcore
49
(6,11)
I2C1_SCL
(6,11)
I2C1_SDA
54
pf0100_sda
53
SDWN
INT
56
pf0100_pwron
R43
0 0402_CC
3
pf0100_rst
R40
0 0402_CC
PMIC_ON_REQ
POR_B
4
PMIC_STBY_REQ
2
(6)
(6,8,11,13)
(6)
TP8
GPIO
1
REF_CLK_24M
(6)
VDDOTP
55
pf0100_scl
STANDBY
Control
47
0
0402_CC
R49
0
0402_CC
RESETMCU
GNDREF
GND
R48
PWRON
VCOREREF
VCORE
48
GND
P3V15_VDDHIGH_SW2
VIN
VCOREDIG
VDDIO
ICTEST
5
SCL
SDA
GND
Automotive
MMPF0100F1EP
With low-inductive paths between VIN
the voltage sources, either
0.22 uF or 0.47 uF may be used.
PF0100_VIN
P3V15_VDDHIGH_SW2
R51
0
R52
0603_CC
DNP 0
0603_CC
pf0100_vin1
C
PF0100_VIN
C
P3V15_VDDHIGH_SW2
R53
0
R54
0603_CC
DNP 0
0603_CC
GND
C27
0.22uF
0402_CC
16V
U3B
P1V2_VGEN1
17
pf0100_vin2
PF0100_VIN
P3V15_VDDHIGH_SW2
R56
0
R55
0603_CC
DNP 0
0603_CC
GND
27
C28
0.22uF
0402_CC
16V
40
VIN1
VGEN1
VIN2
VGEN2
VIN3
VGEN3
VGEN4
pf0100_vin3
DRAM_VREF
GND
C32
0.22uF
0402_CC
16V
VGEN5
31
VREFDDR
P1V2_DDR_SW3
30
C36
1.0UF
0402_CC
10V
C37
0.1UF
0402_CC
16V
pf0100_vhlf
VGEN6
LICELL
VHALF
LDO
Regs
GND
C39
0.1UF
0402_CC
16V
P1V5_VGEN2
P1V8_VGEN3
26
P1V8_VGEN4
28
P2V5_VGEN5
39
P2V8_VGEN6
41
C35
4.7uF
0402_CC
GND
6.3V
42
C38
0.1UF
0402_CC
16V
P3V0_VSNVS
VSNVS
C29
4.7uF
0402_CC
C30
4.7uF
6.3V
0402_CC
6.3V
GND
18
P3V15_LICELL
VINREFDDR
29
16
43
C34
4.7uF
0402_CC
GND
6.3V
C31
4.7uF
0402_CC
C33
4.7uF
6.3V
0402_CC
6.3V
GND
SW1A/B = 1.375 V for boot-up at ~800 MHz.
Recommend that software increase SW1A/B
to 1.425 V for 1 GHz operation.
GND
LDO decouples are 4.7 uF
for BOM consolidation.
GND
GND
MMPF0100F1EP
C40
0.22UF
0201_CC
6.3V
GND
GND
P2V8_VGEN6
P3V15_LICELL
J14
1
C412
2
0.22UF
0201_CC
6.3V
HDR 1X2
GND
R57
330
0402_CC
SW1A
C55
0.1UF
0402_CC
16V
D15
pmic_pwr_on_led
GND
PF0100_VIN
PMIC-ON
LED
A
C
SW1B
C56
0.1UF
0402_CC
16V
SW1C
C59
0.1UF
0402_CC
16V
SW2
C60
0.1UF
0402_CC
16V
SW3A
C61
0.1UF
0402_CC
16V
SW3B
C57
0.1UF
0402_CC
16V
SW4
C62
0.1UF
0402_CC
16V
LED Green
B
B
GND
GND
VDD_ARM_IN
U3C
6
SW1ALX
SW3ALX
SW1BLX
SW3BLX
PF0100_VIN
4.7uF
0603_CC
1 GND pf0100_sw1c_lx
P1V375_VDDSOC_SW1C 2
1UH
C53
C54
PF0100_VIN
22UF
22UF
ind_vls252010
C58
4.7uF
0603_CC 0603_CC
10V
0603_CC
6.3V
6.3V
GND
10
Switching
Regs
SW1BIN
11
12
13
SW1CIN
SW3VSSSNS
SW1CFB
P3V15_VDDHIGH_SW2
25
SWBSTLX
SW2IN_1
SW2IN_2
SW2FB
GND
A
MMPF0100F1EP
GNDREF1
23
24
SW2LX
15
22
EPGND
GND
SW4LX
57
SH1
SH0805_40
L7
GND
2
1
pf0100_sw2_lx
PF0100_VIN
1UH
C66
4.7uF
ind_vls3012_sm
10V
0603_CC
SW4IN
SW1VSSSNS
GND
GND
SWBSTIN
SWBSTFB
1
pf0100_sw3_lx
PF0100_VIN
34
C48
10V
33
4.7uF
0603_CC
2
1UH
ind_vls252010
P1V2_DDR_SW3
p1V2_sw3_out
C49
22UF
0603_CC
6.3V
SOLDER SHORT
C50
22UF
0603_CC
6.3V
SH5
SH0805_40
GND
SW1CLX
SW4FB
14
pf0100_sw2_out
C64
C65
22UF
22UF
0603_CC 0603_CC
6.3V
6.3V
SW3BIN
SW3BFB
GND
SOLDER SHORT
GND
35
32
GND
GND
19
20
PF0100_VIN
C63
10V
4.7uF
0603_CC
21
L6
pf0100_sw4_lx
46
1
GND
pf0100_bst_lx
PF0100_VIN
P1V8_SW4
2
1UH
ind_vls252010
C67
22UF
0603_CC
6.3V
45
L8
2.2uH
ind_LPS4018
44
C68
0.1UF
0402_CC
16V
C69
10uF
CC0603_OV
10V
GND
C410
22UF
0603_CC
6.3V
GND
D12
MBR140SFT
SYS_5V
PF0100_5V
C70
47uF
0805_CC
10V
GND
GND
Note:
Switcher currents and optimum inductor sizes vary depending on application.
Please refer to the latest part datasheet for inductor recommendations.
5
4
J17
HDR_1X3
Note: J17
Shunt 1-2 for SYS_5V from PMIC: 600mA limited
Shunt 2-3 for SYS_5V from wall adapter
3
A
PSU_V1_5.0V
PF0100_5V
1
2
3
SH3
SH0805_40
4.7uF
0603_CC
36
L4
9
L5
SOLDER SHORT
PF0100_VIN
C41
10V
pf0100_sw1ab_lx
C47
10V
GND
SW3AIN
A
VDD_SOC_IN
SW1AIN
38
37
C
SH2
SH0805_40
SW3AFB
1
P1V375_VDDARM_SW1AB
C42
C43
22UF
22UF
L3
GND
1
0603_CC 0603_CC 2
1UH
6.3V
6.3V
ind_vls3012_sm
PF0100_VIN
7
4.7uF
0603_CC
8
2
SOLDER SHORT
C46
10V
SW1FB
2
ICAP Classification:
Drawing Title:
FCP: ___
FIUO: X
PUBI: ___
MCIMX6SLEVK board
Page Title:
PMIC
Size
C
Document Number
Date:
Thursday, October 18, 2012
Rev
B
SCH-27452 PDF: SPF-27452
1
Sheet
4
of
16
5
4
3
VDD_ARM_IN
2
U1H
C76
22UF
0603_CC
6.3V
C396
4.7uF
0402_CC
6.3V
J12
J13
J14
K12
K13
K14
VDD_ARM_IN1
VDD_ARM_IN2
VDD_ARM_IN3
VDD_ARM_IN4
VDD_ARM_IN5
VDD_ARM_IN6
GND
1
VDD_ARM_CAP
VDD_ARM_CAP1
VDD_ARM_CAP2
VDD_ARM_CAP3
VDD_ARM_CAP4
VDD_ARM_CAP5
VDD_ARM_CAP6
VDD_ARM_CAP7
VDD_ARM_CAP8
J15
J16
J17
J18
K15
K16
K17
K18
C90
0.22UF
0201_CC
6.3V
C75
22UF
0603_CC
6.3V
U1I
A1
A4
A7
A24
C6
C10
C14
C19
D1
D2
E5
G1
G8
G9
G10
G11
G13
G14
G15
G17
G18
H3
H7
H18
H22
J5
K1
N3
L7
L9
L10
L11
L12
L13
L14
L15
L16
M17
M5
M7
M8
M9
M10
M11
M12
M13
M14
M15
M16
GND
D
VDD_SOC_CAP
VDD_SOC_IN
C92
0.22UF
0201_CC
6.3V
C93
0.22UF
0201_CC
6.3V
C81
22UF
0603_CC
6.3V
C397
4.7uF
0402_CC
6.3V
C398
4.7uF
0402_CC
6.3V
J10
J11
K10
K11
R16
R17
T16
T17
T18
GND
VDD_SOC_IN1
VDD_SOC_IN2
VDD_SOC_IN3
VDD_SOC_IN4
VDD_SOC_IN5
VDD_SOC_IN6
VDD_SOC_IN7
VDD_SOC_IN8
VDD_SOC_IN9
VDD_SOC_CAP1
VDD_SOC_CAP2
VDD_SOC_CAP3
VDD_SOC_CAP4
VDD_SOC_CAP5
VDD_SOC_CAP6
VDD_SOC_CAP7
VDD_SOC_CAP8
VDD_SOC_CAP9
J7
J8
J9
K7
K8
K9
N18
P18
R18
C91
0.22UF
0201_CC
6.3V
VDD_SOC_CAP1
C79
22UF
0603_CC
6.3V
C390
4.7uF
0402_CC
6.3V
C102 GND
0.22UF
0201_CC
6.3V
Note:
VDD_SOC_CAP1 to 6 and
VDD_SOC_CAP7 to 9 can be
connected together. If
split, proper
corresponding decoupling
capacitance needs to be
placed for each group of
pins.
VDD_PU_CAP
R10
R11
T10
T11
D24 ensures VDD_SNVS_IN
is always powered whenever
VDDHIGH_IN is powered to meet
data sheet spec even if
P3V0_STBY faults to 0 V.
P3V0_VSNVS
3
D24
BAT54C-7-F
2
1
AD20
C94
0.22UF
0201_CC
6.3V
GND
VDD_3V15_IN
C97
0.22UF
0201_CC
6.3V
GND
C98
0.22UF
0201_CC
6.3V
C400
4.7uF
0402_CC
6.3V
GND
B
VDD_SNVS_CAP
GND
VDD_HIGH_CAP
C399
4.7uF
0402_CC
6.3V
SH4
SH0805_40
VDD_SNVS_IN
C80 GND
22UF
0603_CC
6.3V
C389
4.7uF
0402_CC
6.3V
C96
0.22UF
0201_CC
6.3V
GND
SOLDER SHORT
R7
R8
R9
T7
T8
T9
VDD_SNVS_CAP
AC20
P3V15_VDDHIGH_SW2
VDD_PU_CAP1
VDD_PU_CAP2
VDD_PU_CAP3
VDD_PU_CAP4
VDD_PU_CAP5
VDD_PU_CAP6
P3V0_STBY
C
R58
0
0603_CC
VDD_PU_IN1
VDD_PU_IN2
VDD_PU_IN3
VDD_PU_IN4
R12
R13
T12
T13
H10
H11
H14
H15
L18
M18
T19
U10
U11
VDD_HIGH_IN1
VDD_HIGH_IN2
VDD_HIGH_IN3
VDD_HIGH_IN4
NVCC_3V3_1
NVCC_3V3_2
NVCC_3V3_3
NVCC_3V3_4
NVCC_3V3_5
NVCC_3V3_6
NVCC_3V3_7
NVCC_3V3_8
NVCC_3V3_9
VDD_HIGH_CAP1
VDD_HIGH_CAP2
VDD_HIGH_CAP3
VDD_HIGH_CAP4
R14
R15
T14
T15
C405
4.7uF
0402_CC
6.3V
P1V2_VGEN1
NVCC_1.2V
GND
W7
C88
0.22UF
0201_CC
6.3V
GND
P1V8_VGEN4
C99
0.22UF
0201_CC
6.3V
C401
4.7uF
0402_CC
6.3V
GND
NVCC_1V8_1
NVCC_1V8_2
NVCC_1V8_3
NVCC_1V8_4
VDD_PLL_CAP
C82
0.22UF
0201_CC
6.3V
DRAM_PWR_2P5
C95
0.22UF
0201_CC
6.3V
GND
DRAM_PWR1
DRAM_PWR2
DRAM_PWR3
DRAM_PWR4
DRAM_PWR5
DRAM_PWR6
DRAM_PWR7
DRAM_PWR8
DRAM_PWR9
DRAM_PWR10
E6
G7
H6
J6
N6
P7
T6
U6
V7
Y6
C101
0.22UF
0201_CC
6.3V
D
C
B
C72
0.22UF
0201_CC
6.3V
GND
C404
4.7uF
0402_CC
6.3V
GND
M6
AD7
AD4
AD1
AD24
AC18
AB18
AB14
AB10
U22
AA2
AA1
Y5
V18
V17
V16
V15
V14
V13
V12
V11
V10
V9
V8
V1
U18
U7
U3
T5
N22
R1
P16
P15
P14
P13
P12
P11
P10
P9
N16
N15
N14
N13
N12
N11
N10
N9
N8
N7
N17
GND
Y19
VDD_HIGH_CAP
GND98
GND97
GND96
GND95
GND94
GND93
GND92
GND91
GND90
GND89
GND88
GND87
GND86
GND85
GND84
GND83
GND82
GND81
GND80
GND79
GND78
GND77
GND76
GND75
GND74
GND73
GND72
GND71
GND70
GND69
GND68
GND67
GND66
GND65
GND64
GND63
GND62
GND61
GND60
GND59
GND58
GND57
GND56
GND55
GND54
GND53
GND52
GND51
GND50
PCIMX6L8DVN10AA
VDD_PLL_CAP
E14
E15
M20
Y11
GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
GND9
GND10
GND11
GND12
GND13
GND14
GND15
GND16
GND17
GND18
GND19
GND20
GND21
GND22
GND23
GND24
GND25
GND26
GND27
GND28
GND29
GND30
GND31
GND32
GND33
GND34
GND35
GND36
GND37
GND38
GND39
GND40
GND41
GND42
GND43
GND44
GND45
GND46
GND47
GND48
GND49
P1V2_DDR_SW3
C77
0.22UF
0201_CC
6.3V
C403
4.7uF
0402_CC
6.3V
C394
4.7uF
0402_CC
6.3V
GND
PCIMX6L8DVN10AA
A
A
ICAP Classification:
Drawing Title:
FCP: ___
FIUO: X
PUBI: ___
MCIMX6SLEVK board
Page Title:
IMX6SL_Power
5
4
3
2
Size
B
Document Number
Date:
Thursday, October 18, 2012
Rev
B
SCH-27452 PDF: SPF-27452
Sheet
1
5
of
16
4
D
LCD
T22
J24
H23
J23
H24
Y24
W23
W24
V23
V24
U21
U23
U24
T23
T24
R23
R24
P23
P24
N21
N23
N24
M22
M23
M24
L23
L24
K23
K24
LCD_CLK
(11)
LCD_ENABLE
(11)
LCD_HSYNC
(11)
LCD_VSYNC
(11)
LCD_RESET
(11)
LCD_DAT0
(11,13)
LCD_DAT1
(11,13)
LCD_DAT2
(11,13)
LCD_DAT3
(11,13)
LCD_DAT4
(11,13)
LCD_DAT5
(11,13)
LCD_DAT6
(11,13)
LCD_DAT7
(11,13)
LCD_DAT8
(11,13)
LCD_DAT9
(11,13)
LCD_DAT10
(11,13)
LCD_DAT11
(11,13)
LCD_DAT12
(11,13)
LCD_DAT13
(11,13)
LCD_DAT14
(11,13)
LCD_DAT15
(11,13)
LCD_DAT16
(11,13)
LCD_DAT17
(11,13)
LCD_DAT18
(11,13)
LCD_DAT19
(11,13)
LCD_DAT20
(11,13)
LCD_DAT21
(11,13)
LCD_DAT22
(11,13)
LCD_DAT23
(11,13)
EPDC
PCIMX6L8DVN10AA
A18
A17
B17
A16
B16
A15
B15
C15
D15
F15
G16
F14
D14
B14
A14
A13
B10
B8
E7
F7
C11
A10
B9
A9
A12
B13
B12
A11
C7
D7
C18
B18
D11
E11
F11
G12
B11
F10
E10
D10
EPDC_D0
EPDC_D1
EPDC_D2
EPDC_D3
EPDC_D4
EPDC_D5
EPDC_D6
EPDC_D7
EPDC_D8
EPDC_D9
EPDC_D10
EPDC_D11
EPDC_D12
EPDC_D13
EPDC_D14
EPDC_D15
EPDC_SDCLK
EPDC_SDLE
EPDC_SDOE
EPDC_SDSHR
EPDC_SDCE0
EPDC_SDCE1
EPDC_SDCE2
EPDC_SDCE3
EPDC_GDCLK
EPDC_GDOE
EPDC_GDRL
EPDC_GDSP
EPDC_VCOM0
EPDC_VCOM1
EPDC_BDR0
EPDC_BDR1
EPDC_PWRCTRL0
EPDC_PWRCTRL1
EPDC_PWRCTRL2
EPDC_PWRCTRL3
EPDC_PWRCOM
EPDC_PWRINT
EPDC_PWRSTAT
EPDC_PWRWAKEUP
EPDC_D0
(11)
EPDC_D1
(11)
EPDC_D2
(11)
EPDC_D3
(11)
EPDC_D4
(11)
EPDC_D5
(11)
EPDC_D6
(11)
EPDC_D7
(11)
EPDC_D8
(11)
EPDC_D9
(11)
EPDC_D10
(11)
EPDC_D11
(11)
EPDC_D12
(11)
EPDC_D13
(11)
EPDC_D14
(11)
EPDC_D15
(11)
EPDC_SDCLK
(11)
EPDC_SDLE
(11)
EPDC_SDOE
(11)
EPDC_SDSHR
(11)
EPDC_SDCE0
(11)
EPDC_SDCE1
(11)
EPDC_SDCE2
(11)
EPDC_SDCE3
(11)
EPDC_GDCLK
(11)
EPDC_GDOE
(11)
EPDC_GDRL
(11)
EPDC_GDSP
(11)
EPDC_VCOM0
(11)
EPDC_VCOM1
(11)
EPDC_BDR0
(11)
EPDC_BDR1
(11)
EPDC_PWRCTRL0
(11)
EPDC_PWRCTRL1
(11)
EPDC_PWRCTRL2
(11)
EPDC_PWRCTRL3
(11)
EPDC_PWRCOM
(9,11)
EPDC_PWRINT
(11)
EPDC_PWRSTAT
(11)
EPDC_PWRWAKEUP
(11)
Control
Primary Use
U1E
U1A
SD1
SD2
SD3
SD1_CLK
SD1_CMD
SD1_DAT0
SD1_DAT1
SD1_DAT2
SD1_DAT3
SD1_DAT4
SD1_DAT5
SD1_DAT6
SD1_DAT7
SD2_RST
SD2_CLK
SD2_CMD
SD2_DAT0
SD2_DAT1
SD2_DAT2
SD2_DAT3
SD2_DAT4
SD2_DAT5
SD2_DAT6
SD2_DAT7
SD3_CLK
SD3_CMD
SD3_DAT0
SD3_DAT1
SD3_DAT2
SD3_DAT3
B20
B21
B23
A23
C22
B22
A22
A21
A20
A19
Y23
AC24
AB24
AB22
AB23
AA22
AA23
AA24
Y20
Y21
Y22
AB11
AA11
AC11
AD11
AC12
AD12
SD1_CLK
SD1_CMD
SD1_DAT0
SD1_DAT1
SD1_DAT2
SD1_DAT3
SD1_DAT4
SD1_DAT5
SD1_DAT6
SD1_DAT7
(8)
(8)
(8)
(8)
(8)
(8)
(8)
(8)
(8)
(8)
SD2_RST
SD2_CLK
SD2_CMD
SD2_DAT0
SD2_DAT1
SD2_DAT2
SD2_DAT3
SD2_DAT4
SD2_DAT5
SD2_DAT6
SD2_DAT7
(8,11)
(8)
(8)
(8)
(8)
(8)
(8)
(8,11)
(8,11)
(8)
(8)
SD3_CLK
SD3_CMD
SD3_DAT0
SD3_DAT1
SD3_DAT2
SD3_DAT3
(8)
(8)
(8)
(8)
(8)
(8)
JTAG_TRST
JTAG_TDI
JTAG_TMS
JTAG_TCK
JTAG_TDO
JTAG_MOD
JTAG
TAMPER
PMIC_ON_REQ
PMIC_STBY_REQ
POR
ONOFF
BOOT_MODE0
BOOT_MODE1
TEST_MODE
SYSTEM
SPDIF
WDOG
WDOG
UART_RX
UART_TX
SD2 Write Protect
SD2 Card Detect
GANAIO
XTALI
XTALO
RTC_XTALI
RTC_XTALO
ANATOP
CLK1P
CLK1N
AA15
W14
Y15
AA14
W15
Y14
JTAG_TRSTB
(14)
JTAG_TDI
(14)
JTAG_TMS
(14)
JTAG_TCK
(14)
JTAG_TDO
(14)
JTAG_MOD
(14)
Y18
AD15
AD16
AC16
W18
AC15
AB15
U15
TAMPER
PMIC_ON_REQ
(4)
PMIC_STBY_REQ
(4)
POR_B
(4,6,8,11,13)
ONOFF
(6)
BOOT_MODE0
(13)
BOOT_MODE1
(13)
F18
WDOG_B
ONOFF
(6)
AD22
GANAIO
AD21
AC21
XTALI
XTALO
AB19
AA19
RTC_XTALI
RTC_XTALO
AC23
AD23
CLK1P
CLK1N
D
GND
PCIMX6L8DVN10AA
PCIMX6L8DVN10AA
P3V15_VDDHIGH_SW2
Capacitive Touch Interrupt
USB_OTG1_ID
J136
J20
J19
1HSIC_STROBE
DNP
128-0711-20
PCIMX6L8DVN10AA
1
TAMPER
3
5
HSIC_DAT_GPIO
HSIC_STROBE_GPIO 7
2
LCD_CLK
LCD_ENABLE
LCD_HSYNC
LCD_VSYNC
LCD_RESET
LCD_DAT0
LCD_DAT1
LCD_DAT2
LCD_DAT3
LCD_DAT4
LCD_DAT5
LCD_DAT6
LCD_DAT7
LCD_DAT8
LCD_DAT9
LCD_DAT10
LCD_DAT11
LCD_DAT12
LCD_DAT13
LCD_DAT14
LCD_DAT15
LCD_DAT16
LCD_DAT17
LCD_DAT18
LCD_DAT19
LCD_DAT20
LCD_DAT21
LCD_DAT22
LCD_DAT23
SD
Primary Use
U1B
U1C
1
1
DNP
128-0711-20
HSIC_DAT
HSIC_DAT
GND
2
4
6
8
GANAIO
CLK1P
CLK1N
GND
3
EPDC
LCD
2
2
i.MX6SL
3
3
5
HSIC_STROBE
GND
HDR 2X4
R38
0
0402_CC
R60
0
0402_CC
HSIC_STROBE_GPIO
(14)
C
C
I2C pullups
Audio,UART,FEC
Keypad,HSIC,PWM
Primary Use
J19
J21
J20
H20
H21
J22
H19
AUDIO
B19
D19
UART1_RXD
UART1_TXD
UART
AC13
AD13
E18
D18
I2C1_SCL
I2C1_SDA
I2C2_SCL
I2C2_SDA
I2C
N19
N20
M19
M21
U19
U20
T20
T21
ECSPI1_SCLK
ECSPI1_MOSI
ECSPI1_MISO
ECSPI1_SS0
ECSPI2_SCLK
ECSPI2_MOSI
ECSPI2_MISO
ECSPI2_SS0
SPI
AB7
AC8
AD9
AC9
AC10
Y10
AA7
AA10
AD10
W11
W10
FEC_MDIO
FEC_TX_CLK
FEC_RX_ER
FEC_CRS_DV
FEC_RXD1
FEC_TXD0
FEC_MDC
FEC_RXD0
FEC_TX_EN
FEC_TXD1
FEC_REF_CLK
B
ENET
AUD_RXFS
AUD_RXC
AUD_RXD
AUD_TXC
AUD_TXFS
AUD_TXD
AUD_MCLK
UART1_RXD
UART1_TXD
I2C1_SCL
I2C1_SDA
I2C2_SCL
I2C2_SDA
KEY_ROW0
KEY_ROW1
KEY_ROW2
KEY_ROW3
KEY_ROW4
KEY_ROW5
KEY_ROW6
KEY_ROW7
KEY_COL0
KEY_COL1
KEY_COL2
KEY_COL3
KEY_COL4
KEY_COL5
KEY_COL6
KEY_COL7
KEY
(14)
(14)
(4,6,11)
(4,6,11)
(6,10,11)
(6,10,11)
ECSPI1_SCLK
ECSPI1_MOSI
ECSPI1_MISO
ECSPI1_SS0
ECSPI2_SCLK
ECSPI2_MOSI
ECSPI2_MISO
ECSPI2_SS0
(8)
(8)
(8)
(8)
(8,9,11)USB_5V_HOST Over-current
(3,11) Charger-Ok Status
(3,11) Charger-fault status
(3,11) Charging status
FEC_MDIO
(15)
FEC_TX_CLK
(15)
FEC_RX_ER
(10)
FEC_CRS_DV
(15)
FEC_RXD1
(15)
FEC_TXD0
(15)
FEC_MDC
(15)
FEC_RXD0
(15)
FEC_TX_EN
(15)
FEC_TXD1
(15)
FEC_REF_CLK
(15)
XTALI
P3V15_VDDHIGH_SW2
3G Card Enable
3G Card Reset
(12)
(12)
(10)
(10)
(10)
(10)
(10)
24MHz
RTC_XTALI
U1G
U1D
AUD_RXFS
AUD_RXC
AUD_RXD
AUD_TXC
AUD_TXFS
AUD_TXD
AUD_MCLK
32.768kHz
Primary Use
PWM
USB_HSIC
PWM1
HSIC_DAT
HSIC_STROBE
Flag
CLKOUT
REF_CLK_24M
REF_CLK_32K
G24
F24
E24
E21
E19
D23
C24
B24
G23
F23
E23
E22
E20
D24
D22
C23
Y7
KEY_ROW0
KEY_ROW1
KEY_ROW2
KEY_ROW3
KEY_ROW4
KEY_ROW5
KEY_ROW6
KEY_ROW7
KEY_COL0
KEY_COL1
KEY_COL2
KEY_COL3
KEY_COL4
KEY_COL5
KEY_COL6
KEY_COL7
PWM1
AA6
AB6
AC14
AD14
(11,12)
(11,12)
(11,12)
(11)
(9,11) USB_5V_OTG Over-current
(11) LCD_Power_EN
(11) Accelerometer Interrupt
(8,11) SD1 Card Detect
(11,12)
(11,12)
(11,12)
(8,11)
(9,11) USB_5V_OTG Enable
(9,11) USB_5V_HOST Enable
Capacitive Touch Reset
(11)
(8,11) SD1 Write Protect
R84
1.0K
0402_CC
1%
Flag
1.0M
Y1 2
32.768kHz
R85
1.0K
0402_CC
1%
I2C1_SCL
(4,6,11)
I2C1_SDA
(4,6,11)
DNP R373
0402_CC
1
3
2
C195
18pF
0402_CC
25V
R778
2.21M
0603_CC
Y3
C194
18pF
0402_CC
25V
C197
16PF
0603_CC
50V
GND
GND2
4
1
GND
GND1
24MHZ
C196
16PF
0603_CC
50V
GND
GND
GND
P3V15_VDDHIGH_SW2
LCD_Brightness
(11)
HSIC_DAT
HSIC_STROBE
REF_CLK_24M
REF_CLK_32K
XTALO
RTC_XTALO
Debug LED
(4)
(8)
R86
1.0K
0402_CC
1%
PMIC INT
SD3 Card Detect
PCIMX6L8DVN10AA
Ethernet power enable
Headphone detect
DNP
I2C2_SCL
(6,10,11)
I2C2_SDA
(6,10,11)
(6)
Note: Pull-up resistor must be
sized to meet the signal rise
times and also the Vil spec of
all the bus components.
(14)
Note: Watchdog reset is
being taken care of
internally.
R393
10K
0402_CC
D19
2
WDOG_B
R59 DNP
0
0603_CC
3
B
1
JTAG_nSRST
BAT54A-7-F
Due to board loadings this
resistor was reduced.
Validate your design, with the
largest allowable resistor to
reduce current usage.
PCIMX6L8DVN10AA
P3V15_VDDHIGH_SW2
POR Reset
R87
1.0K
0402_CC
1%
SW2
3
1
4
POR_B
(4,6,8,11,13)
ONOFF
(6)
2
SPST PB
RESET
GND
On/Off
Q30
IRLML6401
Primary Use
USB
U1J
AA18
AC19
AD19
AC22
IMX_OTG_VBUS
3
IMX_OTG_VBUS
USB_OTG1_D_P
USB_OTG1_D_N
2
USB_OTG1_VBUS
(9)
(9)
(9)
GND
1
VDD_USB_CAP
4
ONOFF
ANATOP
R410
10K
0402_CC
ON/OFF
R50
0
0603_CC
D20
1
3
R46
0
0603_CC
DNP
2
3
VDD_USB_CAP
3
2
SPST PB
USB_OTG1_VBUS
USB_OTG1_DP
USB_OTG1_DN
USB_OTG1_CHD
U14
SW1
1
C402
4.7uF
0402_CC
6.3V
A
C100
0.22UF
0201_CC
6.3V
USB_OTG2_VBUS
USB_OTG2_DP
USB_OTG2_DN
AD18
AC17
AD17
USB_Host_VBUS
P3V15_VDDHIGH_SW2
(9)
3GCARD_USB_D_P
3GCARD_USB_D_N
WDOG_B
(6)
HSIC_DAT_GPIO
BAT54A-7-F
Q31
2N7002
1
A
2
PCIMX6L8DVN10AA
GND
GND
MX_USB_HOST_D_P
SH12
0
PCIE_USB_Host_D_P
Pin 1
Default
USB_Host_D_P
(12)
ICAP Classification:
Drawing Title:
(9)
MX_USB_HOST_D_N
SH13
FIUO: X
PUBI: ___
Page Title:
0
PCIE_USB_Host_D_N
Pin 1
Default
5
FCP: ___
MCIMX6SLEVK board
USB_Host_D_N
4
IMX6SL_SoC
(12)
(9)
3
2
Size
C
Document Number
Date:
Thursday, October 18, 2012
Rev
B
SCH-27452 PDF: SPF-27452
1
Sheet
6
of
16
5
4
3
i.MX6SL
C211
0.01uF
0201_CC
6.3V
DDR
DRAM_D00
DRAM_D01
DRAM_D02
DRAM_D03
DRAM_D04
DRAM_D05
DRAM_D06
DRAM_D07
DRAM_SDQS0
DRAM_SDQS0
DRAM_DQM0
DRAM_D08
DRAM_D09
DRAM_D10
DRAM_D11
DRAM_D12
DRAM_D13
DRAM_D14
DRAM_D15
DRAM_SDQS1
DRAM_SDQS1
DRAM_DQM1
C
DRAM_D16
DRAM_D17
DRAM_D18
DRAM_D19
DRAM_D20
DRAM_D21
DRAM_D22
DRAM_D23
DRAM_SDQS2
DRAM_SDQS2
DRAM_DQM2
DRAM_D24
DRAM_D25
DRAM_D26
DRAM_D27
DRAM_D28
DRAM_D29
DRAM_D30
DRAM_D31
DRAM_SDQS3
DRAM_SDQS3
DRAM_DQM3
DRAM_A0
DRAM_A1
DRAM_A2
DRAM_A3
DRAM_A4
DRAM_A5
DRAM_A6
DRAM_A7
DRAM_A8
DRAM_A9
DRAM_A10
DRAM_A11
DRAM_A12
DRAM_A13
DRAM_A14
DRAM_A15
B
DRAM_CAS
DRAM_RAS
DRAM_SDBA0
DRAM_SDBA1
DRAM_SDBA2
DRAM_WE
DRAM_CS0
DRAM_SDODT0
DRAM_SDCKE0
DRAM_SDCLK_0
DRAM_SDCLK_0
DRAM_CS1
DRAM_SDODT1
DRAM_SDCKE1
DRAM_RESET
ZQPAD
N5
DRAM_D0
DRAM_D1
DRAM_D2
DRAM_D3
DRAM_D4
DRAM_D5
DRAM_D6
DRAM_D7
DRAM_SDQS0_P
DRAM_SDQS0_N
DRAM_DQM0
E2
E1
E3
D3
C1
C2
B1
B2
F1
F2
G2
DRAM_D8
DRAM_D9
DRAM_D10
DRAM_D11
DRAM_D12
DRAM_D13
DRAM_D14
DRAM_D15
DRAM_SDQS1_P
DRAM_SDQS1_N
DRAM_DQM1
AD8
AC7
AD6
AC6
AD5
AC5
AC4
AD3
AC3
AD2
AB3
DRAM_D16
DRAM_D17
DRAM_D18
DRAM_D19
DRAM_D20
DRAM_D21
DRAM_D22
DRAM_D23
DRAM_SDQS2_P
DRAM_SDQS2_N
DRAM_DQM2
A3
B4
B5
A5
B6
A6
B7
A8
B3
A2
C3
DRAM_D24
DRAM_D25
DRAM_D26
DRAM_D27
DRAM_D28
DRAM_D29
DRAM_D30
DRAM_D31
DRAM_SDQS3_P
DRAM_SDQS3_N
DRAM_DQM3
U4
U5
T3
T4
N4
M3
M4
H4
J3
J4
J2
T2
U2
H5
R2
K2
DRAM_A0
DRAM_A1
DRAM_A2
DRAM_A3
DRAM_A4
DRAM_A5
DRAM_A6
DRAM_A7
DRAM_A8
DRAM_A9
L2
E4
M2
DRAM_CS1
D6
H2
AC6
AB6
AC7
AB8
AB9
W1
V2
U1
T2
T1
DRAM_A0
DRAM_A1
DRAM_A2
DRAM_A3
DRAM_A4
DRAM_A5
DRAM_A6
DRAM_A7
DRAM_A8
DRAM_A9
DRAM_SDQS0_P
DRAM_SDQS0_N
DRAM_SDQS1_P
DRAM_SDQS1_N
DRAM_SDQS2_P
DRAM_SDQS2_N
DRAM_SDQS3_P
DRAM_SDQS3_N
R23
P22
J22
K23
AB18
AC19
B18
A19
DRAM_DQM0
DRAM_DQM1
DRAM_DQM2
DRAM_DQM3
N23
L23
AB20
B20
Y2
Y1
DRAM_SDCLK0_P
DRAM_SDCLK0_N
R414
10K
0402_CC
DRAM_CS0
AA23
Y22
W22
W23
V23
U22
T22
T23
H22
H23
G23
F22
E22
E23
D23
C22
AB12
AC13
AB14
AC14
AB15
AC16
AB17
AC17
B17
A17
A16
B15
B14
A14
A13
B12
DRAM_D0
DRAM_D1
DRAM_D2
DRAM_D3
DRAM_D4
DRAM_D5
DRAM_D6
DRAM_D7
DRAM_D8
DRAM_D9
DRAM_D10
DRAM_D11
DRAM_D12
DRAM_D13
DRAM_D14
DRAM_D15
DRAM_D16
DRAM_D17
DRAM_D18
DRAM_D19
DRAM_D20
DRAM_D21
DRAM_D22
DRAM_D23
DRAM_D24
DRAM_D25
DRAM_D26
DRAM_D27
DRAM_D28
DRAM_D29
DRAM_D30
DRAM_D31
P1
N1
J1
T1
H1
U1
N2
Y4
P2
L1
M1
D
U2
GND
AC2
AC1
AB2
AB1
AA3
Y3
Y1
Y2
W2
W1
V2
P1V8_SW4
8Gb 400MHz clock
U1F
DRAM_VREF
1
LPDDR2
DRAM_VREF
D
2
DRAM_SDCKE0
DRAM_SDCKE1
AC3
AC4
DRAM_CS0
DRAM_CS1
AB3
AB4
R416
10K
0402_CC
GND
A21
B10
C1
M2
M23
R1
AA1
AB11
AC5
AC9
AC21
GND
DRAM_SDCKE0
DRAM_SDCLK0_P
DRAM_SDCLK0_N
A12
A15
A18
C23
F23
J23
P23
U23
Y23
AC12
AC15
AC18
DRAM_SDCKE1
IMX_RAM_CALIBRATION
PCIMX6L8DVN10AA
R93
240
RC0402_25
1%
GND
GND
DRAM_ZQ0
R88
240
RC0402_25
1%
V1
AB7
P1
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
VDD1_1
VDD1_2
VDD1_3
VDD1_4
VDD1_5
VDD1_6
VDD1_7
VDD2_1
VDD2_2
VDD2_3
VDD2_4
VDD2_5
VDD2_6
VDD2_7
VDD2_8
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
VDDQ11
VDDQ12
VREFCA
VREFDQ
CA0
CA1
CA2
CA3
CA4
CA5
CA6
CA7
CA8
CA9
VDDCA1
VDDCA2
VDDCA3
NC_A3
NC_A4
NC_A5
NC_A6
NC_A7
NC_A8
NC_A9
NC_B4
NC_B5
NC_B6
NC_B7
NC_B8
NC_B9
NC_D1
NC_D2
NC_E1
NC_E2
NC_F1
NC_F2
NC_G1
NC_G2
NC_H1
NC_H2
NC_J1
NC_J2
NC_K1
NC_K2
NC_L1
NC_L2
NC_M1
NC_N1
NC_A10
NC_AC10
NC_AC11
DQS0
DQS0
DQS1
DQS1
DQS2
DQS2
DQS3
DQS3
DM0
DM1
DM2
DM3
CK
CK
CKE0
CKE1
CS0
CS1
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10/NC
VSS11
DNU1
DNU2
DNU3
DNU4
DNU5
DNU6
DNU7
DNU8
DNU9
DNU10
DNU11
DNU12
DNU13
DNU14
DNU15
DNU16
VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9
VSSQ10
VSSQ11
VSSQ12
A11
A20
B3
N2
N22
AB5
AC20
C114
0.01uF
0201_CC
6.3V
C115
0.1UF
0402_CC
16V
C108
0.1UF
0402_CC
16V
C109
0.1UF
0402_CC
16V
C110
22UF
0603_CC
6.3V
C116
0.01uF
0201_CC
6.3V
C111
0.1UF
0402_CC
16V
C112
0.1UF
0402_CC
16V
C113
0.1UF
0402_CC
16V
C117
22UF
0603_CC
6.3V
C118
0.01uF
0201_CC
6.3V
C119
0.01uF
0201_CC
6.3V
C120
0.1UF
0402_CC
16V
C121
0.1UF
0402_CC
16V
C122
0.1UF
0402_CC
16V
C408
22UF
DNP
0603_CC
6.3V
GND
P1V2_DDR_SW3
B11
B21
C2
L22
R2
AA2
AB10
AB21
B13
B16
B19
D22
G22
K22
R22
V22
AA22
AB13
AB16
AB19
GND
C123
0.1UF
0402_CC
16V
C124
22UF
0603_CC
6.3V
GND
DRAM_VREF
P2
M22
U2
W2
AC8
A3
A4
A5
A6
A7
A8
A9
B4
B5
B6
B7
B8
B9
D1
D2
E1
E2
F1
F2
G1
G2
H1
H2
J1
J2
K1
K2
L1
L2
M1
N1
A10
AC10
AC11
C213
0.01uF
0201_CC
6.3V
P1V2_DDR_SW3
C125
0.01uF
0201_CC
6.3V
C126
0.1UF
0402_CC
16V
C212
0.1UF
0402_CC
16V
C
GND
GND
B
DRAM_ZQ1
A1
A2
A22
A23
B1
B2
B22
B23
AB1
AB2
AB22
AB23
AC1
AC2
AC22
AC23
DNP
R94
240
RC0402_25
1%
GND
Note:
Some dual-die LPDDR2 packages
require a separate ZQ at pin AC11.
VSSCA1
VSSCA2
ZQ
MT42L256M32D2
Micron
MT42L256M32D2LG-25 WT:A
GND
A
A
ICAP Classification:
Drawing Title:
FCP: ___
FIUO: X
PUBI: ___
MCIMX6SLEVK board
Page Title:
LPDDR2
5
4
3
2
Size
C
Document Number
Date:
Thursday, October 18, 2012
Rev
B
SCH-27452 PDF: SPF-27452
1
Sheet
7
of
16
5
4
3
SD1 - For Primary External Card Slot
2
1
eMMC Footprint
8-bit SD
VCC_SD1
J22
S1
S2
S3
S4
S5
S6
S7
GND1
GND2
GND3
GND4
GND5
GND6
GND7
CLK
CMD
CD
WP
C129
4.7uF
0402_CC
6.3V
GND
P3V15_VDDHIGH_SW2
CONN CRD 19
C130
0.1UF
0402_CC
16V
GND
POR_B
5
(4,6,11,13)
DNP
R749
47K
0402_CC
U32
(6,11)
KEY_COL3
DNP
R165
R166
0
0402_CC
0
sd1_rst_b 2
3
DNP
0402_CC
GND
NC7SZ08P5
6
V_OUT_C1_1
ON_OFF
V_OUT_C1_2
3
R1_C1
R2
DNP
K2
1
C86
10V
R380
1.0K
0402_CC
1%
1.0UF
0402_CC
GND
(6,8)
(6,8)
(6,11)
(6,11)
(6,8)
SD2_DAT7
SD2_DAT6
SD2_DAT5
SD2_DAT4
SD2_DAT3
J6
J5
J4
J3
J2
(6,8)
(6,8)
(6,8)
SD2_DAT2
SD2_DAT1
SD2_DAT0
H5
H4
H3
SD2 - For Boot Code
CLK
CMD
DAT2
DAT1
DAT0
(6,8)
(6,8)
(6,8)
(6,8)
B
(6,8)
(6,8)
(6,8)
(6,8)
0402_CC
SD2_CLK
SD2_CMD
SD2_DAT7
SD2_DAT6
0
0402_CC 0
0402_CC 0
R121
R126
R122
SD2_CON_CLK
SD2_CD
SD2_WP
U5
GND
(6,11)
SD2_RST
(6,8)
SD2_CMD
(6,8)
SD2_CLK
4-bit BOOT SD
P3V15_VDDHIGH_SW2
J21
7
8
9
1
10
11
12
13
SD2_DAT0
SD2_DAT1
SD2_DAT2
SD2_DAT3
RESET
W6
W5
Note: Place next to J21
P3V15_VDDHIGH_SW2
DNP
R115
10K
0402_CC
DNP
U5A
SDIN5C2-8G
DAT7
DAT6
DAT5
DAT4
DAT3
U8
R10
P5
M7
C
2
FDC6331L
DNP
low voltage IO cards
requires power-cycling
the card from
sd1_rst_b.
GND
VDDI
5
4
ECSPI2_SCLK
C136
4.7uF
0402_CC
6.3V
GND
V_IN_R1
1
(6,9,11)
C135
0.1UF
0402_CC
16V
C132
4.7uF
0402_CC
6.3V
U33
4
C134
0.1UF
0402_CC
16V
emmc_vddi
VCC_SD1
R413
10K
0402_CC
C133
0.1UF
0402_CC
16V
GND
SH11
SH0805_40
P3V15_VDDHIGH_SW2
P3V15_VDDHIGH_SW2
C131
0.1UF
0402_CC
16V
VCC_SD1
SOLDER SHORT
P3V15_VDDHIGH_SW2
A4
A6
A9
A11
B2
B13
D1
D14
H1
H2
H6
H7
H8
H9
H10
H11
H12
H13
H14
J1
J7
J8
J9
J10
J11
J12
J13
J14
K1
K3
K5
K7
K8
K9
K10
K11
K12
K13
K14
L1
L2
L3
L4
L12
L13
L14
M1
M2
M3
M5
M8
M9
M10
M12
M13
M14
N1
N2
N3
N10
N12
N13
N14
P1
P2
P3
P10
P12
P13
P14
P3V15_VDDHIGH_SW2
Y4
W4
K6
AA5
AA3
5
2
14
15
SD1_CON_CLK
VSS2
P3V15_VDDHIGH_SW2
VCCQ5
VCCQ4
VCCQ3
VCCQ2
VCCQ1
0402_CC
6
C163
10uF
CC0603_OV
10V
VSSQ5
VSSQ4
VSSQ3
VSSQ2
VSSQ1
0
C158
0.1UF
0402_CC
16V
3
VSS1
DNP
U5B
SDIN5C2-8G
8GB eMMC
Y5
Y2
K4
AA6
AA4
R153
SD1_CLK
SD1_CMD
KEY_ROW7
KEY_COL7
4
VDD
U9
T10
N5
M6
(6)
(6)
(6,11)
(6,11)
DAT0
DAT1
DAT2
DAT3
DAT4
DAT5
DAT6
DAT7
VCC4
VCC3
VCC2
VCC1
D
SD1_DAT0
SD1_DAT1
SD1_DAT2
SD1_DAT3
SD1_DAT4
SD1_DAT5
SD1_DAT6
SD1_DAT7
VSS4
VSS3
VSS2
VSS1
(6)
(6)
(6)
(6)
(6)
(6)
(6)
(6)
7
8
9
1
10
11
12
13
5
2
14
15
DAT0
DAT1
DAT2
DAT3
DAT4
DAT5
DAT6
DAT7
VDD
VSS1
VSS2
GND1
GND2
GND3
GND4
GND5
GND6
GND7
CLK
CMD
CD
WP
4
C137
0.1UF
0402_CC
16V
3
6
S1
S2
S3
S4
S5
S6
S7
C138
10uF
CC0603_OV
10V
NC_A4
NC_A6
NC_A9
NC_A11
NC_B2
NC_B13
NC_D1
NC_D14
NC_H1
NC_H2
NC_H6
NC_H7
NC_H8
NC_H9
NC_H10
NC_H11
NC_H12
NC_H13
NC_H14
NC_J1
NC_J7
NC_J8
NC_J9
NC_J10
NC_J11
NC_J12
NC_J13
NC_J14
NC_K1
NC_K3
NC_K5
NC_K7
NC_K8
NC_K9
NC_K10
NC_K11
NC_K12
NC_K13
NC_K14
NC_L1
NC_L2
NC_L3
NC_L4
NC_L12
NC_L13
NC_L14
NC_M1
NC_M2
NC_M3
NC_M5
NC_M8
NC_M9
NC_M10
NC_M12
NC_M13
NC_M14
NC_N1
NC_N2
NC_N3
NC_N10
NC_N12
NC_N13
NC_N14
NC_P1
NC_P2
NC_P3
NC_P10
NC_P12
NC_P13
NC_P14
NC_R1
NC_R2
NC_R3
NC_R5
NC_R12
NC_R13
NC_R14
NC_T1
NC_T2
NC_T3
NC_T5
NC_T12
NC_T13
NC_T14
NC_U1
NC_U2
NC_U3
NC_U6
NC_U7
NC_U10
NC_U12
NC_U13
NC_U14
NC_V1
NC_V2
NC_V3
NC_V12
NC_V13
NC_V14
NC_W1
NC_W2
NC_W3
NC_W7
NC_W8
NC_W9
NC_W10
NC_W11
NC_W12
NC_W13
NC_W14
NC_Y1
NC_Y3
NC_Y6
NC_Y7
NC_Y8
NC_Y9
NC_Y10
NC_Y11
NC_Y12
NC_Y13
NC_Y14
NC_AA1
NC_AA2
NC_AA7
NC_AA8
NC_AA9
NC_AA10
NC_AA11
NC_AA12
NC_AA13
NC_AA14
NC_AE1
NC_AE14
NC_AG2
NC_AG13
NC_AH4
NC_AH6
NC_AH9
NC_AH11
R1
R2
R3
R5
R12
R13
R14
T1
T2
T3
T5
T12
T13
T14
U1
U2
U3
U6
U7
U10
U12
U13
U14
V1
V2
V3
V12
V13
V14
W1
W2
W3
W7
W8
W9
W10
W11
W12
W13
W14
Y1
Y3
Y6
Y7
Y8
Y9
Y10
Y11
Y12
Y13
Y14
AA1
AA2
AA7
AA8
AA9
AA10
AA11
AA12
AA13
AA14
AE1
AE14
AG2
AG13
AH4
AH6
AH9
AH11
D
C
B
4MB SPI NOR FLASH
GND
CONN CRD 19
GND
P3V15_VDDHIGH_SW2
C139
0.1UF
0402_CC
16V
SD3 - for WiFi and SD Accessories
R123
10K
0402_CC
DNP
R124
10K
0402_CC
GND
ECSPI1_MOSI
5
(6)
ECSPI1_SCLK
6
(6)
ECSPI1_SS0
(6)
1
norflash_wp
R125
10K
0402_CC
8
3
VCC
D
Q
2
ECSPI1_MISO
(6)
C
S
HOLD
7
W/VPP
VSS
For WiFi
4
J23
A
(6)
(6)
(6)
(6)
(6)
(6)
(6)
7
8
9
1
10
11
12
13
SD3_DAT0
SD3_DAT1
SD3_DAT2
SD3_DAT3
SD3_CLK
SD3_CMD
REF_CLK_32K
R175
0
0402_CC
SD3_CON_CLK
usdhc3.CD
TP25
5
2
14
15
P3V15_VDDHIGH_SW2
DAT0
DAT1
DAT2
DAT3
DAT4
DAT5
DAT6
DAT7
VDD
VSS1
VSS2
GND1
GND2
GND3
GND4
GND5
GND6
GND7
CLK
CMD
CD
WP
GND
4
A
C144
0.1UF
0402_CC
16V
3
6
S1
S2
S3
S4
S5
S6
S7
C145
10uF
CC0603_OV
10V
C146
47uF
CC1210
10V
ICAP Classification:
Drawing Title:
GND
FIUO: X
PUBI: ___
Page Title:
EMMC, SD and SPI NOR
GND
4
FCP: ___
MCIMX6SLEVK board
CONN CRD 19
5
U13
M25P32-VMW6TG
3
2
Size
C
Document Number
Date:
Thursday, October 18, 2012
Rev
B
SCH-27452 PDF: SPF-27452
1
Sheet
8
of
16
5
4
3
2
USB Host Port
D
1
USB Boot/Host/Device Port
D
USB Boot/Debug
Micro USB-AB Receptacle
J10
R178
330
0402_CC
USB_TYPE_A
J9
MICRO USB AB 5
S2
S1
S3
D+
ID
G
S2
S4
L11
1
USB_OTG1_VBUS
USB_5V_OTG
2
120OHM
0603_CC
GND
5
GND
(6)
D13
ESD9L5.0ST5G
D-
4
C151
2.2uF
CC0603
16V
5V
3
+ C150
150 UF
DNP
CC7343A
10V
A1
A2
A3
A4
C149
10uF
CC0603_OV
10V
A
120OHM
0603_CC
R179
330
0402_CC
2
G
1
D+
C
USB_Host_VBUS
2
C
(6)
1
D-
C152
2.2uF
CC0603
16V
GND
C153
2.2uF
CC0603
16V
D14
ESD9L5.0ST5G
U18
A
V
S1
USB_5V_HOST
L10
C148
10uF
CC0603_OV
10V
otgusb_c_d_P
(6)
USB_Host_D_N
(6)
USB_Host_D_P
1
L14
4
2
hostusb_c_d_N
3
hostusb_c_d_P
U17
hostusb_c_d_P
1
6
Layout: Route 90ohm DIFF
hostusb_c_d_N
GND
90OHM
2
5
Layout: Route 90ohm DIFF
C
GND
3
4
(6)
USB_OTG1_D_N
(6)
USB_OTG1_D_P
(6,11)
EPDC_PWRCOM
1
L15
4
USBOTG1_ID
R182
0
90OHM
0402_CC
1
6
2
5
otgusb_c_d_N
GND
2
otgusb_c_d_N
3
otgusb_c_d_P
3
otg_usb_id
4
SRV05-4
C
otg_usb_id
SRV05-4
USB 5V Control
P3V15_VDDHIGH_SW2
DNP
R189
47K
0402_CC
B
DNP
R190
47K
0402_CC
B
U19
SYS_5V
(6,11)
KEY_COL4
(6,11)
KEY_COL5
R191
0 0402_CC
usbotg1_pwr
1
R192
0 0402_CC
usbotg2_pwr
4
7
6
C154
0.1UF
0402_CC
16V
GND
C155
10uF
CC0603_OV
10V
R198
47K
0402_CC
R197
47K
0402_CC
ENA
FLGA
ENB
FLGB
IN
OUTA
GND
OUTB
2
usbotg1_oc
R193
0 0402_CC
KEY_ROW4
3
usbotg2_oc
USB_5V_OTG
R194
0 0402_CC
ECSPI2_SCLK
8
(6,11)
(6,8,11)
USB_5V_HOST
5
MIC2026-1YM
GND
A
A
ICAP Classification:
Drawing Title:
FCP: ___
FIUO: X
PUBI: ___
MCIMX6SLEVK board
Page Title:
USB
5
4
3
2
Size
C
Document Number
Date:
Thursday, October 18, 2012
Rev
B
SCH-27452 PDF: SPF-27452
1
Sheet
9
of
16
4
3
U6
2
1
120OHM
0603_CC
CODEC_1V8 CODEC_3V15
A2
C2
SPKVDD
C160
4.7uF
0603_CC
10V
C159
4.7uF
0603_CC
10V
SPKVDD1
SPKVDD2
SPKGND1
SPKGND2
GND
R779 DNP
0
0603_CC
R780
0
0603_CC
G3
CODEC_3V15
L19
SH15
SH0805_40
A3
MICVDD
C165
4.7uF
0402_CC
6.3V
120OHM
0603_CC
CODEC_1V8
MICVDD
L17
1
SH16
SH0805_40
A_CODEC_1V8
C161
4.7uF
0402_CC
6.3V
C162
4.7uF
0402_CC
6.3V
D6
C6
G4
AVDD
CPVDD
PLLVDD
SPKOUTLN
SPKOUTLP
I2C2_SCL
I2C2_SDA
I2C2_SCL
I2C2_SDA
8
1
B1
B2
IN3R
C147
0402_CC
1.0UF
10V
2
E6
E7
IN2L
IN2R
2
OE
6
SPKOUTRN
SPKOUTRP
IN4L
IN4R
CPCA
CPCB
CPVOUTN
CPVOUTP
CODEC_1V8
F1
E2
F2
I2C2_SCL
R216 DNP
0
0402_CC
I2C2_SDA
R215 DNP
0
0402_CC
R781
R782
1.0K
DNP
1%
0402_CC
1.0K
DNP
1%
0402_CC
If you do not have any other devices at
greater than 1.8V on the I2C bus, you can set
the powers to 1.8V and bypass the level
shifter. You will need to remove the 3V15
pull-ups on sheet 6 (R86 and R87).
(6)
(6)
(6)
(6)
AUD_TXC
AUD_TXFS
AUD_TXD
AUD_RXD
E1
D3
D1
D2
(6)
AUD_MCLK
G7
F7
GND
HPOUTR
DNP
R204
10K
0402_CC
DNP
R205
10K
0402_CC
GND
GND
Layout note:
Zobel Networks(c216,c217,r771,r772) close to WM8962
Speaker
Out
CON4
C3
B2
4
3
2
1
SPKOUTRN
SPKOUTRP
CLKOUT2/GPIO2
CLKOUT3/GPIO3
GPIO5
CS/GPIO6
BCLK
LRCLK
DACDAT
ADCDAT
CLKOUT5
MCLK/XTI
XTO
VMIDC
MICBIAS
4
3
2
1
SPKOUTLP
SPKOUTLN
SPKOUTRP
SPKOUTRN
B6
6
4 SIDE2
3
2
1 SIDE1
MECH
5
SM04B-SRSS-TB
HDR 1X4
DNP
C
CPCA
B7
A7
A6
CPCB
CPVOUTN
CPVOUTP
layout note:
the positioning of C374 is very important
should be as close to the WM8962 as possible.
C374
2.2uF
CC0603
16V
C375
2.2uF
CC0603
16V
SCLK
SDA
CIFMODE
GND
TXS0102
HPOUTL
IN3L
IN3R
or WM-63PR GND
or CMC-2242PBL-A
codec_i2c_scl
codec_i2c_sda
GND
SPKOUTLN
SPKOUTLP
WM-64PCT
5
4
GND
B
1
1
5
CON500
GND
A1
A2
GND
(6,11)
(6,11)
F5
F6
GND
GND
C407
0.22UF
0201_CC
6.3V
3
U34
VCCB
GND
D5
E5
HPOUTR
D
IN1L
IN1R
VCCA
C406
0.22UF
0201_CC
6.3V
C166
1.0UF
0402_CC
10V
R720
2.2K
0402_CC
P4
CODEC_1V8
7
CODEC_3V15
C4
D4
B3
A1
6
4
R772
20
RC0603
GND
J130
Audio Jack
HP_DET
HPOUTL
C217
0.1UF
0402_CC
16V
R771
20
RC0603
MICBIAS
OUT
C216
0.1UF
0402_CC
16V
GND
C164
4.7uF
0402_CC
6.3V
FEC_RX_ER
A5
B4
DCVDD
GND
C
(6)
GND
2
120OHM
0603_CC
When bypassing the I2C level shifter you must :
- change the DBVDD supply voltage to 3V15
- change the MX6SL IO pin supply voltage for
all the codec digital pins
- I2C2_SCL, & SDA
- AUD_TXC, TXFS, TXD, RDX, & MCLK
HPOUTR
HPOUTFB
HeadPhone
DNP
R206
10K
0402_CC
B5
C174
0.1UF
0402_CC
16V
CODEC_1V8
SOLDER SHORT
G5
GND
G2
P1V8_VGEN3
CODEC_3V15
B1
C1
GND
HPOUTL
1
D7
F3
C7
DBVDD
GND
2
SOLDER SHORT
PLLGND
C215
0.1UF
0402_CC
16V
D
AGND
DGND
CPGND
HPOUTR_ZOBEL
L18
P3V15_VDDHIGH_SW2
1
Audio CODEC
layout note:
Widen the trace SPKVDD
Max ~0.6A
PF0100_VIN
2
HPOUTL_ZOBEL
5
E4
F4
G1
E3
GND
C376
2.2uF
CC0603
16V
GND
R207
10K
0402_CC
G6
C5
A4
GND
codec_vmidc
MICBIAS
C156
1.0UF
0402_CC
10V
WM8962
GND
C157
4.7uF
0402_CC
6.3V
GND
B
A
A
ICAP Classification:
Drawing Title:
FCP: ___
FIUO: X
PUBI: ___
MCIMX6SLEVK board
Page Title:
Audio
5
4
3
2
Size
C
Document Number
Date:
Thursday, October 18, 2012
Rev
B
SCH-27452 PDF: SPF-27452
1
Sheet
10
of
16
5
4
3
2
EPDC Expansion Port
P1V8_VGEN4
SYS_5V
J12
P3V15_VDDHIGH_SW2
PF0100_VIN
D
(6,10,11)
(6,11)
(4,6)
(4,6)
(6,11,12)
I2C2_SCL
KEY_ROW3
I2C1_SDA
I2C1_SCL
KEY_ROW2
spdif_in
R225
0
0402_CC
R227
R236
R230
0
0
0
0402_CC
0402_CC
0402_CC
R237
EPDC_PWRWAKEUP
0 (6)0402_CC
(6)
P3V15_VDDHIGH_SW2
EPDC_PWRINT
(6,11)
PF0100_VIN
epd_i2c_sda
epd_i2c_scl
EPDC_D0
(6)
EPDC_D8
(6)
EPDC_D9
(6)
EPDC_D11
SYS_5V
C
(6,11,12)
(6,11,12)
KEY_ROW0
KEY_ROW1
R252
R254
0
0
0402_CC
0402_CC
(6)
(6)
(6)
(6)
TP31
TP33
TP35
TP37
EPDC_VCOM0
EPDC_VCOM1
EPDC_D10
EPDC_D12
EPD_TOUCH_Y1
EPD_TOUCH_Y0
EPD_TOUCH_X1
EPD_TOUCH_X0
(6)
(6)
(6)
P1V5_VGEN2
(6,11)
EPDC_D13
EPDC_D14
EPDC_D15
(4,6,8,13)
POR_B
EPDC_PWRCTRL3
CAP_TOUCH_INT
LCD Expansion Port
SYS_5V
SH1
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
SH3
SH2
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
SH4
SH5
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
SH7
SH6
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
SH8
P1V8_VGEN4
PF0100_VIN
spdif_out
R231
uart2_TXD
uart2_RXD
0
R226
R228
0402_CC
0
0
I2C2_SDA
0402_CC
0402_CC
EPDC_D4
EPDC_D5
(6,8,11)
(6,11,12)
(6,11,12)
(6,10,11)
(6,10,11)
(6)
(6,11,12)
(6,11)
(6,8,11)
(6,8,11)
KEY_ROW6
(6)
(6,11)
(6,11)
(6,11)
(6,11)
(6,11,12)
R244
R245
0
0
0402_CC
0402_CC
R247
R248
0
0
0402_CC
0402_CC
KEY_COL0
KEY_COL1
KEY_COL3
KEY_COL2
KEY_COL1
I2C2_SDA
I2C2_SCL
LCD_RESET
KEY_COL0
KEY_ROW3
LCD_CLK
KEY_ROW2
(6,11,12)
(6,11,12)
KEY_COL2
KEY_COL3
(6,11,12)
(6,8,11)
(6,11,12)
KEY_ROW1
(6,11,12)
KEY_ROW0
SYS_5V P3V15_VDDHIGH_SW2
R232 DNP 0
R235 DNP 0
R233 DNP 0
R229
0
R234
0
0402_CC
0402_CC
0402_CC
0402_CC
0402_CC
R238 DNP 0
R240 DNP 0
0402_CC
0402_CC
lcd_i2c_sda
lcd_i2c_scl
lcd_display_clk
R243 DNP 0
0402_CC
P3V15_VDDHIGH_SW2
R246 DNP 0
R249 DNP 0
0402_CC
0402_CC
TP29
CAP_TOUCH_RST
EPDC_SDCE3
EPDC_SDCE2
EPDC_SDCE1
EPDC_SDCE0
EPDC_BDR1
EPDC_BDR0
EPDC_SDLE
TP30
KEY_COL6
(6)
(6,8)
(6,11)
(6,11)
(6)
(6)
(6)
(6)
(6,11)
SYS_5V
(6)
EPDC_SDSHR
(6,11)
EPDC_PWRCOM
(6,9)
EPDC_PWRSTAT
(6)
EPDC_PWRCTRL0
(6)
EPDC_PWRCTRL1
(6)
EPDC_PWRCTRL2
(6)
EPDC_GDCLK
(6,11)
EPDC_GDSP
(6,11)
EPDC_GDOE
(6,11)
EPDC_GDRL
(6,11)
EPDC_SDCLK
(6,11)
TP39
TP40
(3,6)
(3,6)
(6,8,9)
(3,6)
EPDC_SDOE
(6,11)
EPDC_D2
(6,11)
epd_brightness_ctl R262
0 0402_CC
EPDC_D3
EPDC_D1
EPDC_D6
EPDC_D7
51EXP_spdif_out
SD2_RST
PF0100_VIN
PWM1
(6,11)
(6,10,11)
(6,10,11)
(6,11)
(6,11)
(6,11)
(6,11)
(6,11)
(6,11)
lcd_pwr_en
KEY_ROW5
ECSPI2_MISO
ECSPI2_MOSI
ECSPI2_SCLK
ECSPI2_SS0
LCD_HSYNC
I2C2_SDA
I2C2_SCL
LCD_CLK
(6,11)
LCD_ENABLE
(6,11)
EPDC_PWRCTRL3
(6,11)
LCD_VSYNC
QSH-060-01-L-D-A
0402_CC
lcd_spi_sclk
R259 DNP 0
R260
0
R261
0
R263 DNP 0
0402_CC
0402_CC
0402_CC
0402_CC
lcdif.CS
51EXP_i2c_sda
51EXP_i2c_scl
lcdif.WR_RWN
R265 DNP 0
R266
0
R267 DNP 0
0402_CC
0402_CC
0402_CC
lcdif.RD_E
lcd_int hdmi_card_int
lcdif.RS
R257
33
SYS_5V
SH1
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
SH3
SH2
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
SH4
SH5
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
SH7
SH6
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
SH8
D
51EXP_uart2_TXR241
hdmi_spdif_out 51EXP_uart2_RXR242
51EXP_csi_VSYNC
51EXP_csi_HSYNC
51EXP_csi_PIXCLK
51EXP_csi_MCLK
51EXP_csi_D9
51EXP_csi_D8
51EXP_csi_D7
51EXP_csi_D6
51EXP_csi_D5
51EXP_csi_D4
51EXP_csi_D3
51EXP_csi_D2
51EXP_csi_D1
51EXP_csi_D0
51EXP_GPIO
lcd_brightness_ctl
51EXP_CAM_PWDN
51EXP_RESET
0
0
0402_CC
0402_CC
R239 DNP 0
0402_CC
R250 DNP 0
R251 DNP 0
0402_CC
0402_CC
R253 DNP 0
R255 DNP 0
0402_CC
0402_CC
LCD_DAT0
(6,13)
LCD_DAT1
(6,13)
LCD_DAT2
(6,13)
LCD_DAT3
(6,13)
LCD_DAT4
(6,13)
LCD_DAT5
(6,13)
LCD_DAT6
(6,13)
LCD_DAT7
(6,13)
LCD_DAT8
(6,13)
LCD_DAT9
(6,13)
LCD_DAT10
(6,13)
LCD_DAT11
(6,13)
LCD_DAT12
(6,13)
LCD_DAT13
(6,13)
LCD_DAT14
(6,13)
LCD_DAT15
(6,13)
LCD_DAT16
(6,13)
LCD_DAT17
(6,13)
LCD_DAT18
(6,13)
LCD_DAT19
(6,13)
LCD_DAT20
(6,13)
LCD_DAT21
(6,13)
LCD_DAT22
(6,13)
LCD_DAT23
(6,13)
LCD_VSYNC
(6,11)
R264
0 0402_CC
LCD_HSYNC
LCD_ENABLE
SD2_DAT5
SD2_DAT4
(6,8,11)
(6,8,11)
KEY_COL5
(6,9)
KEY_ROW4
KEY_COL4
(6,9)
(6,9)
KEY_ROW7
KEY_COL7
(6,8)
(6,8)
C
PWM1
(6,11)
(6,11)
(6,11)
QSH-060-01-L-D-A GND
GND
GND
GND
Camera Expansion Connector
B
L20
1
GND
B
L21
2
1
120OHM
0603_CC
2
Important Note:
120OHM
0603_CC
CMOS_AGND
GND
AF_GND
P1V5_VGEN2
R89
1.0K
0402_CC
1%
DNP
A
J13
(6,10,11)
SD2_DAT5
SD2_DAT4
3_AXIS_INT
EPDC_SDCLK
1
(6,11)
EPDC_SDCE3
(6,11)
EPDC_SDCE2
(6,11)
EPDC_SDSHR
(6,11)
EPDC_GDCLK
(6,11)
EPDC_GDSP
(6,11)
EPDC_GDOE
(6,11)
EPDC_SDOE
(6,11)
EPDC_SDLE
(6,11)
EPDC_SDCLK
(6,11)
EPDC_D7
(6,11)
EPDC_D6
(6,11)
EPDC_D5
(6,11)
EPDC_D4
(6,11)
EPDC_D3
(6,11)
EPDC_D2
(6,11)
EPDC_D1
(6,11)
EPDC_D0
R90
1.0K
0402_CC
1%
P1V8_VGEN4
J24
41
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
43
45
CMOS_AGND
DNP
I2C3_SDA
I2C3_SCL
CMOS_RESET_BGPIO
CSI_PIXCLK
CSI_VSYNC
CSI_HSYNC
CMOS_PWDN
GPIO
CSI_D9
CSI_D8
CSI_D7
CSI_D6
CSI_D5
CSI_D4
CSI_D3
CSI_D2
CSI_D1
CSI_D0
R268 DNP 0 0402_CC
46
42
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
44
AF_GND
P2V8_VGEN6
AF_VCC
R272
VCMSINK R270 DNP 10K 0402_CC
COMS_AVDD
TP41
C175
0.1UF
0402_CC
16V
GND
L22
1
C176
4.7uF
0402_CC
6.3V
2
C177
120OHM
0603_CC
0.1UF
0402_CC
16V
One of these two peripherals MUST BE REMOVED
when a developer wishes to use the other.
GND
P1V5_VGEN2
CMOS_XCLK
COMS_DVDD
EPDC_GDRL
(6,11)
A
P2V8_VGEN6
C179
0.1UF
0402_CC
16V
CONN PLUG 40
GND
0 0402_CC
The camera connector (J24) and the EPDC
connector (J12) share the same signals and
CANNOT be used at the same time.
GND
Layout Note: Place next to J12
C178
1.0UF
0402_CC
10V
GND
ICAP Classification:
Drawing Title:
GND
Use Omnivision OV5642 5M Pixel
Sensor with this connector
(not included)
5
4
FCP: ___
FIUO: X
PUBI: ___
MCIMX6SLEVK board
Page Title:
Video
3
2
Size
C
Document Number
Date:
Thursday, October 18, 2012
Rev
B
SCH-27452 PDF: SPF-27452
1
Sheet
11
of
16
4
3
2
Mini-PCIe HMC (3G Modem)
1
J18
HDR 1X2
MMPF0100's SW2 capacitive load recommendation is
<500uF total. Do not populate C140, C191, C192 and C210
P3V15_VDDHIGH_SW2
1
2
5
3GCARD_PWR
C180
100UF
CC1210
10V
D
C181
100UF
CC1210
10V
C182
0.1UF
0402_CC
16V
C183
0.1UF
0402_CC
16V
C184
0.1UF
0402_CC
16V
C140
4.7uF
0402_CC
6.3V
DNP
C192
100UF
CC1210
10V
DNP
C191
100UF
CC1210
10V
DNP
C210
100UF
CC1210
10V
DNP
D
J8
1
3
5
7
9
11
13
15
TP42
TP43
TP44
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
C
TP45
WAKE#
Reserved1
Reserved2
CLKREQ#
GND1
REFCLKREFCLK+
GND2
3.3V_1
GND7
1.5V_1
UIM_PWR
UIM_DATA
UIM_CLK
UIM_RESET
UIM_VPP
Reserved/UIM_C8
GND8
Reserved/UIM_C4W_DISABLE#
GND3
PERST#
PERn0
+3.3Vaux
PERp0
GND9
GND4
1.5V_2
GND5
SMB_CLK
PETn0
SMB_DATA
PETp0
GND10
GND6
USB_DReserved3
USB_D+
Reserved4
GND11
Reserved5
LED_WWAN#
Reserved6
LED_WLAN#
Reserved7
LED_WPAN#
Reserved8
1.5V_3
Reserved9
GND12
Reserved10
3.3V_2
2
4
6
8
10
12
14
16
J133
GND
SIM_VCC
SIM_IO
SIM_CLK
SIM_RESET
SIM_VPP
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
3GCARD_PWR
DNP
R305
47K
0402_CC
SIM_IO
SIM_VPP
DNP
R306
47K
0402_CC
6
5
4
I/O
VPP
GND
CLK
RESET
VCC
3
2
1
SIM_CLK
SIM_RESET
SIM_VCC
CON 6 SIM CARD
GND
3GCARD_ON
3GCARD_RST
AUD_RXFS
AUD_RXC
(6)
(6)
C
PCIE_USB_Host_D_N
PCIE_USB_Host_D_P
D18
C
(6)
(6)
A
LED Red
Layout: Route 90ohm DIFF
R309
330
0402_CC
CON 2X26 MINI PCI EXPRESS
GND
B
Button Matrix
(6,11)
B
KEY_ROW0
(6,11)
3 SW6
1
3 SW7
1
3 SW8
1
4
SPST PB
2
4
SPST PB
2
4
SPST PB
2
3 SW9
1
3 SW10
1
3 SW11
1
4
SPST PB
2
4
SPST PB
2
4
SPST PB
2
3 SW12
1
3 SW13
1
4
SPST PB
2
4
SPST PB
2
KEY_ROW1
(6,11)
A
GND
KEY_ROW2
(6,11)
KEY_COL0
A
ICAP Classification:
Drawing Title:
(6,11)
FCP: ___
FIUO: X
PUBI: ___
MCIMX6SLEVK board
KEY_COL1
Page Title:
Wireless
(6,11)
KEY_COL2
5
4
3
2
Size
B
Document Number
Date:
Thursday, October 18, 2012
Rev
B
SCH-27452 PDF: SPF-27452
Sheet
1
12
of
16
5
4
3
2
1
Boot Strap
P3V15_VDDHIGH_SW2
VCC_BT_CFG_OE
R42
0
0603_CC
Boot Strap
Power Control
VCC_BT_CFG_OE
2
1A
1
1G
Note:
i.MX6SL reads values approximately
300uS to 1mS after reset released.
Buffers are active while unit is in
reset and 1ms-10ms after reset is
released.
VCC_BT_CFG_OE
R722
47K
0402_CC
8
U31
VCC
D
1Y 6
VCC_BT_CFG_OE
R721
0
0402_CC
POR_B
Boot Strap Primary Switches
BT_CFG_EN
GND
(4,6,8,11)
D
C218
1.0UF
0402_CC
10V
VCC_BootStrap
VCC_BT_CFG_OE
5
2Y 3
2A
R44
0
DNP
0603_CC
VCC_BootStrap
output_pulse R41
0
GND
R47
0
0603_CC
7
2G
0603_CC
R310
1.0K
0402_CC
1%
4
GND
BT_CFG_EN
SN74LVC2G125
R311
1.0K
0402_CC
1
1%
2
S1
4
3
BOOT_MODE0
BOOT_MODE1
(6)
(6)
SW_DIP-2/SM
GND
VCC_BT_CFG_OE
C
C
GND
SW3
SW DIP-8
C185
0.1UF
0402_CC
16V
GND
C186
0.1UF
0402_CC
16V
GND
Bus isolation
1
2
3
4
5
6
7
8
SW4
SW DIP-8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
SW5
SW DIP-8
16
15
14
13
12
11
10
9
16
15
14
13
12
11
10
9
16
15
14
13
12
11
10
9
C187
0.1UF
0402_CC
16V
U21
VCC_BT_CFG_OE
VCC
R318
R319
R320
R324
20K
20K
20K
20K
0402_CC
0402_CC
0402_CC
0402_CC
BT_CFG0
BT_CFG1
BT_CFG2
BT_CFG3
2
4
6
8
R326
R328
R330
R332
20K
20K
20K
20K
0402_CC
0402_CC
0402_CC
0402_CC
BT_CFG4
BT_CFG5
BT_CFG6
BT_CFG7
17
15
13
11
1
19
1A0
1A1
1A2
1A3
1Y0
1Y1
1Y2
1Y3
20
18
16
14
12
R321
R322
R323
R325
4.7K
4.7K
4.7K
4.7K
0402_CC
0402_CC
0402_CC
0402_CC
3
5
7
9
R327
R329
R331
R333
4.7K
4.7K
4.7K
4.7K
0402_CC
0402_CC
0402_CC
0402_CC
LCD_DAT0
LCD_DAT1
LCD_DAT2
LCD_DAT3
(6,11)
(6,11)
(6,11)
(6,11)
LCD_DAT4
LCD_DAT5
LCD_DAT6
LCD_DAT7
(6,11)
(6,11)
(6,11)
(6,11)
Board Mounting Holes for 4-40 Screws
1OE
2A0
2A1
2A2
2A3
2Y0
2Y1
2Y2
2Y3
2OE
GND
H1
.635" LONG
H2
.635" LONG
H3
.635" LONG
H4
.635" LONG
10
74LVC244APW
GND
U23
VCC
B
R336
R335
R339
R341
20K
20K
20K
20K
BT_CFG8
BT_CFG9
BT_CFG10
BT_CFG11
0402_CC
0402_CC
0402_CC
0402_CC
2
4
6
8
1
R343
R345
R347
R349
20K
20K
20K
20K
0402_CC
0402_CC
0402_CC
0402_CC
BT_CFG12
BT_CFG13
BT_CFG14
BT_CFG15
17
15
13
11
19
1A0
1A1
1A2
1A3
DNP
DNP
DNP
DNP
VCC_BT_CFG_OE
1Y0
1Y1
1Y2
1Y3
20
GND
18
16
14
12
R337
R338
R340
R342
4.7K
4.7K
4.7K
4.7K
0402_CC
0402_CC
0402_CC
0402_CC
3
5
7
9
R344
R346
R348
R350
4.7K
4.7K
4.7K
4.7K
0402_CC
0402_CC
0402_CC
0402_CC
GND
GND
GND
B
LCD_DAT8
LCD_DAT9
LCD_DAT10
LCD_DAT11
(6,11)
(6,11)
(6,11)
(6,11)
LCD_DAT12
LCD_DAT13
LCD_DAT14
LCD_DAT15
(6,11)
(6,11)
(6,11)
(6,11)
IMPORTANT
NOTE :
Use non metalic or non conducting standoff to avoid board
damage due to GND potential difference with chasis.
1OE
2A0
2A1
2A2
2A3
2Y0
2Y1
2Y2
2Y3
2OE
GND
10
GND TEST POINTS
74LVC244APW
GND
TP65
U24
R353
R352
R356
R358
20K
20K
20K
20K
BT_CFG24
BT_CFG25
BT_CFG26
BT_CFG27
0402_CC
0402_CC
0402_CC
0402_CC
2
4
6
8
1
R360
R362
R364
R366
20K
20K
20K
20K
BT_CFG28
BT_CFG29
BT_CFG30
BT_CFG31
0402_CC
0402_CC
0402_CC
0402_CC
17
15
13
11
19
1A0
1A1
1A2
1A3
1Y0
1Y1
1Y2
1Y3
TP67
TP68
TP69
TP70
TP71
TP72
20
18
16
14
12
R354
R355
R357
R359
4.7K
4.7K
4.7K
4.7K
0402_CC
0402_CC
0402_CC
0402_CC
3
5
7
9
R361
R363
R365
R367
4.7K
4.7K
4.7K
4.7K
0402_CC
0402_CC
0402_CC
0402_CC
LCD_DAT16
LCD_DAT17
LCD_DAT18
LCD_DAT19
(6,11)
(6,11)
(6,11)
(6,11)
LCD_DAT20
LCD_DAT21
LCD_DAT22
LCD_DAT23
(6,11)
(6,11)
(6,11)
(6,11)
GND
1OE
2A0
2A1
2A2
2A3
2Y0
2Y1
2Y2
2Y3
2OE
GND
GND
TP66
VCC_BT_CFG_OE
VCC
10
74LVC244APW
A
A
GND
ICAP Classification:
Drawing Title:
FCP: ___
FIUO: X
PUBI: ___
MCIMX6SLEVK board
Page Title:
MISC
5
4
3
2
Size
C
Document Number
Date:
Thursday, October 18, 2012
Rev
B
SCH-27452 PDF: SPF-27452
1
Sheet
13
of
16
5
4
3
2
1
Debug UART2USB Converter
D
D
DEBUG_SHL_GND
GND
1
UART1_RXD
R377
1.0K
0402_CC
1%
8
U27
VCC
7
(6)
5
UART1_TXD
2Y
3
D21
LED Red
2A
5
G
S2
S4
GND
D22
LED Green
tx_led
rx_led
USBDM
TXD
RXD
RTS#
CTS#
DTR#
DSR#
DCD#
RI#
CBUS0
CBUS1
CBUS2
CBUS3
CBUS4
USBDP
NC1
NC2
NC3
NC4
NC5
RESET#
NC6
OSCI
OSCO
3V3OUT
GND
2
debug_usb_5v
120OHM
C199
0603_CC
4.7uF
0402_CC
6.3V
GND
GND
15
debug_usb_d_N
14
5
12
13
25
29
debug_usb_d_P
18
23
27
28
16
R381
10K
0402_CC
ftdi_reset
Layout note:
90ohm diff pairs
C
ftdi_3v3out
C200
1.0UF
0402_CC
10V
26
20
17
4
24
33
debug_uart_en
C198
0.1UF
0402_CC
16V
1
19
TEST
GND4
GND2
GND1
AGND
EP
C
GND
SN74LVC2G126
4
C
30
2
32
8
31
6
7
3
22
21
10
11
9
tx232
rx232
1A
2OE
VCCIO
VCC
A
TP75
1Y
C206
0.1UF
0402_CC
16V
U28
FT232RQ
led9
6
C
2
R378
1.0K
0402_CC
1%
led8
1OE
A
1
ID
R409
100
0402_CC
1%
L23
debug_5v
(6)
D+
4
R375
10K
0402_CC
D-
1
C209
0.1UF
0402_CC
16V
3
5V
S1
S3
TP76
C14
0.1UF
0402_CC
16V
J26
MICRO USB AB 5
2
P3V15_VDDHIGH_SW2
GND
GND
For driver installation, please refer to
http://www.ftdichip.com/Documents/InstallGuides.htm
JTAG
B
Debug LED
B
P3V15_VDDHIGH_SW2
P3V15_VDDHIGH_SW2
JTAG_TRSTB
JTAG_TDI
JTAG_TMS
JTAG_TCK
(6)
(6)
JTAG_TDO
JTAG_nSRST
JTAG_RTCK
J_DE_B
J_DBGACK
J7
1
3
5
7
9
11
13
15
17
19
2
4
6
8
10
12
14
16
18
20
R394
330
0402_CC
JTAG_PWR
A
(6)
(6)
(6)
(6)
R392
100
0402_CC
1%
VTREF_JTAG
led7_1
D23
LED Green
C
R386
R387
R389
DNP
DNP
DNP
R388
R390
R391
10K
10K
1.0K
10K
0402_CC 0402_CC 10K
0402_CC 10K
0402_CC 1%
0402_CC 0402_CC
led7_2
3
TST-110-05-T-D-RA
R395
R396
R397
10K
10K
10K
0402_CC 0402_CC 0402_CC
HSIC_STROBE_GPIO
R398
10K
0402_CC
led7_3
1
Q5
MMBT3904
2
(6)
GND
P3V15_VDDHIGH_SW2
GND
DNP
R399
10K
0402_CC
A
(6)
A
JTAG_MOD
R400
4.7K
0402_CC
ICAP Classification:
Drawing Title:
GND
FCP: ___
FIUO: X
PUBI: ___
MCIMX6SLEVK board
Page Title:
UART & JTAG
5
4
3
2
Size
C
Document Number
Date:
Thursday, October 18, 2012
Rev
B
SCH-27452 PDF: SPF-27452
1
Sheet
14
of
16
5
4
3
2
P3V15_VDDHIGH_SW2
SH7
1
FEC3V15
SH0603
Q6
3
2
power_rail_enet
IRLML6401
1
R411
10K
0402_CC
0
D
D
3
enet_ctl_signal
High Level on
R402
47K
0402_CC
FEC_TX_CLK
Q7
2N7002
1
ENET_PWR_EN
Power Control
2
(6)
GND
Ethernet
LAYOUT NOTES:
1. The TX and RX diff pairs should be routed with a
100ohm
differential impedance and a 50ohm single ended
(characteristic) impedance.
2. The trace lengths within a TX and RX differential
pair
should be matched.
3. The distance between each TX and RX differential
pair should be 50mils or more.
A_FEC_3V15 FEC3V15
L24
2
A_FEC_3V15
120OHM
0603_CC
C201
0.1UF
0402_CC
16V
FEC3V15
C202
0.1UF
0402_CC
16V
C203
10uF
CC0603_OV
10V
C204
0.1UF
0402_CC
16V
R403
49.9
0603_CC
C
(6)
(6)
(6)
(6)
(6)
(6)
(6)
(6)
FEC_MDIO
FEC_MDC
12
13
FEC_RXD0
FEC_RXD1
FEC_CRS_DV
8
7
11
17
18
16
21
MDIO
MDC
TXN
TXD0
TXD1
TXEN
RXP
LED1/REGOFF
LED2/INTSEL
RXER/PHYAD0
XTAL2
LAN8720A
(6)
FEC_REF_CLK
VDDCR
VSS
4
XTAL1/CLKIN
RBIAS
TX_N
3
4
20
5
6
23
GND
R415
330
0402_CC
RX_P
22
RX_N
C205
0.01UF
0402_CC
16V
Mag_led1
Mag_led2
7
8
DNP
R424
10K
0402_CC
3
ENET_LED1
2
ENET_LED2
10
ENET_PHYAD0
14
ENET_INT_B
6
ENET_VDDCR
TD+
TCT
TDRD+
11
12
13
14
J1
TX+
J2
TX-
J3
RX+
J4
RCT
RD-
J5
NC
GND
J6
GND
FEC3V15
LED1_C
LED1_A
J8
LED2_C
LED2_A
FEC3V15
FEC3V15
RJ45 8
R426
10K
0402_CC
RX-
J7
SH8
SH0603
GND
GND_ENET
0
GND_ENET is a small
isolated
GND plane which
should extend
under RJ45
connector
B
24
C207
0.1UF
0402_CC
R431
16V
12.1K
0402_CC
1%
25
TP51
GND
RST
INT/REFCLKO
5
C
1
2
GND
15
R407
0
0402_CC
TX_P
R418
330
0402_CC
R425
10K
0402_CC
C87
0.1UF
0402_CC
16V
R406
49.9
0603_CC
RXD0/MODE0
RXD1/MODE1
CRS_DV/MODE2
RXN
B
R405
49.9
0603_CC
J11
TXP
FEC3V15
ENET_RST
R404
49.9
0603_CC
9
VDDIO
VDD2A
TP50
FEC_TXD0
FEC_TXD1
FEC_TX_EN
1
U8
VDD1A
R408
2.2K
0402_CC
GND
19
GND
Chassis_GND1
Chassis_GND2
1
9
10
FEC3V15
GND
C208
4.7uF
0402_CC
6.3V
R432
10K
0402_CC
PHY ADDR:0x0
(default)
GND
A
A
ICAP Classification:
Drawing Title:
FCP: ___
FIUO: X
PUBI: ___
MCIMX6SLEVK board
Page Title:
ENET
5
4
3
2
Size
C
Document Number
Date:
Thursday, October 18, 2012
Rev
B
SCH-27452 PDF: SPF-27452
1
Sheet
15
of
16
5
4
3
2
1
IOMUX Table
PIN NAME
WDOG_B
HSIC_DAT
HSIC_STROBE
REF_CLK_24M
REF_CLK_32K
PWM1
KEY_COL0
KEY_ROW0
KEY_COL1
KEY_ROW1
KEY_COL2
KEY_ROW2
KEY_COL3
KEY_ROW3
KEY_COL4
KEY_ROW4
KEY_COL5
KEY_ROW5
KEY_COL6
KEY_ROW6
KEY_COL7
KEY_ROW7
EPDC_D0
EPDC_D1
EPDC_D2
EPDC_D3
EPDC_D4
EPDC_D5
EPDC_D6
EPDC_D7
EPDC_D8
EPDC_D9
EPDC_D10
EPDC_D11
EPDC_D12
EPDC_D13
EPDC_D14
EPDC_D15
EPDC_SDCLK
EPDC_SDLE
EPDC_SDOE
EPDC_SDSHR
EPDC_SDCE0
EPDC_SDCE1
EPDC_SDCE2
EPDC_SDCE3
EPDC_GDCLK
EPDC_GDOE
EPDC_GDRL
EPDC_GDSP
EPDC_VCOM0
EPDC_VCOM1
EPDC_BDR0
EPDC_BDR1
EPDC_PWRCTRL0
EPDC_PWRCTRL1
EPDC_PWRCTRL2
EPDC_PWRCTRL3
EPDC_PWRCOM
EPDC_PWRINT
EPDC_PWRSTAT
EPDC_PWRWAKEUP
LCD_CLK
LCD_ENABLE
LCD_HSYNC
LCD_VSYNC
LCD_RESET
LCD_DAT0
LCD_DAT1
LCD_DAT2
LCD_DAT3
LCD_DAT4
LCD_DAT5
LCD_DAT6
LCD_DAT7
LCD_DAT8
LCD_DAT9
LCD_DAT10
LCD_DAT11
LCD_DAT12
LCD_DAT13
LCD_DAT14
LCD_DAT15
LCD_DAT16
LCD_DAT17
LCD_DAT18
LCD_DAT19
LCD_DAT20
LCD_DAT21
LCD_DAT22
LCD_DAT23
AUD_RXFS
AUD_RXC
AUD_RXD
AUD_TXC
AUD_TXFS
AUD_TXD
AUD_MCLK
UART1_RXD
UART1_TXD
I2C1_SCL
I2C1_SDA
I2C2_SCL
I2C2_SDA
ECSPI1_SCLK
ECSPI1_MOSI
ECSPI1_MISO
ECSPI1_SS0
ECSPI2_SCLK
ECSPI2_MOSI
ECSPI2_MISO
ECSPI2_SS0
SD1_CLK
SD1_CMD
SD1_DAT0
SD1_DAT1
SD1_DAT2
SD1_DAT3
SD1_DAT4
SD1_DAT5
SD1_DAT6
SD1_DAT7
SD2_RST
SD2_CLK
SD2_CMD
SD2_DAT0
SD2_DAT1
SD2_DAT2
SD2_DAT3
SD2_DAT4
SD2_DAT5
SD2_DAT6
SD2_DAT7
SD3_CLK
SD3_CMD
SD3_DAT0
SD3_DAT1
SD3_DAT2
SD3_DAT3
FEC_MDIO
FEC_TX_CLK
FEC_RX_ER
FEC_CRS_DV
FEC_RXD1
FEC_TXD0
FEC_MDC
FEC_RXD0
FEC_TX_EN
FEC_TXD1
FEC_REF_CLK
D
C
B
ALT0
wdog1.WDOG_B
usb.H_DATA
usb.H_STROBE
anatop.ANATOP_24M_OUT
anatop.ANATOP_32K_OUT
pwm1.PWMO
kpp.COL[0]
kpp.ROW[0]
kpp.COL[1]
kpp.ROW[1]
kpp.COL[2]
kpp.ROW[2]
kpp.COL[3]
kpp.ROW[3]
kpp.COL[4]
kpp.ROW[4]
kpp.COL[5]
kpp.ROW[5]
kpp.COL[6]
kpp.ROW[6]
kpp.COL[7]
kpp.ROW[7]
epdc.SDDO[0]
epdc.SDDO[1]
epdc.SDDO[2]
epdc.SDDO[3]
epdc.SDDO[4]
epdc.SDDO[5]
epdc.SDDO[6]
epdc.SDDO[7]
epdc.SDDO[8]
epdc.SDDO[9]
epdc.SDDO[10]
epdc.SDDO[11]
epdc.SDDO[12]
epdc.SDDO[13]
epdc.SDDO[14]
epdc.SDDO[15]
epdc.SDCLK
epdc.SDLE
epdc.SDOE
epdc.SDSHR
epdc.SDCE[0]
epdc.SDCE[1]
epdc.SDCE[2]
epdc.SDCE[3]
epdc.GDCLK
epdc.GDOE
epdc.GDRL
epdc.GDSP
epdc.VCOM[0]
epdc.VCOM[1]
epdc.BDR[0]
epdc.BDR[1]
epdc.PWRCTRL[0]
epdc.PWRCTRL[1]
epdc.PWRCTRL[2]
epdc.PWRCTRL[3]
epdc.PWRCOM
epdc.PWRIRQ
epdc.PWRSTAT
epdc.PWRWAKE
lcdif.CLK
lcdif.ENABLE
lcdif.HSYNC
lcdif.VSYNC
lcdif.RESET
lcdif.DAT[0]
lcdif.DAT[1]
lcdif.DAT[2]
lcdif.DAT[3]
lcdif.DAT[4]
lcdif.DAT[5]
lcdif.DAT[6]
lcdif.DAT[7]
lcdif.DAT[8]
lcdif.DAT[9]
lcdif.DAT[10]
lcdif.DAT[11]
lcdif.DAT[12]
lcdif.DAT[13]
lcdif.DAT[14]
lcdif.DAT[15]
lcdif.DAT[16]
lcdif.DAT[17]
lcdif.DAT[18]
lcdif.DAT[19]
lcdif.DAT[20]
lcdif.DAT[21]
lcdif.DAT[22]
lcdif.DAT[23]
audmux.AUD3_RXFS
audmux.AUD3_RXC
audmux.AUD3_RXD
audmux.AUD3_TXC
audmux.AUD3_TXFS
audmux.AUD3_TXD
audmux.AUDIO_CLK_OUT
uart1.RXD_MUX
uart1.TXD_MUX
i2c1.SCL
i2c1.SDA
i2c2.SCL
i2c2.SDA
ecspi1.SCLK
ecspi1.MOSI
ecspi1.MISO
ecspi1.SS0
ecspi2.SCLK
ecspi2.MOSI
ecspi2.MISO
ecspi2.SS0
usdhc1.CLK
usdhc1.CMD
usdhc1.DAT0
usdhc1.DAT1
usdhc1.DAT2
usdhc1.DAT3
usdhc1.DAT4
usdhc1.DAT5
usdhc1.DAT6
usdhc1.DAT7
usdhc2.RST
usdhc2.CLK
usdhc2.CMD
usdhc2.DAT0
usdhc2.DAT1
usdhc2.DAT2
usdhc2.DAT3
usdhc2.DAT4
usdhc2.DAT5
usdhc2.DAT6
usdhc2.DAT7
usdhc3.CLK
usdhc3.CMD
usdhc3.DAT0
usdhc3.DAT1
usdhc3.DAT2
usdhc3.DAT3
fec.MDIO
fec.TX_CLK
fec.RX_ER
fec.RX_DV
fec.RDATA[1]
fec.TDATA[0]
fec.MDC
fec.RDATA[0]
fec.TX_EN
fec.TDATA[1]
fec.REF_OUT
ALT1
wdog1.WDOG_RST_B_DEB
i2c1.SCL
i2c1.SDA
i2c3.SCL
i2c3.SDA
ccm.CLKO
i2c2.SCL
i2c2.SDA
ecspi4.MOSI
ecspi4.MISO
ecspi4.SS0
ecspi4.SCLK
audmux.AUD6_RXFS
audmux.AUD6_RXC
audmux.AUD6_RXD
audmux.AUD6_TXC
audmux.AUD6_TXFS
audmux.AUD6_TXD
uart4.RXD_MUX
uart4.TXD_MUX
uart4.RTS
uart4.CTS
ecspi4.MOSI
ecspi4.MISO
ecspi4.SS0
ecspi4.SCLK
ecspi4.SS1
ecspi4.SS2
ecspi4.SS3
ecspi4.RDY
ecspi3.MOSI
ecspi3.MISO
ecspi3.SS0
ecspi3.SCLK
uart2.RXD_MUX
uart2.TXD_MUX
uart2.RTS
uart2.CTS
ecspi2.MOSI
ecspi2.MISO
ecspi2.SS0
ecspi2.SCLK
ecspi2.SS1
wdog2.WDOG_B
i2c3.SCL
i2c3.SDA
ecspi2.SS2
ecspi2.SS3
ecspi2.RDY
pwm4.PWMO
audmux.AUD5_RXFS
audmux.AUD5_RXD
usdhc4.CLK
usdhc4.CMD
audmux.AUD5_RXC
audmux.AUD5_TXFS
audmux.AUD5_TXD
audmux.AUD5_TXC
usdhc4.DAT0
usdhc4.DAT1
usdhc4.DAT2
usdhc4.DAT3
usdhc4.DAT4
usdhc4.DAT5
usdhc4.DAT6
usdhc4.DAT7
weim.WEIM_DTACK_B
ecspi1.MOSI
ecspi1.MISO
ecspi1.SS0
ecspi1.SCLK
ecspi1.SS1
ecspi1.SS2
ecspi1.SS3
ecspi1.RDY
kpp.COL[0]
kpp.ROW[0]
kpp.COL[1]
kpp.ROW[1]
kpp.COL[2]
kpp.ROW[2]
kpp.COL[3]
kpp.ROW[3]
kpp.COL[4]
kpp.ROW[4]
kpp.COL[5]
kpp.ROW[5]
kpp.COL[6]
kpp.ROW[6]
kpp.COL[7]
kpp.ROW[7]
i2c1.SCL
i2c1.SDA
ecspi3.MOSI
ecspi3.MISO
pwm3.PWMO
ecspi3.SCLK
pwm4.PWMO
pwm1.PWMO
pwm2.PWMO
uart1.RTS
uart1.CTS
audmux.AUD4_RXFS
audmux.AUD4_RXC
audmux.AUD4_TXD
audmux.AUD4_TXC
audmux.AUD4_TXFS
audmux.AUD4_RXD
spdif.SPDIF_EXT_CLK
sdma.SDMA_EXT_EVENT[1]
sdma.SDMA_EXT_EVENT[0]
ecspi1.SS3
fec.MDIO
fec.TX_CLK
fec.RX_ER
fec.RX_DV
fec.RDATA[1]
fec.TDATA[0]
fec.MDC
fec.RDATA[0]
fec.TX_EN
fec.TDATA[1]
fec.REF_OUT
audmux.AUD4_RXFS
audmux.AUD4_RXC
audmux.AUD4_RXD
audmux.AUD4_TXC
audmux.AUD4_TXFS
audmux.AUD4_TXD
usdhc3.DAT4
usdhc3.DAT5
usdhc3.DAT6
usdhc3.DAT7
audmux.AUD5_RXFS
audmux.AUD5_RXC
audmux.AUD5_RXD
audmux.AUD5_TXC
audmux.AUD5_TXFS
audmux.AUD5_TXD
usdhc4.CLK
usdhc4.CMD
usdhc4.DAT0
usdhc4.DAT1
usdhc4.DAT2
usdhc4.DAT3
usdhc4.DAT4
usdhc4.DAT5
usdhc4.DAT6
usdhc4.DAT7
usdhc4.RST
ALT2
uart5.RI
pwm1.PWMO
pwm2.PWMO
pwm3.PWMO
pwm4.PWMO
audmux.AUDIO_CLK_OUT
lcdif.DAT[0]
lcdif.DAT[1]
lcdif.DAT[2]
lcdif.DAT[3]
lcdif.DAT[4]
lcdif.DAT[5]
lcdif.DAT[6]
lcdif.DAT[7]
lcdif.DAT[8]
lcdif.DAT[9]
lcdif.DAT[10]
lcdif.DAT[11]
lcdif.DAT[12]
lcdif.DAT[13]
lcdif.DAT[14]
lcdif.DAT[15]
lcdif.DAT[24]
lcdif.DAT[25]
lcdif.DAT[26]
lcdif.DAT[27]
lcdif.DAT[28]
lcdif.DAT[29]
lcdif.DAT[30]
lcdif.DAT[31]
epdc.PWRCTRL[0]
epdc.PWRCTRL[1]
epdc.PWRCTRL[2]
epdc.PWRCTRL[3]
epdc.PWRCOM
epdc.PWRIRQ
epdc.PWRSTAT
epdc.PWRWAKE
i2c2.SCL
i2c2.SDA
tcon.XDIOR
epdc.SDCE[4]
pwm3.PWMO
pwm4.PWMO
pwm1.PWMO
pwm2.PWMO
tcon.YCKR
tcon.YOER
tcon.YDIOUR
tcon.YDIODR
uart3.RXD_MUX
uart3.TXD_MUX
uart3.RTS
uart3.CTS
lcdif.DAT[16]
lcdif.DAT[17]
lcdif.DAT[18]
lcdif.DAT[19]
lcdif.DAT[20]
lcdif.DAT[21]
lcdif.DAT[22]
lcdif.DAT[23]
lcdif.WR_RWN
lcdif.RD_E
lcdif.CS
lcdif.RS
lcdif.BUSY
anatop.USBOTG2_ID
anatop.USBOTG1_ID
epit2.EPITO
uart5.DSR
csi.VSYNC
csi.HSYNC
csi.PIXCLK
csi.MCLK
csi.D[9]
csi.D[8]
csi.D[7]
csi.D[6]
csi.D[5]
csi.D[4]
csi.D[3]
csi.D[2]
csi.D[1]
csi.D[0]
csi.D[15]
csi.D[14]
csi.D[13]
csi.D[12]
csi.D[11]
csi.D[10]
uart3.RXD_MUX
uart3.TXD_MUX
uart4.RXD_MUX
uart4.TXD_MUX
uart4.RTS
uart4.CTS
ecspi3.RDY
uart4.RXD_MUX
uart4.TXD_MUX
ecspi3.SS2
ecspi3.SS3
spdif.IN1
spdif.OUT1
uart5.RXD_MUX
uart5.TXD_MUX
uart5.RTS
uart5.CTS
uart3.RXD_MUX
uart3.TXD_MUX
uart3.RTS
uart3.CTS
kpp.COL[0]
kpp.ROW[0]
kpp.COL[1]
kpp.ROW[1]
kpp.COL[2]
kpp.ROW[2]
kpp.COL[3]
kpp.ROW[3]
kpp.COL[4]
kpp.ROW[4]
wdog2.WDOG_B
ecspi3.SCLK
ecspi3.SS0
ecspi3.MOSI
ecspi3.MISO
fec.COL
fec.RX_CLK
uart2.RXD_MUX
uart2.TXD_MUX
uart2.RTS
uart2.CTS
kpp.COL[5]
kpp.ROW[5]
kpp.COL[6]
kpp.ROW[6]
kpp.COL[7]
kpp.ROW[7]
audmux.AUD6_RXFS
audmux.AUD6_RXC
audmux.AUD6_RXD
audmux.AUD6_TXC
audmux.AUD6_TXFS
audmux.AUD6_TXD
audmux.AUDIO_CLK_OUT
anatop.USBOTG1_ID
spdif.IN1
spdif.OUT1
wdog1.WDOG_B
ALT3
ALT4
anatop.ANATOP_24M_OUT
anatop.ANATOP_32K_OUT
anatop.USBOTG2_ID
anatop.USBOTG1_ID
fec.REF_OUT
weim.WEIM_DA_A[0]
weim.WEIM_DA_A[1]
weim.WEIM_DA_A[2]
weim.WEIM_DA_A[3]
weim.WEIM_DA_A[4]
weim.WEIM_DA_A[5]
weim.WEIM_DA_A[6]
weim.WEIM_DA_A[7]
weim.WEIM_DA_A[8]
weim.WEIM_DA_A[9]
weim.WEIM_DA_A[10]
weim.WEIM_DA_A[11]
weim.WEIM_DA_A[12]
weim.WEIM_DA_A[13]
weim.WEIM_DA_A[14]
weim.WEIM_DA_A[15]
csi.D[0]
csi.D[1]
csi.D[2]
csi.D[3]
csi.D[4]
csi.D[5]
csi.D[6]
csi.D[7]
weim.WEIM_A[16]
weim.WEIM_A[17]
weim.WEIM_A[18]
weim.WEIM_A[19]
weim.WEIM_A[20]
weim.WEIM_A[21]
weim.WEIM_A[22]
weim.WEIM_A[23]
csi.D[8]
csi.D[9]
csi.D[10]
csi.D[11]
weim.WEIM_CS[2]
weim.WEIM_LBA
weim.WEIM_EB[0]
weim.WEIM_EB[1]
csi.PIXCLK
csi.HSYNC
csi.MCLK
csi.VSYNC
weim.WEIM_A[24]
weim.WEIM_A[25]
weim.WEIM_A[26]
weim.WEIM_CRE
weim.WEIM_RW
weim.WEIM_OE
weim.WEIM_CS[0]
weim.WEIM_CS[1]
weim.WEIM_BCLK
weim.ACLK_FREERUN
weim.WEIM_WAIT
weim.WEIM_DTACK_B
weim.WEIM_RW
weim.WEIM_OE
weim.WEIM_CS[0]
weim.WEIM_CS[1]
weim.WEIM_WAIT
pwm1.PWMO
pwm2.PWMO
pwm3.PWMO
pwm4.PWMO
wdog2.WDOG_RST_B_DEB
weim.WEIM_CS[3]
weim.WEIM_D[0]
weim.WEIM_D[1]
weim.WEIM_D[2]
weim.WEIM_D[3]
weim.WEIM_D[4]
weim.WEIM_D[5]
weim.WEIM_D[6]
weim.WEIM_D[7]
weim.WEIM_D[8]
weim.WEIM_D[9]
weim.WEIM_D[10]
weim.WEIM_D[11]
weim.WEIM_D[12]
weim.WEIM_D[13]
weim.WEIM_D[14]
weim.WEIM_D[15]
weim.WEIM_EB[3]
weim.WEIM_EB[2]
fec.MDIO
fec.TX_CLK
fec.RX_ER
fec.RX_DV
fec.RDATA[1]
fec.TDATA[0]
fec.MDC
fec.COL
fec.RX_CLK
fec.RDATA[0]
fec.TX_EN
fec.TDATA[1]
fec.REF_OUT
epdc.VCOM[0]
epdc.VCOM[1]
epdc.BDR[0]
epdc.BDR[1]
csi.PIXCLK
csi.HSYNC
csi.MCLK
csi.VSYNC
epdc.SDCE[4]
epdc.SDCE[5]
epdc.SDCE[6]
epdc.SDCE[7]
epdc.SDCE[8]
epdc.SDCE[9]
epdc.SDCLKN
epdc.SDOED
epdc.SDOEZ
ccm.PMIC_RDY
spdif.OUT1
csi.D[0]
csi.D[1]
csi.D[2]
csi.D[3]
csi.D[4]
csi.D[5]
csi.D[6]
csi.D[7]
csi.D[8]
csi.D[9]
csi.D[10]
csi.D[11]
csi.D[12]
csi.D[13]
csi.D[14]
csi.D[15]
ecspi4.SS0
ecspi4.SCLK
ecspi4.MOSI
ecspi4.MISO
ecspi4.SS1
ecspi4.SS2
usdhc1.RST
usdhc1.VSELECT
usdhc1.WP
usdhc1.CD
pwm4.PWMO
osc32k.32K_OUT
ALT5
gpio3.GPIO[18]
gpio3.GPIO[19]
gpio3.GPIO[20]
gpio3.GPIO[21]
gpio3.GPIO[22]
gpio3.GPIO[23]
gpio3.GPIO[24]
gpio3.GPIO[25]
gpio3.GPIO[26]
gpio3.GPIO[27]
gpio3.GPIO[28]
gpio3.GPIO[29]
gpio3.GPIO[30]
gpio3.GPIO[31]
gpio4.GPIO[0]
gpio4.GPIO[1]
gpio4.GPIO[2]
gpio4.GPIO[3]
gpio4.GPIO[4]
gpio4.GPIO[5]
gpio4.GPIO[6]
gpio4.GPIO[7]
gpio1.GPIO[7]
gpio1.GPIO[8]
gpio1.GPIO[9]
gpio1.GPIO[10]
gpio1.GPIO[11]
gpio1.GPIO[12]
gpio1.GPIO[13]
gpio1.GPIO[14]
gpio1.GPIO[15]
gpio1.GPIO[16]
gpio1.GPIO[17]
gpio1.GPIO[18]
gpio1.GPIO[19]
gpio1.GPIO[20]
gpio1.GPIO[21]
gpio1.GPIO[22]
gpio1.GPIO[23]
gpio1.GPIO[24]
gpio1.GPIO[25]
gpio1.GPIO[26]
gpio1.GPIO[27]
gpio1.GPIO[28]
gpio1.GPIO[29]
gpio1.GPIO[30]
gpio1.GPIO[31]
gpio2.GPIO[0]
gpio2.GPIO[1]
gpio2.GPIO[2]
gpio2.GPIO[3]
gpio2.GPIO[4]
gpio2.GPIO[5]
gpio2.GPIO[6]
gpio2.GPIO[7]
gpio2.GPIO[8]
gpio2.GPIO[9]
gpio2.GPIO[10]
gpio2.GPIO[11]
gpio2.GPIO[12]
gpio2.GPIO[13]
gpio2.GPIO[14]
gpio2.GPIO[15]
gpio2.GPIO[16]
gpio2.GPIO[17]
gpio2.GPIO[18]
gpio2.GPIO[19]
gpio2.GPIO[20]
gpio2.GPIO[21]
gpio2.GPIO[22]
gpio2.GPIO[23]
gpio2.GPIO[24]
gpio2.GPIO[25]
gpio2.GPIO[26]
gpio2.GPIO[27]
gpio2.GPIO[28]
gpio2.GPIO[29]
gpio2.GPIO[30]
gpio2.GPIO[31]
gpio3.GPIO[0]
gpio3.GPIO[1]
gpio3.GPIO[2]
gpio3.GPIO[3]
gpio3.GPIO[4]
gpio3.GPIO[5]
gpio3.GPIO[6]
gpio3.GPIO[7]
gpio3.GPIO[8]
gpio3.GPIO[9]
gpio3.GPIO[10]
gpio3.GPIO[11]
gpio1.GPIO[0]
gpio1.GPIO[1]
gpio1.GPIO[2]
gpio1.GPIO[3]
gpio1.GPIO[4]
gpio1.GPIO[5]
gpio1.GPIO[6]
gpio3.GPIO[16]
gpio3.GPIO[17]
gpio3.GPIO[12]
gpio3.GPIO[13]
gpio3.GPIO[14]
gpio3.GPIO[15]
gpio4.GPIO[8]
gpio4.GPIO[9]
gpio4.GPIO[10]
gpio4.GPIO[11]
gpio4.GPIO[12]
gpio4.GPIO[13]
gpio4.GPIO[14]
gpio4.GPIO[15]
gpio5.GPIO[15]
gpio5.GPIO[14]
gpio5.GPIO[11]
gpio5.GPIO[8]
gpio5.GPIO[13]
gpio5.GPIO[6]
gpio5.GPIO[12]
gpio5.GPIO[9]
gpio5.GPIO[7]
gpio5.GPIO[10]
gpio4.GPIO[27]
gpio5.GPIO[5]
gpio5.GPIO[4]
gpio5.GPIO[1]
gpio4.GPIO[30]
gpio5.GPIO[3]
gpio4.GPIO[28]
gpio5.GPIO[2]
gpio4.GPIO[31]
gpio4.GPIO[29]
gpio5.GPIO[0]
gpio5.GPIO[18]
gpio5.GPIO[21]
gpio5.GPIO[19]
gpio5.GPIO[20]
gpio5.GPIO[16]
gpio5.GPIO[17]
gpio4.GPIO[20]
gpio4.GPIO[21]
gpio4.GPIO[19]
gpio4.GPIO[25]
gpio4.GPIO[18]
gpio4.GPIO[24]
gpio4.GPIO[23]
gpio4.GPIO[17]
gpio4.GPIO[22]
gpio4.GPIO[16]
gpio4.GPIO[26]
ccm.PMIC_RDY
usdhc1.LCTL
csi.MCLK
usdhc1.CD
usdhc1.WP
usdhc3.DAT4
usdhc3.DAT5
usdhc3.DAT6
usdhc3.DAT7
usdhc4.DAT6
usdhc4.DAT7
usdhc4.CLK
usdhc4.CMD
usdhc4.DAT0
usdhc4.DAT1
usdhc4.DAT2
usdhc4.DAT3
usdhc4.DAT4
usdhc4.DAT5
tcon.E_DATA[0]
tcon.E_DATA[1]
tcon.E_DATA[2]
tcon.E_DATA[3]
tcon.E_DATA[4]
tcon.E_DATA[5]
tcon.E_DATA[6]
tcon.E_DATA[7]
tcon.E_DATA[8]
tcon.E_DATA[9]
tcon.E_DATA[10]
tcon.E_DATA[11]
tcon.E_DATA[12]
tcon.E_DATA[13]
tcon.E_DATA[14]
tcon.E_DATA[15]
tcon.CL
tcon.LD
tcon.XDIOL
tcon.XDIOR
tcon.YCKR
tcon.YOER
tcon.YDIOUR
tcon.YDIODR
tcon.YCKL
tcon.YOEL
tcon.YDIOUL
tcon.YDIODL
tcon.VCOM[0]
tcon.VCOM[1]
tcon.RL
tcon.UD
tcon.YCKL
tcon.YOEL
tcon.YDIOUL
tcon.YDIODL
anatop.USBOTG1_ID
anatop.USBOTG2_ID
kitten.EVENTI
kitten.EVENTO
pwm4.PWMO
uart2.RXD_MUX
uart2.TXD_MUX
uart2.RTS
uart2.CTS
uart5.DTR
audmux.AUD4_RXFS
audmux.AUD4_RXC
audmux.AUD4_RXD
audmux.AUD4_TXC
audmux.AUD4_TXFS
audmux.AUD4_TXD
audmux.AUDIO_CLK_OUT
ecspi2.SCLK
ecspi2.MOSI
ecspi2.MISO
ecspi2.SS1
uart5.RTS
uart5.CTS
uart5.RXD_MUX
uart5.TXD_MUX
i2c2.SCL
i2c2.SDA
gpt.CAPIN1
gpt.CAPIN2
gpt.CMPOUT1
gpt.CMPOUT2
gpt.CMPOUT3
gpt.CLKIN
i2c3.SCL
i2c3.SDA
usdhc1.LCTL
usdhc2.LCTL
usdhc3.LCTL
usdhc4.LCTL
wdog2.WDOG_RST_B_DEB
uart5.RXD_MUX
uart5.TXD_MUX
usdhc3.RST
usdhc3.VSELECT
usdhc3.WP
usdhc3.CD
usdhc2.RST
usdhc2.VSELECT
usdhc2.WP
usdhc2.CD
usdhc1.RST
usdhc1.VSELECT
usdhc1.WP
usdhc1.CD
mshc.SCLK
mshc.BS
mshc.DATA[0]
mshc.DATA[1]
mshc.DATA[2]
mshc.DATA[3]
uart4.RXD_MUX
uart4.TXD_MUX
uart4.RTS
uart4.CTS
csi.MCLK
osc32k.32K_OUT
epit1.EPITO
uart5.RTS
uart5.CTS
uart5.RXD_MUX
uart5.TXD_MUX
spdif.OUT1
spdif.IN1
usdhc2.WP
usdhc2.CD
wdog1.WDOG_RST_B_DEB
anatop.USBOTG2_ID
anatop.USBOTG1_ID
usdhc1.VSELECT
epit1.EPITO
epit2.EPITO
gpt.CAPIN1
gpt.CAPIN2
gpt.CMPOUT1
gpt.CMPOUT2
gpt.CMPOUT3
gpt.CLKIN
usdhc3.RST
usdhc3.VSELECT
usdhc3.WP
usdhc3.CD
ccm.PMIC_RDY
ALT6
ALT7
observe_mux.OUT[2]
usdhc3.WP
usdhc3.CD
epit1.EPITO
usdhc1.RST
usdhc1.VSELECT
usb.USBOTG1_PWR
usb.USBOTG1_OC
usb.USBOTG2_PWR
usb.USBOTG2_OC
usdhc3.RST
usdhc3.VSELECT
usdhc1.WP
usdhc1.CD
anatop.USBPHY1_TSTI_TX_HS_MODE
anatop.USBPHY1_TSTI_TX_LS_MODE
anatop.USBPHY1_TSTI_TX_DN
anatop.USBPHY1_TSTI_TX_DP
anatop.USBPHY1_TSTI_TX_EN
anatop.USBPHY1_TSTI_TX_HIZ
anatop.USBPHY2_TSTO_RX_DISCON_DET
anatop.USBPHY2_TSTO_RX_FS_RXD
usdhc4.RST
usdhc4.VSELECT
usdhc4.WP
usdhc4.CD
ecspi3.SS1
ecspi3.SS2
ecspi3.SS3
ecspi3.RDY
anatop.USBPHY2_TSTO_RX_HS_RXD
anatop.USBPHY2_TSTO_RX_SQUELCH
anatop.USBPHY2_TSTO_PLL_CLK20DIV
anatop.USBPHY1_TSTO_RX_DISCON_DET
anatop.USBPHY1_TSTO_PLL_CLK20DIV
anatop.USBPHY1_TSTO_RX_FS_RXD
anatop.USBPHY1_TSTO_RX_HS_RXD
anatop.USBPHY1_TSTO_RX_SQUELCH
usdhc2.RST
usdhc2.VSELECT
usdhc2.WP
usdhc2.CD
epdc.SDCE[5]
epdc.SDCE[6]
epdc.SDCE[7]
epdc.SDCE[8]
usdhc4.RST
usdhc4.VSELECT
usdhc4.WP
usdhc4.CD
usdhc3.RST
usdhc3.VSELECT
usdhc3.WP
usdhc3.CD
src.EARLY_RST
ocotp_ctrl_wrapper.FUSE_LATCHED
kitten.TRCLK
kitten.TRCTL
ccm.PMIC_RDY
kitten.TRACE[0]
kitten.TRACE[1]
kitten.TRACE[2]
kitten.TRACE[3]
kitten.TRACE[4]
kitten.TRACE[5]
kitten.TRACE[6]
kitten.TRACE[7]
kitten.TRACE[8]
kitten.TRACE[9]
kitten.TRACE[10]
kitten.TRACE[11]
kitten.TRACE[12]
kitten.TRACE[13]
kitten.TRACE[14]
kitten.TRACE[15]
kitten.TRACE[16]
kitten.TRACE[17]
kitten.TRACE[18]
kitten.TRACE[19]
kitten.TRACE[20]
kitten.TRACE[21]
kitten.TRACE[22]
kitten.TRACE[23]
ecspi3.SS0
ecspi3.SS1
src.INT_BOOT
src.SYSTEM_RST
anatop.ANATOP_TESTI[0]
anatop.ANATOP_TESTI[1]
spdif.SPDIF_EXT_CLK
anatop.ANATOP_TESTI[2]
anatop.ANATOP_TESTI[3]
ecspi1.SS1
ecspi1.SS2
ecspi1.RDY
anatop.ANATOP_TESTO[0]
usb.USBOTG2_OC
ccm.PLL2_BYP
ccm.PLL3_BYP
usb.USBOTG2_PWR
usb.USBOTG2_OC
anatop.ANATOP_TESTO[1]
usb.USBOTG1_OC
usb.USBOTG1_PWR
anatop.ANATOP_TESTO[2]
anatop.ANATOP_TESTO[3]
anatop.ANATOP_TESTO[4]
anatop.ANATOP_TESTO[5]
anatop.ANATOP_TESTO[6]
anatop.ANATOP_TESTO[7]
anatop.ANATOP_TESTO[8]
anatop.ANATOP_TESTO[9]
anatop.ANATOP_TESTO[10]
anatop.ANATOP_TESTO[11]
anatop.ANATOP_TESTO[12]
anatop.ANATOP_TESTO[13]
anatop.ANATOP_TESTO[14]
anatop.ANATOP_TESTO[15]
mmdc.MMDC_DEBUG[39]
mmdc.MMDC_DEBUG[38]
mmdc.MMDC_DEBUG[37]
mmdc.MMDC_DEBUG[36]
mmdc.MMDC_DEBUG[35]
mmdc.MMDC_DEBUG[34]
mmdc.MMDC_DEBUG[33]
usb.USBOTG1_PWR
usb.USBOTG2_PWR
sjc.JTAG_ACT
sjc.DE_B
usb.USBOTG2_OC
usb.USBOTG1_OC
kitten.TRACE[26]
kitten.TRACE[27]
kitten.TRACE[25]
kitten.TRACE[31]
fec.COL
kitten.TRACE[30]
kitten.TRACE[29]
kitten.TRACE[24]
kitten.TRACE[28]
fec.RX_CLK
spdif.SPDIF_EXT_CLK
mmdc.MMDC_DEBUG[49]
observe_mux.OUT[3]
observe_mux.OUT[4]
tpsmp.HDATA[0]
tpsmp.HDATA[1]
tpsmp.HDATA[2]
tpsmp.HDATA[3]
tpsmp.HDATA[4]
tpsmp.HDATA[5]
tpsmp.HDATA[6]
tpsmp.HDATA[7]
tpsmp.HDATA[8]
tpsmp.HDATA[9]
tpsmp.HDATA[10]
tpsmp.HDATA[11]
tpsmp.HDATA[12]
tpsmp.HDATA[13]
tpsmp.HDATA[14]
tpsmp.HDATA[15]
observe_mux.OUT[0]
observe_mux.OUT[1]
tpsmp.HDATA[28]
tpsmp.HDATA[29]
tpsmp.HDATA[30]
tpsmp.HDATA[31]
mmdc.MMDC_DEBUG[40]
mmdc.MMDC_DEBUG[32]
mmdc.MMDC_DEBUG[31]
mmdc.MMDC_DEBUG[30]
mmdc.MMDC_DEBUG[29]
mmdc.MMDC_DEBUG[28]
mmdc.MMDC_DEBUG[27]
mmdc.MMDC_DEBUG[26]
mmdc.MMDC_DEBUG[25]
mmdc.MMDC_DEBUG[24]
mmdc.MMDC_DEBUG[23]
mmdc.MMDC_DEBUG[22]
mmdc.MMDC_DEBUG[21]
mmdc.MMDC_DEBUG[20]
mmdc.MMDC_DEBUG[19]
mmdc.MMDC_DEBUG[18]
mmdc.MMDC_DEBUG[17]
mmdc.MMDC_DEBUG[16]
mmdc.MMDC_DEBUG[15]
mmdc.MMDC_DEBUG[14]
mmdc.MMDC_DEBUG[13]
mmdc.MMDC_DEBUG[12]
mmdc.MMDC_DEBUG[11]
mmdc.MMDC_DEBUG[10]
mmdc.MMDC_DEBUG[9]
mmdc.MMDC_DEBUG[8]
mmdc.MMDC_DEBUG[7]
mmdc.MMDC_DEBUG[6]
mmdc.MMDC_DEBUG[5]
mmdc.MMDC_DEBUG[4]
mmdc.MMDC_DEBUG[3]
mmdc.MMDC_DEBUG[2]
mmdc.MMDC_DEBUG[1]
mmdc.MMDC_DEBUG[0]
tpsmp.HTRANS[0]
tpsmp.HTRANS[1]
tpsmp.HDATA[16]
tpsmp.HDATA[17]
tpsmp.HDATA_DIR
src.BT_CFG[0]
src.BT_CFG[1]
src.BT_CFG[2]
src.BT_CFG[3]
src.BT_CFG[4]
src.BT_CFG[5]
src.BT_CFG[6]
src.BT_CFG[7]
src.BT_CFG[8]
src.BT_CFG[9]
src.BT_CFG[10]
src.BT_CFG[11]
src.BT_CFG[12]
src.BT_CFG[13]
src.BT_CFG[14]
src.BT_CFG[15]
src.BT_CFG[24]
src.BT_CFG[25]
src.BT_CFG[26]
src.BT_CFG[27]
src.BT_CFG[28]
src.BT_CFG[29]
src.BT_CFG[30]
src.BT_CFG[31]
pl301_sim_mx6sl_per1.HPROT[1]
pl301_sim_mx6sl_per1.HREADYOUT
pl301_sim_mx6sl_per1.HRESP
tpsmp.HDATA[24]
tpsmp.HDATA[25]
tpsmp.HDATA[26]
tpsmp.HDATA[27]
tpsmp.CLK
uart5.DCD
pl301_sim_mx6sl_per1.HSIZE[0]
pl301_sim_mx6sl_per1.HSIZE[1]
pl301_sim_mx6sl_per1.HSIZE[2]
pl301_sim_mx6sl_per1.HWRITE
tpsmp.HDATA[18]
tpsmp.HDATA[19]
tpsmp.HDATA[20]
pl301_sim_mx6sl_per1.HADDR[23]
tpsmp.HDATA[21]
tpsmp.HDATA[22]
tpsmp.HDATA[23]
pl301_sim_mx6sl_per1.HADDR[24]
pl301_sim_mx6sl_per1.HADDR[25]
pl301_sim_mx6sl_per1.HADDR[26]
pl301_sim_mx6sl_per1.HADDR[27]
pl301_sim_mx6sl_per1.HADDR[28]
pl301_sim_mx6sl_per1.HADDR[29]
pl301_sim_mx6sl_per1.HADDR[30]
pl301_sim_mx6sl_per1.HADDR[31]
pl301_sim_mx6sl_per1.HPROT[3]
pl301_sim_mx6sl_per1.HPROT[2]
pl301_sim_mx6sl_per1.HMASTLOCK
pl301_sim_mx6sl_per1.HBURST[2]
pl301_sim_mx6sl_per1.HPROT[1]
pl301_sim_mx6sl_per1.HADDR[21]
pl301_sim_mx6sl_per1.HPROT[0]
pl301_sim_mx6sl_per1.HBURST[1]
pl301_sim_mx6sl_per1.HADDR[22]
pl301_sim_mx6sl_per1.HBURST[0]
pl301_sim_mx6sl_per1.HADDR[10]
pl301_sim_mx6sl_per1.HADDR[20]
pl301_sim_mx6sl_per1.HADDR[19]
pl301_sim_mx6sl_per1.HADDR[16]
pl301_sim_mx6sl_per1.HADDR[13]
pl301_sim_mx6sl_per1.HADDR[18]
pl301_sim_mx6sl_per1.HADDR[11]
pl301_sim_mx6sl_per1.HADDR[17]
pl301_sim_mx6sl_per1.HADDR[14]
pl301_sim_mx6sl_per1.HADDR[12]
pl301_sim_mx6sl_per1.HADDR[15]
pl301_sim_mx6sl_per1.HADDR[4]
pl301_sim_mx6sl_per1.HADDR[5]
pl301_sim_mx6sl_per1.HADDR[3]
pl301_sim_mx6sl_per1.HADDR[9]
pl301_sim_mx6sl_per1.HADDR[2]
pl301_sim_mx6sl_per1.HADDR[8]
pl301_sim_mx6sl_per1.HADDR[7]
pl301_sim_mx6sl_per1.HADDR[1]
pl301_sim_mx6sl_per1.HADDR[6]
pl301_sim_mx6sl_per1.HADDR[0]
D
C
B
A
A
ICAP Classification:
Drawing Title:
FCP: ___
FIUO: X
PUBI: ___
MCIMX6SLEVK board
Page Title:
IOMUX
Size
D
Document Number
4
3
2
Rev
B
SCH-27452 PDF: SPF-27452
Date:
5
Wednesday, October 10, 2012
1
Sheet
16
of
16