A Business Partner of Renesas Electronics Corporation. Preliminary PS9402 Data Sheet R08DS0014EJ0100 Rev.1.00 Jun 22, 2012 2.5 A OUTPUT CURRENT, HIGH CMR, IGBT, POWER MOS FET GATE DRIVE, 16-PIN SSOP PHOTOCOUPLER DESCRIPTION The PS9402 is an optically coupled isolator containing a GaAlAs LED on the input side and a photo diode, a signal processing circuit and a power output transistor on the output side on one chip. The PS9402 is designed specifically for high common mode transient immunity (CMR), high output current and high switching speed. The PS9402 includes desaturation detection and active miller clamping functions. The PS9402 is suitable for driving IGBTs and Power MOS FETs. The PS9402 is in a 16-pin plastic SSOP (Shrink Small Outline Package). And the PS9402 is able to high-density (surface) mounting. FEATURES <R> • • • • • • • • • • Long creepage distance (8 mm MIN.) Large peak output current (2.5 A MAX., 2.0 A MIN.) High speed switching (tPLH, tPHL = 200 ns MAX.) UVLO (Under Voltage Lock Out) protection with hysteresis Desaturation detection Miller clamping High common mode transient immunity (|CMH|, |CML| = 25 kV/μs MIN.) Embossed tape product: PS9402-E3: 850 pcs/reel Pb-Free product Safety standards • UL approved: No. E72422 • CSA approved: No. CA 101391 (CA5A, CAN/CSA-C22.2 60065, 60950) • DIN EN60747-5-2 (VDE0884 Part2) approved: No. 40024069 (Option) PIN CONNECTION (Top View) 1 VS VE 16 2 VCC1 VLED 15 3 Fault Desat 14 4 VS 5 Cathode VCC2 13 VEE 12 6 Anode VO 11 7 Anode Vclamp 10 8 Cathode VEE 9 APPLICATIONS • • • IGBT, Power MOS FET Gate Driver Industrial inverter Uninterruptible Power Supply (UPS) The mark <R> shows major revised points. The revised points can be easily searched by copying an "<R>" in the PDF file and specifying it in the "Find what:" field. R08DS0014EJ0100 Rev.1.00 Jun 22, 2012 Page 1 of 22 A Business Partner of Renesas Electronics Corporation. PS9402 Chapter Title PACKAGE DIMENSIONS (UNIT: mm) 10.31±0.5 1.27 0.46±0.1 0.25 M 10.36±0.4 0.2±0.15 3.5±0.2 7.49+0.5 –0.1 0.64 MIN. 0.71±0.3 PHOTOCOUPLER CONSTRUCTION Parameter Air Distance Outer Creepage Distance Isolation Distance R08DS0014EJ0100 Rev.1.00 Jun 22, 2012 Unit (MIN.) 8 mm 8 mm 0.4 mm Page 2 of 22 A Business Partner of Renesas Electronics Corporation. PS9402 Chapter Title BLOCK DIAGRAM (UNIT: mm) VS VE SHIELD VCC1 VLED Fault Desat VS VCC2 UVLO VEE Cathode VO Anode DESAT Vclamp Anode CLAMP Cathode <R> <R> <R> <R> <R> <R> VEE SHIELD IF UVLO (VCC2 − VEE) OFF ON ON ON OFF Not Active ( > VUVLO+) Not Active ( > VUVLO+) Not Active ( > VUVLO+) Active ( < VUVLO–) Active ( < VUVLO–) R08DS0014EJ0100 Rev.1.00 Jun 22, 2012 DESAT (Pin 14: DESAT pin input) Not active Low ( < VDESATth) High ( > VDESATth) Not Active Not Active FAULT (Pin 3: FAULT pin output) High High Low (FAULT) High High VO Low High Low Low Low Page 3 of 22 A Business Partner of Renesas Electronics Corporation. PS9402 <R> Chapter Title MARKING EXAMPLE No. 1 pin Mark R 9402 NT231 Company Initial Type Number Assembly Lot N T 2 31 Week Assembled Year Assembled (Last 1 Digit) In-house Code (T: Pb-Free) Rank Code ORDERING INFORMATION Part Number <R> <R> Order Number PS9402 PS9402-E3 PS9402-AX PS9402-E3-AX PS9402-V PS9402-V-E3 PS9402-V-AX PS9402-V-E3-AX Note: Solder Plating Specification Pb-Free (Ni/Pd/Au) Packing Style 10 pcs (Tape 10 pcs cut) Embossed Tape 850 pcs/reel 10 pcs (Tape 10 pcs cut) Embossed Tape 850 pcs/reel Safety Standard Approval Standard products (UL and CSA Approved) DIN EN60747-5-2 (VDE0884 Part2) Approved (Option) Application *1 Part Number PS9402 *1. For the application of the Safety Standard, following part number should be used. R08DS0014EJ0100 Rev.1.00 Jun 22, 2012 Page 4 of 22 A Business Partner of Renesas Electronics Corporation. PS9402 Chapter Title ABSOLUTE MAXIMUM RATINGS (TA = 25°C, unless otherwise specified) <R> <R> <R> Parameter Forward Current *1 Peak Transient Forward Current (Pulse Width < 1 μs) Reverse Voltage Input Supply Voltage Input IC Power Dissipation *2 High Level Peak Output Current *3 Low Level Peak Output Current *3 FAULT Output Current FAULT Pin Voltage Total Output Supply Voltage Negative Output Supply Voltage Output Voltage Peak Clamping Sinking Current Miller Clamping Pin Voltage DESAT Voltage Output IC Power Dissipation *4 Isolation Voltage *5 Operating Ambient Temperature Storage Temperature Notes: *1. *2. *3. *4. *5. Symbol IF Ratings 25 1.0 Unit mA A VR VCC1 PI 5 0 to 5.5 80 2.5 2.5 8 0 to VCC1 0 to 33 0 to 15 0 to VCC2 1.7 0 to VCC2 VE to VE + 10 300 5 000 −40 to +110 −55 to +125 V V mW A A mA V V V V A V V mW Vr.m.s. °C °C IF (TRAN) IOH (PEAK) IOL (PEAK) IFAULT VFAULT (VCC2 − VEE) (VE − VEE) VO IClamp VClamp VDESAT PO BV TA Tstg Reduced to 0.52 mA/°C at TA = 85°C or more. Reduced to 1.6 mW/°C at TA = 75°C or more. Maximum pulse width = 10 μs, Maximum duty cycle = 0.2% Reduced to 5.5 mW/°C at TA = 70°C or more. AC voltage for 1 minute at TA = 25°C, RH = 60% between input and output. Pins 1-8 shorted together, 9-16 shorted together. RECOMMENDED OPERATING CONDITIONS Parameter Total Output Supply Voltage Negative Output Supply Voltage Positive Output Supply Voltage Forward Current (ON) Forward Voltage (OFF) Operating Ambient Temperature R08DS0014EJ0100 Rev.1.00 Jun 22, 2012 Symbol (VCC2 − VEE) (VE − VEE) (VCC2 − VE) IF (ON) VF (OFF) TA MIN. 15 0 15 8 −2 −40 MAX. 30 15 30 − (VE − VEE) 12 0.8 110 Unit V V V mA V °C Page 5 of 22 A Business Partner of Renesas Electronics Corporation. PS9402 <R> Chapter Title ELECTRICAL CHARACTERISTICS (DC) (at RECOMMENDED OPERATING CONDITIONS, VEE = VE = GND, unless otherwise specified) Parameter Symbol Conditions IFAULT = 1.1 mA, VCC1 = 5.5 V FAULT Logic High Output Current High Level Output Current IFAULTH Low Level Output Current IOL Low Level Output Current During Fault Condition High Level Output Voltage IOLF VFAULT = 5.5 V, VCC1 = 5.5 V, TA = 25°C VO = (VCC2 − 4 V) *2 VO = (VCC2 − 15 V) *3 VO = (VEE + 2.5 V) *2 VO = (VEE + 15 V) *3 VO – VEE = 14 V FAULT Logic Low Output Voltage Low Level Output Voltage Clamp Pin Threshold Voltage Clamp Low Level Sinking Current High Level Supply Current Low Level Supply Current Blanking Capacitor Charging Current Blanking Capacitor Discharging Current DESAT Threshold UVLO Threshold UVLO Hysteresis Threshold Input Current (L H) Threshold Input Voltage (H L) Input Forward Voltage Input Reverse Current Input Capacitance VFAULTL IOH VOH VOL VtClamp ICL ICC2H ICC2L IO = 100 mA *4 IO = −650 μA *4 IO = 100 mA VtClamp = VEE + 2.5 V MIN. −0.5 −2.0 0.5 2.0 90 TYP. *1 0.1 Unit V 0.5 μA −1.5 A 1.5 A 140 VCC2 − 3.0 VCC2 − 1.3 VCC2 − 2.5 VCC2 − 0.8 0.15 2.0 0.35 1.5 ICHG IO = 0 mA IO = 0 mA VDESAT = 2 V −0.13 2 2 −0.24 IDSCHG VDESAT = 7 V 10 30 IFLH VCC2 − VE > VUVLO−, VO < 5 V VO > 5 V VO < 5 V (VUVLO+) − (VUVLO−) IO = 0 mA, VO > 5 V 6.0 11.0 9.8 0.4 6.9 12.6 11.3 1.3 1.5 VFHL IO = 0 mA, VO < 5 V 0.8 VF IR CIN IF = 10 mA, TA = 25°C VR = 3 V, TA = 25°C f = 1 MHz, VF = 0 V 1.2 VDESATth VUVLO+ VUVLO− UVLOHYS MAX. 230 mA V 0.5 V V A 3 3 −0.33 mA mA mA mA 7.5 13.5 12.3 5 V V V mA V 1.56 30 1.8 10 V μA pF Notes: *1. Typical values at TA = 25°C. *2. Maximum pulse width = 50 μs, Maximum duty cycle = 0.5% *3. Maximum pulse width = 10 μs, Maximum duty cycle = 0.2% *4. VOH is measured with the DC load current in this testing (Maximum pulse width = 1 ms, Maximum duty cycle = 20%). R08DS0014EJ0100 Rev.1.00 Jun 22, 2012 Page 6 of 22 A Business Partner of Renesas Electronics Corporation. PS9402 <R> Chapter Title SWITCHING CHARACTERISTICS (AC) (at RECOMMENDED OPERATING CONDITIONS, VEE = VE = GND, unless otherwise specified) Parameter Symbol Propagation Delay Time (L H) tPLH Propagation Delay Time (H L) tPHL Pulse Width Distortion (PWD) |tPHL−tPLH| tPHL−tPLH Propagation Delay Time (Difference Between Any Two Products) Rise Time tr Fall Time tf CMH Common Mode Transient *3 Immunity at High Level Output Common Mode Transient *4 Immunity at Low Level Output CML DESAT Sense to 90% VO Delay tDESAT DESAT Sense to 10% VO Delay tDESAT DESAT Sense to Low Level FAULT Signal Delay DESAT Sense to DESAT Low Propagation Delay DESAT Input Mute *5 RESET to High Level FAULT Signal Delay (90%) (10%) tDESAT Conditions Rg = 10 Ω, Cg = 10 nF, f = 10 kHz, Duty Cycle = 50% *2, IF = 10 mA, VCC2 = 30 V MIN. 50 50 −100 TA = 25°C, IF = 10 mA, VCC2 = 30 V, VCM = 1.5 kV, CDESAT = 100 pF, RF = 2.1 kΩ, VCC1 = 5 V 25 TA = 25°C, VF = 0 V, VCC2 = 30 V, VCM = 1.5 kV, RF = 2.1 kΩ, VCC1 = 5 V CDESAT = 100 pF, RF = 2.1 kΩ, Rg = 10 Ω, Cg = 10 nF VCC2 = 30 V 1.5 (FAULT) (LOW) tRESET 100 50 50 VCC1 = 5.5 V VCC1 = 3.3 V 0.3 0.5 Unit ns ns ns ns ns ns kV/μs −25 kV/μs 250 500 ns 2 3 μs 400 800 ns ns 5 tDESAT (FAULT) MAX. 200 200 100 250 tDESAT (MUTE) TYP. *1 90 110 20 μs 1.2 1.5 3.0 4.0 μs μs Notes: *1. Typical values at TA = 25°C. *2. This load condition is equivalent to the IGBT load at 1 200 V/150 A. *3. Common mode transient immunity in the high state is the maximum tolerable dVCM/dt of the common mode pulse, VCM, to assure that the output will remain in the high state (i.e., VO > 15 V or FAULT > 2 V). A 100 pF and a 2.1 kΩ pull-up resistor is needed in fault detection mode. *4. Common mode transient immunity in the low state is the maximum tolerable dVCM/dt of the common mode pulse, VCM, to assure that the output will remain in a low state (i.e., VO < 1.0 V or FAULT < 0.8 V). *5. During muting DESAT, even if LED (IF) input occurs, IGBT operates turn-off and Vo state is kept to low. After unmuting this DESAT, when LED is turned on, Vo/FAULT becomes high state (with automatic reset). R08DS0014EJ0100 Rev.1.00 Jun 22, 2012 Page 7 of 22 A Business Partner of Renesas Electronics Corporation. PS9402 <R> Chapter Title TEST CIRCUIT 1 Fig. 2 IFAULTH Test Circuit Fig. 1 VFAULTL Test Circuit 1 VS VCC1 VFAULTL 2 VCC1 3 Fault 4 VS 5 Cathode 6 Anode 7 Anode 8 Cathode 1 VS IF 2 VLED 15 VCC1 Desat 14 VCC2 13 VEE 12 VLED 15 3 Fault Desat 14 4 VS 10 VEE 9 VCC2 13 VEE 12 6 Anode VO 11 7 Anode Vclamp 10 8 Cathode VEE 9 Fig. 4 IOL Test Circuit 1 VS 1 VS VE 16 VE 16 2 VCC1 VLED 15 2 VCC1 VLED 15 3 Fault Desat 14 3 Fault Desat 14 5 Cathode 6 Anode 7 Anode 8 Cathode VCC2 13 VEE 12 VO 11 Vclamp 10 VEE 4 VS VO 5 Cathode IOH 0.1 μF VCC2 1 VS 6 Anode 7 Anode 8 Cathode 9 Fig. 5 VOH Test Circuit VCC2 13 VEE 12 VO 11 Vclamp 10 1 VS VE 16 VE 16 VLED 15 2 VCC1 VLED 15 Desat 14 3 Fault Desat 14 VCC2 13 VEE 12 6 Anode VO 11 7 Anode Vclamp 10 8 Cathode R08DS0014EJ0100 Rev.1.00 Jun 22, 2012 VEE 9 VCC2 VO Fig. 6 VOL Test Circuit 3 Fault 5 Cathode 0.1 μF IOL VEE 9 2 VCC1 4 VS IF 2 VCC1 5 Cathode VO 11 Vclamp IFAULTH VE 16 Fig. 3 IOH Test Circuit 4 VS IF VE 16 4 VS 0.1 μF VOH IO 5 Cathode VCC2 VCC2 13 VEE 12 6 Anode VO 11 7 Anode Vclamp 10 8 Cathode VEE 9 0.1 μF VOL VCC2 IO Page 8 of 22 A Business Partner of Renesas Electronics Corporation. PS9402 <R> Chapter Title TEST CIRCUIT 2 Fig. 8 ICC2L Test Circuit Fig. 7 ICC2H Test Circuit 1 VS 1 VS VLED 15 2 VCC1 VLED 15 3 Fault Desat 14 3 Fault Desat 14 5 Cathode VCC2 13 VEE 12 6 Anode VO 11 7 Anode Vclamp 10 8 Cathode ICC2H 4 VS 0.1 μF 5 Cathode VCC2 VEE 9 1 VS VLED 15 3 Fault Desat 14 4 VS 5 Cathode VCC2 13 VEE 12 6 Anode VO 11 7 Anode Vclamp 10 8 Cathode VO 11 7 Anode Vclamp 10 1 VS 2V ICHG VLED 15 3 Fault Desat 14 0.1 μF 5 Cathode VCC2 VEE 12 6 Anode VO 11 7 Anode Vclamp 10 8 Cathode VEE 9 VCC2 13 VE 16 1 VS 2 VCC1 VLED 15 3 Fault Desat 14 8 Cathode R08DS0014EJ0100 Rev.1.00 Jun 22, 2012 VCC2 13 4 VS VEE 12 0.1 μF VO 11 ICL 2.5 V Vclamp 10 VEE 9 0.1 μF VCC2 VE 16 VLED 15 7 Anode IDSCHG Fig. 12 VDESAT Test Circuit Desat 14 6 Anode 7V VEE 9 3 Fault 5 Cathode VCC2 VE 16 2 VCC1 4 VS 0.1 μF VEE 9 2 VCC1 4 VS Fig. 11 ICL Test Circuit 1 VS VEE 12 ICC2L Fig. 10 IDSCHG Test Circuit VE 16 2 VCC1 VCC2 13 6 Anode 8 Cathode Fig. 9 ICHG Test Circuit IF VE 16 2 VCC1 4 VS IF VE 16 5 Cathode VCC2 IF VCC2 13 VEE 12 6 Anode VO 11 7 Anode Vclamp 10 8 Cathode VDESAT 0.1 μF VCC2 VEE 9 Page 9 of 22 A Business Partner of Renesas Electronics Corporation. PS9402 <R> Chapter Title TEST CIRCUIT 3 Fig. 14 IFLH Test Circuit Fig. 13 VUVLO Test Circuit 1 VS VLED 15 2 VCC1 VLED 15 3 Fault Desat 14 3 Fault Desat 14 5 Cathode 6 Anode 7 Anode 8 Cathode VCC2 13 1 VS VEE 12 VO 11 IF VEE 9 3 Fault Desat 14 5 Cathode 6 Anode VO 11 7 Anode Vclamp 10 8 Cathode VEE 9 VCC1 = 5 V 2.1 kΩ VLED 15 3 Fault Desat 14 4 VS 5 Cathode IF 6 Anode VO 11 7 Anode Vclamp 10 8 Cathode R08DS0014EJ0100 Rev.1.00 Jun 22, 2012 VEE 9 Vclamp 10 VCC2 VEE 9 10 Ω tr tf 90% 50% 10% tPLH tPHL VCC2 10 nF Fig. 18 tDESAT Test Wave Forms VDESAT − 100 pF + VCC2 13 VEE 12 7 Anode VOUT 0.1 μF VE 16 2 VCC1 VO 11 IF Fig. 17 tDESAT Test Circuit 1 VS 6 Anode Fig. 17 tPLH/tPHL Test Wave Forms VCC2 13 VEE 12 0.1 μF VEE 12 8 Cathode VE 16 VLED 15 4 VS 5 Cathode VCC2 Vclamp 10 2 VCC1 VCC2 13 4 VS 0.1 μF Fig. 15 tPLH/tPHL Test Circuit IF VE 16 1 VS 2 VCC1 4 VS IF VE 16 10 nF tDESET (LOW) VDESET 50% tDESET (10%) 90% VOUT 0.1 μF 10 Ω IF VCC2 tDESET (90%) FAULT tDESET (FAULT) 10% 50% tDESET (MUTE) 50% tRESET (FAULT) Page 10 of 22 A Business Partner of Renesas Electronics Corporation. PS9402 <R> Chapter Title TEST CIRCUIT 4 Fig. 20 CML Test Circuit (LED1 OFF) Fig. 19 CMH Test Circuit (LED1 ON) 1 VS VE 16 1 VS 2 VCC1 VLED 15 2 VCC1 VLED 15 3 Fault Desat 14 3 Fault Desat 14 VCC2 13 4 VS 5 Cathode VEE 12 6 Anode VO 11 7 Anode Vclamp 10 VEE 9 8 Cathode + 0.1 μF SCOPE 5 Cathode VCC2 10 Ω 10 nF VCC1 SCOPE 2 VCC1 VLED 15 3 Fault Desat 14 VCC2 13 5 Cathode 0.1 μF VEE 12 6 Anode VO 11 7 Anode Vclamp 10 VEE 9 8 Cathode 7 Anode Vclamp 10 VEE 9 8 Cathode 2.1 kΩ 100 pF VCC1 SCOPE 0.1 μF 10 Ω 0.1 μF 10 nF 1 VS Fig. 23 CMH, CML Test Wave Forms (LED1 ON, OFF) tr VO (CMH: IF = 10 mA) VO (CML: IF = 0 mA) R08DS0014EJ0100 Rev.1.00 Jun 22, 2012 tf 10 Ω 10 nF VE 16 2 VCC1 VLED 15 3 Fault Desat 14 VCC2 13 4 VS 5 Cathode VCC2 90% VCC2 − VEE 12 6 Anode VO 11 7 Anode Vclamp 10 VEE 9 8 Cathode 0.1 μF VCC2 10 Ω 10 nF + − VCM 0.1 μF SCOPE Fig. 22 CML Test Circuit (LED2 OFF) + − 0V VO 11 + VE 16 4 VS VEE 12 6 Anode − 1 VS VCC2 13 4 VS Fig. 21 CMH Test Circuit (LED2 ON) 2.1 kΩ VE 16 Fig. 24 CMH, CML Test Wave Forms (LED2 ON, OFF) 1 500 V 90% VCM 10% 0V VOH 15 V 1V VOL VFAULT (CMH: IF = 10 mA, DESAT) VFAULT (CML: IF = 0 mA, DESAT) tr tf 1 500 V 10% GND 2V 0.8 V OPEN Page 11 of 22 A Business Partner of Renesas Electronics Corporation. PS9402 TYPICAL CHARACTERISTICS (TA = 25°C, unless otherwise specified) Input IC Power Dissipation PI (mW) Output IC Power Dissipation PO (mW) INPUT IC POWER DISSIPATION vs. AMBIENT TEMPERATURE 120 100 80 60 40 20 0 0 25 50 75 100 125 Forward Current IF (mA) 200 150 100 50 0 0 5 TA = +100°C +85°C +50°C +25°C 0°C −40°C 1.2 1.4 1.6 1.8 2.0 2.2 25 50 75 100 125 VCC2 = 30 V, VEE = GND, VO > 5 V 4 3 2 1 0 −40 2.4 0 −20 20 40 60 80 100 Forward Voltage VF (V) Ambient Temperature TA (°C) OUTPUT VOLTAGE vs. FORWARD CURRENT HIGH LEVEL OUTPUT VOLTAGE – OUTPUT SUPPLY VOLTAGE vs. HIGH LEVEL OUTPUT CURRENT 0.0 High Level Output Voltage – Output Supply Voltage VOH – VCC 2 (V) VCC = 30 V, VEE = GND 25 20 15 10 5 0 250 THRESHOLD INPUT CURRENT vs. AMBIENT TEMPERATURE 0.1 30 300 FORWARD CURRENT vs. FORWARD VOLTAGE 1.0 35 350 Ambient Temperature TA (°C) 10 0.01 1.0 400 OUTPUT IC POWER DISSIPATION vs. AMBIENT TEMPERATURE Ambient Temperature TA (°C) Threshold Input Current IFLH (mA) 100 Output Voltage VO (V) <R> Chapter Title 1 2 3 4 5 Forward Current IF (mA) VCC = 30 V, VEE = GND, IF = 10 mA −1.0 −2.0 −40°C −3.0 −4.0 −5.0 −2.5 TA = 110°C 25°C −2.0 −1.5 −1.0 −0.5 0.0 High Level Output Current IOH (A) Remark The graphs indicate nominal characteristics. R08DS0014EJ0100 Rev.1.00 Jun 22, 2012 Page 12 of 22 A Business Partner of Renesas Electronics Corporation. Chapter Title VCC = 30 V, VEE = GND, 4.0 IF = 0 mA 3.0 2.0 −40°C 1.0 0.0 0 Propagation Delay Time tPHL, tPLH (ns), Pulse Width Distortion (PWD) tPHL – tPLH (ns) 25°C TA = 110°C 0.5 1.0 1.5 2.0 2.5 PROPAGATION DELAY TIME, PULSE WIDTH DISTORTION vs. FORWARD CURRENT 200 VCC2 = 30 V, VEE = GND, Rg = 10 Ω, Cg = 10 nF, f = 10 kHz, Duty cycle = 50% 150 tPHL 100 tPLH 50 PWD 0 7 10 PROPAGATION DELAY TIME, PULSE WIDTH DISTORTION vs. OUTPUT SUPPLY VOLTAGE PROPAGATION DELAY TIME, PULSE WIDTH DISTORTION vs. LOAD CAPACITANCE VEE = GND, IF = 10 mA, Rg = 10 Ω, Cg = 10 nF, f = 10 kHz, Duty cycle = 50% 150 tPHL 100 tPLH 50 PWD 0 15 20 25 30 200 VCC2 = 30 V, VEE = GND, IF = 10 mA, Rg = 10 Ω, f = 10 kHz, Duty cycle = 50% 150 tPHL 100 tPLH 50 PWD 0 0 10 VCC2 = 30 V, VEE = GND, IF = 10 mA, Cg = 10 nF, f = 10 kHz, Duty cycle = 50% 150 tPHL 100 tPLH 50 PWD 10 20 30 40 50 Load Resistance Rg (Ω) Propagation Delay Time tPHL, tPLH (ns), Pulse Width Distortion (PWD) tPHL – tPLH (ns) PROPAGATION DELAY TIME, PULSE WIDTH DISTORTION vs. LOAD RESISTANCE 200 30 20 40 50 Load Capacitance Cg (nF) Output Supply Voltage VCC2 (V) Propagation Delay Time tPHL, tPLH (ns), Pulse Width Distortion (PWD) tPHL – tPLH (ns) 16 Forward Current IF (mA) 200 0 0 13 Low Level Output Current IOL (A) Propagation Delay Time tPHL, tPLH (ns), Pulse Width Distortion (PWD) tPHL – tPLH (ns) Low Level Output Voltage VOL (V) 5.0 LOW LEVEL OUTPUT VOLTAGE vs. LOW LEVEL OUTPUT CURRENT Propagation Delay Time tPHL, tPLH (ns), Pulse Width Distortion (PWD) tPHL – tPLH (ns) PS9402 PROPAGATION DELAY TIME, PULSE WIDTH DISTORTION vs. AMBIENT TEMPERATURE 200 VCC2 = 30 V, VEE = GND, IF = 10 mA, Rg = 10 Ω, Cg = 10 nF, f = 10 kHz, Duty cycle = 50% 150 tPHL 100 tPLH 50 PWD 0 −40 −20 0 20 40 60 80 100 Ambient Temperature TA (°C) Remark The graphs indicate nominal characteristics. R08DS0014EJ0100 Rev.1.00 Jun 22, 2012 Page 13 of 22 A Business Partner of Renesas Electronics Corporation. PS9402 Chapter Title VCC2 = 30 V, VEE = GND, VO = OPEN 2.5 ICC2H (IF = 10 mA) 2.0 ICC2L (IF = 0 mA) 1.5 1.0 0.5 −40 −20 0 20 40 60 80 High Level Supply Current ICCH (mA), Low Level Supply Current ICCL (mA) High Level Supply Current ICCH (mA), Low Level Supply Current ICCL (mA) 3.0 HIGH LEVEL SUPPLY CURRENT, LOW LEVEL SUPPLY CURRENT vs. AMBIENT TEMPERATURE 100 3.0 HIGH LEVEL SUPPLY CURRENT, LOW LEVEL SUPPLY CURRENT vs. OUTPUT SUPPLY VOLTAGE VEE = GND, VO = OPEN 2.5 ICC2H (IF = 10 mA) 2.0 ICC2L (IF = 0 mA) 1.5 1.0 0.5 15 HIGH LEVEL OUTPUT VOLTAGE – OUTPUT SUPPLY VOLTAGE vs. AMBIENT TEMPERATURE −1.0 –100 mA −1.5 −2.0 −2.5 −3.0 −40 −20 0 20 60 80 30 LOW LEVEL OUTPUT VOLTAGE vs. AMBIENT TEMPERATURE VCC2 = 30 V, VEE = GND, IF = 10 mA, IO = 100 mA 0.4 0.3 0.2 0.1 0 −40 −20 100 0 20 40 60 80 100 Ambient Temperature TA (°C) Ambient Temperature TA (°C) HIGH LEVEL OUTPUT CURRENT vs. AMBIENT TEMPERATURE LOW LEVEL OUTPUT CURRENT vs. AMBIENT TEMPERATURE 0 High Level Output Current IOH (A) 40 Low Level Output Voltage VOL (V) IO = –650 μ A 0.5 VCC2 = 30 V, VEE = GND, IF = 10 mA −1 −2 VO = VCC2 −4 V −3 −4 −5 VCC2 −15 V −6 −7 −40 −20 0 20 40 60 80 100 Ambient Temperature TA (°C) 5 Low Level Output Current IOL (A) High Level Output Voltage – Output Supply Voltage VOH – VCC2 (V) −0.5 VCC2 = 30 V, VEE = GND, IF = 10 mA 25 Output Supply Voltage VCC2 (V) Ambient Temperature TA (°C) 0.0 20 VCC2 = 30 V, VEE = GND, IF = 10 mA 4 VO = VEE +15 V 3 2 VEE +2.5 V 1 0 −40 −20 0 20 40 60 80 100 Ambient Temperature TA (°C) Remark The graphs indicate nominal characteristics. R08DS0014EJ0100 Rev.1.00 Jun 22, 2012 Page 14 of 22 A Business Partner of Renesas Electronics Corporation. Chapter Title 4 VCC2 = 30 V, VEE = VE = GND, VtClamp = 2.5 V 3 BLANKING CAPACITOR CHARGING CURRENT vs. AMBIENT TEMPERATURE −0.10 VCC2 = 30 V, VEE = VE = GND, IF = 10 mA, VDESAT = 2 V −0.15 −0.20 2 −0.25 1 0 −40 −20 −0.30 0 20 40 60 80 100 −0.35 −40 −20 0 20 40 60 80 Ambient Temperature TA (°C) Ambient Temperature TA (°C) BLANKING CAPACITOR DISCHARGING CURRENT vs. AMBIENT TEMPERATURE DESAT THRESHOLD vs. AMBIENT TEMPERATURE VCC2 = 30 V, VEE = VE = GND, IF = 0 mA, VDESAT = 7 V 50 40 30 20 −40 −20 0 20 40 60 80 7.5 DESAT Threshold VDESATth (V) 60 100 VEE = VE = GND, VCC2 > VUVLO−, VO < 5 V, IF = 10 mA 7.2 6.9 6.6 6.3 6.0 −40 −20 100 0 20 40 60 80 100 Ambient Temperature TA (°C) Ambient Temperature TA (°C) DESAT SENSE TO 90% VO DELAY vs. AMBIENT TEMPERATURE DESAT SENSE TO 10% VO DELAY vs. AMBIENT TEMPERATURE 500 VEE = VE = GND, Rg = 10 Ω, Cg = 10 nF, RF = 2.1 kΩ, CDESAT = 100 pF, VCC1 = 5 V 400 VCC2 = 30 V 300 200 15 V 100 0 −40 −20 0 20 40 60 80 100 Ambient Temperature TA (°C) DESAT Sense to 10% VO Delay tDESAT (10%) ( μ s) DESAT Sense to 90% VO Delay tDESAT (90%) (ns) Blanking Capacitor Discharging Current IDSCHG (mA) Clamp Low Level Sinking Current ICL (A) CLAMP LOW LEVEL SINKING CURRENT vs. AMBIENT TEMPERATURE Blanking Capacitor Charging Current ICHG (mA) PS9402 3.0 2.5 VCC2 = 30 V 2.0 1.5 1.0 0.5 15 V VCC1 = 5 V, VEE = VE = GND, Rg = 10 Ω, Cg = 10 nF, RF = 2.1 kΩ, CDESAT = 100 pF 0.0 −40 −20 0 20 40 60 80 100 Ambient Temperature TA (°C) Remark The graphs indicate nominal characteristics. R08DS0014EJ0100 Rev.1.00 Jun 22, 2012 Page 15 of 22 A Business Partner of Renesas Electronics Corporation. Chapter Title DESAT SENSE TO 10% VO DELAY vs. LOAD RESISTANCE 3.0 2.5 VCC1 = 5 V, VEE = VE = GND, Cg = 10 nF, RF = 2.1 kΩ, CDESAT = 100 pF VCC2 = 30 V 2.0 1.5 15 V 1.0 0.5 0.0 10 20 30 40 50 DESAT Sense to 10% VO Delay tDESAT (10%) ( μ s) DESAT Sense to 10% VO Delay tDESAT (10%) (μs) PS9402 12.0 9.0 VCC1 = 5 V, VEE = VE = GND, RF = 2.1 kΩ, Rg = 10 Ω, CDESAT = 100 pF VCC2 = 30 V 6.0 15 V 3.0 0.0 0 10 20 30 40 50 Load Resistance Rg (Ω) Load Capacitance Cg (nF) OUTPUT VOLTAGE vs. SUPPLY VOLTAGE POWER CONSUMPTION PER CYCLE vs. LOAD RESISTANCE 14 10 8 UVLOHYS 6 4 2 0 0 VUVLO+ (12.6 V) VUVLO− (11.3 V) 5 10 15 20 Supply Voltage VCC2 – VEE (V) Power Consumption Per Cycle ESW ( μ J) 8 12 Output Voltage VO (V) DESAT SENSE TO 10% VO DELAY vs. LOAD CAPACITANCE IF = 10 mA, VEE = GND 7 6 5 Qg = 1 000 nC 4 3 Qg = 500 nC 2 1 0 0 Qg = 100 nC 10 20 30 40 50 Load Resistance Rg (Ω) Remark The graphs indicate nominal characteristics. R08DS0014EJ0100 Rev.1.00 Jun 22, 2012 Page 16 of 22 PS9402 Chapter Title TAPING SPECIFICATIONS (UNIT: mm) 2.0±0.1 4.0±0.1 1.75±0.1 Outline and Dimensions (Tape) φ 1.5+0.1 –0 4.5±0.1 φ 3.5 10.8±0.1 24±0.3 11.5±0.1 3.8±0.1 0.35 φ 1.55±0.1 16±0.1 10.9±0.1 Tape Direction PS9402-E3 Outline and Dimensions (Reel) 2.0±0.5 φ 21.0±0.8 φ 100±1.0 R 1.0 φ 330±2.0 2.0±0.5 φ13.0±0.2 25.5±1.0 29.5±1.0 Packing: 850 pcs/reel R08DS0014EJ0100 Rev.1.00 Jun 22, 2012 23.9 to 27.4 Outer edge of flange Page 17 of 22 PS9402 RECOMMENDED MOUNT PAD DIMENSIONS (UNIT: mm) C D B <R> Chapter Title A Part Number PS9402 Lead Bending lead bending type (Gull-wing) for surface mount R08DS0014EJ0100 Rev.1.00 Jun 22, 2012 A B C D 9.85 1.27 0.96 1.65 Page 18 of 22 PS9402 Chapter Title NOTES ON HANDLING 1. Recommended soldering conditions (1) Infrared reflow soldering • Peak reflow temperature • Time of peak reflow temperature • Time of temperature higher than 220°C • Time to preheat temperature from 120 to 180°C • Number of reflows • Flux 260°C or below (package surface temperature) 10 seconds or less 60 seconds or less 120±30 s Th ree Rosin flux containing small amount of chlorine (The flux with a maximum chlorine content of 0.2 Wt% is recommended.) Package Surface Temperature T (°C) Recommended Temperature Profile of Infrared Reflow (heating) to 10 s 260°C MAX. 220°C to 60 s 180°C 120°C 120±30 s (preheating) Time (s) (2) Wave soldering • Temperature • Time • Preheating conditions • Number of times • Flux 260°C or below (molten solder temperature) 10 seconds or less 120°C or below (package surface temperature) One (Allowed to be dipped in solder including plastic mold portion.) Rosin flux containing small amount of chlorine (The flux with a maximum chlorine content of 0.2 Wt% is recommended.) (3) Soldering by Soldering Iron • Peak Temperature (lead part temperature) 350°C or below • Time (each pins) 3 seconds or less • Flux Rosin flux containing small amount of chlorine (The flux with a maximum chlorine content of 0.2 Wt% is recommended.) (a) Soldering of leads should be made at the point 1.5 to 2.0 mm from the root of the lead (4) Cautions • Fluxes Avoid removing the residual flux with freon-based and chlorine-based cleaning solvent. 2. Cautions regarding noise Be aware that when voltage is applied suddenly between the photocoupler’s input and output at startup, the output transistor may enter the on state, even if the voltage is within the absolute maximum ratings. R08DS0014EJ0100 Rev.1.00 Jun 22, 2012 Page 19 of 22 PS9402 Chapter Title USAGE CAUTIONS <R> <R> 1. This product is weak for static electricity by designed with high-speed integrated circuit so protect against static electricity when handling. 2. Board designing (1) By-pass capacitor of more than 0.1 μF is used between VCC and GND near device. Also, ensure that the distance between the leads of the photocoupler and capacitor is no more than 10 mm. (2) When designing the printed wiring board, ensure that the pattern of the IGBT collectors/emitters is not too close to the input block pattern of the photocoupler. If the pattern is too close to the input block and coupling occurs, a sudden fluctuation in the voltage on the IGBT output side might affect the photocoupler’s LED input, leading to malfunction or degradation of characteristics. (If the pattern needs to be close to the input block, to prevent the LED from lighting during the off state due to the abovementioned coupling, design the input-side circuit so that the bias of the LED is reversed, within the range of the recommended operating conditions, and be sure to thoroughly evaluate operation.) 3. Make sure the rise/fall time of the forward current is 0.5 μs or less. 4. In order to avoid malfunctions, make sure the rise/fall slope of the VCC2 is 3 V/μs or less. 5. Avoid storage at a high temperature and high humidity. R08DS0014EJ0100 Rev.1.00 Jun 22, 2012 Page 20 of 22 PS9402 <R> Chapter Title SPECIFICATION OF VDE MARKS LICENSE DOCUMENT Parameter Symbol Climatic test class (IEC 60068-1/DIN EN 60068-1) Dielectric strength maximum operating isolation voltage Test voltage (partial discharge test, procedure a for type test and random test) Upr = 1.6 × UIORM., Pd < 5 pC Spec. Unit 40/110/21 UIORM Upr 1 130 1 808 Vpeak Vpeak Upr 2 119 Vpeak Highest permissible overvoltage UTR 8 000 Vpeak Comparative tracking index (IEC 60112/DIN EN 60112 (VDE 0303 Part 11)) CTI 175 Storage temperature range Tstg –55 to +125 °C Ris MIN. Ris MIN. 1012 11 10 Ω Ω Tsi Isi Psi 175 400 700 °C mA mW Ris MIN. 109 Ω Test voltage (partial discharge test, procedure b for all devices) Upr = 1.875 × UIORM., Pd < 5 pC Degree of pollution (DIN EN 60664-1 VDE0110 Part 1) Material group (DIN EN 60664-1 VDE0110 Part 1) Operating temperature range Isolation resistance, minimum value VIO = 500 V dc at TA = 25°C VIO = 500 V dc at TA MAX. at least 100°C Safety maximum ratings (maximum permissible in case of fault, see thermal derating curve) Package temperature Current (input current IF, Psi = 0) Power (output or total power dissipation) Isolation resistance VIO = 500 V dc at TA = Tsi R08DS0014EJ0100 Rev.1.00 Jun 22, 2012 TA 2 III a –40 to +110 °C Page 21 of 22 PS9402 Caution Chapter Title GaAs Products This product uses gallium arsenide (GaAs). GaAs vapor and powder are hazardous to human health if inhaled or ingested, so please observe the following points. • Follow related laws and ordinances when disposing of the product. If there are no applicable laws and/or ordinances, dispose of the product as recommended below. 1. Commission a disposal company able to (with a license to) collect, transport and dispose of materials that contain arsenic and other such industrial waste materials. 2. Exclude the product from general industrial waste and household garbage, and ensure that the product is controlled (as industrial waste subject to special control) up until final disposal. • Do not burn, destroy, cut, crush, or chemically dissolve the product. • Do not lick the product or in any way allow it to enter the mouth. R08DS0014EJ0100 Rev.1.00 Jun 22, 2012 Page 22 of 22 Revision History PS9402 Data Sheet Rev. Date Page Description Summary 0.01 1.00 May 09, 2011 Jun 22, 2012 − Throughout Throughout p.3 p.4 p.5 p.6 p.7 pp.8 to 11 pp.12 to 16 p.18 p.20 p.21 First edition issued Preliminary Data Sheet - > Data Sheet Safety standards approved Modification of BLOCK DIAGRAM Modification of MARKING EXAMPLE Modification of ABSOLUTE MAXIMUM RATINGS Modification of ELECTRICAL CHARACTERISTICS (DC) Modification of SWITCHING CHARACTERISTICS (AC) Modification of TEST CIRCUIT Addition of TYPICAL CHARACTERISTICS Addition of RECOMMENDED MOUNT PAD DIMENSIONS Modification of USAGE CAUTIONS Addition of SPECIFICATION OF VDE MARKS LICENSE DOCUMENT All trademarks and registered trademarks are the property of their respective owners. C-1