EM MICROELECTRONIC - MARIN SA AppNote 404 Application Note 404 Title: EM4095 Application Note Product Family: RFID Part Number: Keywords: Date: EM4095 RFID Transceiver, Reader Chip, EM4095 25 September 2002 TABLE OF CONTENT 1 2 3 4 5 6 7 8 Introduction....................................................................................................................................................................... 2 Operational Description .................................................................................................................................................... 3 2.1 Resonant circuit parameters...................................................................................................................................... 3 2.2 EM4095 architecture ................................................................................................................................................. 4 2.3 System performance evaluations .............................................................................................................................. 4 Design tips........................................................................................................................................................................ 5 3.1 Board design ............................................................................................................................................................. 5 3.2 Power supply stability ................................................................................................................................................ 5 3.3 Analog ground pin AGND .......................................................................................................................................... 5 3.4 Design of DEMOD_IN capacitive divider ................................................................................................................... 5 3.5 Maximum current on ANT driver outputs ................................................................................................................... 5 3.6 Signal MOD ............................................................................................................................................................... 5 3.7 Band pass filter tuning ............................................................................................................................................... 5 Calculating an example .................................................................................................................................................... 7 4.1 Reader antenna properties ........................................................................................................................................ 7 4.1.1 Reader antenna inductivity ................................................................................................................................. 7 4.1.2 Reader antenna resistance ................................................................................................................................ 7 4.1.3 Resonant capacitor ............................................................................................................................................ 7 4.1.4 Reader antenna current and voltage .................................................................................................................. 7 4.1.5 Reader antenna quality factor ............................................................................................................................ 7 4.2 Capacitor divider........................................................................................................................................................ 8 4.3 Real Resonant frequency: ......................................................................................................................................... 8 4.4 Sensitivity to reader antenna signal........................................................................................................................... 8 4.5 Power dissipation ...................................................................................................................................................... 8 4.6 Temperature .............................................................................................................................................................. 9 4.7 Signal damping.......................................................................................................................................................... 9 4.8 Band-pass filter tuning............................................................................................................................................... 9 Interfacing a read-only transponder: e.g. EM4100.......................................................................................................... 10 5.1 Microcontroller interface .......................................................................................................................................... 10 5.1.1 Sleep mode (SHD) ........................................................................................................................................... 10 5.1.2 Modulation (MOD) ............................................................................................................................................ 10 5.1.3 Ready and clock signal (RDY/CLK).................................................................................................................. 10 5.2 Command transmission (uplink) .............................................................................................................................. 10 5.3 Signal reception on DEMOD_IN .............................................................................................................................. 10 Interfacing a read/write transponder: e.g. EM4069 ......................................................................................................... 11 6.1 Microcontroller interface .......................................................................................................................................... 11 6.1.1 Sleep mode (SHD) ........................................................................................................................................... 11 6.1.2 Modulation (MOD) ............................................................................................................................................ 11 6.1.3 Ready and clock signal (RDY/CLK).................................................................................................................. 11 6.2 Command transmission (uplink) .............................................................................................................................. 11 6.3 Signal reception on DEMOD_IN .............................................................................................................................. 12 Interfacing a read/write transponder: e.g. EM4150 ......................................................................................................... 13 7.1 Microcontroller interfache ........................................................................................................................................ 13 7.1.1 Sleep mode (SHD) ........................................................................................................................................... 13 7.1.2 Modulation (MOD) ............................................................................................................................................ 13 7.1.3 Ready and clock signal (RDY/CLK).................................................................................................................. 13 7.2 Command transmission (uplink) .............................................................................................................................. 13 Schematic and PCB........................................................................................................................................................ 14 8.1 Schematic of the EM4095 demo board ................................................................................................................... 14 8.2 Printed Circuit Board (PCB) of the EM4095 demo board ........................................................................................ 14 Copyright 2002, EM Microelectronic-Marin SA 1 www.emmicroelectronic.com AppNote 404 1 Introduction This application note introduces the CMOS integrated transceiver circuit EM4095 for RFID applications working with transponders at a frequency of typically 125 kHz. The paper describes the interoperability with a read-only and a read/write transponder in specific examples. The application note offers helpful design guidelines. Firstly, an technical overview on the EM4095 is given. Secondly, the designer obtains practical design tips. Designing a typical reader circuit setup is shown by an th example in the 4 chapter. The following chapters explain the interoperability of the EM4095 with read-only and read/write transponders. Finally, EM Microelectronic-Marin SA offers a plug-andplay schematic for a typical reader setup using the EM4095. The corresponding PCB source files will be directly available from the homepage http://www.emmicroelectronic.com. • Data transmission by Amplitude Modulation with externally adjustable modulation index using single ended driver • Multiple transponder protocol compatibility (e.g. EM400X, EM4050, EM4150, EM4070, EM4170, EM4069) • Sleep mode 1µA • USB compatible power supply range • -40°C to +85°C temperature range • Small outline plastic package SO16 or PSOP2 16 RDY/CLK +5V LA CRES EM4095 Advantages CDV1 • low cost of external components • ensured operation in resonance • bigger area of reliable AM modulation • easier analyze and system design due to only two system variables • precise sampling positioning • simple to use • low power consumption CDV2 +5V 1 16 2 15 3 14 4 13 EM4095 5 12 6 11 7 10 8 9 CDC2 CFCAP SHD DEMOD_OUT MOD CAGND µP CDEC Figure 2: Typical operating configuration for read only mode SO16 VSS RDY/CLK DC2 FCAP ANT1 SHD DVDD DEMOD_OUT DVSS MOD ANT2 AGND VDD DEMOD_IN CDEC_IN CDEC_OUT Figure 1: Pin Assignement EM4095 features • Integrated PLL system to achieve self adaptive carrier frequency to antenna resonant frequency • No external quartz required • 100 kHz to 150 kHz carrier frequency range • Direct antenna driving using bridge drivers • Data transmission by OOK Modulation) using bridge driver (100% Copyright 2002, EM Microelectronic-Marin SA Amplitude 2 www.emmicroelectronic.com AppNote 404 2 Operational Description resonator system using one sampling point is not feasible, two channels with 90° shifted sampling points are needed (AM/FM). This leads to more expensive system which is also more complex to operate. A PLL system with one sampling point has also limitations for tolerance range of transponder and antenna. As a general rule can be notified; the higher the quality factors of the two resonant circuits are, the lower tolerances are acceptable (this is also true for a resonator system). An RFID system with air transponder coils is normally not problematic. For transponders with a Q lower than 15, a tolerance of ±5 kHz on the antenna and transponder side is acceptable. Transponders with ferrite core coils have usually higher quality factors (up to 40) and are therefore much more sensitive to tolerances. Technical background on how the EM4095 transceiver is operating is given in this chapter. 2.1 Resonant circuit parameters In RFID system where RF frequency is defined by resonator there are three variables (resonant frequency of antenna, resonant frequency of transponder and RF driving frequency). In system using PLL there are only two variables, since the resonant frequency of the antenna and the RF driving frequency are the same. The analysis shows that for a system having defined tolerances on antenna and transponder side the range where one demodulation chain (AM) with fixed sampling point can be used is much larger for PLL system. In fact taking in account technically achievable tolerances the VDD VSS SHD AGND to all blocks to all blocks BIAS & AGND to all blocks BIAS & AGND to all blocks SHORT DETECTION & READY DVDD LOCK FCAP LOOP FILTER VCO & SEQUENCER ANTENNA DRIVERS HOLD MOD DMOD_IN CDEC_OUT ANT1 ANT2 DVSS SYNCHRO SAMPLER RDY/CLK FILTER CDEC_IN COMPARATOR DMOD_OUT DC2 Figure 3: EM4095 Block Diagram Copyright 2002, EM Microelectronic-Marin SA 3 www.emmicroelectronic.com AppNote 404 2.2 EM4095 architecture The block diagram given in fig. 3 describes EM4095 architecture. The transmitting section integrates a PLL and a bridge driver that is formed by two push-pull drivers driven by two signals 180° phase shifted. The receiving section contains a synchronous demodulator (sampler) and a filtering chain. The chain achieves a band-pass-filtering function defined by two low-frequency zeroes, depending of Cdec and Cdc2 capacitors and a high frequency pole built-in, in the range of 10kHz. A B Trace A: CDC2=10nF, trace B: CDC2=6.8nF Figure 4: EM4095 filtering characteristics The filtering should be adapted according to the used transponder data-rate (e.g. 2 kbit/s). Refer to chapters 3.7 and 4.8 for more detailed information. 2.3 System performance evaluations EM will be glad helping you to design your 125 kHz RFID basestation using EM4095 front-end for your custom application. EM provides an Excel -sheet to calculate parameters of an RFID system using the EM4095. The file is available on the EM Microelectronic-Marin SA homepage: http://www.emmicroelectronic.com Copyright 2002, EM Microelectronic-Marin SA 4 www.emmicroelectronic.com AppNote 404 3 Design tips Reliability of a reader application using the EM4095 transceiver can be optimized following some basic design rules pointed out in this chapter. 3.1 Board design Pins DVDD and DVSS should be connected to VDD and VSS respectively. Care should be taken that voltage drops due to driver current which is flowing through pins DVDD and DVSS does not provoke voltage drops on VDD and VSS. The DVSS pin and DVDD pin should be blocked by a 100nF capacitor between the two pins as close as possible to the chip. This should prevent the supply spikes caused by the antenna drivers. Blocking of the analog supply pins VSS and VDD next to the chip is also advisable. Blocking capacitors are not included in the EM4095 application schematics. All capacitors related to pins DC2, AGND and DMOD_IN should be connected to the same VSS line, which should be connected directly to VSS pin of the chip. This VSS line should not be connected to other elements or be a part of "supply line" going to DVSS. The interconnecting lines to all the sensitive pins (listed above) must be as short as possible. This is also true for the VSS line to the blocking capacitors. The capacitive coupling from all "hot" lines specially the digital output DEMOD_OUT to the sensitive input pins DEMOD_IN, FCAP, CDEC, DC2 and AGND should be avoided. EM can provide a sample PCB with EM4095, power supply filter caps and caps on DEMOD_IN, FCAP, CDEC, DC2 and AGND already mounted. A PCB layout can also be found on EM MicroelectronicMarin SA homepage. http://www.emmicroelectronic.com/ 3.2 Power supply stability Since ANT drivers drive antenna with VDD and VSS power supply level it is clear that all variations and noise in power supply are directly fed to antenna resonant circuit. Any supply variation which will result in variation of antenna high voltage in mV region will result in reduced functionality or even malfunction of the system (transponder signal superimposed on antenna voltage is in the range of tens of mV). Special care has to be taken to filter low frequency noise in range up to 20 kHz since the transponder signal is in this frequency range. 3.3 Analog ground pin AGND The AGND capacitor can be increased from 220nF up to 1uF. The bigger capacitor value can slightly reduce the receive noise. The AGND voltage is filtered by external capacitor and internal resistor of 2kohms. from antenna high voltage point to DMOD_IN (CDV1) pin is then calculated from divider ratio. Additional capacitance of capacitive divider must be compensated by accordingly smaller resonant capacitor. 3.5 Maximum current on ANT driver outputs EM4095 is not limiting the current delivered by ANT drivers. Absolute maximum rating on these two outputs is 300 mA. Design of antenna resonant circuit connected to ANT drivers must be done in a way that maximum peak current of 250 mA is never exceeded. If quality of antenna is so high that this current might be exceeded, it has to be reduced by adding series resistor. As already mentioned in EM4095 datasheet [1] antenna driver current also defines the maximum operating temperature. Maximum peak current should be designed in a way that internal junction temperature does not exceed maximum junction temperature at maximum application ambient temperature. Based on maximum current and temperature range a choice of packaging has to be done. Low cost package SOIC 16 has Thermal Convection of 70 °C/W and PSOP has 30 °C/W with a special PCB layout (refer to EM4095 Data Sheet). 3.6 Signal MOD It is recommended to connect MOD to VSS in read-only applications. EM4095 has some built in test features, which are switched on when SHD and MOD pins are high. It is thus recommended that MOD pin is kept low while SHD is high. 3.7 Band pass filter tuning The reception filtering is done in two stages. The first stage zero is defined by external capacitor Cdec and internal resistor (100 kohms). The pole of the first stage is set internally to ~ 25 kHz. The second stage zero is defined by external capacitor Cdc2 and internal resistor. The pole of the second stage is defined internally to 12 kHz. This means that the reception poles can not be changed and the upper frequencies are limited by two stages filter having -3dB frequencies at 25 kHz and 12 kHz. The two stage zeroes can be changed (refer to chapter 4.8). The default settings should be at about Cdec = 100nF and Cdc2 = 10nF. This combination is more than sufficient to fulfill the sensitivity specification and to enable reliable operation. 3.4 Design of DEMOD_IN capacitive divider Capacitor divider should be designed in a way that parasitic capacitances (few pF of DMOD_IN pin, parasitics of PCB, …) do not influence divider ratio. Capacitor with value from 1 to 2 nF is proposed for connection from DMOD_IN pin to VSS (CDV2). Capacitor Copyright 2002, EM Microelectronic-Marin SA 5 www.emmicroelectronic.com AppNote 404 Increasing the Cdc2 capacitor (max. 22 nF) will in real application increase the receive sensitivity, specially if the Q of the transponder is high, which causes nonrectangular (sloped) receive input signal. A B Trace A: CDC2=10nF, trace B: CDC2=6.8nF Figure 5: Filtering characteristic as function of filter capactior Cdc2 Increasing the Cdc2 capacitor will increase the receive bandwidth what in consequence increases the receive gain for sloped signals. The advisable range for Cdc2 is from 6.8 nF to 22nF and Cdec from 33 nF to 220 nF. A higher capacitor value can increase the start-up time. A B CDC2=10nF: trace A: -30°C, trace B: 90°C Figure 6: Filtering characteristic as function of temperature Copyright 2002, EM Microelectronic-Marin SA 6 www.emmicroelectronic.com AppNote 404 4 Calculating an example The following example presents the EM4095 front-end using on-off-keying (OOK) communication protocol from the reader to transponder (uplink). Helpful equations can be found in [2]. They can be used for principal design, but the calculations have to be verified by measurement. Eventually the results have to be adjusted to compensate possible parasitics and second order effects. A reader system with a high Q antenna will be specified. The system will operate at CRES = 2.24 nF Remark: Until that point of the calculation, Cdv1 and Cdv2 effect is neglected, as they are not yet calculated. (see 4.4 for real resonant frequency value). 4.1.4 Reader antenna current and voltage By the given antenna driven in the bridge-driver configuration [1] and applying the equations f0 = 125 kHz I ANT ( peak ) = and ambient temperature range -40 to 85°C. 4.1 Reader antenna properties To design a low cost read/write (R/W) basestation using OOK communication protocol for the uplink communication, the configuration according to the chapter "Typical Operating Configuration" - fig. 2 - has been chosen [1]. 4.1.1 Reader antenna inductivity The antenna inductivity is usually chosen from within the range from 300 uH to 800 uH. In this example the following inductivity and quality factor have been selected Vdd − Vss 4 π R ANT + RSER + 2 R AD and V ANT ( peak ) = I ANT ( peak ) 2π . f o .C RES the current and the voltage at the reader antenna are (Rser=0): IANT(peak) = 315 mA VANT(peak) = 182 V To suite the maximum specifications at DEMOD_IN [1], the antenna voltage would have to be divided by nearly a factor of dC = 100. LA = 725 uH ± 1% QA = 40. 4.1.2 Reader antenna resistance The ohmic antenna resistance can be found by applying the formula R ANT 2πf 0 L A = QA RANT = 14.23 Ω Specified by [1], the antenna driver resistance and the power supply voltage of RAD = 3 Ω VDD - VSS = 5V will be used in following calculations. 4.1.3 Resonant capacitor System will operate at 125 kHz. The resonant capacitor CRES is calculated by C RES = 1 (2πf 0 ) 2 L A Copyright 2002, EM Microelectronic-Marin SA Decimating the antenna voltage ensures a proper demodulation of the received transponder data signal. Applying a serial resistor RSER to the resonance circuit can reduce the division factor dc. 4.1.5 Reader antenna quality factor Practical antenna circuit Q factors, in case full receiver chain is used, can be found between 10 and 15. Introducing a serial resistor RSER, will limit the high voltage by reducing the overall quality factor, without reducing reading distance. To conclude, the resonance circuit quality factor Q can be reduced by adding a serial resistor RSER. Reduced Q also improves recovery time after modulation, which is especially important for transponders with data rates at 32 and 40 periods per bit. Furthermore a lower antenna current will limit the junction temperature of the chip. The following calculations are based on a serial resistor of RSER = 33 Ω which has been calculated iteratively by using the equations from chapter 4.1.4. 7 www.emmicroelectronic.com AppNote 404 The resulting antenna current and voltage in resonance are more suitable IANT(peak)= 119.59 mA, VANT(peak) = 69.22 V. 4.3 Real Resonant frequency: A fine calculation of the resonant frequency should take into account the Cdv1 and Cdv2 capcitor as indicated in this formula: Co = C RES + 4.2 Capacitor divider The input signal at DEMOD_IN has to be limited by a division factor dC, to meet the EM4095 common mode range specifications [1]. This equivalent resonant capacitor value can be used to recalculate the resonant frequency f0: VDD –VSS Vsense f0 = VANT(pp) = 140 Vpp which is close to the calculated value. Regarding the common mode range at DEMOD_IN, the capacitor divider can be calculated taking the measured peak-peak voltage on antenna into account. dC < V Ant ( pp ) VDEMOD _ IN _ max VDMOD _ IN ( pp ) = V ANT ( pp ) VSense_ant = 28.05 mVPP on the reader antenna can be detected by the EM4095. 4.5 Power dissipation The power dissipation of the reader can be calculated by starting with the equation I ANT ( pp ) = V ANT ( pp ) ⋅ 2π ⋅ f 0 ⋅ C 0 dC = 35 IANT(peak) = 114 mA. Once the AC antenna current is found, IRMS can be calculated using equation CRES = 2.2 nF CDV1 = 47 pF CDV2 = 1.5 nF A tolerance class of ± 2 % is acceptable for the capacitors above. Together with a tolerance of ± 1 % of LA, an overall tolerance of ± 1.5 % on f0 can be specified. Copyright 2002, EM Microelectronic-Marin SA C DV 1 C DV 1 + C DV 2 Having a division factor dC = 33, as in the example and respecting the minimum sensitivity of 0.85 mVPP at DEMOD_IN [1] a minimum modulation of At VDEMOD_IN_PP = 4VPP a division factor of seems to be good choice, while such a division ratio can be done using standard capacitors. Recommended capacitor value of CDV2 is in the range of 1 nF to 2 nF. The following capacitors have been chosen: 1 2π L A .C0 4.4 Sensitivity to reader antenna signal Using parameter Vsense we can calculate sensitivity for transponder signal on antenna high voltage point. Figure 7: Decimated antenna signal at DEMOD_IN At this point a measurement was performed using elements described above. The resulting amplitude at the antenna was C DV 1 .C DV 2 C DV 1 + C DV 2 I RMS = I ANT ( peak ) 2 IRMS = 81 mA. To calculate the power dissipation, further parameters are of concern. Firstly, the maximum value of ANT driver resistor [1] 8 www.emmicroelectronic.com AppNote 404 RAD = 9 Ω and secondly, the maximum value of supply current, provided by the EM4095 [1] Adapting these coefficients can optimize the receiving sensitivity. For more detailed information refer to [2] and [3]. IDDon = 10 mA. Finally, the total power dissipation is calculated by P = 2 ⋅ I RMS 2 ⋅ R AD + I DDon (VDD − VSS ) P = 167 mW. 4.6 Temperature Worst case calculations on temperature increase on a low cost SOIC 16 case with RTh=70 °C/W [1] and P = 167 mW are performed using ∆T = P ⋅ RTh ∆T = 11.7 K. The maximum junction temperature Tj is specified to remain below 100°C [1]. The designer has to ensure proper functionality of the design. 4.7 Signal damping Since antenna voltage VAnt is approx. 140 VPP this corresponds to: LV = 20 ⋅ log LV = 20 ⋅ log V Ant VSense _ ant 140VPP = 74dB 28,05.10 −3VPP 4.8 Band-pass filter tuning As already mentioned in chapter 3.7, default settings for Cdec and Cdc2 can be used. Cdec = 100nF, Cdc2 = 10nF. The zero-transition frequency is given by fZ = 1 2 ⋅π ⋅ R ⋅ C and for the first zero frequency = 16 Hz @ Cdec = 100nF. For the second zero frequency = 1.5 kHz @ Cdc2 = 10nF. Copyright 2002, EM Microelectronic-Marin SA 9 www.emmicroelectronic.com AppNote 404 5 Interfacing a read-only transponder: e.g. EM4100 Basic concepts connecting the EM4095 to a microcontroller are pointed out in this chapter. A typical EM4095 setup to communicate with a read-only transponder (e.g. EM4100) is shown. 5.1 Microcontroller interface The microcontroller is connected to the EM4095 through a slim three-wire-interface using the signals SHD, RDY/CLK and DEMOD_OUT. RDY/CLK +5V LA CRES CDV1 +5V CDV2 1 16 2 15 3 14 4 13 5 EM4095 12 6 11 7 10 8 9 CDC2 CFCAP SHD DEMOD_OUT MOD CAGND The RDY signal is also available, when the antenna drivers are in off-state, which is forced by setting MOD = 1. 5.2 Command transmission (uplink) Since it is sufficient to generate a constant electromagnetic field to communicate with read-only transponders, the MOD pin is not connected to the microcontroller but is therefore fixed to VSS. 5.3 Signal reception on DEMOD_IN By following the calculation example (previous chapter) a decimated antenna signal should show a similar signal on your oscilloscope. The upper trace shows the DEMOD_OUT, while the lowest trace shows the transponder antenna signal. Traces: µP Ch1 DEMOD_OUT Ch2 Transponder antenna signal (measured with a spy coil) CDEC Antenna sensing point (ASP) Figure 8: Typical read-only setup 5.1.1 Sleep mode (SHD) The EM4095 can be put in sleep mode by applying VDD on the pin SHD. SHD is high active. The consumption in sleep mode is specified to only 1µA [1]. SHD = 1 SHD = 0 sleep mode operation mode 5.1.2 Modulation (MOD) By applying VDD on MOD, a modulation of 100 % is performed. MOD = 1 MOD = 0 Figure 9: Demodulated transponder signal and transponder antenna signal 100% of modulation no modulation The antenna current will be: I ANT ( peak ) = Vdd − Vss 4 π R ANT + RSER + 2 R AD See chapter 5.2 on how to control the electromagnetic field with the microcontroller. 5.1.3 Ready and clock signal (RDY/CLK) The RDY/CLK signal offers multiple functionality to observe either the EM4095 ready to run (RDY) or by sorting a synchronous signal (CLK) to the data on DEMOD_OUT. Copyright 2002, EM Microelectronic-Marin SA 10 www.emmicroelectronic.com AppNote 404 6 Interfacing a read/write transponder: e.g. EM4069 A typical EM4095 setup to communicate with a readwrite transponder (e.g. EM4069) is shown in this chapter. 6.1 Microcontroller interface The microcontroller is connected to the EM4095 through a slim interface using the signals SHD, RDY/CLK, MOD and DEMOD_OUT. The serial resistance RAM allows the specification of an individual modulation index mMOD. This features offers to communicate e.g. with the R/W transponder P4069. LA CRES CDV1 +5V 1 16 2 15 3 14 4 13 5 +5V CDV2 6.2 Command transmission (uplink) To generate a variable electromagnetic field, the MOD pin is connected to the microcontroller. Trace: RDY/CLK RAM 6.1.3 Ready and clock signal (RDY/CLK) The RDY/CLK signal offers multiple functionality to observe either the EM4095 ready to run (RDY) or by sorting a synchronous signal (CLK) to the data on DEMOD_OUT. The RDY signal is also available, when the antenna drivers are in off-state, which is forced by setting MOD = 1. EM4095 12 6 11 7 10 8 9 CDC2 CFCAP SHD DEMOD_OUT MOD CAGND Ch1 reader antenna signal Ch3 triggering signal Ch2 MOD signal µP CDEC Antenna sensing point (ASP) Figure 10: Typical R/W setup with specific modulation index 6.1.1 Sleep mode (SHD) The EM4095 can be put in sleep mode by applying VDD on the pin SHD. SHD is high active. The consumption in sleep mode is specified to only 1µA [1]. SHD = 1 SHD = 0 Figure 11: Reader antenna signal on uplink sleep mode operation mode 6.1.2 Modulation (MOD) By applying VDD on MOD, a modulation index is specified, by adding resistor RAM. At RAM = 0, a modulation of 100% will be achieved. MOD = 1 MOD = 0 modulation according to the modulation index mMOD no modulation The antenna current is specified by: I ANT = Vdd − Vss 2 π R ANT + R AM + RSER + 2 R AD For applications using read-only transponders, the MOD pin can be connected to VSS by default. Copyright 2002, EM Microelectronic-Marin SA 11 www.emmicroelectronic.com AppNote 404 6.3 Signal reception on DEMOD_IN By following the calculation example (previous chapter) a decimated antenna signal should show a similar signal on your oscilloscope. The upper trace shows the DEMOD_IN, while the lowest trace shows the demodulated transponder signal. Traces: Ch1 DEMOD_OUT Ch2 antenna signal (measured with a spy coil) Figure 12: Antenna signal and demodulated transponder data Copyright 2002, EM Microelectronic-Marin SA 12 www.emmicroelectronic.com AppNote 404 7 Interfacing a read/write transponder: e.g. EM4150 A typical EM4095 setup to communicate with a readwrite transponder (e.g. EM4150) is shown in this chapter. 7.1 Microcontroller interfache The microcontroller is connected to the EM4095 through a slim interface using the signals SHD, RDY/CLK, MOD and DEMOD_OUT. The RDY signal is also available, when the antenna drivers are in off-state, which is forced by setting MOD = 1. 7.2 Command transmission (uplink) To generate a variable electromagnetic field, the MOD pin is connected to the microcontroller. Traces: RDY/CLK +5V LA CRES CDV1 +5V CDV2 1 16 2 15 3 14 4 13 5 EM4095 12 6 11 7 10 8 9 R1 R2 R3 R4 Ch2 MOD DEMOD_OUT ANT1 RDY/CLK transponder antenna signal (measured with a spy coil) CDC2 CFCAP SHD DEMOD_OUT MOD CAGND µP CDEC Antenna sensing point (ASP) Figure 13: Typical R/W setup using brigdedriver configuration 7.1.1 Sleep mode (SHD) The EM4095 can be put in sleep mode by applying VDD on the pin SHD. SHD is high active. The consumption in sleep mode is specified to only 1µA [1]. SHD = 1 SHD = 0 Figure 14: Transmission and reception signal on the EM4095 sleep mode operation mode 7.1.2 Modulation (MOD) By applying VDD on MOD, a modulation of 100 % is performed. MOD = 1 MOD = 0 100% of modulation no modulation Since fig. 10 shows the bridge-driver configuration [1], the antenna current is specified by: I ANT ( peak ) = Vdd − Vss 4 π R ANT + RSER + 2 R AD 7.1.3 Ready and clock signal (RDY/CLK) The RDY/CLK signal offers multiple functionality to observe either the EM4095 ready to run (RDY) or by sorting a synchronous signal (CLK) to the data on DEMOD_OUT. Copyright 2002, EM Microelectronic-Marin SA 13 www.emmicroelectronic.com AppNote 404 8 Schematic and PCB designer's favourite microcontroller. As a special feature, the reader antenna is integrated on the PCB. The reading range is about 11 cm. The schematic and PCB files are also available from http://www.emmicroelectronic.com. The EM4095 demonstration board provided by EM Microelectronic-Marin SA offers plug-and-play capability for designers. All signals for control and reception are available on a connector. Control signals can either be generated by a pattern generator or by connecting the 8.1 Schematic of the EM4095 demo board Components: RDY/CLK R SER +5V LA CRES CDV1 +5V 1 16 2 15 3 14 4 5 13 EM4095 CDC2 CFCAP SHD DEMOD_OUT 12 6 11 7 10 8 9 MOD CAGND CDEC CDV2 CDC2 CFCAP CAGND CDEC CRES CDV1 CDV2 RSER LA 10 nF 10 nF 100 nF 100 nF 10 nF + 1 nF 100 pF + 47 pF 1 nF 15 Ω 120 µH VDD, DVDD IDC C1 (DVDD supply) C2 (DVDD supply) C4 (VDD supply) 5V ca. 90 mA 100 nF 3.3 µF 100 nF Figure 15: EM4095 basic reader schematic 8.2 Printed Circuit Board (PCB) of the EM4095 demo board Figure 16: EM4095 demo board with integrated antenna Copyright 2002, EM Microelectronic-Marin SA 14 www.emmicroelectronic.com AppNote 404 A. Notes EM Microelectronic-Marin SA cannot assume responsibility for use of any circuitry described other than circuitry entirely embodied in an EM Microelectronic-Marin SA product. EM Microelectronic-Marin SA reserves the right to change the circuitry and specifications without notice at any time. You are strongly urged to ensure that the information given has not been superseded by a more up-to-date version. © EM Microelectronic-Marin SA, 09/02, Rev. C Copyright 2002, EM Microelectronic-Marin SA 15 www.emmicroelectronic.com