1/4 Structure Silicon monolithic integrated circuit Product Power management switch IC Type BD2200GUL Feature Single channel of low on resistance (Typ = 100mΩ) N-channel MOSFET built in Reverse-current protection when power switch off （Under operating conditions） Output discharge circuit ◇Absolute maximum ratings (Ta=25℃) Parameter Symbol Rating Unit Supply voltage VDD -0.3 ～ 6.0 V VIN voltage VIN -0.3 ～ 6.0 V EN voltage VEN -0.3 ～ VDD + 0.3 V VOUT voltage VOUT -0.3 ～ 6.0 V Storage temperature TSTG -55 ～ 150 ℃ Pd 575*1 mW Power dissipation *1 Mounted on 50mm * 58mm * 1.75mm glass-epoxy PCB. Derating: 4.6mW/℃ above Ta = 25℃. * This product is not designed for protection against radioactive rays. ◇Operating conditions Parameter Switch input voltage Operating temperature Output current Symbol MIN TYP MAX Unit VIN 2.7 3.3 5.5 V TOPR -25 25 85 °C ILO 0 - 500 mA REV. B 2/4 ◇Electric characteristics (Unless otherwise specified, VIN = 3.3V, Ta = 25°C ) Limits Parameter Symbol Unit MIN TYP MAX Condition Operating current IDD - 20 30 μA VEN = 1.2V Standby current ISTB - 0.01 1 μA VEN = 0V VENH 1.2 - - V High level input VENL - - 0.4 V Low level input EN input current IEN -1.0 - 1.0 μA VEN = 0V or VEN = 1.2V ON resistance RON - 100 200 mΩ IOUT = 500mA Switch leakage current ILEAK - 0.01 1 μA VEN = 0V, VOUT = 0V Output turn on rise time TON1 - 1.0 2.0 ms Output turn on time TON2 - 1.2 2.4 ms Output turn off fall time TOFF1 - 2.5 5 μs Output turn off time TOFF2 - 4.5 9 μs Discharge ON resistance RDISC - 70 110 Ω IOUT = -1mA, VEN = 0V Discharge current IDISC - 15 20 mA VOUT = 3.3V, VEN = 0V EN input voltage ◇ ◇ Switch output turn ON/OFF timing VEN 50% Test circuit 50% TON2 VIN TOFF2 90% 90% VEN VOUT 10% TON1 RL = 10Ω VOUT :10% → 90% RL = 10Ω VEN High → VOUT 90% RL = 10Ω VOUT :90% → 10% RL = 10Ω VEN Low → VOUT 10% 10% TOFF1 REV. B VIN VOUT VIN VOUT EN GND CL RL 3/4 ◇Block diagram ◇Pin number, Pin name VIN VOUT charge pump PIN number Pin Name A3 GND Ground B2, B3 VOUT Switch output A1, B1 VIN Switch input A2 EN Enable input GND EN ◇Package outline A B A Lot No. VCSP50L1 (Unit: mm) REV. B Description 4/4 ○Cautions on use (1) Absolute Maximum Ratings An excess in the absolute maximum ratings, such as supply voltage, temperature range of operating conditions, etc., can break down devices, thus making impossible to identify breaking mode such as a short circuit or an open circuit. If any special mode exceeding the absolute maximum ratings is assumed, consideration should be given to take physical safety measures including the use of fuses, etc. (2) Power supply and GND line Design PCB pattern to provide low impedance for the wiring between the power supply and the GND lines. Pay attention to the interference by common impedance of layout pattern when there are plural power supplies and GND lines. Especially, when there are GND pattern for small signal and GND pattern for large current included the external circuits, separate each GND pattern. Furthermore, for all power supply terminals to ICs, mount a capacitor between the power supply and the GND terminal. At the same time, in order to use a capacitor, thoroughly check to be sure the characteristics of the capacitor to be used present no problem including the occurrence of capacity dropout at a low temperature, thus determining the constant. (3) GND voltage Make setting of the potential of the GND terminal so that it will be maintained at the minimum in any operating state. Furthermore, check to be sure no terminals are at a potential lower than the GND voltage including an actual electric transient. (4) Short circuit between terminals and erroneous mounting In order to mount ICs on a set PCB, pay thorough attention to the direction and offset of the ICs. Erroneous mounting can break down the ICs. Furthermore, if a short circuit occurs due to foreign matters entering between terminals or between the terminal and the power supply or the GND terminal, the ICs can break down. (5) Operation in strong electromagnetic field Be noted that using ICs in the strong electromagnetic field can malfunction them. (6) Input terminals In terms of the construction of IC, parasitic elements are inevitably formed in relation to potential. The operation of the parasitic element can cause interference with circuit operation, thus resulting in a malfunction and then breakdown of the input terminal. Therefore, pay thorough attention not to handle the input terminals, such as to apply to the input terminals a voltage lower than the GND respectively, so that any parasitic element will operate. Furthermore, do not apply a voltage to the input terminals when no power supply voltage is applied to the IC. In addition, even if the power supply voltage is applied, apply to the input terminals a voltage lower than the power supply voltage or within the guaranteed value of electrical characteristics. (7) External capacitor In order to use a ceramic capacitor as the external capacitor, determine the constant with consideration given to a degradation in the nominal capacitance due to DC bias and changes in the capacitance due to temperature, etc. (8) Thermal design Perform thermal design in which there are adequate margins by taking into account the power dissipation (PD) in actual states of use. REV. B Notice Notes No copying or reproduction of this document, in part or in whole, is permitted without the consent of ROHM Co.,Ltd. The content specified herein is subject to change for improvement without notice. The content specified herein is for the purpose of introducing ROHM's products (hereinafter "Products"). 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