EP3003 Revision History Revision 0.1 (Apr. 2006) - First release. Revision 0.2 (Feb. 2008).. - Modify ordering infomation.(page 2) Revision 0.3 (Apr. 2008).. - Update currently version “not supported burst mode" information. - Modify Typical Performance Characteristics without burst mode (page 5) Rev.03 1 EP3003 2-CH, 600mA Synchronous Step-down Converter DESCRIPTION FEATURES The EP3003 is a dual channel, 1.5MHz constant ‧ High Efficiency: Up to 96% frequency, slope compensated current mode PWM ‧ 1.5MHz Constant Switching Frequency step-down converter. The EP3003 can supply ‧ 600mA Output Current 600mA of load current from a 2.5V to 5.5V input ‧ Integrated Main Switch and Synchronous voltage. Each output voltage is adjustable from Rectifier 0.6V to 5V. It is ideal for powering portable ‧ High Switch Current: 1A on Each Channel equipment that runs from a single cell lithium-Ion ‧ 2.5V to 5.5V Input Voltage Range (Li+) battery. Internal synchronous 0.35Ω, 1A ‧ Output Voltage as Low as 0.6V power switches provide high efficiency without the ‧ 100% Duty Cycle in Dropout need for external Schottky diodes. The EP3003 ‧ Low Quiescent Current: 50µA can also run at 100% duty cycle for low dropout ‧ Slope Compensated Current Mode Control for operation, extending battery life in portable Excellent Line and Load Transient Response system. Pulse Skipping Mode operation at light ‧ Can be synchronized to an external oscillator loads provides very low output ripple voltage for ‧ Short Circuit Protection noise sensitive applications. ‧ Power-on Reset Output APPLICATIONS ‧ Cellular and Smart Phones ‧ Microprocessors and DSP Core Supplies ‧ Thermal Fault Protection ‧ <1uA Shutdown Current ‧ Small Thermally Enhanced 10-Pin MSOP and 3mm × 3mm DFN Packages ‧ Wireless and DSL Modems ‧ PDAs ‧ Portable Instruments / Media Players ‧ Digital Cameras ‧ PC Cards Typical Application Figure 1. Basic Application Circuit for 2.5V and 1.8V Output Voltages Rev.03 2 EP3003 Package/Order Information MSOP: DFN: Ordering Information Absolute Maximum Rating (Note1) Input Supply Voltage........ ...................... -0.3V to +6V RUN, VFB Voltages ................. ..... -0.3V to VIN+0.3V SW Voltages............................…....-0.3V to VIN+0.3V MODE/SYNC Voltages....................-0.3V to VIN+0.3V /POR Voltages..................... ....…... ...... -0.3V to +6V P-Channel Switch Source Current (DC).….......800mA N-Channel Switch Sink Current (DC).....……....800mA Operating Temperature Range............ -40°C to +85°C Junction Temperature……….............................+125°C Storage Temperature Range (MSOP) -65°C to +150°C Storage Temperature Range (DFN) .. -65°C to +125°C Lead Temperature (Soldering, 10s) ............…..+300°C Note 1. Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Rev.03 3 EP3003 Electrical Characteristics (Note 2) : (VIN =VRUN= 3.6V, TA = 25°C, unless otherwise noted.) Parameter Conditions Input Voltage Range MIN TYP 2.5 MAX unit 5.5 V Input DC Supply Current Active Mode VFB=0.5V 600 800 µA Shutdown Mode RUN=0V, VIN=5.5V, MODE/SYNC=0V 0.1 1.0 µA Regulated Feedback Voltage TA = +25°C 0.588 0.600 0.612 V TA= 0°C ≦ TA ≦ 85°C 0.586 0.600 0.613 V TA= -40°C ≦ TA ≦ 85°C 0.582 0.600 0.618 V 30 nA 0.5 %/V VFB Input Bias Current Reference Voltage 0.3 VIN = 2.5V to 5.5V Line Regulation Power-On Reset Threshold: (POR) VFBX Ramping Up, MODE/SYNC = 0V 8.5 % VFBX Ramping Down, MODE/SYNC = -8.5 % 0V Power-On Reset On-Resistance 100 Power-On Reset Delay Output Voltage Load 200 Ω 270K Cycles 0.5 % Regulation Peak Inductor Current VIN=3V, VFB=0.5V 0.75 1.00 1.25 A 1.2 1.5 1.8 MHz Duty Cycle < 35% Oscillator Frequency VFBX =0.6V Synchronization 1.5 MHz Frequency RDS(ON) SW Leakage Top Switch On-Resistance 0.35 0.45 Ω Bottom Switch On-Resistance 0.30 0.45 Ω VRUN = 0V, VFBX= 0V, 0.01 1 µA 1.0 1.50 V ±0.01 ±1 µA VIN = 5V RUN Threshold -40°C ≦ TA ≦ 85°C RUN Leakage Current 0.3 Note 2. 100% production test at +25°C. Specifications over the temperature range are guaranteed by design and characterization. Rev.03 4 EP3003 Typical Performance Characteristics (TBD) Rev.03 5 EP3003 Functional Block Diagram Rev.03 6 EP3003 Pin Description PIN NAME FUNCTION 1 VFB1 Output Voltage Feedback Pin. An internal resistive divider divides the output voltage down for comparison to the internal reference voltage. Nominal voltage for this pin is 0.6V. 2 RUN1 Regulator 1 Enable control input. Forcing this pin to VIN enables regulator 1, while forcing it to GND causes regulator 1 to shut down. In shutdown, all functions are disabled drawing <1µA supply current. Do not leave RUN floating. 3 VIN 4 SW1 Main Power Supply. Must be closely decoupled to GND with a ceramic capacitor. Regulator 1 Power Switch Output. Switch Node Connection to the Inductor. This pin swings from VIN to GND. 5 GND 6 Mode/Sync Ground Combination of Mode Selection and Oscillator Synchronization. This pin controls the operation of the device. When tied to VIN or GND, Burst Mode operation or pulse skipping mode is selected, respectively. Do not float this pin. The oscillation frequency can be synchronized to an external oscillator applied to this pin and pulse skipping mode is automatically selected. ( Current version “Burst Mode” is not supported ) 7 SW2 Regulator 2 Power Switch Output. Switch Node Connection to the Inductor. This pin swings from VIN to GND. 8 /POR Power-On Reset. This common-drain logic output is pulled to GND when the output voltage is not within ±8.5% of regulation and goes high after 175ms when both channels are within regulation. 9 RUN2 Regulator 2 Enable control input. Forcing this pin to VIN enables regulator 2, while forcing it to GND causes regulator 2 to shut down. 10 VFB2 11 Power Connect to the (–) terminal of COUT, and (–) terminal of CIN. Must be soldered to Ground electrical ground on PCB. Output Voltage Feedback Pin for Regulator 2. See VFB1 section. Rev.03 7 EP3003 OPERATION The EP3003 uses current mode architecture with frequency set at 1.5MHz and can be synchronized to an external oscillator. Both channels share the same clock and run in-phase. To suit a variety of applications, the selectable Mode pin allows the user to trade-off noise for efficiency. Output voltage is set by an external divider returned to the VFB pins. An error amplifier compares the divided output voltage with a reference voltage of 0.6V and adjusts the peak inductor current accordingly. Over voltage and under voltage comparators will pull the POR output low if the output voltage is not within ±8.5%. The POR output will go high after 270K clock cycles of achieving regulation. During normal operation, the top power switch (P-channel MOSFET) is turned on at the beginning of a clock cycle when the VFB voltage is below the reference voltage. The current into the inductor and the load increases until the current limit is reached. The switch turns off and energy stored in the inductor flows through the bottom switch (N-channel MOSFET) into the load until the next clock cycle. The peak inductor current is controlled by the internally compensated ITH voltage, which is the output of the error amplifier. This amplifier compares the VFB pin to the 0.6V reference. When the load current increases, the VFB voltage decreases slightly below the reference. This decrease causes the error amplifier to increase the ITH voltage until the average inductor current matches the new load current. The main control loop is shut down by pulling the RUN pin to ground. Low Current Control Pulse skipping mode is available to control the operation of the EP3003 at low currents. For lower ripple noise at low currents, the pulse skipping mode can be used. In this mode, the EP3003 continues to switch at a constant frequency down to very low currents, where it will begin skipping pulses. Rev.03 8 EP3003 Dropout Operation The EP3003 allows the main switch to remain on for more than one switching cycle and increases the duty cycle until it reaches 100%. The output voltage then is the input voltage minus the voltage drop across the main switch and the inductor. At low input supply voltage, the RDS(ON) of the P Channel MOSFET increases, and the efficiency of the converter decreases. Caution must be exercised to ensure the heat dissipated not to exceed the maximum junction temperature of the IC. Note 3. The duty cycle D of a step-down converter is defined as: D = TON x fOSC x 100% ≈ VOUT/VIN x 100% where TON is the main switch on time, and fOSC is the oscillator frequency (1.5MHz). Maximum Load Current The EP3003 will operate with input supply voltage as low as 2.5V, however, the maximum load current decreases at lower input due to large IR drop on the main switch and synchronous rectifier. The slope compensation signal reduces the peak inductor current as a function of the duty cycle to prevent sub-harmonic oscillations at duty cycles greater than 50%. Conversely the current limit increases as the duty cycle decreases. APPLICATIONS INFORMATION A general application circuit for EP3003 is shown in Figure 1, which is the baseline for some calculation mentioned below. All external component selection for EP3003 application design will be illustrated as the following. Setting the Output Voltage The external resistor sets the output voltage according to the following equation: R2 ⎞ ⎛ V out = 0 . 6V ⎜ 1 + ⎟ R1 ⎠ ⎝ R1 = 150KΩ; R2 = 300KΩ for VOUT = 1.8V; R3 = 100KΩ; R4 = 330KΩ for VOUT = 2.5V. Rev.03 9 EP3003 Inductor Selection For most designs, the EP3003 operates with inductors of 1µH to 4.7µH. Low inductance values are physically smaller but require faster switching, which results in some efficiency loss. Large value inductors lower ripple current and small value inductors result in high ripple currents. The inductor value can be derived from the following equation: L= VOUT × (VIN − VOUT ) VIN × ∆I L × f OSC where ∆I L is inductor Ripple Current. Choose inductor ripple current approximately 35% of the maximum load current 600mA, or 210mA. For output voltages above 2.0V, when light-load efficiency is important, the minimum recommended inductor is 2.2µH. For optimum voltage-positioning load transients, choose an inductor with DC series resistance in the 50mΩ to 150mΩ range. For higher efficiency at heavy loads (above 200mA), or minimal load regulation (but some transient overshoot), the resistance should be kept below 100mΩ. The DC current rating of the inductor should be at least equal to the maximum load current plus half the ripple current to prevent core saturation (600mA+105mA). Table 1 lists some typical surface mount inductors that meet target applications for the EP3003. Part # L (µH) Max DCR (m.) Rated D.C. Current (A) Sumida 1.4 56.2 2.52 CR43 2.2 71.2 1.75 3.3 86.2 1.44 4.7 108.7 1.15 Sumida 1.5 CDRH4D18 2.2 75 1.32 3.3 110 1.04 4.7 162 0.84 Toko 1.5 120 1.29 D312C 2.2 140 1.14 3.3 180 0.98 4.7 240 0.79 Rev.03 Size WxLxH (mm) 4.5x4.0x3.5 4.7x4.7x2.0 3.6x3.6x1.2 10 EP3003 Input Capacitor Selection The input capacitor reduces the surge current drawn from the input and switching noise from the device. The input capacitor impedance at the switching frequency shall be less than input source impedance to prevent high frequency switching current passing to the input. A low ESR input capacitor sized for maximum RMS current must be used. Ceramic capacitors with X5R or X7R dielectrics are highly recommended because of their low ESR and small temperature coefficients. A 10µF ceramic capacitor for most applications is sufficient. Output Capacitor Selection The output capacitor is required to keep the output voltage ripple small and to ensure regulation loop stability. The output capacitor must have low impedance at the switching frequency. Ceramic capacitors with X5R or X7R dielectrics are recommended due to their low ESR and minimization of large temperature and voltage coefficients. The output ripple ∆VOUT ≤ ∆VOUT is determined by: ⎞ VOUT × (VIN − VOUT ) ⎛ 1 ⎟ × ⎜⎜ ESR + VIN × f OSC × L 8 × f OSC × C 3 ⎟⎠ ⎝ Rev.03 11 EP3003 Package Description DFN: Rev.03 12 EP3003 MSOP: Rev.03 13