REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Changed the maximum Operating Supply Current and Enable Supply Current parameters of Table I for radiation level. ksr. 98-10-02 Raymond Monnin B Removed references to device class M. Updated document to reflect current MIL-PRF-38535 requirements. glg 13-08-21 Charles F. Saffle REV SHEET REV B B B B B SHEET 15 16 17 18 19 REV STATUS REV B B B B B B B B B B B B B B OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Jeff Bowling STANDARD MICROCIRCUIT DRAWING COLUMBUS, OHIO 43218-3990 CHECKED BY http://www.landandmaritime.dla.mil Jeff Bowling APPROVED BY THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE AMSC N/A DLA LAND AND MARITIME Raymond Monnin DRAWING APPROVAL DATE 97-10-20 REVISION LEVEL B MICROCIRCUIT, MEMORY, DIGITAL, CMOS/SOS, RADIATION HARDENED, 64K X 1 STATIC RAM, MONOLITHIC SILICON SIZE CAGE CODE A 67268 SHEET DSCC FORM 2233 APR 97 1 OF 5962-95822 19 5962-E476-13 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device class Q) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 │ │ │ Federal stock class designator F │ │ │ RHA designator (see 1.2.1) 95822 \ 01 │ │ │ Device type (see 1.2.2) Q │ │ │ Device class designator (see 1.2.3) / X │ │ │ Case outline (see 1.2.4) C │ │ │ Lead finish (see 1.2.5) \/ Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type 01 Generic number 1/ 65643ARH Circuit function Access time 64K X 1 Radiation hardened CMOS/SOS SRAM 50 ns 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Q or V Device requirements documentation Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter X Descriptive designator Terminals Package style See figure 1 24 Flat pack 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V. 1.3 Absolute maximum ratings. 2/ Supply voltage range ................................................................. Input, output, or I/O voltage ....................................................... Maximum package power dissipation (PD) at TA = +125°C ........ Lead temperature (soldering, 10 seconds maximum) ................ Thermal resistance, junction-to-case (θJC): ................................ Thermal resistance, junction-to-ambient (θJA): ........................... Junction temperature (TJ) .......................................................... Storage temperature range ........................................................ 1/ 2/ 3/ -0.5 V to +7.0 V dc -0.3 V dc to VDD +0.3 V dc 0.78 W 3/ +300°C 8.8°C/W 64.0°C/W +175°C -65°C to +150°C Generic numbers are listed on the Standard Microcircuit Drawing Source Approval Bulletin at the end of this document and will also be listed in QML-38535 and MIL-HDBK-103 (see 6.6 herein). Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. If device power exceeds package dissipation capability, provide heat sinking or derate linearly (the derating is based on θJA) at the following rate: case outline X - - - 15.6 mW/°C. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-95822 A REVISION LEVEL B SHEET 2 1.4 Recommended operating conditions. Supply voltage (VDD) .................................................................. Ground voltage (GND) ............................................................... Input high voltage (VIH) .............................................................. Input Low voltage (VIL) ............................................................... Case operating temperature range (TC) ..................................... Data retention supply voltage .................................................... Input rise and fall time ................................................................ 1.5 Radiation features. Radiation features: Total dose irradiation ............................................................. Dose rate upset (20 ns pulse) ................................................ Dose rate survivability ........................................................... Single event phenomenon (SEP) effective linear energy threshold (LET) with no upsets ............................................ Latchup .................................................................................. Cosmic ray upset immunity ..................................................... +4.5 V dc to +5.5 V dc 0.0 V dc 0.8VDD to VDD 0.0 V dc to 0.2VDD -55°C to +125°C 2.0 V dc minimum 5 ns maximum > 300 KRads(Si) 11 > 1 x 10 Rads(Si)/sec 4/ 12 > 1 x 10 Rads(Si)/sec 4/ 2 > 100 MeV/(cm /mg) 4/ None 4/ -10 < 1 x 10 errors/bit-day 4/ 5/ 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 MIL-STD-1835 - Test Method Standard Microcircuits. Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 MIL-HDBK-780 - List of Standard Microcircuit Drawings. Standard Microcircuit Drawings. (Copies of these documents are available online at http://quicksearch.dla.mil/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Non-Government publications. The following document(s) form a part of this document to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation. AMERICAN SOCIETY FOR TESTING AND MATERIALS (ASTM) ASTM Standard F1192-00 - Standard Guide for the Measurement of Single Event Phenomena from Heavy Ion Irradiation of Semiconductor Devices. (Applications for copies of ASTM publications should be addressed to: ASTM International, PO Box C700, 100 Barr Harbor Drive, West Conshohocken, PA 19428-2959; http://www.astm.org.) 4/ Guaranteed by process or design, but not tested. 5/ Single event upset error rates are obtained using Adams 10% worst case environment under worst case conditions. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-95822 A REVISION LEVEL B SHEET 3 JEDEC INTERNATIONAL (JEDEC) JESD 78 - IC Latch-Up Test. th (Applications for copies should be addressed to JEDEC Solid State Technology Association, 3103 North 10 Street, Suite 240-S, Arlington, VA 22201-2107; http://www.jedec.org.) (Non-Government standards and other publications are normally available from the organizations that prepare or distribute the documents. These documents also may be available in or through libraries or other informational services.) 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturer's Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V. 3.2.1 Case outline(s). The case outline(s) shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table(s). The truth table shall be as specified on figure 2. 3.2.4 Radiation exposure circuit. The radiation exposure circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing and acquiring activity upon request. 3.2.5 Functional tests. Functional tests used to test this device shall be maintained under document revision level control by the manufacturer and shall be made available to the preparing or acquiring activity upon request. For device classes Q and V alternate test patterns shall be under the control of the device manufacturer's Technology Review Board (TRB) in accordance with MIL-PRF-38535 and shall be made available to the preparing or acquiring activity upon request. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table IIA. The electrical tests for each subgroup are defined in table I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturer's PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the "5962-" on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a "QML" or "Q" as required in MIL-PRF-38535. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). The certificate of compliance submitted to DLA Land and Maritime-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturer's product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 shall be provided with each lot of microcircuits delivered to this drawing. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-95822 A REVISION LEVEL B SHEET 4 4. VERIFICATION 4.1 Sampling and inspection. For device classes Q and V, sampling and inspection procedures shall be in accordance with MIL-PRF-38535 or as modified in the device manufacturer's Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. 4.2 Screening. For device classes Q and V, screening shall be in accordance with MIL-PRF-38535, and shall be conducted on all devices prior to qualification and technology conformance inspection. 4.2.1 Additional criteria for device classes Q and V. a. The burn-in test duration, test condition and test temperature, or approved alternatives shall be as specified in the device manufacturer's QM plan in accordance with MIL-PRF-38535. The burn-in test circuit shall be maintained under document revision level control of the device manufacturer's Technology Review Board (TRB) in accordance with MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883. b. Interim and final electrical test parameters shall be as specified in table IIA herein. c. Additional screening for device class V beyond the requirements of device class Q shall be as specified in MIL-PRF-38535, appendix B. 4.3 Qualification inspection for device classes Q and V. Qualification inspection for device classes Q and V shall be in accordance with MIL-PRF-38535. Inspections to be performed shall be those specified in MIL-PRF-38535 and herein for groups A, B, C, D, and E inspections (see 4.4.1 through 4.4.4). 4.4 Conformance inspection. Technology conformance inspection for classes Q and V shall be in accordance with MILPRF-38535 including groups A, B, C, D, and E inspections and as specified. 4.4.1 Group A inspection. a. Tests shall be as specified in table IIA herein. b. Subgroups 5 and 6 of table I of method 5005 of MIL-STD-883 shall be omitted. c. Subgroup 4 (CIN and CI/O measurements) shall be measured only for initial qualification and after any process or design changes which may affect input or output capacitance. Capacitance shall be measured between the designated terminal and GND at a frequency equal or less than 1 MHz. Sample size is 5 devices with no failures, and all input and output terminals tested. d. For device classes Q and V, subgroups 7, 8A, and 8B shall include verifying the functionality of the device. 4.4.2 Group C inspection. The group C inspection end-point electrical parameters shall be as specified in table IIA herein. 4.4.2.1 Additional criteria for device classes Q and V. The steady-state life test duration, test condition and test temperature, or approved alternatives shall be as specified in the device manufacturer's QM plan in accordance with MILPRF-38535. The test circuit shall be maintained under document revision level control by the device manufacturer's TRB in accordance with MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1005 of MIL-STD-883. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-95822 A REVISION LEVEL B SHEET 5 TABLE I. Electrical performance characteristics. Test Symbol High level output voltage VOH1 Conditions -55°C < TC < +125°C 4.5 V < VDD < 5.5 V unless otherwise specified Input leakage current VOL IIN High impedance output leakage current IOZ 1, 2, 3 1 M through F VDD = 4.5 V, IOL = 8 mA VIN = GND or VDD M through F VDD = 5.5 V VIN = GND or VDD 1 1 01 3/ 3/ 1, 3 -10 10 4/ -20 20 -60 60 -10 10 2/ 2/ 26.5 3 28.5 2/ µA 500 4/ E = VDD 4 01 2 1 2/ 10 21.5 4/ 21.5 01 2 1 25.5 2/ 30 1 01 2 1 1 mA 4 2/ 1,2,3 M through F µA 50 4/ E = VDD mA 24.5 1, 3 VDD = 5.5V, IOUT = 0 mA VIN = GND or VDD mA 13 1 E = VDD VDR mA 32 1, 3 M through F Data retention voltage µA 23.5 2 1 M through F IDDDR µA 25.5 3 Data retention current V 3/ 01 VDD = 5.5V, IOUT = 0 mA VIN = GND or VDD IDDEN 0.4 4/ E = GND, IOUT = 0 mA M through F Enable supply current 01 1 VDD = 5.5V, IOUT = 0 mA VIN = GND or VDD IDDSB V 1 1 M through F Standby supply current VDD -0.4 3/ 2 VDD = 5.5 V, f = 2 MHz VIN = GND or VDD IDDOP 01 01 M through F Operating supply current 5/ V -1 1 VDD = 5.5 V, VIN = VDD or GND, VOUT = GND or VDD, E = V DD Max 3/ 2/ 1, 2, 3 Unit 2.4 2/ 1, 2, 3 M through F 01 2/ 1, 2, 3 VDD = 4.5 V, IOH = -100 µA VIN = GND or VDD Low level output voltage M through F Limits 1/ Device type Min VDD = 4.5 V, IOH = -8.0 mA VIN = GND or VDD VOH2 Group A subgroups 6 01 2/ 2.0 V 3/ See footnotes at end of table. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-95822 A REVISION LEVEL B SHEET 6 TABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions -55°C < TC < +125°C 4.5 V < VDD < 5.5 V unless otherwise specified Group A subgroups Device type Limits 1/ Min Unit Max Input capacitance 6/ CIN VDD = open, f = 1.0 MHz, see 4.4.1c 4 01 10 pF I/O capacitance 6/ CI/O VDD = open, f = 1.0 MHz, see 4.4.1c 4 01 10 pF Functional tests FT see 4.4.1d, VDD = 4.5 V and 5.5 V, f = 1 MHz, VIN = GND or VDD M through F 7,8A,8B VDD = 4.5 V, f = 1 MHz, VIH = 0.8VDD, M through F 7,8A,8B Noise immunity functional test FN 01 7 VIL = 0.2VDD Read/write cycle 6/ tAVAX 7 see figure 3, VDD = 4.5 V 8/ tAVQV see figure 3, VDD = 4.5 V 8/ tAXQX see figure 3, VDD = 4.5 V 8/ Chip enable to output active 6/ tELQV see figure 3, VDD = 4.5 V 8/ see figure 3, VDD = 4.5 V 8/ Address setup time tEHQZ see figure 3, VDD = 4.5 V 8/ see figure 3, VDD = 4.5 V 8/ 9 9 9 9 9 see figure 3, VDD = 4.5 V 8/ 9 9 ns 01 50 2/ ns 3/ 01 2/ 0 ns 3/ 01 50 2/ ns 3/ 01 2/ 0 ns 3/ 01 15 2/ ns 3/ 01 2/ 5 ns 3/ 9,10,11 M through F 50 3/ 9,10,11 M through F tAVWL 2/ 9,10,11 M through F tAVEL 9 01 9,10,11 M through F Chip enable to output in high-Z 6/ 3/ 9,10,11 M through F tELQX 2/ 9,10,11 M through F Chip enable access time 01 9,10,11 M through F Output hold from address 6/ 3/ 9,10,11 M through F Address access time 2/ 01 2/ 10 ns 3/ See footnotes at end of table. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-95822 A REVISION LEVEL B SHEET 7 TABLE I. Electrical performance characteristics - Continued. Test Symbol Address setup time tAVEL Conditions -55°C < TC < +125°C 4.5 V < VDD < 5.5 V unless otherwise specified see figure 4, VDD = 4.5 V Group A subgroups 7/ 9,10,11 tAVWL Write recovery time tWHAX tEHAX tDVWH tDVEH 2/ 9 9 9 see figure 4, VDD = 4.5 V and 5.5 V 7/ M through F Data hold time tWHDX tEHDX see figure 4, VDD = 4.5 V 7/ M through F Write enable to output high Z 6/ tWLQZ see figure 4, VDD = 4.5 V 7/ Chip enable to end of write tELWH 9 01 2/ 5 ns 10 ns 25 ns 3/ 01 0 ns 2/ 3/ 01 0 ns 2/ 3/ 01 2/ 30 ns 3/ 9,10,11 9,10,11 9 Max 3/ 9,10,11 M through F tWHQX 01 0 01 0 2/ ns ns 3/ 9,10,11 01 9,11 01 15 ns 30 ns M through F tELEH 10 8/ 38 9 3/ 2/ 9,11 01 30 ns M through F Write enable to end of write 01 9,10,11 Write enable high to output active 6/ Chip enable pulse width 9 Unit 3/ 9,10,11 M through F Data set-up time 2/ 9,10,11 M through F M through F Address hold time 9 01 9,10,11 M through F tWLWH Limits 1/ Min M through F Write enable pulse width Device type tWLEH 10 8/ 38 9 3/ 2/ 9,10,11 M through F 9 01 2/ 30 ns 3/ See footnotes at end of table. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-95822 A REVISION LEVEL B SHEET 8 TABLE I. Electrical performance characteristics - Continued. Test Symbol Address valid to end of write tAVWH Conditions -55°C < TC < +125°C 4.5 V < VDD < 5.5 V unless otherwise specified Group A subgroups Device type Limits 1/ Min see figure 4, VDD = 4.5 V 7/ 9,11 01 Unit Max 30 ns M through F tAVEH 10 8/ 38 9 3/ 2/ 9,11 01 35 ns M through F 10 8/ 40 9 3/ 2/ 1/ Device also receives 100% testing and group A sample inspection at +85°C. Unless otherwise specified, the limit is the same as defined at +125°C. 2/ When performing postirradiation electrical measurements for any RHA level TA = +25°C. Limits shown are guaranteed at TA = +25°C ±5°C. The M, D, P, L, R, F levels in the test condition column are the postirradiation limits for the device types specified in the device types column. 3/ Preirradiation values for RHA marked devices shall also be the postirradiation values, unless otherwise specified. 4/ Limit at +85°C. 5/ For each 1MHz increase in address frequency, there is a 3mA(typical) increase in operating supply current. 6/ Tested initially and after any design or process changes that affect that parameter, and therefore shall be guaranteed to the limits specified in table I. 7/ AC measurements assume rise and fall times of 5 ns or less, timing reference levels of 2.0 V, input pulse levels of 0 to VDD, and the output load = 1 TTL equivalent load and CL > 50 pF. For CL > 50 pF, access times are derated 0.15ns/pF. 8/ Limits at +85°C and +125°C. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-95822 A REVISION LEVEL B SHEET 9 Case Y FIGURE 1. Case outline. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-95822 A REVISION LEVEL B SHEET 10 Symbol A B b1 c c1 D E E1 Millimeters Min Max 1.78 2.92 0.38 0.56 0.38 0.48 0.10 0.23 0.10 0.15 14.99 15.49 12.45 12.95 --13.20 Inches Min Max .070 .115 .015 .022 .015 .019 .004 .009 .004 .006 .590 .610 .490 0510 --.520 Symbol E2 E3 e L M Q S1 N Millimeters Max Min 9.40 9.91 0.76 --1.27 BSC 8.38 8.89 --0.04 0.66 1.14 0.13 --- Inches Min Max .370 .390 .030 --.050 BSC .330 .350 --.0015 .026 .045 .005 --24 NOTES: 1. Although dimensions are in inches, the US government preferred system of measurement is the SI metric system. However, since this item was originally designed using inch-pound units of measurement, in the event of conflict between the two, the inch-pound units shall take precedence. Metric equivalents are for general information only. 2. Dimensions D and E1 allow for off-center lid, meniscus, and glass overrun. 3. Dimension Q shall be measured at the point of exit (beyond the meniscus) of the lead from the body. The minimum shall be reduced by 0.038 mm (0.0015 inch) maximum when solder dip lead finish is applied. 4. Dimensions b1 and c1 apply to lead base metal only. Dimension M applies to lead plating and finish thickness. The maximum limits of lead dimensions b and c or M shall be measured at the centroid of the finished lead surfaces, when solder dip or tin plate lead finish is applied. 5. Measure dimension S1 at all four corners. 6. For bottom-brazed lead packages, no organic or polymeric materials shall be molded to the bottom or the package to cover the leads. FIGURE 1. Case outline - continued. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-95822 A REVISION LEVEL B SHEET 11 Device types All Case outlines X,Y Terminal number Terminal symbol 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 A0 A1 A2 A3 A4 A5 A6 A7 NC Q W GND E D A8 A9 A10 A11 A12 A13 A14 A15 NC VDD FIGURE 2. Terminal connections. Read modes Power H W Outputs Not selected E X High Z Standby Read L H Data out Active Write L L High Z Active Mode NOTES: 1. L = logic low voltage level; H = logic high voltage level; X can be H or L. 2. High Z is high impedance state. FIGURE 3. Truth table. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-95822 A REVISION LEVEL B SHEET 12 Read cycle (see note) NOTE: W is high for the entire cycle and D is ignored E is stable prior to A becoming valid and after A becomes invalid. FIGURE 4. Timing waveforms. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-95822 A REVISION LEVEL B SHEET 13 Write cycle 1: W controlled (see note) NOTE: In this mode E rises after W. The address must remain stable whenever both E and W are low. FIGURE 4. Timing waveforms continued. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-95822 A REVISION LEVEL B SHEET 14 Write cycle 2: E controlled FIGURE 4. Timing waveforms continued. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-95822 A REVISION LEVEL B SHEET 15 4.4.3 Group D inspection. The group D inspection end-point electrical parameters shall be as specified in table IIA herein. 4.4.4 Group E inspection. Group E inspection is required only for parts intended to be marked as radiation hardness assured (see 3.5 herein). a. End-point electrical parameters shall be as specified in table IIA herein. b. For device classes Q and V, the devices or test vehicle shall be subjected to radiation hardness assured tests as specified in MIL-PRF-38535 for the RHA level being tested. All device classes must meet the postirradiation end-point electrical parameter limits as defined in table I at TA = +25°C ± 5°C, after exposure, to the subgroups specified in table IIA herein. 4.4.4.1 Total dose irradiation testing. Total dose irradiation testing shall be performed in accordance with MIL-STD-883 method 1019, condition A and as specified herein. 4.4.4.1.1 Accelerated annealing test. Accelerated annealing tests shall be performed on all devices requiring a RHA level greater than 5k rads(Si). The post-anneal end-point electrical parameter limits shall be as specified in table I herein and shall be the pre-irradiation end-point electrical parameter limit at 25°C ±5°C. Testing shall be performed at initial qualification and after any design or process changes which may affect the RHA response of the device. 4.4.4.2 Dose rate induced latchup testing. Dose rate induced latchup testing shall be performed in accordance with test method 1020 of MIL-STD-883 and as specified herein (see 1.5). Tests shall be performed on devices, SEC, or approved test structures at technology qualification and after any design or process changes which may affect the RHA capability of the process. 4.4.4.3 Dose rate upset testing. Dose rate upset testing shall be performed in accordance with method 1021 of MIL-STD883 and herein (see 1.5). a. Transient dose rate upset testing shall be performed at initial qualification and after any design or process changes which may affect the RHA performance of the devices. Test 10 devices with 0 defects unless otherwise specified. b. Transient dose rate upset testing for class Q and V devices shall be performed as specified by a TRB approved radiation hardness assurance plan and MIL-PRF-38535. 4.4.4.4 Single event phenomena (SEP). SEP testing shall be required on class V devices (see 1.5 herein). SEP testing shall be performed on a technology process on the Standard Evaluation Circuit (SEC) or alternate SEP test vehicle as approved by the qualifying activity at initial qualification and after any design or process changes which may affect the upset or latchup characteristics. ASTM standard F1192 may be used as a guideline when performing SEP testing. The test conditions for SEP are as follows: a. The ion beam angle of incidence shall be between normal to the die surface and 60° to the normal, inclusive (i.e. 0° ≤ angle ≤ 60°). No shadowing of the ion beam due to fixturing or package related effects are allowed. b. The fluence shall be ≥ 100 errors or ≥ 10 ions/cm . c. The flux shall be between 10 and 10 ions/cm /s. The cross-section shall be verified to be flux independent by measuring the cross-section at two flux rates which differ by at least an order of magnitude. d. The particle range shall be ≥ 20 microns in silicon. e. The test temperature shall be +25 °C and the maximum rated operating temperature ±10 °C. f. Bias conditions shall be defined by the manufacturer for latchup measurements. g. Test four devices with zero failures. 6 2 5 STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 2 2 SIZE 5962-95822 A REVISION LEVEL B SHEET 16 TABLE IIA. Electrical test requirements. 1/ 2/ 3/ 4/ 5/ 6/ 7/ Line no. 1/ 2/ 3/ 4/ 5/ 6/ 7/ 8/ Test requirements Subgroups (in accordance with MIL-PRF-38535, table III) 1 Interim electrical parameters (see 4.2) 2 Static burn-in (method 1015) 3 Same as line 1 4 Dynamic burn-in (method 1015) 5 Same as line 1 6 Final electrical parameters (see 4.2) 7 Group A test requirements (see 4.4) 8 Device class Q Device class V 1, 7, 9 1, 7, 9 Not required Required 1*, 7*, 9 ∆ Required Required 1*, 7*, 9 ∆ 1*, 2, 3, 7*, 8A, 8B, 9, 10, 11 8/ 1*, 2, 3, 7*, 8A, 8B, 9, 10, 11 8/ 1, 2, 3, 4**, 7, 8A, 8B, 9, 10, 11 8/ 1, 2, 3, 4**, 7, 8A, 8B, 9, 10, 11 8/ Group C end-point electrical parameters (see 4.4) 1, 2, 3, 7, 8A, 8B 8/ 1, 2, 3, 7, 8A, 8B, 9, 10, 11 8/ ∆ 9 Group D end-point electrical parameters (see 4.4) 1, 7, 9 1, 7, 9 10 Group E end-point electrical parameters (see 4.4) 1, 7, 9 1, 7, 9 Blank spaces indicate tests are not applicable. Any or all subgroups may be combined when using high-speed testers. Subgroups 7, 8A, and 8B functional tests shall verify the truth table. * indicates PDA applies to subgroup 1, 7, and 9. ** see 4.4.1c. ∆ indicates delta limit (see table IIB) shall be required where specified, and the delta values shall be computed with reference to the previous interim electrical parameters (see line 1). See 4.5. In addition, testing is performed at +85°C. Table IIB. Delta limits at +25°C. Test 1/ All device types IIN ±150 nA of specified value in Table I IOZ ±2 µA of specified value in Table I IDDSB ±150 µA of specified value in Table I VOL ±60 mV of specified value in Table I VOH1 ±400 mV of specified value in Table I 1/ The above parameter shall be recorded before and after the required burn-in and life tests to determine the delta. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-95822 A REVISION LEVEL B SHEET 17 4.5 Delta measurements for device class V. Delta measurements, as specified in table IIA, shall be made and recorded before and after the required burn-in screens and steady-state life tests to determine delta compliance. The electrical parameters to be measured, with associated delta limits are listed in table IIB. The device manufacturer may, at his option, either perform delta measurements or within 24 hours after burn-in perform final electrical parameter tests, subgroups 1, 7, and 9. 5. PACKAGING 5.1 Packaging requirements. The requirements for packaging shall be in accordance with MIL-PRF-38535 for device classes Q and V. 6. NOTES 6.1 Intended use. Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original equipment), design applications, and logistics purposes. 6.1.1 Replaceability. Microcircuits covered by this drawing will replace the same generic device covered by a contractor prepared specification or drawing. 6.2 Configuration control of SMD's. All proposed changes to existing SMD's will be coordinated with the users of record for the individual documents. This coordination will be accomplished using DD Form 1692, Engineering Change Proposal. 6.3 Record of users. Military and industrial users should inform DLA Land and Maritime when a system application requires configuration control and which SMD's are applicable to that system. DLA Land and Maritime will maintain a record of users and this list will be used for coordination and distribution of changes to the drawings. Users of drawings covering microelectronic devices (FSC 5962) should contact DLA Land and Maritime-VA, telephone (614) 692-8108. 6.4 Comments. Comments on this drawing should be directed to DLA Land and Maritime-VA , Columbus, Ohio 432183990, or telephone (614) 692-0540. 6.5 Abbreviations, symbols, and definitions. The abbreviations, symbols, and definitions used herein are defined in MIL-PRF-38535 and MIL-HDBK-1331. CIN......................................... Input terminal capacitance. CI/O ....................................... Output terminal capacitance. GND ....................................... Ground zero voltage potential. IDD......................................... Supply current. II ............................................. Input current. IO ........................................... Output current. TC .......................................... Case temperature. VDD ....................................... Positive supply voltage. 6.5.1 Timing limits. The table of timing values shows either a minimum or a maximum limit for each parameter. Input requirements are specified from the external system point of view. For example, address setup time would be shown as a minimum since the system must supply at least that much time (even though most devices do not require it). On the other hand, responses from the memory are specified from the device point of view. For example, the access time would be shown as a maximum since the device never provides data later than that time. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-95822 A REVISION LEVEL B SHEET 18 6.5.2 Waveforms. Waveform symbol Input Output MUST BE VALID WILL BE VALID CHANGE FROM H TO L WILL CHANGE FROM H TO L CHANGE FROM L TO H WILL CHANGE FROM L TO H DON'T CARE ANY CHANGE PERMITTED CHANGING STATE UNKNOWN HIGH IMPEDANCE 6.6 Sources of supply. 6.6.1 Sources of supply for device classes Q and V. Sources of supply for device classes Q and V are listed in QML-38535 and MIL-HDBK-103. The vendors listed in QML-38535 have submitted a certificate of compliance (see 3.6 herein) to DLA Land and Maritime-VA and have agreed to this drawing. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-95822 A REVISION LEVEL B SHEET 19 STANDARD MICROCIRCUIT DRAWING BULLETIN DATE: 13-08-21 Approved sources of supply for SMD 5962-95822 are listed below for immediate acquisition only and shall be added to MIL-HDBK-103 and QML-38535 during the next revision. MIL-HDBK-103 and QML-38535 will be revised to include the addition or deletion of sources. The vendors listed below have agreed to this drawing and a certificate of compliance has been submitted to and accepted by DLA Land and Maritime-VA. This information bulletin is superseded by the next dated revision of MIL-HDBK-103 and QML-38535. DLA Land and Maritime maintains an online database of all current sources of supply at http://www.landandmaritime.dla.mil/Programs/Smcr/. Standard microcircuit drawing PIN 1/ Vendor CAGE number Vendor similar PIN 2/ 5962F9582201QXC 3/ HS9-65643ARH-Q 1/ The lead finish shown for each PIN representing a hermetic package is the most readily available from the manufacturer listed for that part. If the desired lead finish is not listed, contact the Vendor to determine its availability. 2/ Caution. Do not use this number for item acquisition. Items acquired to this number may not satisfy the performance requirements of this drawing. 3/ Not available from an approved source of supply. The last known supplier is listed below. Vendor CAGE number 34371 Vendor name and address Intersil Corporation 1001 Murphy Ranch Road Milpitas, CA 95035-6803 The information contained herein is disseminated for convenience only and the Government assumes no liability whatsoever for any inaccuracies in this information bulletin. 1 of 1