95600

REVISIONS
LTR
DESCRIPTION
DATE
APPROVED
A
Change minimum limit of dimension Q for case outline T. Changes in
accordance with NOR 5962-R145-97.
96-11-27
Raymond Monnin
B
Add note 4/ to tWLQZ, tCDR, and tR in table I. Add note 5/ to tELQX, tWHQX,
tOLQX, and tOHQZ in table I. Add case outline 8. Change dimensions b,
c, L, and Q for case outline T. Add CAGE 01295 as source of supply
for case outlines T and 8. Update boilerplate. Editorial changes
throughout.
97-04-17
Raymond Monnin
C
Change minimum dimensions A, b, and E for case outline U. Add
CAGE 65786 as a source of supply . Editorial changes throughout. ksr
97-10-24
Raymond Monnin
D
Change case outline 9 dimension A from .114 inches to .130 inches. glg
00-03-01
Raymond Monnin
E
Added low-power devices 09 - 14 to drawing. Removed CAGE
0EU86 for devices 05 - 08. - glg
00-11-22
Raymond Monnin
F
Changed minimum dimension b for package "U" from 0.015 inches to
0.012 inches. - glg
00-12-13
Raymond Monnin
G
Changed minimum dimension b for package "M" from 0.019 inches to
0.012 inches. Updated boilerplate paragraphs. ksr
02-02-12
Raymond Monnin
H
Table I; Changed the IOL from 8 mA to 6 mA VOL test. Added device
types 15 and 16. Editorial changes throughout. -sld
04-05-25
Raymond Monnin
J
Add case outline 7. Add CAGE 0EU86 as source of supply for case
outline 7. Editorial changes throughout. tcr
08-08-18
Robert M. Heber
K
Add device 17 and add case outline 6. Add CAGE 6S055 as source
of supply for case outline 6. Some editorial changes. ksr
09-01-22
Robert M. Heber
REV
SHEET
REV
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
SHEET
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
REV
K
K
K
K
K
K
K
K
K
K
K
K
K
K
SHEET
1
2
3
4
5
6
7
8
9
10
11
12
13
14
REV STATUS
OF SHEETS
PREPARED BY
Jeff Bowling
PMIC N/A
STANDARD
MICROCIRCUIT
DRAWING
THIS DRAWING IS
AVAILABLE
FOR USE BY All
DEPARTMENTS
AND AGENCIES OF THE
DEPARTMENT OF DEFENSE
AMSC N/A
CHECKED BY
Jeff Bowling
APPROVED BY
Michael. A. Frye
DRAWING APPROVAL DATE
96-03-05
REVISION LEVEL
K
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
http://www.dscc.dla.mil/
MICROCIRCUITS, MEMORY, DIGITAL,
CMOS, 512K X 8 STATIC RANDOM
ACCESS MEMORY (SRAM),
MONOLITHIC SILICON
SIZE
A
CAGE CODE
67268
5962-95600
SHEET
1 OF
DSCC FORM 2233
APR 97
32
5962-E130-09
1. SCOPE
1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and
M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the
Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the
PIN.
5962
-
95600
Federal
stock class
designator
\
RHA
designator
(see 1.2.1)
01
M
X
A
Device
type
(see 1.2.2)
Device
class
designator
(see 1.2.3)
Case
outline
(see 1.2.4)
Lead
finish
(see 1.2.5)
/
\/
Drawing number
1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and
are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A
specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device.
1.2.2 Device type(s). The device types identify the circuit function as follows:
Device type
Generic number 1/
01
02
03
04
05
06
07
08
09
10
11
12
13
14
15
16
17
Circuit function
Data retention
512K X 8 CMOS SRAM
512K X 8 CMOS SRAM
512K X 8 CMOS SRAM
512K X 8 CMOS SRAM
512K X 8 CMOS SRAM
512K X 8 CMOS SRAM
512K X 8 CMOS SRAM
512K X 8 CMOS SRAM
512K X 8 CMOS Low Power SRAM
512K X 8 CMOS Low Power SRAM
512K X 8 CMOS Low Power SRAM
512K X 8 CMOS Low Power SRAM
512K X 8 CMOS Low Power SRAM
512K X 8 CMOS SRAM
512K X 8 CMOS SRAM
512K X 8 CMOS SRAM
512K X 8 CMOS SRAM
Access time
No
No
No
No
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
No
Yes
No
Yes
45 ns
35 ns
25 ns
20 ns
45 ns
35 ns
25 ns
20 ns
45 ns
35 ns
25 ns
20 ns
15 ns
15 ns
12 ns
12 ns
12 ns
1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as
follows:
Device class
M
Q or V
Device requirements documentation
Vendor self-certification to the requirements for MIL-STD-883 compliant, nonJAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A
Certification and qualification to MIL-PRF-38535
1/ Generic numbers are listed on the Standard Microcircuit Drawing Source Approval Bulletin at the end of this document and
will also be listed in MIL-HDBK-103 and QML-38535, as applicable (see 6.6.1 and 6.6.2 herein).
STANDARD
MICROCIRCUIT DRAWING
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SIZE
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A
REVISION LEVEL
K
SHEET
2
1.2.4 Case outlines. The case outlines are as designated in MIL-STD-1835 and as follows:
Outline letter
X
Y
Z
U
T
M
N
9
8
7
6
Descriptive designator
Terminals
GDIP1-T32 or CDIP2-T32
See figure 1
See figure 1
See figure 1
See figure 1
See figure 1
See figure 1
See figure 1
See figure 1
See figure 1
See figure 1
32
32
32
32
36
36
36
32
36
36
44
Package style
Dual-in-line
TSOP package
Leadless chip carrier
SOJ package
Flat pack
SOJ package
Leadless chip carrier
Flat pack
SOJ package
SOJ package
TSOP package
1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix
A for device class M.
1.3 Absolute maximum ratings. 2/
Voltage on any input relative to VSS ......................................
For device 17 only ..............................................................
Storage temperature range ..................................................
Maximum power dissipation (PD)..........................................
Lead temperature (soldering, 10 seconds)...........................
Thermal resistance, junction-to-case (θJC):
Case X................................................................................
Case Y................................................................................
Cases U, M, 8 and 7...........................................................
Case T ................................................................................
Cases Z and N....................................................................
Case 9 ................................................................................
Case 6 ................................................................................
Junction temperature (TJ) .....................................................
For - 17 ..............................................................................
Output current.......................................................................
-0.5 V dc to +7.0 V dc
-0.5 V dc to +6.0 V dc
-65°C to +150°C
2.0 W
+260°C
See MIL-STD-1835
6°C/W
11°C/W
10°C/W
20°C/W
22°C/W
7 C/W
+150°C 2/
+140C 2/
40 mA
1.4 Recommended operating conditions.
Supply voltage range (VCC)...................................................
Supply voltage (VSS) .............................................................
Input high voltage range (VIH) Devices 01 - 08.....................
Input high voltage range (VIH) Devices 09 - 13.....................
Input high voltage range (VIH) Device 17..............................
Input low voltage range (VIL).................................................
Case operating temperature range (TC) ...............................
4.5 V dc to 5.5 V dc
0V
2.2 V dc to +6.0 V dc
2.2 V dc to VCC + 0.3 V dc
2.0 V dc to VCC + 0.5 V dc
-0.5 V dc to +0.8 V dc 3/
-55°C to +125°C
_____________
2/ Maximum junction temperature shall not be exceeded except for allowable short duration burn-in screening conditions in
accordance with method 5004 of MIL-STD-883.
3/ VIL minimum = -3.0 V dc for pulse width less than 20 ns.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-95600
A
REVISION LEVEL
K
SHEET
3
2. APPLICABLE DOCUMENTS
2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a
part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in
the solicitation or contract.
DEPARTMENT OF DEFENSE SPECIFICATION
MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for.
DEPARTMENT OF DEFENSE STANDARDS
MIL-STD-883 MIL-STD-1835 -
Test Method Standard Microcircuits.
Interface Standard Electronic Component Case Outlines.
DEPARTMENT OF DEFENSE HANDBOOKS
MIL-HDBK-103 MIL-HDBK-780 -
List of Standard Microcircuit Drawings.
Standard Microcircuit Drawings.
(Copies of these documents are available online at http://assist.daps.dla.mil/quicksearch/ or from the Standardization
Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.)
2.2 Non-Government publications. The following document(s) form a part of this document to the extent specified herein.
Unless otherwise specified, the issues of the documents are the issues of the documents cited in the solicitation.
AMERICAN SOCIETY FOR TESTING AND MATERIALS (ASTM)
ASTM Standard F1192-00
-
Standard Guide for the Measurement of Single Event Phenomena Induced by
Heavy Ion Irradiation of Semiconductor Devices.
(Applications for copies of ASTM publications should be addressed to: ASTM International, PO Box C700, 100 Barr Harbor
Drive, West Conshohocken, PA 19428-2959; http://www.astm.org/.)
ELECTRONICS INDUSTRIES ASSOCIATION (EIA)
JEDEC Standard EIA/JESD78
-
IC Latch-Up Test.
(Applications for copies should be addressed to the Electronics Industries Association, 2500 Wilson Boulevard, Arlington, VA
22201; http://www.jedec.org/.)
(Non-Government standards and other publications are normally available from the organizations that prepare or distribute
the documents. These documents also may be available in or through libraries or other informational services.)
2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text
of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a
specific exemption has been obtained.
3. REQUIREMENTS
3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF38535 and as specified herein or as modified in the device manufacturer's Quality Management (QM) plan. The modification in
the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M
shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-95600
A
REVISION LEVEL
K
SHEET
4
3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified
in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M.
3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.4 herein and figure 1.
3.2.2 Terminal connections. The terminal connections shall be as specified on figure 2.
3.2.3 Truth table. The truth table shall be as specified on figure 3.
3.2.4 Functional tests. Various functional tests used to test this device are contained in the appendix. If the test patterns
cannot be implemented due to test equipment limitations, alternate test patterns to accomplish the same results shall be
allowed. For device class M, alternate test patterns shall be maintained under document revision level control by the
manufacturer and shall be made available to the preparing or acquiring activity upon request. For device classes Q and V
alternate test patterns shall be under the control of the device manufacturer's Technology Review Board (TRB) in accordance
with MIL-PRF-38535 and shall be made available to the preparing or acquiring activity upon request.
3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the
electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full
case operating temperature range.
3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table IIA. The electrical
tests for each subgroup are defined in table I.
3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturer's PIN may also be
marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer
has the option of not marking the "5962-" on the device. For RHA product using this option, the RHA designator shall still be
marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be
in accordance with MIL-PRF-38535, appendix A.
3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a "QML" or "Q" as required
in MIL-PRF-38535. The compliance mark for device class M shall be a "C" as required in MIL-PRF-38535, appendix A.
3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535
listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of
compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see
6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this
drawing shall affirm that the manufacturer's product meets, for device classes Q and V, the requirements of MIL-PRF-38535
and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein.
3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in
MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered
to this drawing.
3.8 Notification of change for device class M. For device class M, notification to DSCC-VA of change of product (see 6.2
herein) involving devices acquired to this drawing is required for any change that affects this drawing.
3.9 Verification and review for device class M. For device class M, DSCC, DSCC's agent, and the acquiring activity retain
the option to review the manufacturer's facility and applicable required documentation. Offshore documentation shall be made
available onshore at the option of the reviewer.
3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in
microcircuit group number 41 (see MIL-PRF-38535, appendix A).
4. VERIFICATION
4.1 Sampling and inspection. For device classes Q and V, sampling and inspection procedures shall be in accordance with
MIL-PRF-38535 or as modified in the device manufacturer's Quality Management (QM) plan. The modification in the QM plan
shall not affect the form, fit, or function as described herein. For device class M, sampling and inspection procedures shall be
in accordance with MIL-PRF-38535, appendix A.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-95600
A
REVISION LEVEL
K
SHEET
5
4.2 Screening. For device classes Q and V, screening shall be in accordance with MIL-PRF-38535, and shall be conducted
on all devices prior to qualification and technology conformance inspection. For device class M, screening shall be in
accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection.
4.2.1 Additional criteria for device class M.
a. Delete the sequence specified as initial (preburn-in) electrical parameters through interim (postburn-in) electrical
parameters of method 5004 and substitute lines 1 through 6 of table IIA herein.
b. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made
available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases,
and power dissipation, as applicable, in accordance with the intent specified in method 1015.
(1)
Dynamic burn-in (method 1015 of MIL-STD-883, test condition D; for circuit, see 4.2.1b herein).
c. Interim and final electrical parameters shall be as specified in table IIA herein.
4.2.2 Additional criteria for device classes Q and V.
a. The burn-in test duration, test condition and test temperature, or approved alternatives shall be as specified in the device
manufacturer's QM plan in accordance with MIL-PRF-38535. The burn-in test circuit shall be maintained under
document revision level control of the device manufacturer's Technology Review Board (TRB) in accordance with
MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit shall
specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in
method 1015 of MIL-STD-883.
b. Interim and final electrical test parameters shall be as specified in table IIA herein.
c. Additional screening for device class V beyond the requirements of device class Q shall be as specified in MIL-PRF38535, appendix B.
4.3 Qualification inspection for device classes Q and V. Qualification inspection for device classes Q and V shall be in
accordance with MIL-PRF-38535. Inspections to be performed shall be those specified in MIL-PRF-38535 and herein for
groups A, B, C, D, and E inspections (see 4.4.1 through 4.4.4).
4.4 Conformance inspection. Technology conformance inspection for classes Q and V shall be in accordance with MILPRF-38535 including groups A, B, C, D, and E inspections and as specified herein. Quality conformance inspection for device
class M shall be in accordance with MIL-PRF-38535, appendix A and as specified herein. Inspections to be performed for
device class M shall be those specified in method 5005 of MIL-STD-883 and herein for groups A, B, C, D, and E inspections
(see 4.4.1 through 4.4.4).
4.4.1 Group A inspection.
a. Tests shall be as specified in table IIA herein.
b. Subgroups 5 and 6 of table I of method 5005 of MIL-STD-883 shall be omitted.
c. For device class M, subgroups 7, 8A, and 8B tests shall be sufficient to verify the truth table. For device classes Q and
V, subgroups 7, 8A, and 8B shall include verifying the functionality of the device.
d. O/V (latch-up) tests shall be measured only for initial qualification and after any design or process changes which may
affect the performance of the device. For device class M, procedures and circuits shall be maintained under document
revision level control by the manufacturer and shall be made available to the preparing activity or acquiring activity upon
request. For device classes Q and V, the procedures and circuits shall be under the control of the device manufacturer's
TRB in accordance with MIL-PRF-38535 and shall be made available to the preparing activity or acquiring activity upon
request. Testing shall be on all pins, on five devices with zero failures. Latch-up test shall be considered destructive.
Information contained in JEDEC Standard EIA/JESD78 may be used for reference.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
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APR 97
SIZE
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A
REVISION LEVEL
K
SHEET
6
TABLE I. Electrical performance characteristics.
Test
Operating supply current
1/
Symbol
ICC1
Conditions
-55C  TC  +125C
VCC = 4.5 V to 5.5 V
VSS = 0 V
unless otherwise specified
tAVAV = tAVAV (minimum),
Group A
subgroups
Device
types
1, 2, 3
01-08,
14
225
09-13
180
15, 16
90
VCC = 5.5 V, CE = WE = VIL,
outputs open
Limits
Min
Max
17
Standby power supply
current (TTL)
Standby power supply
current (CMOS)
ICC2
ICC3
Data retention voltage
VDR
Data retention current
ICC4
CE  VIH, all other inputs  VIL
or  VIH, VCC = 5.5 V
CE  VCC - 0.2 V, VCC = 5.5 V,
VIN  0.2 V or  (VCC -0.2 V)
CE  VCC - 0.2 V,
VIN  VCC - 0.2 V or  0.2 V
VCC = 2.0 V
1, 2, 3
1, 2, 3
Unit
mA
110
01-08,
14
60
09-13,
15 - 17
30
01-04,
14
25
05-08
10
09-13,
15 - 17
20
1, 2, 3
05-13,
15, 17
1, 2, 3
05-08
2
09-13
4.5
15
7
17
12
mA
mA
2
V
mA
Input leakage current,
any input
IILK
VCC = 5.5 V,
VIN = 0 V to 5.5 V
1, 2, 3
All
10
A
Off-state output leakage
current
IOLK
VCC = 5.5 V,
VIN = 0 V to 5.5 V
1, 2, 3
All
10
A
Output high voltage
VOH
IOUT = -4.0 mA, VCC = 4.5 V,
VIL = 0.8 V, VIH = 2.2 V
1, 2, 3
All
Output low voltage
VOL
IOUT = 6.0 mA, VCC = 4.5 V,
VIL = 0.8 V, VIH = 2.2 V
1, 2, 3
All
0.4
V
Input capacitance
CIN
VIN = 0 V, see 4.4.1e
f = 1.0 MHz, TA = +25°C,
4
All
12
pF
Output capacitance
COUT
VOUT = 0 V, see 4.4.1e
f = 1.0 MHz, TA = +25°C,
4
All
14
pF
7,8A,8B
All
Functional testing
See 4.4.1c
2.4
V
See footnotes at end of table.
STANDARD
MICROCIRCUIT DRAWING
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APR 97
SIZE
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REVISION LEVEL
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SHEET
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TABLE I. Electrical performance characteristics - continued.
Test
Chip enable access time
Read cycle time
Address access time
Output hold after address
change
Chip enable to output
active
4/ 5/
Symbol
tELQV
Conditions
-55°C  TC  +125°C
VCC = 4.5 V to 5.5 V
VSS = 0 V
unless otherwise specified
See figure 5 2/ 3/
Device
types
9,10,11
01,05,09
45
02,06,10
35
03,07,11
25
04,08,12
20
13,14
15
15 - 17
12
9,10,11
tAVAV
9,10,11
tAVQV
9,10,11
tAVQX
tELQX
Limits
Group A
subgroups
9,10,11
Min
01,05,09
45
02,06,10
35
03,07,11
25
04,08,12
20
13,14
15
15 - 17
12
Unit
Max
ns
01,05,09
45
02,06,10
35
03,07,11
25
04,08,12
20
13,14
15
15 - 17
12
01-08
3
09-14,
15 - 17
2
01-08
3
09-14,
15 - 17
2
ns
ns
ns
ns
See footnotes at end of table.
STANDARD
MICROCIRCUIT DRAWING
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REVISION LEVEL
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TABLE I. Electrical performance characteristics - continued.
Test
Chip disable to output
inactive
4/ 5/
Output enable to output
valid
Symbol
tEHQZ
tOLQV
Conditions
-55°C  TC  +125°C
VCC = 4.5 V to 5.5 V
VSS = 0 V
unless otherwise specified
See figure 5 2/ 3/
See figure 5 2/
Group A
subgroups
Device
types
9,10,11
9,10,11
Output enable to output
in low Z
4/ 5/
tOLQX
9,10,11
Output enable to output
in high Z
4/ 5/
tOHQZ
9,10,11
Write cycle time
9,10,11
tAVAV
Limits
Unit
Min
Max
01,05,09
0
20
02,06,10
0
15
03,07,11
0
10
04,08,12
0
8
13,14
0
7
15 - 17
0
6.5
01,05,09
25
02,06,10
15
03,07,11
12
04,08,12
10
13,14
8
15 - 17
7
All
ns
ns
0
ns
01,05,09
0
20
02,06,10
0
15
03,07,11
0
10
04,08,12
0
8
13,14
0
7
15 - 17
0
6.5
01,05,09
45
02,06,10
35
03,07,11
25
04,08,12
20
13,14
15
15 - 17
12
ns
ns
See footnotes at end of table.
STANDARD
MICROCIRCUIT DRAWING
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COLUMBUS, OHIO 43218-3990
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SIZE
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REVISION LEVEL
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9
TABLE I. Electrical performance characteristics - continued.
Test
Write pulse width
Chip enable to end of
write
Data setup to end of
write
Symbol
tWLWH
tWLEH
Conditions
-55°C  TC  +125°C
VCC = 4.5 V to 5.5 V
VSS = 0 V
unless otherwise specified
See figure 5 2/
Device
types
9,10,11
01,05,09
35
02,06,10
30
03,07,11
20
04,08,12
17
13,14
15
15 - 17
12
01,05,09
35
02,06,10
30
03,07,11
20
04,08,12
17
13,14
15
15 - 17
12
01,05,09
25
02,06,10
20
03,07,11
12
04,08,12
10
13,14
7
15 - 17
6.5
9,10,11
tELWH
tELEH
9,10,11
tDVWH
tDVEH
Limits
Group A
subgroups
Data hold after end of
write
4/
tWHDX
tEHDX
9,10,11
Address valid to end of
write
tAVWH
tAVEH
9,10,11
All
Min
Unit
Max
ns
ns
ns
0
ns
01,05,09
35
ns
02,06,10
30
03,07,11
20
04,08,12
17
13,14
15
15 - 17
12
See footnotes at end of table.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-95600
A
REVISION LEVEL
K
SHEET
10
TABLE I. Electrical performance characteristics - continued.
Test
Symbol
Address setup to
beginning of write
tAVWL
tAVEL
Address hold after
end of write
Write enable to output
disable
4/ 5/
Output active after
end of write
4/ 5/
Chip select to data
retention time
4/
Operation recovery time
4/
Conditions
-55°C  TC  +125°C
VCC = 4.5 V to 5.5 V
VSS = 0 V
unless otherwise specified
Group A
subgroups
Device
types
Limits
Min
Unit
Max
9,10,11
All
0
ns
tWHAX
tEHAX
9,10,11
01-12
1
ns
13,14,
15 - 17
0
tWLQZ
9,10,11
01,05,09
0
30
02,06,10
0
25
03,07,11
0
10
04,08,12
0
8
13,14
0
7
15 - 17
0
6.5
See figure 5 2/
tWHQX
9,10,11
All
ns
0
ns
0
ns
tCDR
See figure 5 2/
9,10,11
tR
CE  VCC - 0.2 V,
VIN  VCC - 0.2 V or VIN  0.2 V
05-13,
15 - 17
9,10,11
05-08,
17
tAVAV
ns
09-13
10
ms
1/ ICC is dependent upon output loading and cycle rate. The specified values apply with output(s) unloaded.
2/ AC measurements assume signal transition times of 5 ns or less, timing reference levels of 1.5 V, input pulse levels of 0 V to
3.0 V, output loading of 30 pF load capacitance, unless otherwise specified. Output timing reference is 1.5 V. See figure 4.
3/ For read cycles, WE is high for entire cycle.
4/ Parameter, if not tested, shall be guaranteed to the limits specified in table I.
5/ Measured 500 mV from steady-state output voltage(200 mV for device types 09-13). Load capacitance is 5.0 pF.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-95600
A
REVISION LEVEL
K
SHEET
11
Case Y
Symbol
Millimeters
Inches
Symbol
Millimeters
Inches
Min
Max
Min
Max
A1
2.21
3.00
.087
.118
e
A2
1.27
1.78
.050
.070
L
0.51
1.40
.020
.055
A3
0.43
1.52
.017
.060
L1
0.51
0.76
.020
.030
b
0.20
0.61
.008
.024
P
---
0.10
---
.004
b2
0.13
0.20
.005
.008
R
0.10
---
.004
---
c
---
0.25
---
.010
R1
0.10
0.36
.004
.014
D
41.40
42.42
.820
.840
R2
0.25
0.51
.010
.020
E
10.64
10.85
.419
.427
N
32
E1
14.20
14.40
.559
.567
Min
Max
1.27 BSC
Min
Max
.050 BSC
NOTE: The U.S. Government preferred system of measurement is the metric SI system. However, since this item was
originally designed using inch-pound units of measurement, in the event of conflict between the metric and
inch-pound units, the inch-pound units shall take precedence.
FIGURE 1. Case outlines.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-95600
A
REVISION LEVEL
K
SHEET
12
Case Z
Symbol
Millimeters
Inches
Min
Max
Min
Max
A
2.03
2.54
.080
.100
A1
1.37
1.68
.054
.066
B
0.56
0.71
.022
.028
D
20.70
21.21
.815
.835
D1
18.80
19.30
.740
.760
E
11.18
11.68
.440
.460
e
1.27 BSC
.050 BSC
L
2.54 REF
.100 REF
N
32
P
---
R
0.15
---
0.23 REF
.006
.009 REF
NOTE: The U.S. Government preferred system of measurement is the metric SI system. However, since this item was
originally designed using inch-pound units of measurement, in the event of conflict between the metric and
inch-pound units, the inch-pound units shall take precedence.
FIGURE 1. Case outlines - continued.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-95600
A
REVISION LEVEL
K
SHEET
13
Case U
Symbol
Millimeters
Inches
Min
Max
Min
Max
A
2.92
4.06
.115
.160
A1
1.37
1.91
.054
.075
A2
0.64
1.60
.025
.063
b
0.30
0.71
.012
.028
D
20.70
21.21
.815
.835
D1
18.80
19.30
.740
.760
E
10.62
11.68
.418
.460
E2
9.42
10.41
.371
.410
e
1.27 BSC
.050 BSC
L
1.27
1.78
.050
.070
L2
2.92
3.43
.115
.135
N
32
P
---
0.10
---
.004
NOTE: The U.S. Government preferred system of measurement is the metric SI system. However, since this item was
originally designed using inch-pound units of measurement, in the event of conflict between the metric and inch-pound
units, the inch-pound units shall take precedence.
FIGURE 1. Case outlines - Continued.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-95600
A
REVISION LEVEL
K
SHEET
14
Case outline T
Symbol
Millimeters
Inches
Min
Max
Min
Max
A
2.44
3.18
.096
.125
b
0.38
0.56
.015
.022
c
0.08
0.23
.003
.009
D
23.11
23.62
.910
.930
D1
21.34
21.84
.840
.860
E
12.83
13.08
.505
.515
E2
9.78
10.08
.385
.397
e
1.27 BSC
L
6.35
N
36
Q
0.51
.050 BSC
9.40
.250
.370
1.14
.020
.045
NOTE: The U.S. Government preferred system of measurement is the metric SI system. However, since this item was
originally designed using inch-pound units of measurement, in the event of conflict between the metric and inch-pound
units, the inch-pound units shall take precedence.
FIGURE 1. Case outlines - continued.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-95600
A
REVISION LEVEL
K
SHEET
15
Case outline M
Symbol
Millimeters
Inches
Min
Max
Min
Max
A
3.56
4.06
.140
.160
A1
1.37
1.91
.054
.075
A2
0.64
1.60
.025
.063
b
0.30
0.71
.012
.028
D
23.11
23.85
.910
.939
D1
21.34
21.84
.840
.860
E
11.02
11.68
.434
.460
E2
9.50
10.41
.374
.410
e
1.27 BSC
.050 BSC
L
1.27
1.78
.050
.070
L2
2.92
3.43
.115
.135
N
36
P
---
0.10
---
.004
NOTE: The U.S. Government preferred system of measurement is the metric SI system. However, since this item was
originally designed using inch-pound units of measurement, in the event of conflict between the metric and inch-pound
units, the inch-pound units shall take precedence.
FIGURE 1. Case outlines - Continued.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-95600
A
REVISION LEVEL
K
SHEET
16
Case N
Symbol
Millimeters
Inches
Min
Max
Min
Max
A
2.03
2.54
.080
.100
A1
1.37
1.68
.054
.066
b
0.56
0.71
.022
.028
D
23.11
23.62
.910
.930
D1
21.34
21.84
.840
.860
E
11.30
11.68
.445
.460
e
1.27 BSC
L
.050 BSC
2.54 TYP
L2
2.92
N
36
P
---
R
.100 TYP
3.43
.115
.135
0.15
---
.006
0.23 TYP
.009 TYP
NOTE: The U.S. Government preferred system of measurement is the metric SI system. However, since this item was
originally designed using inch-pound units of measurement, in the event of conflict between the metric and inch-pound
units, the inch-pound units shall take precedence.
FIGURE 1. Case outlines - Continued.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-95600
A
REVISION LEVEL
K
SHEET
17
Case 9
Millimeters
Symbol
Inches
Min
Max
Min
Max
A
2.44
3.30
.096
.130
b
0.20
0.48
.008
.019
c
0.08
0.20
.003
.008
D
20.73
21.29
.816
.838
D1
18.85
19.25
.742
.758
E
10.64
11.68
.419
.460
E2
8.76
10.85
.345
.427
e
1.27 BSC
L
7.37
N
32
.050 BSC
7.87
.290
.310
Q
0.61
0.97
.024
.038
NOTES:
1. The U.S. Government preferred system of measurement is the metric SI system. However, since this item was originally
designed using inch-pound units of measurement, in the event of conflict between the metric and inch-pound units, the
inch-pound units shall take precedence.
2. Dimension E2 does not apply to optional configuration.
FIGURE 1. Case outlines - continued.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-95600
A
REVISION LEVEL
K
SHEET
18
Case 8
Symbol
Millimeters
Inches
Min
Max
Min
Max
A1
2.03
2.79
.080
.110
A2
1.47
1.98
.058
.078
B1
0.64R
0.89R
.025R
.035R
b
0.41
0.58
.016
.023
c
0.15
0.33
.006
.013
D
22.99
23.75
.905
.935
E
10.54
11.05
.415
.435
E1
11.30 REF
E2
9.17
e
e1
N
.445 REF
9.93
.361
.391
1.27 BSC
.050 BSC
21.59 BSC
.850 BSC
36
NOTE: The U.S. Government preferred system of measurement is the metric SI system. However, since this item was
originally designed using inch-pound units of measurement, in the event of conflict between the metric and inch-pound
units, the inch-pound units shall take precedence.
FIGURE 1. Case outlines - continued.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-95600
A
REVISION LEVEL
K
SHEET
19
Case 7
Symbol
Millimeters
Inches
Min
Max
Min
Max
2.92
3.68
.115
.145
A1
.63
1.14
.025
.045
b
0.38
0.51
.015
.020
C
0.15
0.30
.006
.012
A
D
23.39
23.85
.921
.939
D2
21.46
21.71
.845
.855
E
10.54
10.92
.415
.430
e
1.27 BSC
eA
9.42
R
.050 BSC
9.83
.371
.76 TYP
.387
.030 TYP
NOTE: The U.S. Government preferred system of measurement is the metric SI system. However, since this item was
originally designed using inch-pound units of measurement, in the event of conflict between the metric and inch-pound
units, the inch-pound units shall take precedence.
FIGURE 1. Case outlines - continued.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-95600
A
REVISION LEVEL
K
SHEET
20
Case 6 (see notes)
Symbol
Millimeters
Millimeters
Symbol
Min
Max
A
2.986
3.842
E2
b
0.300
0.400
e
b2
0.150
0.250
f
c
0.050
---
L
D
18.215
18.615
M
D1
16.60
17.00
N
E
9.96
10.36
Min
Max
5.280
5.680
0.80 BSC
0.406
0.597
0.839 NOM (ref)
11.735
11.938
44
NOTES:
1. Index area: a notch or a pin one identification mark shall be located adjacent to pin one and shall be located within
the area shown. The manufacturer's identification shall not be used as pin one identification mark.
FIGURE 1. Case outlines. – continued.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-95600
A
REVISION LEVEL
K
SHEET
21
Device types
Case outlines
All
X, Y, Z, U, 9
T, M, N, 8, 7
Terminal symbol
Terminal
number
Case outlines
X, Y, Z, U, 9
Terminal
number
T, M, N, 8, 7
Terminal symbol
1
2
3
A18
A16
A14
A0
A1
A2
19
20
21
I/O5
I/O6
I/O7
NC
A10
A11
4
A12
A3
22
CE
A12
5
A7
A4
23
A10
A13
6
A6
CE
24
OE
A14
7
8
9
10
A5
A4
A3
A2
I/O1
I/O2
VCC
VSS
25
26
27
28
A11
A9
A8
A13
I/O5
I/O6
VCC
VSS
11
A1
I/O3
29
WE
I/O7
12
A0
I/O4
30
A17
I/O8
13
I/O0
WE
31
A15
OE
14
I/01
A5
32
VCC
A15
15
I/02
A6
33
---
A16
16
17
18
VSS
I/O3
I/O4
A7
A8
A9
34
35
36
-------
A17
A18
NC
NC = No connection
Device Type
Case Outline
Terminal
Number
1
Terminal
Symbol
A0
Terminal
Number
12
Terminal
Symbol
VSS
All
6
Terminal
Number
23
Terminal
Symbol
A10
Terminal
Number
34
Terminal
Symbol
VSS
2
A1
13
NC
24
A11
35
NC
3
A2
14
NC
25
A12
36
NC
4
A3
15
I/O2
26
A13
37
I/O6
5
A4
16
I/O3
27
A14
38
I/O7
6
CE
17
WE
28
NC
39
OE
A5
29
I/O4
40
NC
I/O5
41
A15
7
I/O0
8
9
10
11
18
I/O1
19
A6
30
NC
20
A7
31
NC
42
A16
NC
21
A8
32
NC
43
A17
VCC
22
A9
33
VCC
44
A18
NC = No connection
FIGURE 2. Terminal connections.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-95600
A
REVISION LEVEL
K
SHEET
22
Mode
I/O
Power
OE
CE
WE
X
H
X
Standby
High Z
Standby
H
L
H
Output deselect
High Z
Active
L
L
H
Read
DOUT
Active
X
L
L
Write
DIN
Active
H = Logic "1" state
L = Logic "0" state
X = Don't care
FIGURE 3. Truth table.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-95600
A
REVISION LEVEL
K
SHEET
23
NOTES:
1.
Use these output load circuits or equivalent for testing.
2.
Including scope and jig.
3.
Minimum of 5 pF for tELQX, tEHQZ, tOLQX, tOHQZ, tWLQZ, and tWHQX.
AC test conditions
Input pulse levels
GND to 3.0 V
Input rise, fall times
5 ns
Input timing reference levels
1.5 V
Output reference levels
1.5 V
FIGURE 4. Output load circuits.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-95600
A
REVISION LEVEL
K
SHEET
24
READ CYCLE NO. 1 ( WE HIGH, CE LOW)
READ CYCLE NO. 2 ( WE HIGH)
FIGURE 5. Timing waveforms.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-95600
A
REVISION LEVEL
K
SHEET
25
WRITE CYCLE NO. 1 ( WE CONTROLLED)
WRITE CYCLE NO. 2 ( CE CONTROLLED)
FIGURE 5. Timing waveforms - continued.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-95600
A
REVISION LEVEL
K
SHEET
26
Data Retention Waveform
FIGURE 5. Timing waveforms - continued.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-95600
A
REVISION LEVEL
K
SHEET
27
TABLE IIA. Electrical test requirements. 1/ 2/ 3/ 4/ 5/ 6/ 7/
Line
no.
Subgroups
(in accordance
with
MIL-STD-883,
TM 5005, table I)
Test requirements
Subgroups
(in accordance with
MIL-PRF-38535, table III)
Device
class M
Device
class Q
Device
class V
1
Interim electrical
parameters (see 4.2)
2
Static burn-in
(method 1015)
3
Same as line 1
4
Dynamic burn-in
(method 1015)
5
Same as line 1
6
Final electrical
parameters (see 4.2)
1*, 2, 3, 7*, 8A,
8B, 9, 10, 11
1*, 2, 3, 7*, 8A,
8B, 9, 10, 11
1*, 2, 3, 7*, 8A,
8B, 9, 10, 11
7
Group A test
requirements (see 4.4)
1, 2, 3, 4**, 7,
8A, 8B, 9, 10, 11
1, 2, 3, 4**, 7,
8A, 8B, 9, 10, 11
1, 2, 3, 4**, 7,
8A, 8B, 9, 10, 11
8
Group C end-point
electrical
parameters (see 4.4)
2, 3, 7,
8A, 8B
1, 2, 3, 7,
8A, 8B
1, 2, 3, 7, 8A,
8B, 9, 10, 11 
9
Group D end-point
electrical
parameters (see 4.4)
2, 3, 8A, 8B
2, 3, 8A, 8B
2, 3, 8A, 8B
10
Group E end-point
electrical
parameters (see 4.4)
1, 7, 9
1, 7, 9
1, 7, 9
1, 7, 9
Not
required
Not
required
Required
Required
Required
1*, 7* 
Required
1*, 7* 
Blank spaces indicate tests are not applicable.
Any or all subgroups may be combined when using high-speed testers.
Subgroups 7, 8A, and 8B functional tests shall verify the truth table.
* indicates PDA applies to subgroup 1 and 7.
** see 4.4.1e.
 indicates delta limit (see table IIB) shall be required where specified, and the delta values shall be
computed with reference to the previous interim electrical parameters (see line 1).
7/ See 4.4.1d.
1/
2/
3/
4/
5/
6/
TABLE IIB. Delta limits at +25°C.
Device types
Parameter 1/
All
ICC3 standby
+10%
IILK, IOLK
+10%
1/ The above parameter shall be recorded
before and after the required burn-in and
life tests to determine the delta.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-95600
A
REVISION LEVEL
K
SHEET
28
4.4.1 Group A inspection Continued.
e. Subgroup 4 (CIN and COUT measurements) shall be measured only for initial qualification and after any process or design
changes which may affect input or output capacitance. Capacitance shall be measured between the designated terminal
and GND at a frequency of 1 MHz. Sample size is 15 devices with no failures, and all input and output terminals tested.
4.4.2 Group C inspection. The group C inspection end-point electrical parameters shall be as specified in table IIA herein.
4.4.2.1 Additional criteria for device class M. Steady-state life test conditions, method 1005 of MIL-STD-883:
a. Test condition D. The test circuit shall be maintained by the manufacturer under document revision level control and
shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs,
outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1005 of
MIL-STD-883.
b. TA = +125°C, minimum.
c. Test duration: 1,000 hours, except as permitted by method 1005 of MIL-STD-883.
4.4.2.2 Additional criteria for device classes Q and V. The steady-state life test duration, test condition and test temperature,
or approved alternatives shall be as specified in the device manufacturer's QM plan in accordance with MIL-PRF-38535. The
test circuit shall be maintained under document revision level control by the device manufacturer's TRB in accordance with MILPRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit shall specify the
inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1005 of MILSTD-883.
4.4.3 Group D inspection. The group D inspection end-point electrical parameters shall be as specified in table IIA herein.
4.4.4 Group E inspection. Group E inspection is required only for parts intended to be marked as radiation hardness
assured (see 3.5 herein).
a. End-point electrical parameters shall be as specified in table IIA herein.
b. For device classes Q and V, the devices or test vehicle shall be subjected to radiation hardness assured tests as
specified in MIL-PRF-38535 for the RHA level being tested. For device class M, the devices shall be subjected to
radiation hardness assured tests as specified in MIL-PRF-38535, appendix A for the RHA level being tested. All device
classes must meet the postirradiation end-point electrical parameter limits as defined in table I at TA = +25°C 5°C, after
exposure, to the subgroups specified in table IIA herein.
4.5 Delta measurements for device class V. Delta measurements, as specified in table IIA, shall be made and recorded
before and after the required burn-in screens and steady-state life tests to determine delta compliance. The electrical
parameters to be measured, with associated delta limits are listed in table IIB. The device manufacturer may, at his option, either
perform delta measurements or within 24 hours after burn-in perform final electrical parameter tests, subgroups 1, 7, and 9.
5. PACKAGING
5.1 Packaging requirements. The requirements for packaging shall be in accordance with MIL-PRF-38535 for device classes
Q and V or MIL-PRF-38535, appendix A for device class M.
6. NOTES
6.1 Intended use. Microcircuits conforming to this drawing are intended for use for Government microcircuit applications
(original equipment), design applications, and logistics purposes.
6.1.1 Replaceability. Microcircuits covered by this drawing will replace the same generic device covered by a contractorprepared specification or drawing.
6.1.2 Substitutability. Device class Q devices will replace device class M devices.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-95600
A
REVISION LEVEL
K
SHEET
29
6.2 Configuration control of SMD's. All proposed changes to existing SMD's will be coordinated with the users of record for
the individual documents. This coordination will be accomplished using DD Form 1692, Engineering Change Proposal.
6.3 Record of users. Military and industrial users should inform Defense Supply Center Columbus (DSCC) when a system
application requires configuration control and which SMD's are applicable to that system. DSCC will maintain a record of users
and this list will be used for coordination and distribution of changes to the drawings. Users of drawings covering microelectronic
devices (FSC 5962) should contact DSCC-VA, telephone (614) 692-0544.
6.4 Comments. Comments on this drawing should be directed to DSCC-VA , Columbus, Ohio 43218-3990, or telephone
(614) 692-0547.
6.5 Abbreviations, symbols, and definitions. The abbreviations, symbols, and definitions used herein are defined in MILPRF-38535, MIL-HDBK-1331, and as follows.
CIN, COUT
GND
ICC
IILK
IOLK
TC
VCC
............................. Input and bi-directional output, terminal-to-GND capacitance.
............................. Ground zero voltage potential.
............................. Supply current.
............................. Input leakage current.
............................. Output leakage current.
............................. Case temperature.
............................. Positive supply voltage.
6.5.1 Timing limits. The table of timing values shows either a minimum or a maximum limit for each parameter. Input
requirements are specified from the external system point of view. Thus, address setup time is shown as a minimum since the
system must supply at least that much time (even though most devices do not require it). On the other hand, responses from
the memory are specified from the device point of view. Thus, the access time is shown as a maximum since the device never
provides data later than that time.
6.6 Sources of supply.
6.6.1 Sources of supply for device classes Q and V. Sources of supply for device classes Q and V are listed in QML-38535.
The vendors listed in QML-38535 have submitted a certificate of compliance (see 3.6 herein) to DSCC-VA and have agreed to
this drawing.
6.6.2 Approved sources of supply for device class M. Approved sources of supply for class M are listed in MIL-HDBK-103.
The vendors listed in MIL-HDBK-103 have agreed to this drawing and a certificate of compliance (see 3.6 herein) has been
submitted to and accepted by DSCC-VA.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-95600
A
REVISION LEVEL
K
SHEET
30
APPENDIX A
Appendix A forms a part of SMD 5962-95600
FUNCTIONAL ALGORITHMS
A.1 SCOPE
A.1.1 Scope. Functional algorithms are test patterns which define the exact sequence of events used to verify proper
operation of a random access memory (RAM). Each algorithm serves a specific purpose for the testing of the device. It is
understood that all manufacturers do not have the same test equipment; therefore, it becomes the responsibility of each
manufacturer to guarantee that the test patterns described herein are followed as closely as possible, or equivalent patterns be
used that serve the same purpose. Each manufacturer should demonstrate that this condition will be met. Algorithms shall be
applied to the device in a topologically pure fashion. This appendix is a mandatory part of the specification. The information
contained herein is intended for compliance.
A.2 APPLICABLE DOCUMENTS. This section is not applicable to this appendix.
A.3 ALGORITHMS
A.3.1 Algorithm A (pattern 1).
A.3.1.1 Checkerboard, checkerboard-bar.
Step 1.
Step 2.
Step 3.
Step 4.
Load memory with a checkerboard data pattern by incrementing from location 0 to maximum.
Read memory, verifying the output checkerboard pattern by incrementing from location 0 to maximum.
Load memory with a checkerboard-bar pattern by incrementing from location 0 to maximum.
Read memory, verifying the output checkerboard-bar pattern by incrementing from location 0 to maximum.
A.3.2 Algorithm B (pattern 2).
A.3.2.1 March.
Step 1.
Step 2.
Step 3.
Step 4.
Step 5.
Step 6.
Step 7.
Step 8.
Step 9.
Step 10.
Step 11.
Step 12.
Step 13.
Step 14.
Step 15.
Step 16.
Step 17.
Step 18.
Load memory with background data, incrementing from minimum to maximum address locations (all "0's").
Read data in location 0.
Write complement data to location 0.
Read complement data in location 0.
Repeat steps 2 through 4 incrementing X-fast sequentially for each location in the array.
Read complement data in maximum address location.
Write data to maximum address location.
Read data in maximum address location.
Repeat steps 6 through 8 decrementing X-fast sequentially for each location in the array.
Read data in location 0.
Write complement data to location 0.
Read complement data in location 0.
Repeat steps 10 through 12 decrementing X-fast sequentially for each location in the array.
Read complement data in maximum address location.
Write data to maximum address location.
Read data in maximum address location.
Repeat steps 14 through 16 incrementing X-fast sequentially for each location in the array.
Read background data from memory, decrementing X-fast from maximum to minimum address locations.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-95600
A
REVISION LEVEL
K
SHEET
31
APPENDIX A – continued
Appendix A forms a part of SMD 5962-95600
A.3.3 Algorithm C (pattern 3).
A.3.3.1 XY March.
Step 1.
Step 2.
Step 3.
Step 4.
Step 5.
Step 6.
Step 7.
Step 8.
Step 9.
Step 10.
Step 11.
Step 12.
Step 13.
Step 14.
Step 15.
Step 16.
Step 17.
Step 18.
Load memory with background data, incrementing from minimum to maximum address locations (all "0's").
Read data in location 0.
Write complement data to location 0.
Read complement data in location 0.
Repeat steps 2 through 4 incrementing Y-fast sequentially for each location in the array.
Read complement data in maximum address location.
Write data to maximum address location.
Read data in maximum address location.
Repeat steps 6 through 8 decrementing X-fast sequentially for each location in the array.
Read data in location 0.
Write complement data to location 0.
Read complement data in location 0.
Repeat steps 10 through 12 decrementing Y-fast sequentially for each location in the array.
Read complement data in maximum address location.
Write data to maximum address location.
Read data in maximum address location.
Repeat steps 14 through 16 incrementing X-fast sequentially for each location in the array.
Read background data from memory, decrementing Y-fast from maximum to minimum address locations.
A.3.4 Algorithm D (pattern 4).
A.3.4.1 CEDES - CE deselect checkerboard, checkerboard-bar.
Step 1.
Step 2.
Step 3.
Step 4.
Step 5.
Step 6.
Load memory with a checkerboard data pattern by incrementing from location 0 to maximum.
Deselect device, attempt to load memory with checkerboard-bar data pattern by incrementing from location 0 to
maximum.
Read memory, verifying the output checkerboard pattern by incrementing from location 0 to maximum.
Load memory with a checkerboard-bar pattern by incrementing from location 0 to maximum.
Deselect device, attempt to load memory with checkerboard data pattern by incrementing from location 0 to
maximum.
Read memory, verifying the output checkerboard-bar pattern by incrementing from location 0 to maximum.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-95600
A
REVISION LEVEL
K
SHEET
32
STANDARD MICROCIRCUIT DRAWING SOURCE APPROVAL BULLETIN
DATE: 09-01-22
Approved sources of supply for SMD 5962-95600 are listed below for immediate acquisition only and shall be added
to MIL-HDBK-103 and QML-38535, as applicable, during the next revision. MIL-HDBK-103 and QML-38535 will be
revised to include the addition or deletion of sources. The vendors listed below have agreed to this drawing and a
certificate of compliance has been submitted to and accepted by DSCC-VA. This information bulletin is superseded
by the next dated revisions of MIL-HDBK-103 and QML-38535. DSCC maintains an online database of all current
sources of supply at http://www.dscc.dla.mil/Programs/Smcr/.
Standard
microcircuit
drawing PIN 1/
5962-9560001MXA
Vendor
CAGE
number
Vendor
similar
PIN 2/
54230
EDI88512CA45CB
0EU86
AS5C4008CW-45
5962-9560001MYA
54230
EDI88512CA45B32B
5962-9560001MZA
0EU86
AS5C4008EC-45
54230
EDI88512CA45L32B
54230
EDI88512CA45NB
0EU86
AS5C4008ECJ-45
3/
CY7C1048-45FJMB
5962-9560001MUA
5962-9560001MTA
54230
EDI88512CA45F36B
0EU86
AS5C512K8F-45
3DTT2
P4C1049-45FSMB
54230
EDI88512CA45N36B
0EU86
AS5C512K8ECJ-45
0EU86
AS5C512K8EC-45
3DTT2
P4C1049-45L36MB
5962-9560001M7A
0EU86
AS5C512K8SOJ-45
5962-9560001M9A
54230
EDI88512CA45F32B
0EU86
AS5C4008F-45
5962-9560001MMA
5962-9560001MNA
5962-9560002MXA
54230
EDI88512CA35CB
0EU86
AS5C4008CW-35
5962-9560002MYA
54230
EDI88512CA35B32B
5962-9560002MZA
0EU86
54230
AS5C4008EC-35
EDI88512CA35L32B
5962-9560002MUA
54230
EDI88512CA35NB
0EU86
AS5C4008ECJ-35
3/
CY7C1048-35FJMB
5962-9560002MTA
5962-9560002MMA
54230
EDI88512CA35F36B
0EU86
AS5C512K8F-35
3DTT2
P4C1049-35FSMB
3/
SMJ684002-35HKEM
54230
EDI88512CA35N36B
0EU86
AS5C512K8ECJ-35
See footnotes at end of table.
1 of 9
STANDARD MICROCIRCUIT DRAWING SOURCE APPROVAL BULLETIN – continued.
Standard
microcircuit
drawing PIN 1/
Vendor
CAGE
number
5962-9560002MNA
0EU86
AS5C512K8EC-35
3DTT2
P4C1049-35L36MB
54230
EDI88512CA35F32B
0EU86
AS5C4008F-35
5962-9560002M7A
0EU86
AS5C512K8SOJ-35
5962-9560002M8A
3/
5962-9560003MXA
54230
EDI88512CA25CB
0EU86
AS5C4008CW-25
5962-9560003MYA
54230
EDI88512CA25B32B
5962-9560003MZA
0EU86
AS5C4008EC-25
54230
EDI88512CA25L32B
54230
EDI88512CA25NB
0EU86
AS5C4008ECJ-25
3/
CY7C1048-25FJMB
5962-9560002M9A
5962-9560003MUA
5962-9560003MTA
Vendor
similar
PIN 2/
SMJ684002-35HJAM
54230
EDI88512CA25F36B
0EU86
AS5C512K8F-25
3DTT2
P4C1049-25FSMB
3/
SMJ684002-25HKEM
54230
EDI88512CA25N36B
0EU86
AS5C512K8ECJ-25
0EU86
AS5C512K8EC-25
3DTT2
P4C1049-25L36MB
54230
EDI88512CA25F32B
0EU86
AS5C4008F-25
5962-9560003M7A
0EU86
AS5C512K8SOJ-25
5962-9560003M8A
3/
5962-9560004MXA
54230
EDI88512CA20CB
0EU86
AS5C4008CW-20
54230
EDI88512CA20B32B
5962-9560003MMA
5962-9560003MNA
5962-9560003M9A
5962-9560004MYA
See footnotes at end of table.
2 of 9
SMJ684002-25HJAM
STANDARD MICROCIRCUIT DRAWING SOURCE APPROVAL BULLETIN – continued.
Standard
microcircuit
drawing PIN 1/
Vendor
CAGE
number
5962-9560004MZA
0EU86
54230
AS5C4008EC-20
EDI88512CA20L32B
5962-9560004MUA
54230
EDI88512CA20NB
0EU86
AS5C4008ECJ-20
5962-9560004MTA
Vendor
similar
PIN 2/
3/
CY7C1048-20FJMB
54230
EDI88512CA20F36B
0EU86
AS5C512K8F-20
3DTT2
P4C1049-20FSMB
3/
SMJ684002-20HKEM
54230
EDI88512CA20N36B
0EU86
AS5C512K8ECJ-20
0EU86
AS5C512K8EC-20
3DTT2
P4C1049-20L36MB
54230
EDI88512CA20F32B
0EU86
AS5C4008F-20
5962-9560004M7A
0EU86
AS5C512K8SOJ-20
5962-9560004M8A
3/
5962-9560005MXA
54230
EDI88512LPA45CB
0EU86
AS5C4008CW-45L
5962-9560005MYA
54230
EDI88512LPA45B32B
5962-9560005MZA
0EU86
54230
AS5C4008EC-45L
EDI88512LPA45L32B
5962-9560005MUA
54230
EDI88512LPA45NB
0EU86
AS5C4008ECJ-45L
3/
CY7C1048L-45FJMB
5962-9560004MMA
5962-9560004MNA
5962-9560004M9A
5962-9560005MTA
SMJ684002-20HJAM
54230
EDI88512LPA45F36B
0EU86
AS5C512K8F-45L
3DTT2
P4C1049L-45FSMB
See footnotes at end of table.
3 of 9
STANDARD MICROCIRCUIT DRAWING SOURCE APPROVAL BULLETIN – continued.
Standard
microcircuit
drawing PIN 1/
Vendor
CAGE
number
5962-9560005MMA
54230
EDI88512LPA45N36B
0EU86
AS5C512K8ECJ-45L
0EU86
AS5C512K8EC-45L
3DTT2
P4C1049L-45L36MB
5962-9560005M7A
0EU86
AS5C512K8SOJ-45L
5962-9560005M9A
54230
EDI88512LPA45F32B
0EU86
AS5C4008F-45L
54230
EDI88512LPA35CB
0EU86
AS5C4008CW-35L
5962-9560006MYA
54230
EDI88512LPA35B32B
5962-9560006MZA
0EU86
54230
AS5C4008EC-35L
EDI88512LPA35L32B
5962-9560006MUA
54230
EDI88512LPA35NB
0EU86
AS5C4008ECJ-35L
3/
CY7C1048L-35FJMB
5962-9560005MNA
5962-9560006MXA
5962-9560006MTA
54230
EDI88512LPA35F36B
0EU86
AS5C512K8F-35L
3DTT2
P4C1049L-35FSMB
3/
5962-9560006MMA
5962-9560006MNA
5962-9560006M9A
Vendor
similar
PIN 2/
SMJ684002-35HKEM
54230
EDI88512LPA35N36B
0EU86
AS5C512K8ECJ-35L
0EU86
AS5C512K8EC-35L
3DTT2
P4C1049L-35L36MB
54230
EDI88512LPA35F32B
0EU86
AS5C4008F-35L
5962-9560006M8A
3/
SMJ684002-35HJAM
5962-9560006M7A
0EU86
AS5C512K8SOJ-35L
5962-9560007MXA
54230
EDI88512LPA25CB
0EU86
AS5C4008CW-25L
See footnotes at end of table.
4 of 9
STANDARD MICROCIRCUIT DRAWING SOURCE APPROVAL BULLETIN – continued.
Standard
microcircuit
drawing PIN 1/
Vendor
CAGE
number
Vendor
similar
PIN 2/
5962-9560007MYA
54230
EDI88512LPA25B32B
5962-9560007MZA
0EU86
AS5C4008EC-25L
54230
EDI88512LPA25L32B
54230
EDI88512LPA25NB
0EU86
AS5C4008ECJ-25L
3/
CY7C1048L-25FJMB
5962-9560007MUA
5962-9560007MTA
54230
EDI88512LPA25F36B
0EU86
AS5C512K8F-25L
3DTT2
P4C1049L-25FSMB
3/
5962-9560007MMA
5962-9560007MNA
5962-9560007M9A
SMJ684002-25HKEM
54230
EDI88512LPA25N36B
0EU86
AS5C512K8ECJ-25L
0EU86
AS5C512K8EC-25L
3DTT2
P4C1049L-25L36MB
54230
EDI88512LPA25F32B
0EU86
AS5C4008F-25L
5962-9560007M8A
3/
SMJ684002-25HJAM
5962-9560007M7A
0EU86
AS5C512K8SOJ-25L
5962-9560008MXA
54230
EDI88512LPA20CB
0EU86
AS5C4008CW-20L
5962-9560008MYA
54230
EDI88512LPA20B32B
5962-9560008MZA
0EU86
AS5C4008EC-20L
54230
EDI88512LPA20L32B
54230
EDI88512LPA20NB
0EU86
AS5C4008ECJ-20L
5962-9560008MUA
3/
5962-9560008MTA
54230
EDI88512LPA20F36B
0EU86
AS5C512K8F-20L
3DTT2
P4C1049L-20FSMB
3/
5962-9560008MMA
5962-9560008MNA
CY7C1048L-20FJMB
SMJ684002-20HKEM
54230
EDI88512LPA20N36B
0EU86
AS5C512K8ECJ-20L
0EU86
AS5C512K8EC-20L
3DTT2
P4C1049L-20L36MB
See footnotes at end of table.
5 of 9
STANDARD MICROCIRCUIT DRAWING SOURCE APPROVAL BULLETIN – continued.
Standard
microcircuit
drawing PIN 1/
Vendor
CAGE
number
Vendor
similar
PIN 2/
5962-9560008M9A
54230
EDI88512LPA20F32B
0EU86
AS5C4008F-20L
5962-9560008M8A
3/
SMJ684002-20HJAM
5962-9560008M7A
0EU86
AS5C512K8SOJ-20L
5962-9560009QXA
0EU86
54230
AS5C4008CW-45L
EDI88512LPA45CB
5962-9560009QZA
0EU86
54230
AS5C4008EC-45L
EDI88512LPA45L32B
5962-9560009QUA
0EU86
54230
AS5C4008ECJ-45L
EDI88512LPA45NB
5962-9560009MTA
3DTT2
P4C1049L-45FSMB
5962-9560009QTA
0EU86
54230
AS5C512K8F-45L
EDI88512LPA45F36B
5962-9560009QMA
0EU86
54230
AS5C512K8ECJ-45L
EDI88512LPA45N36B
5962-9560009QNA
0EU86
AS5C512K8EC-45L
5962-9560009MNA
3DTT2
P4C1049L-45L36MB
5962-9560009Q9A
0EU86
54230
AS5C4008F-45L
EDI88512LPA45F32B
5962-9560009Q7A
0EU86
AS5C512K8SOJ-45L
5962-9560010QXA
0EU86
54230
AS5C4008CW-35L
EDI88512LPA35CB
5962-9560010QZA
0EU86
54230
AS5C4008EC-35L
EDI88512LPA35L32B
5962-9560010QUA
0EU86
54230
AS5C4008ECJ-35L
EDI88512LPA35NB
5962-9560010QTA
0EU86
54230
AS5C512K8F-35L
EDI88512LPA35F36B
5962-9560010MTA
3DTT2
P4C1049L-35FSMB
5962-9560010QMA
0EU86
54230
AS5C512K8ECJ-35L
EDI88512LPA35N36B
5962-9560010QNA
0EU86
AS5C512K8EC-35L
5962-9560010MNA
3DTT2
P4C1049L-35L36MB
5962-9560010Q9A
0EU86
54230
AS5C4008F-35L
EDI88512LPA35F32B
5962-9560010Q7A
0EU86
AS5C512K8SOJ-35L
5962-9560011QXA
0EU86
54230
AS5C4008CW-25L
EDI88512LPA25CB
5962-9560011QZA
0EU86
54230
AS5C4008EC-25L
EDI88512LPA25L32B
5962-9560011QUA
0EU86
54230
AS5C4008ECJ-25L
EDI88512LPA25NB
See footnotes at end of table.
6 of 9
STANDARD MICROCIRCUIT DRAWING SOURCE APPROVAL BULLETIN – continued.
Standard
microcircuit drawing
PIN 1/
Vendor
CAGE
number
Vendor
PIN 2/
5962-9560011QTA
0EU86
54230
AS5C512K8F-25L
EDI88512LPA25F36B
5962-9560011MTA
3DTT2
P4C1049L-25FSMB
5962-9560011QMA
0EU86
54230
AS5C512K8ECJ-25L
EDI88512LPA25N36B
5962-9560011QNA
0EU86
AS5C512K8EC-25L
5962-9560011MNA
3DTT2
P4C1049L-25L36MB
5962-9560011Q9A
0EU86
54230
AS5C4008F-25L
EDI88512LPA25F32B
5962-9560011Q7A
0EU86
AS5C512K8SOJ-25L
5962-9560012QXA
0EU86
54230
AS5C4008CW-20L
EDI88512LPA20CB
5962-9560012QZA
0EU86
54230
AS5C4008EC-20L
EDI88512LPA20L32B
5962-9560012QUA
0EU86
54230
AS5C4008ECJ-20L
EDI88512LPA20NB
5962-9560012QTA
0EU86
54230
AS5C512K8F-20L
EDI88512LPA20F36B
5962-9560012MTA
3DTT2
P4C1049L-20FSMB
5962-9560012QMA
0EU86
54230
AS5C512K8ECJ-20L
EDI88512LPA20N36B
5962-9560012QNA
0EU86
AS5C512K8EC-20L
5962-9560012MNA
3DTT2
P4C1049L-20L36MB
5962-9560012Q9A
0EU86
54230
AS5C4008F-20L
EDI88512LPA20F32B
5962-9560012Q7A
0EU86
AS5C512K8SOJ-20L
5962-9560013QXA
0EU86
54230
AS5C4008CW-15L
EDI88512LPA15CB
5962-9560013QZA
0EU86
54230
AS5C4008EC-15L
EDI88512LPA15L32B
5962-9560013QUA
0EU86
54230
AS5C4008ECJ-15L
EDI88512LPA15NB
5962-9560013QTA
0EU86
54230
AS5C512K8F-15L
EDI88512LPA15F36B
5962-9560013MTA
3DTT2
P4C1049L-15FSMB
5962-9560013QMA
0EU86
54230
AS5C512K8ECJ-15L
EDI88512LPA15N36B
5962-9560013QNA
0EU86
AS5C512K8EC-15L
5962-9560013MNA
3DTT2
P4C1049L-15L36MB
See footnotes at end of table.
7 of 9
similar
STANDARD MICROCIRCUIT DRAWING SOURCE APPROVAL BULLETIN – continued.
Standard
microcircuit drawing
PIN 1/
Vendor
CAGE
number
Vendor
PIN 2/
5962-9560013Q9A
0EU86
54230
AS5C4008F-15L
EDI88512LPA15F32B
5962-9560013Q7A
0EU86
AS5C512K8SOJ-15L
5962-9560014QXA
0EU86
54230
AS5C4008CW-15
EDI88512CA15CB
5962-9560014QZA
0EU86
54230
AS5C4008EC-15
EDI88512CA15L32B
5962-9560014QUA
0EU86
54230
AS5C4008ECJ-15
EDI88512CA15NB
5962-9560014QTA
0EU86
54230
AS5C512K8F-15
EDI88512CA15F36B
5962-9560014MTA
3DTT2
P4C1049-15FSMB
5962-9560014QMA
0EU86
54230
AS5C512K8ECJ-15
EDI88512CA15N36B
5962-9560014QNA
0EU86
AS5C512K8EC-15
5962-9560014MNA
3DTT2
P4C1049-15L36MB
5962-9560014Q9A
0EU86
54230
AS5C4008F-15
EDI88512CA15F32B
5962-9560014Q7A
0EU86
AS5C512K8SOJ-15
5962-9560015QXA
0EU86
54230
AS5C4008CW-12L
EDI88512LPA12CB
5962-9560015QZA
0EU86
54230
AS5C4008EC-12L
EDI88512LPA12L32B
5962-9560015QUA
0EU86
54230
AS5C4008ECJ-12L
EDI88512LPA12NB
5962-9560015QTA
0EU86
54230
AS5C512K8F-12L
EDI88512LPA12F36B
5962-9560015MTA
3DTT2
P4C1049L-12FSMB
5962-9560015QMA
0EU86
54230
AS5C512K8ECJ-12L
EDI88512LPA12N36B
5962-9560015QNA
0EU86
AS5C512K8EC-12L
5962-9560015MNA
3DTT2
P4C1049L-12L36MB
5962-9560015Q9A
0EU86
54230
AS5C4008F-12L
EDI88512LPA12F32B
5962-9560015Q7A
0EU86
AS5C512K8SOJ-12L
5962-9560016QXA
0EU86
54230
AS5C4008CW-12
EDI88512CA12CB
See footnotes at end of table.
8 of 9
similar
STANDARD MICROCIRCUIT DRAWING SOURCE APPROVAL BULLETIN – continued.
Standard
microcircuit drawing
PIN 1/
Vendor
CAGE
number
Vendor
PIN 2/
similar
5962-9560016QZA
0EU86
54230
AS5C4008EC-12
EDI88512CA12L32B
5962-9560016QUA
0EU86
54230
AS5C4008ECJ-12
EDI88512CA12NB
5962-9560016QTA
0EU86
54230
AS5C512K8F-12
EDI88512CA12F36B
5962-9560016MTA
3DTT2
P4C1049-12FSMB
5962-9560016QMA
0EU86
54230
AS5C512K8ECJ-12
EDI88512CA12N36B
5962-9560016QNA
0EU86
AS5C512K8EC-12
5962-9560016MNA
3DTT2
P4C1049-12L36MB
5962-9560016Q9A
0EU86
54230
AS5C4008F-12
EDI88512CA12F32B
5962-9560016Q7A
0EU86
AS5C512K8SOJ-12
5962-9560017M6A
6S055
DPA71049D02A
5962-9560017M6C
6S055
DPA71049D02C
1/ The lead finish shown for each PIN representing a hermetic package
is the most readily available from the manufacturer listed for that part.
If the desired lead finish is not listed contact the Vendor to determine
its availability.
2/ Caution. Do not use this number for item acquisition. Items acquired
to this number may not satisfy the performance requirements of this
drawing.
3/ No longer available from an approved source.
Vendor CAGE
number
Vendor name
and address
54230
White Electronic Designs Corporation.
3601 East University Drive
Phoenix, AZ 85034
0EU86
Austin Semiconductor
8701 Cross Park Drive
Austin, TX 78754-4566
3DDT2
Pyramid Semiconductor Corporation
1340 Bordeaux Drive
Sunnyvale, CA 94089
6S055
DPA Components International
2251 Ward Ave.
Simi Valley, CA 93065
The information contained herein is disseminated for convenience only and the
Government assumes no liability whatsoever for any inaccuracies in this information
bulletin.
9 of 9