REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Changes in accordance with NOR 5962-R049-93. 92-12-09 M. A. Frye B Updated boilerplate. Added device types 06-10. - glg 98-10-02 Raymond Monnin C Boilerplate update, part of 5 year review. ksr 08-05-15 Robert M. Heber THE ORIGINAL FIRST PAGE OF THIS DRAWING HAS BEEN REPLACED. REV C C C C C C C C C C SHEET 35 36 37 38 39 40 41 42 43 44 REV C C C C C C C C C C C C C C C C C C C C SHEET 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 REV STATUS REV C C C C C C C C C C C C C C OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Kenneth Rice STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 CHECKED BY http://www.dscc.dla.mil Rajesh Pithadia APPROVED BY THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE AMSC N/A Michael Frye DRAWING APPROVAL DATE 92-11-09 REVISION LEVEL C MICROCIRCUIT, MEMORY, DIGITAL, CMOS, 256K X 4 DYNAMIC RANDOM ACCESS MEMORY (DRAM), MONOLITHIC SILICON SIZE CAGE CODE A 67268 SHEET DSCC FORM 2233 APR 97 1 OF 5962-90617 44 5962-E605-07 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 │ │ │ Federal stock class designator │ │ │ RHA designator (see 1.2.1) 90617 \ 01 │ │ │ Device type (see 1.2.2) Q │ │ │ Device class designator (see 1.2.3) / R │ │ │ Case outline (see 1.2.4) A │ │ │ Lead finish (see 1.2.5) \/ Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type 01,06 02,07 03,08 04,09 05,10 Generic number 1/ Circuit function 256K x 4 dynamic random access memory 256K x 4 dynamic random access memory 256K x 4 dynamic random access memory 256K x 4 dynamic random access memory 256K x 4 dynamic random access memory Access time 150 ns 120 ns 100 ns 80 ns 70 ns 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class M Q or V Device requirements documentation Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter R X Y Z U T N 1/ Descriptive designator GDIP1-T20 or CDIP2-T20 See figure 1 See figure 1 See figure 1 See figure 1 See figure 1 See figure 1 Terminals 20 20 20 20 20 20 20 Package style Dual-in-line J-leaded small-outline Rectangular chip carrier Thin rectangular chip carrier Flat pack Zig-zag-in-line Flat pack Generic numbers are listed on the Standard Microcircuit Drawing Source Approval Bulletin at the end of this document and will also be listed in QML-38535 and MIL-HDBK-103 (see 6.6 herein). STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-90617 A REVISION LEVEL C SHEET 2 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. 1.3 Absolute maximum ratings. 2/ Supply voltage range on any pin ................................................ Input voltage range on VCC......................................................... Short circuit output current ......................................................... Maximum power dissipation (PD) ............................................... Storage temperature range ........................................................ Lead temperature (soldering, 10 seconds)................................. Thermal resistance, junction-to-case (θJC): Case R ................................................................................... Case X.................................................................................... Case Y.................................................................................... Case Z.................................................................................... Case U ................................................................................... Case T .................................................................................... Case N ................................................................................... Junction temperature (TJ) 3/...................................................... 1.4 Recommended operating conditions. Supply voltage range (VCC) 4/ ................................................... High level input voltage range (VIH)............................................ Low level input voltage range (VIL) 5/ ......................................... Case operating temperature range (TC) ..................................... -1.0 V dc to 7.0 V dc 0 V dc to 7.0 V dc 50 mA 1.0 W -65°C to +150°C +260°C See MIL-STD-1835 20°C/W 20°C/W 20°C/W 20°C/W 7.0°C/W 20°C/W +175°C +4.5 V dc to +5.5 V dc 2.4 V dc minimum to 6.5 V dc maximum -1.0 V dc minimum to 0.8 V dc maximum -55°C to +125°C 1.5 Digital logic testing for device classes Q and V. Fault coverage measurement of manufacturing ......................... logic tests (MIL-STD-883, method 5012) .............................................. 100 percent 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 MIL-STD-1835 - Test Method Standard Microcircuits. Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 MIL-HDBK-780 - List of Standard Microcircuit Drawings. Standard Microcircuit Drawings. (Copies of these documents are available online at http://assist.daps.dla.mil/quicksearch/ or http://assist.daps.dla.mil from the Standardization Document Order Desk, 700 Robins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2/ 3/ 4/ 5/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. Maximum junction temperature shall not be exceeded except for allowable short duration burn-in screening conditions in accordance with method 5004 of MIL-STD-883. All voltage values in this drawing are with respect to VSS. The algebraic convention, where the more negative (less positive) limit is designated as a minimum, is used in this drawing for logic voltage levels only. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-90617 A REVISION LEVEL C SHEET 3 2.2 Non-Government publications. The following document(s) form a part of this document to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation. AMERICAN SOCIETY FOR TESTING AND MATERIALS (ASTM) ASTM Standard F1192-00 - Standard Guide for the Measurement of Single Event Phenomena from Heavy Ion Irradiation of Semiconductor Devices. (Applications for copies of ASTM publications should be addressed to: ASTM International, PO Box C700, 100 Barr Harbor Drive, West Conshohocken, PA 19428-2959; http://www.astm.org.) ELECTRONICS INDUSTRIES ASSOCIATION (EIA) JEDEC Standard EIA/JESD78 - IC Latch-Up Test. (Applications for copies should be addressed to the Electronics Industries Association, 2500 Wilson Boulevard, Arlington, VA 22201; http://www.jedec.org.) (Non-Government standards and other publications are normally available from the organizations that prepare or distribute the documents. These documents also may be available in or through libraries or other informational services.) 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturer's Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outline(s). The case outline(s) shall be in accordance with 1.2.4 herein and figure 1. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 2. 3.2.3 Truth table. The truth table shall be as specified on figure 3. 3.2.4 Functional tests. Various functional tests used to test this device are contained in the appendix. If the test patterns cannot be implemented due to test equipment limitations, alternate test patterns to accomplish the same results shall be allowed. For device class M, alternate test patterns shall be maintained under document revision level control by the manufacturer and shall be made available to the preparing or acquiring activity upon request. For device classes Q and V alternate test patterns shall be under the control of the device manufacturer's Technology Review Board (TRB) in accordance with MIL-PRF-38535 and shall be made available to the preparing or acquiring activity upon request. 3.2.5 Die overcoat. Polyimide and silicone coatings are allowable as an overcoat on the die for alpha particle protection only. Each coated microcircuit inspection lot (see inspection lot as defined in MIL-PRF-38535) shall be subjected to and pass the internal moisture content test at 5000 ppm (see method 1018 of MIL-STD-883). The frequency of the internal water vapor testing shall not be decreased unless approved by the preparing activity for class M. The TRB will ascertain the requirements as provided by MIL-PRF-38535 for classes Q and V. Samples may be pulled any time after seal. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full case operating temperature range. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-90617 A REVISION LEVEL C SHEET 4 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table IIA. The electrical tests for each subgroup are defined in table I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturer's PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the "5962-" on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a "QML" or "Q" as required in MIL-PRF-38535. The compliance mark for device class M shall be a "C" as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturer's product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device class M, notification to DSCC-VA of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any change that affects this drawing. 3.9 Verification and review for device class M. For device class M, DSCC, DSCC's agent, and the acquiring activity retain the option to review the manufacturer's facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit group number 41 (see MIL-PRF-38535, appendix A). 4. VERIFICATION 4.1 Sampling and inspection. For device classes Q and V, sampling and inspection procedures shall be in accordance with MIL-PRF-38535 or as modified in the device manufacturer's Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. For device class M, sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. For device classes Q and V, screening shall be in accordance with MIL-PRF-38535, and shall be conducted on all devices prior to qualification and technology conformance inspection. For device class M, screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. 4.2.1 Additional criteria for device class M. a. Delete the sequence specified as initial (preburn-in) electrical parameters through interim (postburn-in) electrical parameters of method 5004 and substitute lines 1 through 6 of table IIA herein. b. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015. (1) c. Dynamic burn-in (method 1015 of MIL-STD-883, test condition D; for circuit, see 4.2.1b herein). Interim and final electrical test parameters shall be as specified in table IIA herein. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-90617 A REVISION LEVEL C SHEET 5 TABLE I. Electrical performance characteristics. Test High level output voltage Low level output voltage Input leakage current Output leakage current Power supply current read or write cycle Power supply current standby Power supply current average refresh (RAS-only or CBR) │ │Symbol │ │ │ │ │ VOH │ │ │ │ VOL │ │ │ │ II │ │ │ │ │ IO │ │ │ │ ICC1 │ │ │ │ │ │ │ │ │ │ │ │ ICC2 │ │ │ │ │ ICC3 │ │ │ │ │ │ │ │ │ │ │ │ Conditions │ -55°C ≤ TC ≤ +125°C │ 4.5 V ≤ VCC ≤ 5.5 V │ unless otherwise specified │ │ VCC = 4.5 V, IOH = -5 mA, │ VIL = .8 V, VIH = 2.4 V │ │ │ VCC = 4.5 V, IOL = 4.2 mA, │ VIL = .8 V, VIH = 2.4 V │ │ │ VI = 0 V to 6.5 V, │ VCC = 5.0 V, │ All other pins = 0 V to VCC │ │ │ VCC = 5.5 V, CAS high, │ VO = VCC to 0 V │ │ │ Minimum cycle, │ VCC = 5.5 V, │ Measured for a maximum of │ one address transition while │ RAS = VIL │ │ │ │ │ │ │ │ After one memory cycle, │ RAS and CAS high, │ VIH = 2.4 V │ │ │ VCC = 5.5 V, minimum cycle, │ │ RAS cycling, CAS high, (RAS-only) │ │ RAS low after CAS low (CBR), │ Measured for a maximum of │ one address transition while │ RAS = VIL │ │ │ │ │ │Group A │Device │subgroups │ type │ │ │ │ │ │ │ 1,2,3 │ │ │ All │ │ │ │ │ 1,2,3 │ │ │ All │ │ │ │ │ 1,2,3 │ All │ │ │ │ │ │ │ │ │ 1,2,3 │ All │ │ │ │ │ │ │ 1,2,3 │ 01,06 │ │ │ │ 02,07 │ │ │ │ 03,08 │ │ │ │ 04,09 │ │ │ │ 05,10 │ │ │ │ │ │ │ 1,2,3 │ All │ │ │ │ │ │ │ │ │ 1,2,3 │ 01,06 │ │ │ │ 02,07 │ │ │ │ 03,08 │ │ │ │ 04,09 │ │ │ │ 05,10 │ │ │ │ │ │ Limits │ │ │ Min │ Max │ │ │ │ │ │ │ 2.4 │ │ │ │ │ │ │ │ │ 0.4 │ │ │ │ │ │ ±10 │ │ │ │ │ │ │ │ │ │ ±10 │ │ │ │ │ │ │ │ 55 │ │ │ │ 60 │ │ │ │ 70 │ │ │ │ 80 │ │ │ │ 90 │ │ │ │ │ │ │ │ 4 │ │ │ │ │ │ │ │ │ │ 55 │ │ │ │ 60 │ │ │ │ 70 │ │ │ │ 80 │ │ │ │ 90 │ │ │ │ │ │ Unit │ │ │ │ │ │V │ │ │ │V │ │ │ μA │ │ │ │ │ μA │ │ │ │ mA │ │ │ │ │ │ │ │ │ │ │ │ mA │ │ │ │ │ mA │ │ │ │ │ │ │ │ │ │ See footnotes at end of table. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-90617 A REVISION LEVEL C SHEET 6 TABLE I. Electrical performance characteristics - Continued. Test Power supply current average page Input capacitance, address inputs Input capacitance, strobe inputs Input capacitance, write-enable inputs Output capacitance Access time from column address Access time from CAS low │ │Symbol │ │ │ │ │ ICC4 │ │ │ │ │ │ │ │ │ │ │CI(A) │ │ │ │CI(S) │ │ │ │CI(W) │ │ │ │ CO │ │ │ │ta(CA) │ │ │ │ │ │ │ │ │ │ │ta(C) │ │ │ │ │ │ │ │ │ │ │ Conditions │ -55°C ≤ TC ≤ +125°C │ 4.5 V ≤ VCC ≤ 5.5 V │ unless otherwise specified │ │ RAS low, CAS cycling, │ tPC = minimum, VCC = 5.5 V, │ Measured for a maximum of │ one address transition while │ CAS = VIH │ │ │ │ │ │ │ │ f = 1 MHz see 4.4.1e, │ Bias on pins under test = 0 V │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ See figures 4 and 5 1/ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │Group A │Device │subgroups │ type │ │ │ │ │ │ │ 1,2,3 │ 01,06 │ │ │ │ 02,07 │ │ │ │ 03,08 │ │ │ │ 04,09 │ │ │ │ 05,10 │ │ │ │ │ 4 │ All │ │ │ │ │ │ │ 4 │ All │ │ │ │ │ │ │ 4 │ All │ │ │ │ │ │ │ 4 │ All │ │ │ │ │ │ │ 9,10,11 │ 01,06 │ │ │ │ 02,07 │ │ │ │ 03,08 │ │ │ │ 04,09 │ │ │ │ 05,10 │ │ │ │ │ 9,10,11 │ 01,06 │ │ │ │ 02,07 │ │ │ │ 03.08 │ │ │ │ 04,09 │ │ │ │ 05,10 │ │ │ │ Limits │ │ │ Min │ Max │ │ │ │ │ │ 35 │ │ │ │ 45 │ │ │ │ 50 │ │ │ │ 60 │ │ │ │ 70 │ │ │ │ │ │ 10 │ │ │ │ │ │ │ │ 10 │ │ │ │ │ │ │ │ 10 │ │ │ │ │ │ │ │ 10 │ │ │ │ │ │ │ │ 70 │ │ │ │ 55 │ │ │ │ 45 │ │ │ │ 40 │ │ │ │ 35 │ │ │ │ │ │ 40 │ │ │ │ 30 │ │ │ │ 25 │ │ │ │ 20 │ │ │ │ 20 │ │ │ │ Unit │ │ │ │ │ mA │ │ │ │ │ │ │ │ │ │ │ pF │ │ │ │ pF │ │ │ │ pF │ │ │ │ pF │ │ │ │ ns │ │ │ │ │ │ │ │ │ │ │ ns │ │ │ │ │ │ │ │ │ See footnotes at end of table. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-90617 A REVISION LEVEL C SHEET 7 TABLE I. Electrical performance characteristics - Continued. Test Access time from column precharge Access time from RAS low Access time from G low Output disable time after CAS high 2/ │ │Symbol │ │ │ │ │ta(CP) │ │ │ │ │ │ │ │ │ │ │ │ta(R) │ │ │ │ │ │ │ │ │ │ │ │ta(G) │ │ │ │ │ │ │ │ │ │ │ │tdis(CH) │ │ │ │ │ │ │ │ │ │ │ │ Conditions │ -55°C ≤ TC ≤ +125°C │ 4.5 V ≤ VCC ≤ 5.5 V │ unless otherwise specified │ │See figures 4 and 5 1/ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │Group A │Device │subgroups │ type │ │ │ │ │ │ │ 9,10,11 │ 01,06 │ │ │ │ 02,07 │ │ │ │ 03,08 │ │ │ │ 04,09 │ │ │ │ 05,10 │ │ │ │ │ │ │ 9,10,11 │ 01,06 │ │ │ │ 02,07 │ │ │ │ 03,08 │ │ │ │ 04,09 │ │ │ │ 05,10 │ │ │ │ │ │ │ 9,10,11 │ 01,06 │ │ │ │ 02,07 │ │ │ │ 03,08 │ │ │ │ 04,09 │ │ │ │ 05,10 │ │ │ │ │ │ │ 9,10,11 │ 01,06 │ │ │ │ 02,07 │ │ │ │ 03,08 │ │ │ │ 04,09 │ │ │ │ 05,10 │ │ │ │ │ │ Limits │ │ │ Min │ Max │ │ │ │ │ │ 75 │ │ │ │ 60 │ │ │ │ 55 │ │ │ │ 45 │ │ │ │ 40 │ │ │ │ │ │ │ │ 150 │ │ │ │ 120 │ │ │ │ 100 │ │ │ │ 80 │ │ │ │ 70 │ │ │ │ │ │ │ │ 40 │ │ │ │ 30 │ │ │ │ 25 │ │ │ │ 20 │ │ │ │ 20 │ │ │ │ │ │ │ │ 35 │ │ │ │ 30 │ │ │ │ 25 │ │ │ │ 20 │ │ │ │ 20 │ │ │ │ │ │ Unit │ │ │ │ │ ns │ │ │ │ │ │ │ │ │ │ │ │ ns │ │ │ │ │ │ │ │ │ │ │ │ ns │ │ │ │ │ │ │ │ │ │ │ │ ns │ │ │ │ │ │ │ │ │ │ See footnotes at end of table. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-90617 A REVISION LEVEL C SHEET 8 TABLE I. Electrical performance characteristics - Continued. Test Output disable time after G high 2/ Cycle time read or write 3/ Cycle time read-write/ read-modify-write Cycle time, pagemode read or write 4/ │ │Symbol │ │ │ │ │tdis(G) │ │ │ │ │ │ │ │ │ │ │ │tc(rd) │tc(W) │ │ │ │ │ │ │ │ │ │ │tc(rdW) │ │ │ │ │ │ │ │ │ │ │ │tc(P) │ │ │ │ │ │ │ │ │ │ │ │ Conditions │ -55°C ≤ TC ≤ +125°C │ 4.5 V ≤ VCC ≤ 5.5 V │ unless otherwise specified │ │See figures 4 and 5 1/ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │Group A │Device │subgroups │ type │ │ │ │ │ │ │ 9,10,11 │ 01,06 │ │ │ │ 02,07 │ │ │ │ 03,08 │ │ │ │ 04,09 │ │ │ │ 05,10 │ │ │ │ │ │ │ 9,10,11 │ 01,06 │ │ │ │ 02,07 │ │ │ │ 03,08 │ │ │ │ 04,09 │ │ │ │ 05,10 │ │ │ │ │ │ │ 9,10,11 │ 01,06 │ │ │ │ 02,07 │ │ │ │ 03,08 │ │ │ │ 04,09 │ │ │ │ 05,10 │ │ │ │ │ │ │ 9,10,11 │ 01,06 │ │ │ │ 02,07 │ │ │ │ 03,08 │ │ │ │ 04,09 │ │ │ │ 05,10 │ │ │ │ │ │ Limits │ │ │ Min │ Max │ │ │ │ │ │ 35 │ │ │ │ 30 │ │ │ │ 25 │ │ │ │ 20 │ │ │ │ 20 │ │ │ │ │ │ │ 260 │ │ │ │ 220 │ │ │ │ 190 │ │ │ │ 150 │ │ │ │ 130 │ │ │ │ │ │ │ │ │ 355 │ │ │ │ 305 │ │ │ │ 270 │ │ │ │ 225 │ │ │ │ 205 │ │ │ │ │ │ │ 80 │ │ │ │ 65 │ │ │ │ 55 │ │ │ │ 50 │ │ │ │ 45 │ │ │ │ │ │ │ Unit │ │ │ │ │ ns │ │ │ │ │ │ │ │ │ │ │ │ ns │ │ │ │ │ │ │ │ │ │ │ │ ns │ │ │ │ │ │ │ │ │ │ │ │ ns │ │ │ │ │ │ │ │ │ │ See footnotes at end of table. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-90617 A REVISION LEVEL C SHEET 9 TABLE I. Electrical performance characteristics - Continued. Test Cycle time, pagemode read-modify-write Pulse duration, CAS low 5/ Pulse duration, page-mode, RAS low 6/ Pulse duration, non-page-mode, RAS low 6/ │ │Symbol │ │ │ │ │ tc(PM) │ │ │ │ │ │ │ │ │ │ │ │ tw(CL) │ │ │ │ │ │ │ │ │ │ │ │ tw(RL)P │ │ │ │ │ │ │ │ │ │ │ │ tw(RL) │ │ │ │ │ │ │ │ │ │ │ │ Conditions │ -55°C ≤ TC ≤ +125°C │ 4.5 V ≤ VCC ≤ 5.5 V │ unless otherwise specified │ │See figures 4 and 5 4/ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │Group A │Device │subgroups │ type │ │ │ │ │ │ │ 9,10,11 │ 01,06 │ │ │ │ 02,07 │ │ │ │ 03,08 │ │ │ │ 04,09 │ │ │ │ 05,10 │ │ │ │ │ │ │ 9,10,11 │ 01,06 │ │ │ │ 02,07 │ │ │ │ 03,08 │ │ │ │ 04,09 │ │ │ │ 05,10 │ │ │ │ All │ │ │ 9,10,11 │ 01,06 │ │ │ │ 02,07 │ │ │ │ 03,08 │ │ │ │ 04,09 │ │ │ │ 05,10 │ │ │ │ All │ │ │ 9,10,11 │ 01,06 │ │ │ │ 02,07 │ │ │ │ 03,08 │ │ │ │ 04,09 │ │ │ │ 05,10 │ │ │ │ All │ │ Limits │ │ │ Min │ Max │ │ │ │ │ 175 │ │ │ │ 150 │ │ │ │ 135 │ │ │ │ 100 │ │ │ │ 95 │ │ │ │ │ │ │ │ 40 │ │ │ │ 30 │ │ │ │ 25 │ │ │ │ 20 │ │ │ │ 18 │ │ │ │ │ 10 │ │ │ 0.15 │ │ │ │ 0.12 │ │ │ │ 0.10 │ │ │ │ 0.08 │ │ │ │ 0.07 │ │ │ │ │ 100 │ │ │ 150 │ │ │ │ 120 │ │ │ │ 100 │ │ │ │ 80 │ │ │ │ 70 │ │ │ │ │ 10 │ │ Unit │ │ │ │ │ ns │ │ │ │ │ │ │ │ │ │ │ │ ns │ │ │ │ │ │ │ │ │ │ μs │ │ μs │ │ │ │ │ │ │ │ │ │ │ │ ns │ │ │ │ │ │ │ │ │ │ μs See footnotes at end of table. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-90617 A REVISION LEVEL C SHEET 10 TABLE I. Electrical performance characteristics - Continued. │ │Symbol │ │ │ │ │ tw(CH) Pulse duration, CAS high │ │ │ │ │ │ │ │ │ │ │ │ tw(RH) Pulse duration, RAS high │ (precharge) │ │ │ │ │ │ │ │ │ │ Pulse duration, │ tw(WL) write │ │ │ │ │ │ │ │ │ │ │ Setup time, column-, │ tsu(CA) │ address before CAS low │ │ Setup time, row-address │ tsu(RA) before RAS low │ │ │ Setup time, data before │ tsu(D) │ W low 7/ │ Test │ │ Conditions │ -55°C ≤ TC ≤ +125°C │ 4.5 V ≤ VCC ≤ 5.5 V │ unless otherwise specified │ │ See figures 4 and 5 1/ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │Group A │Device │subgroups │ type │ │ │ │ │ │ │ 9,10,11 │ 01,06 │ │ │ │ 02,07 │ │ │ │ 03,08 │ │ │ │ 04,09 │ │ │ │ 05,10 │ │ │ │ │ │ │ 9,10,11 │ 01,06 │ │ │ │ 02,07 │ │ │ │ 03,08 │ │ │ │ 04,09 │ │ │ │ 05,10 │ │ │ │ │ │ │ 9,10,11 │ 01,06 │ │ │ │ 02,07 │ │ │ │ 03,08 │ │ │ │ 04,09 │ │ │ │ 05,10 │ │ │ │ │ │ │ 9,10,11 │ All │ │ │ │ │ │ │ 9,10,11 │ All │ │ │ │ │ │ │ 9,10,11 │ All │ │ │ │ │ │ Limits │ │ │ Min │ Max │ │ │ │ │ 25 │ │ │ │ 15 │ │ │ │ 10 │ │ │ │ 10 │ │ │ │ 10 │ │ │ │ │ │ │ │ 100 │ │ │ │ 90 │ │ │ │ 80 │ │ │ │ 60 │ │ │ │ 50 │ │ │ │ │ │ │ │ 25 │ │ │ │ 20 │ │ │ │ 15 │ │ │ │ 15 │ │ │ │ 15 │ │ │ │ │ │ │ │ 5 │ │ │ │ │ │ │ │ 0 │ │ │ │ │ │ │ │ 0 │ │ │ │ │ │ │ Unit │ │ │ │ │ ns │ │ │ │ │ │ │ │ │ │ │ │ ns │ │ │ │ │ │ │ │ │ │ │ │ ns │ │ │ │ │ │ │ │ │ │ │ │ ns │ │ │ │ ns │ │ │ │ ns │ │ See footnotes at end of table. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-90617 A REVISION LEVEL C SHEET 11 TABLE I. Electrical performance characteristics - Continued. │ │Symbol │ │ │ │ Setup time, read before │ tsu(rd) CAS low │ │ │ │ tsu(WCH) Setup time, W low before CAS high │ │ │ │ │ │ │ │ │ │ tsu(WRH) Setup time, W low before RAS high │ │ │ │ │ │ │ │ │ │ tsu(WCL) Setup time, W low │ before CAS low 8/ │ │ │ tsu(WRP) Setup time, W high before RAS low (CAS │ before RAS refresh) 9/ │ │ │ Hold time, W high from │ th(WRH) │ RAS low (CAS before RAS refresh) 9/ │ │ │ │ th(CA) Hold time, columnaddress after CAS low │ │ 7/ │ │ │ │ │ │ Test │ │ Conditions │ -55°C ≤ TC ≤ +125°C │ 4.5 V ≤ VCC ≤ 5.5 V │ unless otherwise specified │ │ See figures 4 and 5 1/ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │Group A │Device │subgroups │ type │ │ │ │ │ │ │ 9,10,11 │ All │ │ │ │ │ │ │ 9,10,11 │ 01,06 │ │ │ │ 02,07 │ │ │ │ 03,08 │ │ │ │ 04,09 │ │ │ │ 05,10 │ │ │ 9,10,11 │ 01,06 │ │ │ │ 02,07 │ │ │ │ 03,08 │ │ │ │ 04,09 │ │ │ │ 05,10 │ │ │ 9,10,11 │ All │ │ │ │ │ │ │ 9,10,11 │ 06-10 │ │ │ │ │ │ │ │ │ 9,10,11 │ 06-10 │ │ │ │ │ │ │ │ │ 9,10,11 │ 01,06 │ │ │ │ 02,07 │ │ │ │ 03,08 │ │ │ │ 04,09 │ │ │ │ 05,10 │ │ Limits │ │ │ Min │ Max │ │ │ │ │ 0 │ │ │ │ │ │ │ │ 40 │ │ │ │ 30 │ │ │ │ 25 │ │ │ │ 20 │ │ │ │ 18 │ │ │ │ 40 │ │ │ │ 30 │ │ │ │ 25 │ │ │ │ 20 │ │ │ │ 18 │ │ │ │ 0 │ │ │ │ │ │ │ │ 10 │ │ │ │ │ │ │ │ │ │ 10 │ │ │ │ │ │ │ │ │ │ 35 │ │ │ │ 20 │ │ │ │ 20 │ │ │ │ 20 │ │ │ │ 15 │ │ │ Unit │ │ │ │ │ ns │ │ │ │ ns │ │ │ │ │ │ │ │ │ │ ns │ │ │ │ │ │ │ │ │ │ ns │ │ │ │ ns │ │ │ │ │ ns │ │ │ │ │ ns │ │ │ │ │ │ │ │ See footnotes at end of table. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-90617 A REVISION LEVEL C SHEET 12 TABLE I. Electrical performance characteristics - Continued. Test Hold time, data after CAS low 7/ Hold time, data after RAS low 10/ Hold time, column address after RAS low 10/ Hold time, rowaddress after RAS low │ │Symbol │ │ │ │ │ th(D) │ │ │ │ │ │ │ │ │ │ │ │ th(RLD) │ │ │ │ │ │ │ │ │ │ │ │ th(RLCA) │ │ │ │ │ │ │ │ │ │ │ │ th(RA) │ │ │ │ │ │ │ │ │ │ │ │ Conditions │ -55°C ≤ TC ≤ +125°C │ 4.5 V ≤ VCC ≤ 5.5 V │ unless otherwise specified │ │ See figures 4 and 5 1/ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │Group A │Device │subgroups │ type │ │ │ │ │ │ │ 9,10,11 │ 01,06 │ │ │ │ 02,07 │ │ │ │ 03,08 │ │ │ │ 04,09 │ │ │ │ 05,10 │ │ │ │ │ │ │ 9,10,11 │ 01,06 │ │ │ │ 02,07 │ │ │ │ 03,08 │ │ │ │ 04,09 │ │ │ │ 05,10 │ │ │ │ │ │ │ 9,10,11 │ 01,06 │ │ │ │ 02,07 │ │ │ │ 03,08 │ │ │ │ 04,09 │ │ │ │ 05,10 │ │ │ │ │ │ │ 9,10,11 │ 01,06 │ │ │ │ 02,07 │ │ │ │ 03,08 │ │ │ │ 04,09 │ │ │ │ 05,10 │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ Limits │ Min │ Max │ │ 30 │ │ 25 │ │ 20 │ │ 15 │ │ 15 │ │ │ │ 110 │ │ 85 │ │ 70 │ │ 60 │ │ 55 │ │ │ │ 100 │ │ 80 │ │ 70 │ │ 60 │ │ 55 │ │ │ │ 20 │ │ 15 │ │ 15 │ │ 15 │ │ 15 │ │ │ │ │ Unit │ │ │ │ │ ns │ │ │ │ │ │ │ │ │ │ │ │ ns │ │ │ │ │ │ │ │ │ │ │ │ ns │ │ │ │ │ │ │ │ │ │ │ │ ns │ │ │ │ │ │ │ │ │ │ See footnotes at end of table. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-90617 A REVISION LEVEL C SHEET 13 TABLE I. Electrical performance characteristics - Continued. Test Hold time, read after CAS high 11/ Hold time, read after RAS high 11/ Hold time, write after CAS low (early write operation only) 8/ Hold time, write after RAS low 10/ Delay time, column address to W low (read-write operation only) 12/ Delay time, CAS high to RAS low │ │Symbol │ │ │ │ │ th(CHrd) │ │ │ │ th(RHrd) │ │ │ │ th(CLW) │ │ │ │ │ │ │ │ │ │ │ │ th(RLW) │ │ │ │ │ │ │ │ │ │ │ │ td(CAWL) │ │ │ │ │ │ │ │ │ │ │ │ td(CHRL) │ │ │ │ Conditions │ -55°C ≤ TC ≤ +125°C │ 4.5 V ≤ VCC ≤ 5.5 V │ unless otherwise specified │ │ See figures 4 and 5 1/ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │Group A │Device │subgroups │ type │ │ │ │ │ │ │ 9,10,11 │ All │ │ │ │ │ │ │ 9,10,11 │ All │ │ │ │ │ │ │ 9,10,11 │ 01,06 │ │ │ │ 02,07 │ │ │ │ 03,08 │ │ │ │ 04,09 │ │ │ │ 05,10 │ │ │ │ │ │ │ 9,10,11 │ 01,06 │ │ │ │ 02,07 │ │ │ │ 03,08 │ │ │ │ 04,09 │ │ │ │ 05,10 │ │ │ │ │ │ │ 9,10,11 │ 01,06 │ │ │ │ 02,07 │ │ │ │ 03,08 │ │ │ │ 04,09 │ │ │ │ 05,10 │ │ │ │ │ │ │ 9,10,11 │ All │ │ │ │ │ │ Limits │ │ │ Min │ Max │ │ │ │ │ 0 │ │ │ │ │ │ │ │ 10 │ │ │ │ │ │ │ │ 30 │ │ │ │ 25 │ │ │ │ 20 │ │ │ │ 15 │ │ │ │ 15 │ │ │ │ │ │ │ │ 105 │ │ │ │ 90 │ │ │ │ 75 │ │ │ │ 70 │ │ │ │ 70 │ │ │ │ │ │ │ │ 120 │ │ │ │ 105 │ │ │ │ 95 │ │ │ │ 80 │ │ │ │ 75 │ │ │ │ │ │ │ │ 10 │ │ │ │ │ │ │ Unit │ │ │ │ │ ns │ │ │ │ ns │ │ │ │ ns │ │ │ │ │ │ │ │ │ │ │ │ ns │ │ │ │ │ │ │ │ │ │ │ │ ns │ │ │ │ │ │ │ │ │ │ │ │ ns │ │ See footnotes at end of table. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-90617 A REVISION LEVEL C SHEET 14 TABLE I. Electrical performance characteristics - Continued. Test Delay time, RAS low to CAS high Delay time, CAS low to RAS low (CASbefore-RAS refresh only) 13/ Hold time, G after W low Delay time, CAS low to W low (Readmodify-write operation only) │ │Symbol │ │ │ │ │ td(RLCH) │ │ │ │ │ │ │ │ │ │ │ │td(CLRL)R │ │ │ │ │ │ │ │ │ │ │ │th(WLGL) │ │ │ │ │ │ │ │ │ │ │ │ td(CLWL) │ │ │ │ │ │ │ │ │ │ │ │ Conditions │ -55°C ≤ TC ≤ +125°C │ 4.5 V ≤ VCC ≤ 5.5 V │ unless otherwise specified │ │ See figures 4 and 5 1/ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │Group A │Device │subgroups │ type │ │ │ │ │ │ │ 9,10,11 │ 01,06 │ │ │ │ 02,07 │ │ │ │ 03,08 │ │ │ │ 04,09 │ │ │ │ 05,10 │ │ │ │ │ │ │ 9,10,11 │ 01,06 │ │ │ │ 02,07 │ │ │ │ 03,08 │ │ │ │ 04,09 │ │ │ │ 05,10 │ │ │ │ │ │ │ 9,10,11 │ 01,06 │ │ │ │ 02,07 │ │ │ │ 03,08 │ │ │ │ 04,09 │ │ │ │ 05,10 │ │ │ │ │ │ │ 9,10,11 │ 01,06 │ │ │ │ 02,07 │ │ │ │ 03,08 │ │ │ │ 04,09 │ │ │ │ 05,10 │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ Limits │ Min │ Max │ │ 150 │ │ 120 │ │ 100 │ │ 80 │ │ 70 │ │ │ │ 15 │ │ 15 │ │ 10 │ │ 10 │ │ 10 │ │ │ │ 40 │ │ 30 │ │ 25 │ │ 20 │ │ 18 │ │ │ │ 90 │ │ 80 │ │ 70 │ │ 60 │ │ 50 │ │ │ │ │ Unit │ │ │ │ │ ns │ │ │ │ │ │ │ │ │ │ │ │ ns │ │ │ │ │ │ │ │ │ │ │ │ ns │ │ │ │ │ │ │ │ │ │ │ │ ns │ │ │ │ │ │ │ │ │ │ See footnotes at end of table. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-90617 A REVISION LEVEL C SHEET 15 TABLE I. Electrical performance characteristics - Continued. Test Delay time, RAS low to column address 14/ Delay time, column address to RAS high 15/ Delay time, column address to CAS high 15/ Delay time, RAS low to CAS low 14/ │ │Symbol │ │ │ │ │ td(RLCA) │ │ │ │ │ │ │ │ │ │ │ │ td(CARH) │ │ │ │ │ │ │ │ │ │ │ │ td(CACH) │ │ │ │ │ │ │ │ │ │ │ │ td(RLCL) │ │ │ │ │ │ │ │ │ │ │ │ Conditions │ -55°C ≤ TC ≤ +125°C │ 4.5 V ≤ VCC ≤ 5.5 V │ unless otherwise specified │ │ See figures 4 and 5 1/ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │Group A │Device │subgroups │ type │ │ │ │ │ │ │ 9,10,11 │ 01,06 │ │ │ │ 02,07 │ │ │ │ 03,08 │ │ │ │ 04,09 │ │ │ │ 05,10 │ │ │ │ │ │ │ 9,10,11 │ 01,06 │ │ │ │ 02,07 │ │ │ │ 03,08 │ │ │ │ 04,09 │ │ │ │ 05,10 │ │ │ │ │ │ │ 9,10,11 │ 01,06 │ │ │ │ 02,07 │ │ │ │ 03,08 │ │ │ │ 04,09 │ │ │ │ 05,10 │ │ │ │ │ │ │ 9,10,11 │ 01,06 │ │ │ │ 02,07 │ │ │ │ 03,08 │ │ │ │ 04,09 │ │ │ │ 05,10 │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ Min 25 20 20 20 15 70 55 45 40 35 70 55 45 40 35 30 30 30 30 25 Limits │ │ Max │ │ │ 80 │ │ 65 │ │ 55 │ │ 40 │ │ 35 │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ 110 │ │ 90 │ │ 75 │ │ 60 │ │ 50 │ │ │ │ Unit │ │ │ │ │ ns │ │ │ │ │ │ │ │ │ │ │ │ ns │ │ │ │ │ │ │ │ │ │ │ │ ns │ │ │ │ │ │ │ │ │ │ │ │ ns │ │ │ │ │ │ │ │ │ │ See footnotes at end of table. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-90617 A REVISION LEVEL C SHEET 16 TABLE I. Electrical performance characteristics - Continued. Test Delay time, CAS low to RAS high Delay time, RAS high CAS low (CAS before RAS refresh only) 13/ Delay time, RAS low to W low (Readmodify-write operation only) 12/ Delay time, G high before data at DQ Delay time, G low to RAS high 15/ │ │Symbol │ │ │ │ │ td(CLRH) │ │ │ │ │ │ │ │ │ │td(RHCL)R │ │ │ │ │ td(RLWL) │ │ │ │ │ │ │ │ │ │ td(GHD) │ │ │ │ │ │ │ │ │ │ │ │ td(GLRH) │ │ │ │ │ │ │ │ │ │ │ │ Conditions │ -55°C ≤ TC ≤ +125°C │ 4.5 V ≤ VCC ≤ 5.5 V │ unless otherwise specified │ │ See figures 4 and 5 1/ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │Group A │Device │subgroups │ type │ │ │ │ │ │ │ 9,10,11 │ 01,06 │ │ │ │ 02,07 │ │ │ │ 03,08 │ │ │ │ 04,09 │ │ │ │ 05,10 │ │ │ 9,10,11 │ All │ │ │ │ │ │ │ │ │ 9,10,11 │ 01,06 │ │ │ │ 02,07 │ │ │ │ 03,08 │ │ │ │ 04,09 │ │ │ │ 05,10 │ │ │ 9,10,11 │ 01,06 │ │ │ │ 02,07 │ │ │ │ 03,08 │ │ │ │ 04,09 │ │ │ │ 05,10 │ │ │ │ │ │ │ 9,10,11 │ 01,06 │ │ │ │ 02,07 │ │ │ │ 03,08 │ │ │ │ 04,09 │ │ │ │ 05,10 │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ Limits │ Min │ Max │ │ 40 │ │ 30 │ │ 25 │ │ 25 │ │ 25 │ │ 0 │ │ │ │ │ 200 │ │ 170 │ │ 150 │ │ 130 │ │ 120 │ │ 40 │ │ 30 │ │ 25 │ │ 20 │ │ 20 │ │ │ │ 40 │ │ 30 │ │ 25 │ │ 20 │ │ 20 │ │ │ │ │ Unit │ │ │ │ │ ns │ │ │ │ │ │ │ │ │ │ ns │ │ │ │ │ ns │ │ │ │ │ │ │ │ │ │ ns │ │ │ │ │ │ │ │ │ │ │ │ ns │ │ │ │ │ │ │ │ │ │ See footnotes at end of table. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-90617 A REVISION LEVEL C SHEET 17 TABLE I. Electrical performance characteristics - Continued. │ │Symbol │ │ │ │ │td(RLCH)R Delay time, RAS low │ to CAS high │ (CAS before RAS refresh only) 13/ │ │ │ │ │ │ │ │ │ Refresh time interval │ trf │ │ Test │ │ Conditions │ -55°C ≤ TC ≤ +125°C │ 4.5 V ≤ VCC ≤ 5.5 V │ unless otherwise specified │ │ See figures 4 and 5 1/ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │Group A │Device │subgroups │ type │ │ │ │ │ │ │ 9,10,11 │ 01,06 │ │ │ │ 02,07 │ │ │ │ 03,08 │ │ │ │ 04,09 │ │ │ │ 05,10 │ │ │ │ │ │ │ 9,10,11 │ All │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ 1/ 2/ System transition times (rise and fall) are to be a minimum of 3 ns and a maximum of 50 ns. tdis(CH) and tdis(G) are specified when the output is no longer driven. The outputs are disabled by 3/ 4/ bringing either G or CAS high. All cycle times assume tT = 5 ns. To guarantee tc(P) minimum, tsu(CA) should be greater than or equal to tw(CH). Min 30 25 25 20 15 Limits │ │ Max │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ 8 │ │ │ │ Unit │ │ │ │ │ ns │ │ │ │ │ │ │ │ │ │ │ │ ms │ │ 5/ In a read-modify-write cycle, td(CLWL) and tsu(WCH) must be observed. Additional CAS low time tw(CL) may be required, depending on the user's transition times. 6/ In a read-modify-write cycle, td(RLWL) and tsu(WRH) must be observed. Additional RAS low time tw(RL) may be required, depending on the user's transition times. 7/ 8/ 9/ 10/ 11/ 12/ Referenced to the later of CAS or W in write operations. Early write operation only. These tests are applicable to device types 06 - 10 only. The minimum value is measured when td(RLCL) is set to td(RLCL) minimum as a reference. Either th(RHrd) or th(CHrd) must be satisfied for a read cycle. Read-modify-write operation only. 13/ 14/ 15/ CAS -before- RAS refresh only. Maximum value specified only to guarantee access time. This parameter may not be tested, but shall be guaranteed to the limits specified in table I and is included to help with device application. 4.2.2 Additional criteria for device classes Q and V. a. The burn-in test duration, test condition and test temperature, or approved alternatives shall be as specified in the device manufacturer's QM plan in accordance with MIL-PRF-38535. The burn-in test circuit shall be maintained under document revision level control of the device manufacturer's Technology Review Board (TRB) in accordance with MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883. b. Interim and final electrical test parameters shall be as specified in table IIA herein. c. Additional screening for device class V beyond the requirements of device class Q shall be as specified in MIL-PRF-38535, appendix B. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-90617 A REVISION LEVEL C SHEET 18 Case X Symbol Inches min. Inches max. Millimeters min. Millimeters max. Symbol Inches min. Inches max. Millimeters min. Millimeters max. A .080 .100 2.03 2.54 e1 .590 .610 14.99 15.49 A1 .120 .140 3.04 3.56 E .320 .340 8.13 8.64 b .016 .023 0.41 0.58 E1 .270 .305 6.86 7.75 C .006 .012 0.15 0.30 r .025 .035 0.64 0.89 D .665 .685 16.89 17.40 L .035 .045 0.89 1.14 e .045 .055 1.14 1.40 N 20 FIGURE 1. Case outlines. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-90617 A REVISION LEVEL C SHEET 19 Case Y Symbol Inches min. Inches max. Millimeters min. Millimeters max. Symbol Inches min. Inches max. Millimeters min. Millimeters max. A .064 .092 2.03 2.54 e1 .590 .610 14.98 15.49 b .022 .028 3.04 3.56 L .045 .055 1.14 1.40 L1 .080 .100 2.03 2.54 b2 .035 ref. 0.89 ref. D .665 .685 16.89 17.40 r .010 ref. 0.25 ref. E .343 .357 8.71 9.07 R .008 typ. 0.20 typ. e .050 typ. 1.27 typ. S .028 .048 0.71 1.22 FIGURE 1. Case outlines – Continued. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-90617 A REVISION LEVEL C SHEET 20 Case Z Symbol Inches min. Inches max. Millimeters min. Millimeters max. Symbol Inches min. Inches max. Millimeters min. Millimeters max. A .060 .080 1.27 1.52 e1 .590 .610 14.98 15.49 b .022 .028 3.04 3.56 L .045 .055 1.14 1.40 L1 .080 .100 2.03 2.54 b2 .035 ref. 0.89 ref. D .665 .685 16.89 17.40 r .010 ref. 0.25 ref. E .343 .357 8.71 9.07 R .008 typ. 0.20 typ. E .050 typ. 1.27 typ. S .028 .048 0.71 1.22 FIGURE 1. Case outlines – Continued. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-90617 A REVISION LEVEL C SHEET 21 Case U Symbol Inches min. Inches max. Millimeters min. Millimeters max. Symbol Inches min. Inches max. Millimeters min. A .075 .095 1.90 2.41 e b .015 .021 0.38 0.53 L .295 .315 7.49 8.00 C .004 .010 0.10 0.25 Q .025 .035 0.64 0.89 D .660 .680 16.77 17.27 S .095 .109 2.41 2.77 E .373 .387 9.47 9.83 N .050 typ. Millimeters max. 1.27 typ. 20 FIGURE 1. Case outlines – Continued. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-90617 A REVISION LEVEL C SHEET 22 Case T Symbol Inches min. Inches max. Millimeters min. Millimeters max. Symbol Inches min. Inches max. Millimeters min. A .355 .405 9.01 10.29 e A1 .015 .050 0.38 1.27 e1 .890 .910 22.60 23.11 b .016 .023 0.41 0.58 eA .085 .115 2.15 2.92 b2 .035 .070 0.89 1.78 L .125 .200 3.18 5.08 C .008 .015 0.20 0.38 S .040 .060 1.02 1.52 D 1.035 1.065 26.29 27.05 S1 .040 .060 1.02 1.52 E .100 .120 2.54 3.05 N .100 typ. Millimeters max. 2.54 typ. 20 FIGURE 1. Case outlines – Continued. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-90617 A REVISION LEVEL C SHEET 23 Case N Symbol Inches Inches Millimeters min. max. min. Millimeters max. Notes Symbol Inches min. Inches Millimeters Millimeters max. min. max. --- 0.76 --- Notes A .045 .105 1.14 2.67 --- E3 .030 b .015 .019 0.38 0.48 7 e .050 BSC c .003 .006 0.08 0.15 7 k .008 .015 0.20 0.38 12 D --- .640 --- 16.26 5 L .250 .370 6.35 9.40 --- D1 --- .530 --- 13.46 5 Q .026 .040 0.66 1.02 4 E .360 .420 9.14 10.67 --- S --- .095 --- 2.41 9 E1 --- .440 --- 11.18 5 S1 .005 --- 0.13 --- 10 E2 .180 --- 4.57 --- --- α 30° 90° 30° 90° 13 1.27 BSC --6, 8 FIGURE 1. Case outlines – Continued. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-90617 A REVISION LEVEL C SHEET 24 Case N – Continued. NOTES: 1. Dimensions are in inches. 2. Metric equivalents are given for general information only. 3. Index area: A notch or a pin one identification mark shall be located adjacent to pin one and shall be within the shaded area shown. The manufacturer's identification shall not be used as a pin one identification mark. Alternatively, a tab (dimension k) may be used to identify pin one. This tab may be located on either side as shown. 4. Dimension Q shall be measured at the point of exit of the lead from the body. Dimension Q shall be .0085 (0.215 mm) minimum when lead finish A is applied. 5. This dimension allows for off-center lid, meniscus, and glass overrun. 6. The basic pin spacing is .050 (1.27 mm) between centerlines. Each pin centerline shall be located with ±.005 (0.13 mm) of its exact longitudinal position relative to pins 1 and 20. 7. All leads: Increase maximum limit by .003 (0.08 mm) measured at the center of the flat, when lead finish A or B is applied. 8. Eighteen spaces. 9. Applies to all four corners (leads number 1, 10, 11, and 20 for configurations 1 and 2 and leads 2, 9, 12, and 19 for configuration 3). 10. Dimension S1 may be .000 (0.00 mm) if leads number 1, 10, 11, and 20 for configurations 1 and 2 and leads number 2, 9, 12, and 19 for configuration 3 bend toward the cavity of the package within one lead's width from the point of entry of the lead into the body. 11. Optional configuration. If this configuration is used, no organic or polymeric materials shall be molded to the bottom of the package to cover the leads. 12. Optional, see note 3. If a pin one identification mark is used in addition to this tab, the minimum limit of dimension K does not apply. 13. Lead configuration is optional within dimension E, except when dimensions B and C apply. FIGURE 1. Case outlines – Continued. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-90617 A REVISION LEVEL C SHEET 25 │ │ Device types │ │ Case outlines │ │ Terminal number │ │ 1 │ 2 │ 3 │ 4 │ 5 │ 6 │ 7 │ 8 │ 9 │ 10 │ 11 │ 12 │ 13 │ 14 │ 15 │ 16 │ 17 │ 18 │ 19 │ 20 │ 21 │ 22 │ 23 │ 24 │ 25 │ 26 │ │ │ All device types │ │ │ R, U, and N │ X, Y, and Z │ │ Terminal symbol │ │ │ D/Q1 │ D/Q1 │ D/Q2 │ D/Q2 │ W │ W │ RAS │ RAS │ NU │ NU │ NP │ A0 │ NP │ A1 │ NP │ A2 │ A0 │ A3 │ A1 │ VCC │ A2 │ A4 │ A3 │ A5 │ VCC │ A6 │ A4 │ A7 │ A5 │ A8 │ A6 │ G │ CAS │ A7 │ A8 │ D/Q3 │ NP │ D/Q4 │ NP │ VSS │ --│ NP │ --│ G │ --│ CAS │ --│ D/Q3 │ --│ D/Q4 │ --│ VSS │ │ │ │ │ │ │ │ T │ │ │ │ │ G │ │ CAS │ │ D/Q3 │ │ D/Q4 │ │ VSS │ │ D/Q1 │ │ D/Q2 │ │ W │ │ RAS │ │ NU │ │ A0 │ │ A1 │ │ A2 │ │ A3 │ │ VCC │ │ A4 │ │ A5 │ │ A6 │ │ A7 │ │ A8 │ │ --│ │ --│ │ --│ │ --│ │ --│ │ --│ │ │ NP = no pin NU = no external connection is allowed FIGURE 2. Terminal connections. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-90617 A REVISION LEVEL C SHEET 26 │ │ Operation │ │ │ │ │ │ Read │ │ │ Write (early write) │ │ │ Write (late write) │ │ │ Read-modify-write │ │ │ RAS-only refresh │ │ │ Hidden refresh │ │ │ CAS before RAS │ refresh │ │ Standby │ │ │ │ │ │RAS │ │ │ ACT │ │ │ ACT │ │ │ ACT │ │ │ ACT │ │ │ ACT │ │ │ ACT │ │ │ ACT │ │ │ NAC │ Inputs │ │ │ │ │ │ │ CAS │ W │ │ │ │ │ │ │ │ ACT │ NAC │ │ │ │ │ │ │ │ ACT │ ACT │ │ │ │ │ │ │ │ ACT │ ACT │ │ │ │ │ │ │ │ ACT │ ACT │ │ │ │ │ │ │ │ NAC │ DNC │ │ │ │ │ │ │ │ ACT │ NAC │ │ │ │ │ │DNC │ │ ACT │NAC 3/ │ │ │ │ │ │ │ │ NAC │ DNC │ │ │ │ │ │ Input │ │ │ │ Row │Column │ G │ address │address │ │ │ │ │ │ │ ACT │ APD │ APD │ │ │ │ │ │ │ DNC │ APD │ APD │ │ │ │ │ │ │ NAC │ APD │ APD │ │ │ │ │ │ │ ACT │ APD │ APD │ │ │ │ │ │ │ DNL │ APD │ DNC │ │(see note 2) │ │ │ │ │ ACT │ APD │ DNC │ │ │ │ │ │ │ DNC │ DNC │ DNC │ │ │ │ │ │ │ DNC │ DNC │ DNC │ │ │ │ D NAC APD APD APD DNC NAC DNC DNC │ │ Output │ │ │ Q │ │ │ VLD │ │ │ ILD │ │ │ ILD │(see note 1) │ │ VLD │(see note 1) │ │ HIZ │ │ │ VLD │ │ │ HIZ │ │ │ HIZ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ ACT = Active NAC = Nonactive DNC = Don't care VLD = Valid ILD = Invalid APD = Applied HIZ = High impedance state NOTES: 1. Output may go from high impedance to an invalid data state prior to the specified access time as the output is driven when CAS goes low. 2. A10 is a don't care. 3. For device types 06 - 10 only, upon power-up, the user must execute eight (8) RAS-ONLY-REFRESH or eight (8) CBR-REFRESH (W-HIGH) cycles. Either of these RAS cycling methods is mandatory, otherwise proper device operation will not be achieved. FIGURE 3. Truth table. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-90617 A REVISION LEVEL C SHEET 27 NOTE: Transition times (tr, tF) for RAS and CAS are 3 through 50 ns. FIGURE 4. Load circuits. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-90617 A REVISION LEVEL C SHEET 28 Read cycle timing NOTE: Output may go from three-state to an invalid state prior to the specified access time. FIGURE 5. Timing wavwform diagrams. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-90617 A REVISION LEVEL C SHEET 29 Early write cycle timing FIGURE 5. Timing wave diagrams - Continued. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-90617 A REVISION LEVEL C SHEET 30 Write cycle timing FIGURE 5. Timing wave diagrams - Continued. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-90617 A REVISION LEVEL C SHEET 31 Read-write/read-modify-write cycle timing NOTE: Output may go from three-state to an invalid state prior to the specified access time. FIGURE 5. Timing wave diagrams – Continued. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-90617 A REVISION LEVEL C SHEET 32 Enhanced page-mode read cycle timing (see note 1) NOTES: 1. A write cycle or read-modify-write cycle can be mixed with the read cycles as long as the write and read-modify-write timing specifications are not violated. 2. Output may go from three-state to an invalid state prior to the specified access time. 3. Access time is ta(CP) or ta(CA) dependent. FIGURE 5. Timing wave diagrams – Continued. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-90617 A REVISION LEVEL C SHEET 33 Enhanced page-mode write cycle timing (see note 1) NOTES: 1. A read cycle or a read-write cycle can be intermixed with write cycle as long as the read and read-write timing specification are not violated. 2. tDS and tDH are referenced to CAS or W , whichever occurs last. FIGURE 5. Timing wave diagrams - Continued STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-90617 A REVISION LEVEL C SHEET 34 Enhanced page-mode read-write cycle timing (see note 1) NOTES: 1. A read or read-write cycle can be intermixed with read-write cycles as long as the read and write timing specification are not violated. 2. Output may go from three-state to an invalid state prior to the specified access time. FIGURE 5. Timing wave diagrams - Continued STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-90617 A REVISION LEVEL C SHEET 35 RAS -only refresh timing FIGURE 5. Timing wave diagrams - Continued STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-90617 A REVISION LEVEL C SHEET 36 Automatic ( CAS -before- RAS ) refresh cycle timing NOTES: 1. This specific W waveform is only applicable to device types 06 -10. 2. W must be high for RAS low transition to insure proper operation. FIGURE 5. Timing wave diagrams - Continued. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-90617 A REVISION LEVEL C SHEET 37 Hidden refresh cycle (enhanced page mode) FIGURE 5. Timing wave diagrams - Continued. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-90617 A REVISION LEVEL C SHEET 38 TABLE IIA. Electrical test requirements. 1/ 2/ 3/ 4/ 5/ 6/ 7/ Line no. Test requirements Subgroups (in accordance with MIL-PRF-38535, table III) Subgroups (in accordance with MIL-STD-883, TM 5005, table I) Device class M 1 1/ 2/ 3/ 4/ 5/ 6/ Interim electrical parameters (see 4.2) Device class Q Device class V 1,7,9 or 2,8A,10 1, 2,8A,10 1, 7, 9 or Required Not required Not required 2 Static burn-in (method 1015) 3 Same as line 1 4 Dynamic burn-in (method 1015) 5 Same as line 1 6 Final electrical parameters (see 4.2) 1*, 2, 3, 7*, 8A, 8B, 9, 10, 11 1*, 2, 3, 7*, 8A, 8B, 9, 10, 11 1*, 2, 3, 7*, 8A, 8B, 9, 10, 11 7 Group A test requirements (see 4.4) 1, 2, 3, 4**, 7, 8A, 8B, 9, 10, 11 1, 2, 3, 4**, 7, 8A, 8B, 9, 10, 11 1, 2, 3, 4**, 7, 8A, 8B, 9, 10, 11 8 Group C end-point electrical parameters (see 4.4) 2, 3, 7, 8A, 8B 1,2, 3, 7, 8A, 8B Δ 1, 2, 3, 7, 8A, 8B, 9, 10, 11 Δ 9 Group D end-point electrical parameters (see 4.4) 2, 3, 8A, 8B 2, 3, 8A, 8B 2, 3, 8A, 8B 10 Group E end-point electrical parameters (see 4.4) 1, 7, 9 1, 7, 9 1, 7, 9 1*, 7* Δ Required Required Required 1*, 7* Δ Blank spaces indicate tests are not applicable. Any or all subgroups may be combined when using high-speed testers. Subgroups 7, 8A, and 8B functional tests shall verify the truth table. * indicates PDA applies to subgroup 1 and 7. ** see 4.4.1e. Δ indicates delta limit (see table IIB) shall be required where specified, and the delta values shall be computed with reference to the previous interim electrical parameters. Delta measurements are not required if the manufacturer has provided data and that data has been approved by the qualifying activity TABLE IIB. Delta limits at +25°C. Device types Test All 1/ ICC2 standby ±400 μA II IO ±1.0 μA 1/ The above parameter shall be recorded before and after the required burn-in and life tests to determine the delta Δ. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-90617 A REVISION LEVEL C SHEET 39 4.3 Qualification inspection for device classes Q and V. Qualification inspection for device classes Q and V shall be in accordance with MIL-PRF-38535. Inspections to be performed shall be those specified in MIL-PRF-38535 and herein for groups A, B, C, D, and E inspections (see 4.4.1 through 4.4.4). 4.4 Conformance inspection. Technology conformance inspection for classes Q and V shall be in accordance with MIL-PRF-38535 including groups A, B, C, D, and E inspections and as specified. Quality conformance inspection for device class M shall be in accordance with MIL-PRF-38535, appendix A and as specified herein. Inspections to be performed for device class M shall be those specified in method 5005 of MIL-STD-883 and herein for groups A, B, C, D, and E inspections (see 4.4.1 through 4.4.4). 4.4.1 Group A inspection. a. Tests shall be as specified in table IIA herein. b. Subgroups 5 and 6 of table I of method 5005 of MIL-STD-883 shall be omitted. c. For device class M, subgroups 7, 8A, and 8B tests shall be sufficient to verify the truth table. For device classes Q and V, subgroups 7 and 8 shall include verifying the functionality of the device; these tests shall have been fault graded in accordance with MIL-STD-883, method 5012 (see 1.5 herein). d. O/V (latch-up) tests shall be measured only for initial qualification and after any design or process changes which may affect the performance of the device. For device class M, procedures and circuits shall be maintained under document revision level control by the manufacturer and shall be made available to the preparing activity or acquiring activity upon request. For device classes Q and V, the procedures and circuits shall be under the control of the device manufacturer's TRB in accordance with MIL-PRF-38535 and shall be made available to the preparing activity or acquiring activity upon request. Testing shall be on all pins, on five devices with zero failures. Latch-up test shall be considered destructive. Information contained in JEDEC Standard EIA/JESD78 may be used for reference. e. Subgroup 4 (CIN and COUT measurements) shall be measured only for initial qualification and after any process or design changes which may affect input or output capacitance. Capacitance shall be measured between the designated terminal and GND at a frequency equal or less than 1 MHz. Sample size is 15 devices with no failures, and all input and output terminals tested. 4.4.2 Group C inspection. The group C inspection end-point electrical parameters shall be as specified in table IIA herein. 4.4.2.1 Additional criteria for device class M. a. Steady-state life test conditions, method 1005 of MIL-STD-883: 1. Test condition D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1005. 2. TA = +125°C, minimum. 3. Test duration: 1,000 hours, except as permitted by method 1005 of MIL-STD-883. 4.4.2.2 Additional criteria for device classes Q and V. The steady-state life test duration, test condition and test temperature, or approved alternatives shall be as specified in the device manufacturer's QM plan in accordance with MIL-PRF-38535. The test circuit shall be maintained under document revision level control by the device manufacturer's TRB in accordance with MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1005 of MIL-STD883. 4.4.3 Group D inspection. The group D inspection end-point electrical parameters shall be as specified in table IIA herein. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-90617 A REVISION LEVEL C SHEET 40 4.4.4 Group E inspection. Group E inspection is required only for parts intended to be marked as radiation hardness assured (see 3.5 herein). a. End-point electrical parameters shall be as specified in table IIA herein. b. For device classes Q and V, the devices or test vehicle shall be subjected to radiation hardness assured tests as specified in MIL-PRF-38535 for the RHA level being tested. For device class M, the devices shall be subjected to radiation hardness assured tests as specified in MIL-PRF-38535, appendix A for the RHA level being tested. All device classes must meet the postirradiation end-point electrical parameter limits as defined in table I at TA = +25°C ± 5°C, after exposure, to the subgroups specified in table IIA herein. 4.5 Delta measurements for device class V. Delta measurements, as specified in table IIA, shall be made and recorded before and after the required burn-in screens and steady-state life tests to determine delta compliance. The electrical parameters to be measured, with associated delta limits are listed in table IIB. The device manufacturer may, at his option, either perform delta measurements or within 24 hours after burn-in perform final electrical parameter tests, subgroups 1, 7, and 9. 5. PACKAGING 5.1 Packaging requirements. The requirements for packaging shall be in accordance with MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. 6. NOTES 6.1 Intended use. Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original equipment), design applications, and logistics purposes. 6.1.1 Replaceability. Microcircuits covered by this drawing will replace the same generic device covered by a contractor prepared specification or drawing. 6.1.2 Substitutability. Device class Q devices will replace device class M devices. 6.2 Configuration control of SMD's. All proposed changes to existing SMD's will be coordinated with the users of record for the individual documents. This coordination will be accomplished using DD Form 1692, Engineering Change Proposal. 6.3 Record of users. Military and industrial users should inform Defense Supply Center Columbus (DSCC) when a system application requires configuration control and which SMD's are applicable to that system. DSCC will maintain a record of users and this list will be used for coordination and distribution of changes to the drawings. Users of drawings covering microelectronic devices (FSC 5962) should contact DSCC-VA, telephone (614) 692-0544. 6.4 Comments. Comments on this drawing should be directed to DSCC-VA , Columbus, Ohio 43218-3990, or telephone (614) 692-0547. 6.5 Abbreviations, symbols, and definitions. The abbreviations, symbols, and definitions used herein are defined in MIL-PRF-38535 and MIL-HDBK-1331. CIN ......................................... Input terminal capacitance. COUT ..................................... Output terminal capacitance. GND....................................... Ground zero voltage potential. IDD ......................................... Supply current. II ............................................. Input current. IO ........................................... Output current. TC .......................................... Case temperature. VDD ....................................... Positive supply voltage. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-90617 A REVISION LEVEL C SHEET 41 6.5.1 Timing limits. The table of timing values shows either a minimum or a maximum limit for each parameter. Input requirements are specified from the external system point of view. For example, address setup time would be shown as a minimum since the system must supply at least that much time (even though most devices do not require it). On the other hand, responses from the memory are specified from the device point of view. For example, the access time would be shown as a maximum since the device never provides data later than that time. 6.5.2 Waveforms. Waveform symbol Input Output MUST BE VALID WILL BE VALID CHANGE FROM H TO L WILL CHANGE FROM H TO L CHANGE FROM L TO H WILL CHANGE FROM L TO H DON'T CARE ANY CHANGE PERMITTED CHANGING STATE UNKNOWN HIGH IMPEDANCE 6.6 Sources of supply. 6.6.1 Sources of supply for device classes Q and V. Sources of supply for device classes Q and V are listed in QML-38535. The vendors listed in QML-38535 have submitted a certificate of compliance (see 3.6 herein) to DSCC-VA and have agreed to this drawing. 6.6.2 Approved sources of supply for device class M. Approved sources of supply for class M are listed in MIL-HDBK-103. The vendors listed in MIL-HDBK-103 have agreed to this drawing and a certificate of compliance (see 3.6 herein) has been submitted to and accepted by DSCC-VA. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-90617 A REVISION LEVEL C SHEET 42 APPENDIX A APPENDIX A FORMS A PART OF SMD 5962-90617 FUNCTIONAL ALGORITHMS 1/ A.1 SCOPE A.1.1 Scope. Functional algorithms are test patterns which define the exact sequence of events used to verify proper operation of a random access memory (RAM). Each algorithm serves a specific purpose for the testing of the device. It is understood that all manufacturers do not have the same test equipment; therefore, it becomes the responsibility of each manufacturer to guarantee that the test patterns described herein are followed as closely as possible, or equivalent patterns be used that serve the same purpose. Each manufacturer should demonstrate that this condition will be met. Algorithms shall be applied to the device in a topologically pure fashion. This appendix is a mandatory part of the specification. The information contained herein is intended for compliance. A.2 APPLICABLE DOCUMENTS. This section is not applicable to this appendix. A.3 ALGORITHMS A.3.1 Algorithm A (pattern 1). A.3.1.1 Output high impedance (tOFF). This pattern verifies the output buffer switches to high impedance (three-state) within the specified tOFF after the rise of CAS . It is performed in the following manner: Step 1: Perform 8 pump cycles. Step 2: Load address location with data. Step 3: Raise CAS and read address location and guarantee VOL < VOUT < VOH after tOFF delay. A.3.2 Algorithm B (pattern 2). A.3.2.1 VCC slew. This pattern indicates sense amplifier margin by slewing the supply voltage between memory writing and reading. It is performed in the following manner: Step 1: Step 2: Step 3: Step 4: Step 5: Step 6: Step 7: Perform 8 pump cycles. Load memory with background data with VCC at 5.0 V. Change VCC to 4.5 V. Read memory with background data. Load memory with background data complement. Change VCC to 5.5 V. Read memory with background data complement. A.3.3 Algorithm C (pattern 3). A.3.3.1 March data. This pattern tests for address uniqueness and multiple selection. It is performed in the following manner: Step 1: Perform 8 pump cycles. Step 2: Load memory with background data. Step 3: Read location 0. Step 4: Write data complement in location 0. Step 5: Repeat steps 3 and 4 for all other locations in the memory (sequentially). Step 6: Read data complement in maximum address location. Step 7: Write data in maximum address location. Step 8: Repeat steps 6 and 7 for all other locations in the memory from maximum to minimum address. Step 9: Read data in maximum address location. Step 10: Write data complement in maximum address location. Step 11: Repeat steps 6 and 7 for all other locations in the memory from maximum to minimum address. Step 12: Read memory with data complement. 1/ For device types 06 - 10 only, a 1MEG x 4 die is used and bonded out to produce a 256K x 4 array. Therefore, it is not possible to apply a true topologically pure algorithm. For details regarding testing to verify proper device operation in lieu of functional algorithms, contact the supplying vendor. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-90617 A REVISION LEVEL C SHEET 43 APPENDIX A – Continued. APPENDIX A FORMS A PART OF SMD 5962-90617 FUNCTIONAL ALGORITHMS A.3.4 Algorithm D (pattern 4). A.3.4.1 Refresh test (cell retention) +125°C only. This test is used to check the retention time of the memory cells. It is performed in the following manner: Step 1: Perform 8 pump cycles. Step 2: Load memory with checkerboard data. Step 3: Pause tREF (stop all clocks). Step 4: Read memory with background data. A.3.5 Algorithm E (pattern 5). A3.5.1 Read-modify-write (RMW). This pattern verifies the Read-modify-write mode for the memory. It is performed in the following manner: Step 1: Perform 8 pump cycles. Step 2: Load memory with background data. Step 3: Read memory with data and load with data complement using RMW cycle. Step 4: Repeat step 3 for all address locations. Step 5: Repeat steps 3 and 4 using data complement. Step 6: Read memory with data for all address locations. A.3.6 Algorithm F (pattern 6). A.3.6.1 Page mode. This pattern verifies the Page mode for the memory. It is performed in the following manner: Step 1: Perform 8 pump cycles. Step 2: Load first page of memory with checkerboard data using Page mode cycle. Step 3: Read first page of memory with checkerboard data using Page mode cycle. Step 4: Repeat steps 2 through 3 for remaining memory locations. A.3.7 Algorithm G (pattern 7). A.3.7.1 CAS -before- RAS refresh test. This test is used to verify the functionality of the CAS -before- RAS mode of cell refreshing. It is done at +125°C only and is performed in the following manner: Step 1: Perform 8 pump cycles. Step 2: Load one column of memory with background data. Step 3: Using CAS before RAS cycle read one column of data and load with data complement using RMW cycle using the internally generated row address. Step 4: Repeat step 3 using data complement. Step 5: Read one column of data from memory. A.3.8 Algorithm H (pattern 8). A.3.8.1 RAS -only refresh test. This test is used to verify the functionality of the RAS -only mode of cell refreshing. It is done at +125°C only and is performed in the following manner: Step 1: Perform 8 pump cycles. Step 2: Load memory with background data. Step 3: Perform 1024 RAS -only cycles while attempting to modify data. Step 4: Repeat step 3 for 100 ms. Step 5: Read memory with background data. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-90617 A REVISION LEVEL C SHEET 44 STANDARD MICROCIRCUIT DRAWING BULLETIN DATE: 08-05-15 Approved sources of supply for SMD 5962-90617 are listed below for immediate acquisition only and shall be added to MILHDBK-103 and QML-38535 during the next revision. MIL-HDBK-103 and QML-38535 will be revised to include the addition or deletion of sources. The vendors listed below have agreed to this drawing and a certificate of compliance has been submitted to and accepted by DSCC-VA. This information bulletin is superseded by the next dated revision of MIL-HDBK-103 and QML38535. DSCC maintains an online database of all current sources of supply at http://www.dscc.dla.mil/Programs/Smcr/. Standard microcircuit drawing PIN 1/ 5962-9061701MRA Vendor CAGE number 0EU86 3/ 3/ Vendor similar PIN 2/ SMJ44C256-15JDM MT4C4256C-15883C 5962-9061701MXA 0EU86 3/ SMJ44C256-15HJM 5962-9061701MYA 0EU86 3/ SMJ44C256-15FQM 3/ MT4C4256EC-15883C 5962-9061701MZA 4/ SMJ44C256-15HLM 5962-9061701MUA 0EU86 5962-9061701MTA 3/ MT4C4256CZ-15883C 5962-9061701MNA 3/ MT4C4256F-15883C 5962-9061702MRA 0EU86 3/ 3/ 3/ SMJ44C256-15HKM SMJ44C256-12JDM MT4C4256C-12883C 5962-9061702MXA 0EU86 3/ SMJ44C256-12HJM 5962-9061702MYA 0EU86 3/ SMJ44C256-12FQM 3/ MT4C4256EC-12883C 5962-9061702MZA 4/ SMJ44C256-12HLM 5962-9061702MUA 0EU86 5962-9061702MTA 3/ MT4C4256CZ-12883C 5962-9061702MNA 3/ MT4C4256F-12883C 5962-9061703MRA 0EU86 3/ 3/ 3/ SMJ44C256-12HKM SMJ44C256-10JDM MT4C4256C-10883C 5962-9061703MXA 0EU86 3/ SMJ44C256-10HJM 5962-9061703MYA 0EU86 3/ SMJ44C256-10FQM 3/ MT4C4256EC-10883C 5962-9061703MZA 4/ SMJ44C256-10HLM 5962-9061703MUA 0EU86 5962-9061703MTA 3/ MT4C4256CZ-10883C 5962-9061703MNA 3/ MT4C4256F-10883C 5962-9061704MRA 0EU86 3/ 3/ SMJ44C256-80JDM MT4C4256C-883C 3/ 5962-9061704MXA SMJ44C256-10HKM 0EU86 3/ See footnotes at end of table. 1 of 3 SMJ44C256-80HJM STANDARD MICROCIRCUIT DRAWING BULLETIN – Continued. Standardized military drawing PIN 1/ Vendor CAGE number 3/ Vendor similar PIN 2/ 5962-9061704MYA 0EU86 3/ SMJ44C256-80FQM MT4C4256EC-883C 5962-9061704MZA 4/ 5962-9061704MUA 0EU86 5962-9061704MTA 3/ MT4C4256CZ-883C 5962-9061704MNA 3/ MT4C4256F-883C 5962-9061705MRA 0EU86 SMJ44C256-80HLM 3/ 3/ SMJ44C256-80HKM SMJ44C256-70JDM MT4C4256C-70883C 3/ 5962-9061705MXA 0EU86 3/ SMJ44C256-70HJM 5962-9061705MYA 0EU86 3/ SMJ44C256-70FQM 3/ MT4C4256EC-70883C 5962-9061705MZA 4/ SMJ44C256-70HLM 5962-9061705MUA 0EU86 5962-9061705MTA 3/ MT4C4256CZ-70883C 5962-9061705MNA 3/ MT4C4256F-70883C 5962-9061706MNA 0EU86 AS4C4256F-15883C 3/ MT4C4256F-15883C 5962-9061706MYA 5962-9061706MRA 5962-9061707MNA 5962-9061707MYA 5962-9061707MRA 5962-9061708MNA 5962-9061708MYA 5962-9061708MRA 3/ SMJ44C256-70HKM 0EU86 AS4C4256EC-15883C 3/ MT4C4256EC-15883C 0EU86 AS4C4256C-15883C 3/ MT4C4256C-15883C 0EU86 AS4C4256F-12883C 3/ MT4C4256F-12883C 0EU86 AS4C4256EC-12883C 3/ MT4C4256EC-12883C 0EU86 AS4C4256C-12883C 3/ MT4C4256C-12883C 0EU86 AS4C4256F-10883C 3/ MT4C4256F-10883C 0EU86 AS4C4256EC-10883C 3/ MT4C4256EC-10883C 0EU86 AS4C4256C-10883C 3/ MT4C4256C-10883C See footnotes at end of table. 2 of 3 STANDARD MICROCIRCUIT DRAWING BULLETIN – Continued. Standardized military drawing PIN 1/ Vendor similar PIN 2/ Vendor CAGE number 5962-9061709MNA 0EU86 3/ AS4C4256F-80883C MT4C4256F-80883C 5962-9061709MYA 0EU86 AS4C4256EC-80883C MT4C4256EC-80883C 3/ 5962-9061709MRA 0EU86 3/ 5962-90617010MNA 0EU86 3/ 5962-90617010MYA 0EU86 3/ 5962-90617010MRA 0EU86 3/ AS4C4256C-80883C MT4C4256C-80883C AS4C4256F-70883C MT4C4256F-70883C AS4C4256EC-70883C MT4C4256EC-70883C AS4C4256C-70883C MT4C4256C-70883C 1/ The lead finish shown for each PIN representing a hermetic package is the most readily available from the manufacturer listed for that part. If the desired lead finish is not listed, contact the Vendor to determine its availability. 2/ Caution. Do not use this number for item acquisition. Items acquired to this number may not satisfy the performance requirements of this drawing. 3/ This footnote with no source shown indicates that although no longer available from an approved source, a possible substitute or interchangeable device exists in the form of devices 06 -10 which uses a 1Meg x 4 die, bonded out to produce a 256K x 4 array. This footnote with CAGE code 0EU86 indicates that Austin Semiconductor Inc. is supplying devices 01 – 05 using a TI 256K x 4 die. 4/ No longer available from an approved source. Vendor CAGE number Vendor name and address 0EU86 Austin Semiconductor Inc. 8701 Cross Park Drive Austin, TX 78754-4566 The information contained herein is disseminated for convenience only and the Government assumes no liability whatsoever for any inaccuracies in this information bulletin. 3 of 3