P1817A/B October 2003 rev 1.0 Low-Power Mobile VGA EMI Reduction IC Features down stream clock and data dependent signals. The P1817 FCC approved method of EMI attenuation. allows significant system cost savings by reducing the Generates a low EMI spread spectrum clock of the number of circuit board layers ferrite beads, shielding and input frequency. other passive components that are traditionally required to Optimized for frequency range from: pass EMI regulations. o P1817A – 20 to 30MHz. Operation o P1817B – 10 to 20MHz Operation The P1817 modulates the output of a single PLL in order to Internal loop filter minimizes external components “spread” the bandwidth of a synthesized clock, and more and board space. importantly, Two selectable spread ranges. harmonics. This results in significantly lower system EMI Low inherent cycle-to-cycle jitter. compared to the typical narrow band signal produced by 3.3V or 5V operating voltage range. oscillators and most frequency generators. Lowering EMI TTL or CMOS compatible outputs. by increasing a signal’s bandwidth is called ‘spread Ultra-low power CMOS design. spectrum clock generation’. decreases the peak amplitudes of its 3.17mA @3.3V, 10MHz | [email protected], 10MHz 4.28mA @3.3V, 14MHz | 7.50mA @5.0V, 14MHz The P1817 uses the most efficient and optimized 5.50mA @3.3V, 20MHz | 9.50mA @5.0V, 20MHz modulation Supports notebook VGA and other LCD timing controller applications. SSON pin for Spread Spectrum On/Off and Standby Mode controls. profile approved by the FCC and is implemented in a proprietary all digital method. Applications Available in 8-pin SOIC and TSSOP. The P1817 is targeted towards notebook VGA chip and Product Description other displays using an LVDS interface, PC peripheral The P1817 is a versatile spread spectrum frequency devices, and embedded systems. modulator designed specifically for input clock frequencies. The P1817 reduces electromagnetic interference (EMI) at the clock source, allowing system wide reduction of EMI of SR0 Block Diagram SSON VDD PLL Modulation XIN Crystal Oscillator XOUT Frequency Divider Feedback Divider Phase Detector Loop Filter VCO Output Divider ModOUT Ref VSS Alliance Semiconductor 2575, Augustine Drive • Santa Clara, CA • Tel: 408.855.4900 • Fax: 408.855.4999 • www.alsc.com Notice: The information in this document is subject to change without notice. P1817A/B October 2003 rev 1.0 Pin Configuration XIN /CLKIN 1 8 XOUT VSS 2 7 VDD SR0 3 6 REF SSON/SBM 4 5 ModOUT P1817A/B Pin Description Pin# Pin Name Type 1 XIN/CLKIN I 2 VSS P 3 SR0 I 4 SSON/SBM I 5 ModOUT O 6 REF O Description Connect to externally generated clock signal. To put the part into standby mode, disable the input clock signal to this pin and pull SSON/SBM (pin 4) low. Refer Standby Mode Selection Table. Ground Connection. Connect to system ground. Digital logic input used to select Spreading Range. Refer Spread Spectrum Selection Table. This pin has an internal pull-up resistor. Spread Spectrum On/Off and standby mode control. Refer Standby Mode Selection Table. Spread spectrum clock output or reference output. Refer Standby Mode Selection Table. Reference output. 7 VDD P Connect to +3.3V or 5.0V. 8 XOUT O Connect to crystal. No connect if externally generated clock signal is used. Low Frequency EMI Reduction Notice: The information in this document is subject to change without notice. 2 of 10 P1817A/B October 2003 rev 1.0 Standby Mode Selection CLKIN SSON/SBM Disabled 0 Spread Spectrum N/A Disabled 1 Enabled 0 Enabled 1 ModOUT PLL Mode Disabled Disabled Standby N/A Disabled Free Running Free Running Off Reference Disabled Buffer out On Normal Normal Normal Spread Range Selection, VDD = 5V CLKIN frequency 10 MHz 14.318MHz 15MHz 20MHz SR0 Spreading Range 1 ± 1.5% 0 ± 1.9% 1 ± 1.36% 0 ± 1.64% 1 ± 1.3% 0 ± 1.5% 1 ± 0.95% 0 ± 1.125% SR0 Spreading Range 1 ± 1.5% 0 ± 1.65% Modulation Rate (CLKIN/10) * 20.83KHz Spread Range Selection, VDD = 3.3V CLKIN frequency 10 MHz 14.318MHz 15MHz 20MHz 1 ± 1.4% 0 ± 1.7% 1 ± 1.37% 0 ± 1.63% 1 ± 1.1% 0 ± 1.28% Low Frequency EMI Reduction Notice: The information in this document is subject to change without notice. Modulation Rate (CLKIN/10) * 20.83KHz 3 of 10 P1817A/B October 2003 rev 1.0 Schematic for Notebook VGA Application 1 2 VDD P1817A/B CLKIN/ XOUT XIN VSS VDD 8 0.1µF 7 Ferrite Bead 0Ω 0Ω VDD 0Ω 0Ω Use either pull-up or pull-down resistors with 0Ω. 3 SR0 4 SSON/ SBM REF 6 ModOUT 5 VDD 10 to 20 MHz and 20 to 32 MHz EMI reduced clock output. Pull pin 4 low to turn Spread Spectrum off and enable Standby Mode1. 1 . To set the P1817 to standby mode, disable the input clock (pin 1 CLKIN), and pull pin 4 SSON/SBM low. Low Frequency EMI Reduction Notice: The information in this document is subject to change without notice. 4 of 10 P1817A/B October 2003 rev 1.0 Absolute Maximum Ratings Symbol VDD, VIN Parameter Voltage on any pin with respect to GND Rating Unit -0.5 to + 7.0 V TSTG Storage temperature -65 to +125 °C TA Operating temperature 0 to 70 °C Note: These are stress ratings only and functional operation is not implied. Exposure to absolute maximum ratings for extended periods may affect device reliability. DC Electrical Characteristics Symbol Parameter VIL Input low voltage VIH IIH Input high voltage Input low current (pull-up resistors on inputs SR0 and SSON/SBM) Input high current (pull-down resistor on input SSON#) IXOL XOUT output low current IXOH XOUT output high current VOL Output low voltage VOH Output high voltage ICC Dynamic supply current normal mode IIL Min Typ Max Unit GND – 0.3 - 0.8 V 2.0 - VDD + 0.3 V - - -35 µA - - 35 µA @ 0.4V, VDD = 3.3V - 3 - @ 0.4V, VDD = 5.0V @ 2.5V, VDD = 3.3V @ 4.5V, VDD = 5.0V VDD =3.3V, IOL = 20mA VDD =5.0V, IOL = 20mA VDD =3.3V, IOH = 20mA VDD =5.0V, IOH = 20mA Normal Mode 3.3V and 10pF loading 2.5 4.5 20 3 20 - 0.4 - fIN-min 3.2 fIN-typ - fIN-max 7.0 5.0V and 10pF loading 6.2 - 13.6 - 0.6 - mA mA V V mA IDD Static supply current standby mode VDD Operating voltage 2.7 3.3 5.5 V tON Power up time (first locked clock cycle after power up) - 0.18 - mS ZOUT Clock output impedance - 50 - Ω Low Frequency EMI Reduction Notice: The information in this document is subject to change without notice. 5 of 10 mA P1817A/B October 2003 rev 1.0 AC Electrical Characteristics Symbol Parameter Min Typ Max Unit fIN Input frequency (See device type P1817A or P1817B). 10 - 32 MHz fOUT Output frequency (See device type P1817A or P1817B). Measured at 0.8V to 2.0V Output rise time Measured at 1.2V to 3.75V Measured at 0.8V to 2.0V Output fall time Measured at 1.2V to 3.75V Jitter (cycle to cycle) 10 0.7 0.6 - 0.9 0.75 0.8 0.75 - 32 1.1 1.0 360 MHz ns ns ns ns ps 45 50 55 % tLH* tHL* tJC tD Output duty cycle *tLH and tHL are measured into a capacitive load of 15pF Low Frequency EMI Reduction Notice: The information in this document is subject to change without notice. 6 of 10 P1817A/B October 2003 rev 1.0 Package Information Mechanical Package Outline 8-Pin SOIC H E D A2 A C θ e A1 B Symbol Dimensions in inches D L Dimensions in millimeters Min Max Min Max A 0.057 0.071 1.45 1.80 A1 0.004 0.010 0.10 0.25 A2 0.053 0.069 1.35 1.75 B 0.012 0.020 0.31 0.51 C 0.004 0.01 0.10 0.25 D 0.186 0.202 4.72 5.12 E 0.148 0.164 3.75 4.15 e 0.050 BSC 1.27 BSC H 0.224 0.248 5.70 6.30 L 0.012 0.028 0.30 0.70 θ 0° 8° 0° 8° Note: Controlling dimensions are millimeters SOIC – 0.074 grams unit weight Low Frequency EMI Reduction Notice: The information in this document is subject to change without notice. 7 of 10 P1817A/B October 2003 rev 1.0 Mechanical Package Outline 8-Pin TSSOP H E D A2 A C θ e A1 L B Dimensions in inches Symbol Min Max A Dimensions in millimeters Min Max 0.047 1.10 A1 0.002 0.006 0.05 0.15 A2 0.031 0.041 0.80 1.05 B 0.007 0.012 0.19 0.30 C 0.004 0.008 0.09 0.20 D 0.114 0.122 2.90 3.10 E 0.169 0.177 4.30 4.50 e 0.026 BSC 0.65 BSC H 0.244 0.260 6.20 6.60 L 0.018 0.030 0.45 0.75 θ 0° 8° 0° 8° Note: Controlling dimensions are millimeters TSSOP – 0.034 grams unit weight Low Frequency EMI Reduction Notice: The information in this document is subject to change without notice. 8 of 10 P1817A/B October 2003 rev 1.0 Ordering Codes Part Number Marking Input Frequency (MHz) Package Type Pb Free P1817A-08ST P1817A 20-32 8-pin SOIC, tube No 0 to 70 P1817AF-08ST P1817AF 20-32 8-pin SOIC, tube Yes 0 to 70 I1817A-08SR I1817A 20-32 8-pin SOIC, tape & reel No 2500 -20 to 85 I1817BF-08TR I1817BF 10-20 8-pin SOIC, tape & reel Yes 2500 -20 to 85 Qty per reel Temperature (°C) Device Ordering Information X 1 8 1 7 X X - 0 8 X X OR - SOT23/T/R TT – TSSOP, TUBE TR - TSSOP, T/R VT – TVSOP, TUBE VR – TVSOP, T/R ST – SOIC, TUBE SR - SOIC, T/R QR – QFN, T/R QT - QFN, TUBE BT - BGA, TUBE BR – BGA, T/R Pin Count F = Pb FREE DEVICE NUMBER Flow: P = Commercial Temperature Range (0°C to 70°C) I = Industrial Temperature Range (-25°C to 85°C) Licensed under US patent Nos 5,488,627 and 5,631,920. Preliminary datasheet. Specification subject to change without notice. Low Frequency EMI Reduction Notice: The information in this document is subject to change without notice. 9 of 10 P1817A/B October 2003 rev 1.0 Alliance Semiconductor Corporation 2595, Augustine Drive, Santa Clara, CA 95054 Tel# 408-855-4900 Fax: 408-855-4999 www.alsc.com Copyright © Alliance Semiconductor All Rights Reserved Preliminary Information Part Number: P1817A/B Document Version: v1.0 © Copyright 2003 Alliance Semiconductor Corporation. All rights reserved. Our three-point logo, our name and Intelliwatt are trademarks or registered trademarks of Alliance. All other brand and product names may be the trademarks of their respective companies. Alliance reserves the right to make changes to this document and its products at any time without notice. Alliance assumes no responsibility for any errors that may appear in this document. The data contained herein represents Alliance's best data and/or estimates at the time of issuance. Alliance reserves the right to change or correct this data at any time, without notice. If the product described herein is under development, significant changes to these specifications are possible. The information in this product data sheet is intended to be general descriptive information for potential customers and users, and is not intended to operate as, or provide, any guarantee or warrantee to any user or customer. Alliance does not assume any responsibility or liability arising out of the application or use of any product described herein, and disclaims any express or implied warranties related to the sale and/or use of Alliance products including liability or warranties related to fitness for a particular purpose, merchantability, or infringement of any intellectual property rights, except as express agreed to in Alliance's Terms and Conditions of Sale (which are available from Alliance). All sales of Alliance products are made exclusively according to Alliance's Terms and Conditions of Sale. The purchase of products from Alliance does not convey a license under any patent rights, copyrights; mask works rights, trademarks, or any other intellectual property rights of Alliance or third parties. Alliance does not authorize its products for use as critical components in life-supporting systems where a malfunction or failure may reasonably be expected to result in significant injury to the user, and the inclusion of Alliance products in such life-supporting systems implies that the manufacturer assumes all risk of such use and agrees to indemnify Alliance against all claims arising from such use. Low Frequency EMI Reduction Notice: The information in this document is subject to change without notice. 10 of 10