LIA135

LIA135 / LIA136
Low Voltage Optically Isolated
Error Amplifiers
INTEGRATED CIRCUITS DIVISION
Features
Description
• Low Input Voltage of 1.6V over temperature
• Precision reference, error amplifier, and optocoupler
in a single package
• Voltage Reference: 1.299V ±0.5% @ 25°C
LIA135: ±1% @ -40°C to +85°C
LIA136: ±1.5% @ -40°C to +110°C
• LIA136: Reduced dark current at high temperature
• Common Mode Transient Immunity:
LIA135: 5V/ns
LIA136: 20V/ns
• Simplified frequency compensation
• CTR 500% to 2000%
• Lowest optical offset current (ICE vs. VLED)
The LIA135 and LIA136 are low voltage optically
isolated error amplifiers with a precision
programmable shunt reference combined into a single
package capable of operating down to 1.6V. The
optocoupler portion of the LIA135 / LIA136 comprises
an infrared LED that is optically coupled to an NPN
phototransistor providing a current transfer ratio from
500% to 2000%. Ensuring low voltage performance,
the input voltage range of 1.6V to 10V is guaranteed
over the operational temperature range.
Applications
•
•
•
•
Low Voltage Power Supply Feedback
Isolated Power Supply Feedback
AC-to DC Power Supplies
DC-to-DC Converters
The combination of features in the LIA135 / LIA136
are optimal for use in isolated AC-to-DC power
supplies and DC-to-DC converters. The bias current
for the shunt regulator does not pass through the LED,
which eliminates bias-related optical current, giving
the user the industry’s largest dynamic range (1000:1).
These devices are available in DIP and surface mount
(SMT) packages.
Approvals
• UL Recognized Component: File # E76270
• CSA Certified Component: Certificate # 1305490
Ordering Information
Part
Description
LIA135
LIA135S
LIA135STR
8-pin DIP, Tube (50/Tube)
8-pin Surface Mount, Tube (50/Tube)
8-pin Surface Mount, Tape & Reel (1000/Reel)
LIA136
LIA136S
LIA136STR
8-pin DIP, Tube (50/Tube)
8-pin Surface Mount, Tube (50/Tube)
8-pin Surface Mount, Tape & Reel (1000/Reel)
LIA135 and LIA136 Block Diagrams
C
LED
E
COMP
+
_
FB
E
COMP
+
_
FB
B
+
_
+
_
GND
GND
LIA136
LIA135
DS-LIA135 / LIA136-R01
C
LED
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1
LIA135 / LIA136
INTEGRATED CIRCUITS DIVISION
1. Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.1
1.2
1.3
1.4
1.5
1.6
Package Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Test Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Performance Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3
3
3
4
5
7
2. Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.1
2.2
2.3
2.4
2.5
Input Side Biasing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Supply Regulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Optocoupler Output Transistor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
N/C Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
9
9
9
9
9
3. Design Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
3.1 Error Amplifier Input Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
3.2 Discrete Optocoupler Output Resistor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
3.3 Integrated Optocoupler Output Resistor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
4. Manufacturing Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
4.1
4.2
4.3
4.4
4.5
2
Moisture Sensitivity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
ESD Sensitivity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Soldering Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Board Wash . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Mechanical Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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11
11
11
12
R01
LIA135 / LIA13
INTEGRATED CIRCUITS DIVISION
1. Specifications
1.1 Package Pinout
1.2 Pin Description
1
8
2
7
3
6
Pin#
Name
Description
1
3
4
5
N/C
N/C
B
C
E
LED
6
COMP
7
GND
8
FB
No Connect - not used
LIA135: No Connect - not used
LIA136: Phototransistor Base
Phototransistor Collector
Phototransistor Emitter
LED Anode and Input Side Power
Error Amplifier Compensation
(Error amplifier output)
Ground (Secondary side of supply)
Feedback Input
(Error Amplifier Input / Summing node)
2
5
4
1.3 Absolute Maximum Ratings
Parameter
Symbol
Ratings
Unit
Collector-Emitter Voltage
VCEO
25
V
Emitter-Collector Voltage
VECO
7
V
ICE
50
mA
Input Voltage (Referenced to GND)
VLED
15
V
Input DC Current
ILED
20
mA
PD(IN)
145
mW
PD(NPN)
85
mW
Total Power Dissipation 1
PD
145
mW
Isolation Voltage, Input Side to Output Side
VIO
3750
Vrms
TA
-40 to +85
°C
-40 to +110
°C
-55 to +125
°C
Collector Current
Input Power Dissipation 1
Transistor Power Dissipation
2
Operating Temperature:
LIA135
LIA136
Storage Temperature
TSTG
1
Derate linearly from 25°C at a rate of 2.42mW/°C.
2
Derate linearly from 25°C at a rate of 1.42mW/°C.
Unless otherwise specified, Absolute Maximum ratings are at 25°C. Absolute Maximum Ratings are stress ratings.
Stresses in excess of these ratings can cause permanent damage to the device. Functional operation of the device at
these or any other conditions beyond those indicated in the operational sections of this data sheet is not implied.
Typical values are characteristic of the device at 25°C, and are the result of engineering evaluations. They are
provided for information purposes only, and are not part of the manufacturing testing requirements.
R01
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3
LIA135 / LIA136
INTEGRATED CIRCUITS DIVISION
1.4 Electrical Characteristics
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
1.6
-
10
V
0.9
-
1.4
V
1.293
1.286
1.280
1.299
1.299
1.299
1.305
1.312
1.318
0.1
3
6
-0.37
0.34
12
21
-2.7
0.5
-
0.35
0.4
75
0.001
1
0.55
0.6
100
0.1
-
A
A
S
20
7
0.3
-
50
-
nA
V
V
500
-
10
0.099
2000
0.5
%
kHz
V
-
1
1
10
10
A
10
10
-
-
mA
-
5
20
-
V/ns
-
5
20
-
V/ns
Input Characteristics @ 25°C (Unless Otherwise Specified)
Input voltage
VLED
LED forward voltage
VF
VREF
Reference voltage 1
Deviation of VREF over temperature 2
Ratio of VREF variation to VLED change
FB input bias current
Deviation of IIB over temperature 2
Quiescent bias current
Error amplifier Off-State current
Shunt transconductance 3
VREF(DEV)
VREF/VLED
IIB
IIB(DEV)
LIA135:
LIA136:
TA=-40°C to +85°C
TA=-40°C to +110°C
VFB=VCOMP=GND, ILED=5mA (Fig. 1)
VLED=1.6V, ILED=10mA (Fig. 2)
TA=25°C
LIA135:
TA=-40°C to +85°C
LIA136:
TA=-40°C to +110°C
V
VLED=1.6V, ILED=10mA, (Fig. 2)
LIA135:
TA=-40°C to +85°C
LIA136:
TA=-40°C to +110°C
1.6V < VLED < 10V, ILED=10mA (Fig. 2)
VLED=1.6V, ILED=10mA (Fig. 2)
mV
mV/V
A
VLED=1.6V, ILED=10mA, (Fig. 2)
LIA135:
TA=-40°C to +85°C
LIA136:
TA=-40°C to +110°C
VLED=1.6V, VFB < VREF, IF=0mA (Fig. 5)
IQ
ILED(off)
VLED=10V, VFB=0V (Fig. 3)
gm (ILED/VFB) VLED=1.6V, ILED = 0.2mA to 10mA @ f=1kHz (Fig. 2)
A
Output Characteristics @ 25°C (Unless Otherwise Specified)
Collector dark current
Collector-emitter breakdown voltage
Emitter-collector breakdown voltage
ICE
BVCEO
BVECO
VCE=10V, RB=1M (Fig. 4)
IC=1mA
IE=100A
Transfer Characteristics @ 25°C (Unless Otherwise Specified)
Current transfer ratio
Bandwidth
Collector-emitter saturation voltage
Minimal Operating Point Output Current 4
Full-on Operating Point Output Current 4
CTR
BW
VCE(sat)
IC(min)
IC(on)
ILED=5mA, VCE=5V, RB=1M (Fig. 5)
(Fig. 7)
ILED=10mA, IC=2.5mA, RB=1M (Fig. 5)
VLED=10V (Fig. 6)
LIA135: VFB=1.258V, TA= -40°C to +85°C
LIA136: VFB=1.252V, RB=1M, TA= -40°C to +110°C
VLED=1.6V, (Fig. 6)
LIA135: VFB=1.307V, TA= -40°C to +85°C
LIA136: VFB=1.313V, RB=1M, TA= -40°C to +110°C
Common Mode Transient Immunity Characteristics @ 25°C (Unless Otherwise Specified)
Output = High 5
Output = Low 5
|CMH|
|CML|
ILED=0mA, VCM=10VPP, RC=2.2k (Fig. 8)
LIA135:
LIA136:
RB=1M, CB=100pF
ILED=10mA, VCM=10VPP , RC=2.2k (Fig. 8)
LIA135:
LIA136:
RB=1M, CB=100pF
1 Reference voltage measured at Pin FB under the specified conditions.
2 Deviation parameters VREF(DEV) and IIB(DEV) are defined as the difference between the minimum and maximum values obtained over the rated temperature range.
3 With two external resistors, the total shunt transconductance of the circuit is defined as:
R2
gm = g m  ---------------------
R1 + R2
4 See Figure 9: Operational Template on page 6.
5 Common mode transient immunity at Output = High is the maximum positive dVcm/dt on the rising edge of the common mode impulse signal, Vcm, to ensure the
output will remain high. Common mode transient immunity at Output = Low is the maximum negative dVcm/dt on the falling edge of the common pulse signal, Vcm,
to ensure the output will remain low.
4
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R01
LIA135 / LIA13
INTEGRATED CIRCUITS DIVISION
1.5 Test Diagrams
Figure 2: VREF , IIB, VREF/VLED, gm, Test Circuit
Figure 1: VF Test Circuit
ILED
C
ILED
C
LED
LED
VF
LIA136
only
VLED
E
LIA136
only
+
E
COMP
COMP
R1
B
IIB
B
+
_
+
_
FB
FB
VREF
+
_
+
_
Figure 3: ILED(off) Test Circuit
Figure 4: ICE Test Circuit
ICE
ILED(off)
LED
C
E
COMP
+
RB
B
FB
+
_
COMP
LIA136
only
VLED
B
LED
+
VCE
E
LIA136
only
R2
GND
GND
C
FB
+
_
+
_
+
_
GND
GND
Figure 5: CTR, VCE(sat), Bias Current Test Circuit
IC
LED
IF
E
VCE
IQ
LIA136
only
FB
+
_
COMP
LIA136
only
RB
+
_
+
VFB
B
+ V
LED
FB
+
_
VFB
+
_
GND
GND
R01
E
COMP
B
LED
+
+
C
+
C
RB
Figure 6: IC(min), IC(on) Test Circuit
ILED
IC
VCE
+
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5
LIA135 / LIA136
INTEGRATED CIRCUITS DIVISION
Figure 7: Frequency Response Test Circuit
Figure 8: CMH and CML Test Circuit
VCC = +5VDC
VCC = +5VDC
RC
2.2kΩ
RC
C
VCE
IF =10mA
LED
47Ω
1μF
E
LIA136
only
COMP
ILED =0mA (A)
ILED =10mA (B)
C
LED
+
E
COMP
LIA136
only
VIN
0.1VPP
B
CB
RB
B
FB
+
_
CB
+
_
FB
+
_
RB
A
B
+
+
_
GND
GND
VCM
-
+
10VPP
Figure 9: Operational Template
100mA
Full-on
Operating
Point
Collector Current (IC)
10mA
1mA
Operational
Region
100µA
10µA
Minimal
Operating
Point
1µA
0
LIA135
LIA136
1.258V
1.252V
1.307V
1.313V
Pin FB Voltage (VFB)
6
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R01
LIA135 / LIA13
INTEGRATED CIRCUITS DIVISION
1.6 Performance Data
700
1.2
1.310
600
1.0
Off Current (nA)
1.320
500
1.300
IIB (nA)
1.290
400
300
1.280
200
1.270
-50
0
25
50
75 100
Temperature (ºC)
125
150
-25
0
100
125
-50
CTR (%)
10
1000
0
0.8
TA=-40ºC
TA=25ºC
TA=85ºC
TA=125ºC
500
5
0
0.9
1.0
1.1
1.2
VF (V)
1.3
1.4
5
10
15
ILED (mA)
20
ILED=10mA
80
ILED=5mA
60
40
20
ILED=1mA
0
100
80
60
ILED=5mA
40
ILED=1mA
4
6
VCE (V)
8
ICEO (μA)
35
10
12
5
10
100
Frequency (kHz)
1000
Saturation Voltage vs. Temperature
(ILED=10mA, ICE=10mA)
0.15
0.10
0.05
20
0.00
-50
-25
0
25
50
75 100
Temperature (ºC)
300
25
250
15
-50
-25
0
25
50
75 100
Temperature (ºC)
125
150
200
150
10
100
5
50
0
150
350
30
20
125
LIA136 - Dark Current vs. Temperature
Measured At Pins 3&4, RB=1MΩ
(VCE=10V)
LIA135 - Dark Current vs. Temperature
Measured At Pins 3&4
(VCE=10V)
ICE (nA)
2
10
0.20
ILED=10mA
0
0
LIA135
0.25
ILED=20mA
120
VCE(sat) (V)
Collector Current (mA)
100
125
LIA136
1
140
ILED=20mA
100
15
25
Collector Current vs. Temperature
(VCE=5V)
Collector Current vs. Collector Voltage
120
25
50
75
Temperature (ºC)
0
0
1.5
0
20
1500
TA=110ºC
TA=85ºC
TA=55ºC
TA=25ºC
TA=-5ºC
TA=-40ºC
15
-25
Voltage Gain vs. Frequency
(RC=51Ω)
2000
20
IF (mA)
25
50
75
Temperature (ºC)
CTR vs. LED Current
(VCE=5V)
25
ICE (mA)
0.4
0.0
-50
LED Forward Current
vs. LED Forward Voltage
0
-50
R01
0.6
0.2
100
-25
0.8
Voltage Gain VCE / Vin (dB)
VREF (V)
Off-State Current vs. Temperature
(VLED=13.2V, VFB=0V)
FB Input Bias Current vs. Temperature
(ILED=10mA)
VREF vs. Temperature
-25
0
25
50
75 100
Temperature (ºC)
125
150
-50
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-25
0
25
50
75 100
Temperature (ºC)
125
150
7
LIA135 / LIA136
INTEGRATED CIRCUITS DIVISION
2. Functional Description
The LIA135 and LIA136 are optically isolated error
amplifiers. Each comprises the three primary
components necessary to implement feedback for an
isolated power supply in a single package. These
components are: an error amplifier; a voltage
reference; and an optocoupler. The LIA135 and
LIA136 are the functional equivalent of a 431 type
precision shunt regulator and an optocoupler in the
same package.
Regulation of VOUT is made possible by applying a
scaled sample of its voltage to pin FB, the error
amplifier’s non-inverting input. The error amplifier
compares this scaled voltage (VFB) against an internal
high accuracy reference voltage and generates an
output which in turn sets the LED drive current.
As VOUT increases, the error amplifier’s input voltage
VFB will also increase. Ramping of VFB beyond the
internal reference voltage causes the error amplifier to
generate the LED drive current (IF) necessary to
cause the optocoupler’s NPN output transistor to
conduct. Increasing the LED drive current results in an
increase of the output transistor’s collector current (IC)
which in turn decreases the voltage seen at the
collector (VC). This voltage is also commonly referred
to as the Error Voltage (VE).
Understanding how the LIA135 and LIA136 function
and are used is best understood by referencing the
simplified application circuit shown in
Figure 10: Typical Isolated Power Supply Using an
Optical Feedback Error Amplifier. The function of
the LIA135 / LIA136 is to sample the power supply
output to be regulated, generate an error signal, and
transmit the error signal across the isolation barrier to
the power supply’s control circuitry. Power for the input
side circuits, consisting of an LED; a shunt regulator;
and an error amplifier, is provided by the power
supply’s rectified secondary output (VOUT) via the
series current limiting resistor (RLED) as shown in the
application circuit.
Likewise, a reduction of VOUT results in a lessening of
IF causing VC to increase.
The power supply’s control circuitry uses the error
voltage presented by the optocoupler’s output
transistor to interpret the power needs of the
secondary side load and to maintain regulation.
Figure 10: Typical Isolated Power Supply Using an Optical Feedback Error Amplifier
VIN
+
VOUT
+
VCC
PWM
Control
LIA135 / LIA136
RC
IF
C
LED
RLED
R1
E
COMP
B
LIA136
only
FB
+
_
+
_
8
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GND
R2
R01
LIA135 / LIA13
INTEGRATED CIRCUITS DIVISION
2.1 Input Side Biasing
value of R1 using the following formula:
Power for the LIA135 / LIA136 error amplifier, voltage
reference, and optocoupler LED is applied to the LED
pin through a current limiting resistor. Typically, this
resistor’s voltage source is VOUT, the regulated power
supply output. For very low voltage designs where
VOUT lacks sufficient headroom to bias the input
circuitry, the resistor may be sourced from an auxiliary
secondary winding on the transformer. When using
the LIA135 / LIA136 this is an unlikely situation as
these devices were designed specifically to be used
for low voltage power supply applications. For all
implementations, the minimum bias voltage at the
LED pin is 1.6V.
There must be a current-limiting resistor (RLED) in
series with the LED pin to keep the current flow into
the device and through the LED within their respective
operating ranges for all expected supply output levels.
Although the value of RLED is determined in
conjunction with the value of the phototransistor’s
pull-up resistor RC , it’s minimum value is limited by the
maximum allowed input current. See Section 3.
Design Examples on page 10.
2.2 Supply Regulation
When connected as shown in the application circuit
above and properly configured, the LIA135 / LIA136
will regulate VOUT such that VFB is equal to VREF
(1.299V). To achieve this, the values of the voltage
divider resistors, R1 and R2, must be set in the
following manner:
V OUT
R1
------- =  ------------- – 1

V REF 
R2
Because VOUT regulation occurs when VFB = VREF any
change in bias current through R2 at the desired
regulated voltage level will cause a regulation error. As
shown in the Electrical Characteristics table the error
amplifier input at pin FB has an input bias current (IIB)
specification that reduces the current into R2. (IIB is
always into pin FB). This error causes the regulated
output voltage to increase which increases the current
through R1 by an amount equal to IIB, thereby
restoring the current through R2 to it’s original value.
Reducing the VOUT error created by the input bias
current to less than 1% is accomplished by setting the
R01
V OUT
R1  ------------50A
Where 50A is 100 x IIB(max). This error can be
reduced to less than 0.05% by setting the current to
1mA. i.e. 2000 x IIB(max)
2.3 Compensation
Frequency response of the converter can be optimized
for the specific application by placing a compensation
network between the COMP and FB pins of the
LIA135 / LIA136. In a typical system with a
low-bandwidth requirement, only a 0.1µF capacitor
should be needed. For designs with more critical
bandwidth requirements, measurements of the loop
response must be made and compensation adjusted
as necessary.
2.4 Optocoupler Output Transistor
The output phototransistor of the LIA135 / LIA136
provides the isolated and amplified feedback signal
that represents the output of the converter. Typically,
the collector of the phototransistor will be pulled up by
a reference voltage provided by the power supply
control chip and the emitter will be grounded.
The base of the LIA135 output transistor is not
externally accessible. For the LIA136 however, the
base is brought out at pin 2 enabling the user to
extend the capabilities of the device beyond those of
the LIA135. Placing a resistor from the base to the
emitter extends the operational temperature range by
shunting base current around the base-emitter
junction thereby reducing dark current at elevated
temperatures. Immunity to large common mode
transients (CMTI) is enhanced by placing a capacitor
parallel to the base-emitter resistor. This shunts
transient currents around the base-emitter junction
rather than having them amplified by the transistor.
When using the LIA136 the base-emitter resistor must
be populated, otherwise the open base lead will pick
up atmospheric electromagnetic signals converting
them into noise components.
2.5 N/C Pins
The N/C (No Connect) pins have no internal
connection.
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9
LIA135 / LIA136
INTEGRATED CIRCUITS DIVISION
3. Design Examples
There are two basic designs, one with a discrete
resistor at the optocoupler output whose value can be
selected by the designer and the other with a resistor
integrated within the power supply’s PWM controller IC
whose value is fixed. Common to both design flows is
setting up the feedback from the power supply output
to the error amplifier input.
For the discrete optocoupler output resistor solution,
the design flow is determining the value of RLED and
then the optocoupler output resistor, RC. When the
optocoupler output resistor value is preselected and
fixed, the design procedure is reversed. In both cases
the value of these two resistors is dependent on the
other.
3.1 Error Amplifier Input Configuration
Regulation of the power supply’s output voltage is
accomplished by configuring the voltage divider
network consisting of R1 and R2 to apply a voltage
equal to the Reference Voltage (VREF) to FB, the
feedback amplifier’s input, when the supply’s output is
at it’s desired potential.
For this example, the nominal value of the power
supply output voltage is 1.8V. Because the LIA135 and
LIA136 operate with an input voltage of 1.6V there is
no requirement to provide an auxiliary transformer
winding to bias the optical feedback circuitry.
To reduce regulation error caused by loss of bias
current into pin FB, the current through R1 must be set
much greater than IIB, the leakage current into pin FB.
Setting R1 = 1k, a convenient common value will
ensure the current through R1 will be much greater
than IIB.
With R1 = 1k, and setting R2 = 2.61k will fix the
nominal supply output voltage to 1.797V, just slightly
below the target value of 1.8V.
3.2 Discrete Optocoupler Output Resistor
The value of the optocoupler’s collector pull-up resistor
(RC) and of the LED current-limiting resistor (RLED)
must be determined together with respect to the input
voltage range of the power supply’s PWM device.
Additionally, the operational range and performance
10
characteristics of the LIA135 and LIA136 must be
taken into account.
As an example, consider first that the minimum CTR of
the LIA135 / LIA136 is 500%. Selection of RLED to set
the minimum current through the LED (IF) to 1mA
when the converter output (VOUT) is at it’s nominal
value of 1.797V is as follows:
V OUT – V LED  min 
R LED  --------------------------------------------I F + I Q  max 
1.797V – 1.6V
0.197V
R LED  ----------------------------------- = ----------------- = 179.09
1mA + 100  A
1.1mA
Using the nearest standard value that satisfies the
relationship above sets RLED = 178. Rearranging the
terms and calculating for the LED current gives
IF = 1.00674mA. A minimum of 5.0337mA will flow
through the collector pull-up resistor. If the collector is
pulled up to 12V and the PWM has an internal
reference voltage of 5V, then the minimum pull-up
resistor value is:
12V – 5V
R C  ------------------------- = 1.391k
5.0337mA
Setting RC = 1.40k (E96 standard value) changes
the collector voltage under these conditions from the
ideal 5V to 4.953V.
The value of RLED must never allow more than 20mA
of current to flow into the LED pin. Assuming a VOUT
tolerance of 10% then:
1.98V – 1.6V
R LED  -------------------------------- = 19
20mA
The value RLED = 178 selected above satisfies the
minimum value of the LED resistor.
3.3 Integrated Optocoupler Output Resistor
Many times the collector pull-up resistor is integrated
into the PWM controller IC and may be a current
source rather than a resistive component.
The design methodology is similar to the external
discrete pull-up resistor design but the LED current
limiting resistor must be calculated starting from the
pull-up at the optocoupler output transistor’s collector.
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LIA135 / LIA13
INTEGRATED CIRCUITS DIVISION
4. Manufacturing Information
4.1 Moisture Sensitivity
All plastic encapsulated semiconductor packages are susceptible to moisture ingression. IXYS Integrated
Circuits Division classified all of its plastic encapsulated devices for moisture sensitivity according to the
latest version of the joint industry standard, IPC/JEDEC J-STD-020, in force at the time of product
evaluation. We test all of our products to the maximum conditions set forth in the standard, and guarantee
proper operation of our devices when handled according to the limitations and information in that standard as well as
to any limitations set forth in the information or standards referenced below.
Failure to adhere to the warnings or limitations as established by the listed specifications could result in reduced
product performance, reduction of operable life, and/or reduction of overall reliability.
This product carries a Moisture Sensitivity Level (MSL) rating as shown below, and should be handled according to
the requirements of the latest version of the joint industry standard IPC/JEDEC J-STD-033.
Device
Moisture Sensitivity Level (MSL) Rating
LIA135 / LIA136 All versions
MSL 1
4.2 ESD Sensitivity
This product is ESD Sensitive, and should be handled according to the industry standard JESD-625.
4.3 Soldering Profile
Provided in the table below is the Classification Temperature (TC) of this product and the maximum dwell time the
body temperature of this device may be above (TC - 5)ºC. The classification temperature sets the Maximum Body
Temperature allowed for this device during lead-free reflow processes.
Device
Maximum Body Temperature (Tc) x Time
Maximum Reflow Cycles
LIA135 / LIA136 All versions
250°C for 30 seconds
3
4.4 Board Wash
IXYS Integrated Circuits Division recommends the use of no-clean flux formulations. Board washing to reduce or
remove flux residue following the solder reflow process is acceptable provided proper precautions are taken to
prevent damage to the device. These precautions include but are not limited to: using a low pressure wash and
providing a follow up bake cycle sufficient to remove any moisture trapped within the device due to the washing
process. Due to the variability of the wash parameters used to clean the board, determination of the bake temperature
and duration necessary to remove the moisture trapped within the package is the responsibility of the user
(assembler). Cleaning or drying methods that employ ultrasonic energy may damage the device and should not be
used. Additionally, the device must not be exposed to flux or solvents that are Chlorine- or Fluorine-based.
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11
LIA135 / LIA136
INTEGRATED CIRCUITS DIVISION
4.5 Mechanical Dimensions
4.5.1 LIA135 & LIA136 DIP Package
2.540 ± 0.127
(0.100 ± 0.005)
9.652 ± 0.381
(0.380 ± 0.015)
8-0.800 DIA.
(8-0.031 DIA.)
2.540 ± 0.127
(0.100 ± 0.005)
9.144 ± 0.508
(0.360 ± 0.020)
6.350 ± 0.127
(0.250 ± 0.005)
Pin 1
PCB Hole Pattern
7.620 ± 0.254
(0.300 ± 0.010)
6.350 ± 0.127
(0.250 ± 0.005)
0.457 ± 0.076
(0.018 ± 0.003)
3.302 ± 0.051
(0.130 ± 0.002)
7.620 ± 0.127
(0.300 ± 0.005)
7.239 TYP.
(0.285)
4.064 TYP
(0.160)
0.254 ± 0.0127
(0.010 ± 0.0005)
7.620 ± 0.127
(0.300 ± 0.005)
Dimensions
mm
(inches)
0.813 ± 0.102
(0.032 ± 0.004)
4.5.2 LIA135S & LIA136S SMT Package
9.652 ± 0.381
(0.380 ± 0.015)
2.540 ± 0.127
(0.100 ± 0.005)
6.350 ± 0.127
(0.250 ± 0.005)
Pin 1
3.302 ± 0.051
(0.130 ± 0.002)
0.635 ± 0.127
(0.025 ± 0.005)
9.525 ± 0.254
(0.375 ± 0.010)
0.457 ± 0.076
(0.018 ± 0.003)
PCB Land Pattern
2.54
(0.10)
8.90
(0.3503)
1.65
(0.0649)
7.620 ± 0.254
(0.300 ± 0.010)
0.254 ± 0.0127
(0.010 ± 0.0005)
0.65
(0.0255)
4.445 ± 0.127
(0.175 ± 0.005)
Dimensions
mm
(inches)
0.813 ± 0.102
(0.032 ± 0.004)
12
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R01
LIA135 / LIA13
INTEGRATED CIRCUITS DIVISION
4.5.3 LIA135STR & LIA136STR SMT Tape & Reel
330.2 DIA.
(13.00 DIA.)
Top Cover
Tape Thickness
0.102 MAX.
(0.004 MAX.)
W=16.00
(0.63)
Bo=10.30
(0.406)
K0 =4.90
(0.193)
Ao=10.30
(0.406)
K1 =4.20
(0.165)
Embossed Carrier
Embossment
P=12.00
(0.472)
User Direction of Feed
Dimensions
mm
(inches)
NOTES:
1. Dimensions carry tolerances of EIA Standard 481-2
2. Tape complies with all “Notes” for constant dimensions listed on page 5 of EIA-481-2
For additional information please visit www.ixysic.com
IXYS Integrated Circuits Division makes no representations or warranties with respect to the accuracy or completeness of the contents of this publication and
reserves the right to make changes to specifications and product descriptions at any time without notice. Neither circuit patent licenses or indemnity are expressed
or implied. Except as set forth in IXYS Integrated Circuits Division’s Standard Terms and Conditions of Sale, IXYS Integrated Circuits Division assumes no liability
whatsoever, and disclaims any express or implied warranty relating to its products, including, but not limited to, the implied warranty of merchantability, fitness for a
particular purpose, or infringement of any intellectual property right.
The products described in this document are not designed, intended, authorized, or warranted for use as components in systems intended for surgical implant into
the body, or in other applications intended to support or sustain life, or where malfunction of IXYS Integrated Circuits Division’s product may result in direct physical
harm, injury, or death to a person or severe property or environmental damage. IXYS Integrated Circuits Division reserves the right to discontinue or make changes
to its products at any time without notice.
Specifications: DS-LIA135 / LIA136-R01
© Copyright 2015, IXYS Integrated Circuits Division
All rights reserved. Printed in USA.
12/11/2015
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13