(24) UWB Band Pass Filter (SCI-307F1/F2) FEATURES • Passive integration on silicon substrate • Low insertion loss in pass band • Small size: 1.4 mm x 1.2 mm (wirebond) 1.6 mm x 1.2 mm (flip chip) • • • • Eutectic Sn/Pb or lead-free solder bump Low profile, 0.40 mm height Directly attachable on PCB or flipped on PCB Operating temperature: -40 to +85 ℃ • Storage temperature: -40 to +85 ℃ SCI-307F2 (Flip Chip) SCI-307F1 (Flip Chip) DESCRIPTION STATS ChipPAC’s SCI-307F1/F2 is a band pass filter (BPF) for UWB band applications. The BPF has low pass–band insertion loss and small size. It is composed of 8.0 um Cu-plated inductors and MetalInsulator-Metal capacitors which are fabricated on a silicon substrate using STATS ChipPAC’s IPD (Integrated Passive Device) process. The pad or bump size and pitch of the BPF are selected so that the device can be mounted directly on a PCB or laminate substrate using conventional wirebonding or surface mount techniques. The low profile and small formfactor of the device make it especially suitable for SiP applications. ELECTRICAL SPECIFICATIONS (Test board loss 0.5 dB included) Specification Unit Min. Design #1 (Design #2) Max. MHz 7000 9000 dB 1.7 (2.0) 2.4 (2.8) Return Loss dB 15 (12) Attenuation, 900 MHz dB 50 (30) Attenuation, 1900 MHz dB 50 (30) Attenuation, 5500 MHz dB Pass Band Insertion Loss Attenuation, 12000-20000 MHz Size 25 (38) 22 mm 25 1.4 x 1.2 (20) (1.6 x 1.2 ) DIMENSIONS STATS ChipPAC makes no guarantee or warranty of its accuracy in the information given or that the use of such information will not infringe on the intellectual rights of third parties. Under no circumstances shall STATS ChipPAC be liable for any damages whatsoever arising out of the use of or inability to use the materials in this document. STATS ChipPAC reserves the right to change the information at any time and without notice. -20 -40 -60 Bumped Design 1 0 -10 -20 -30 -40 20 18 16 14 12 10 8 6 4 2 0 Return Loss (dB) Bumped Design 1 0 20 18 16 14 12 10 8 6 4 2 0 Insertion Loss (dB) TYPICAL CHARACTERISTICS Bumped Design 2 0 -20 -40 Bumped Design 2 0 -5 -10 -15 -20 -25 20 18 16 14 12 10 8 6 4 2 0 -60 Return Loss (dB) freq, GHz 20 18 16 14 12 10 8 6 4 2 0 Insertion Loss (dB) freq, GHz freq, GHz freq, GHz TEST BOARD DRAWING SCI-307F1 (Flip Chip) Pad SCI-307F1 Signal SCI-307F2 (Flip Chip) SCI-307F2 Signal 1 GND GND 2 Input Input 3 GND NC 4 GND GND 5 Output Output NOTES All dimension measurement units are in millimeters (mm). Electrical performance and typical values are measured at room temperature. For best results, ground plane directly beneath the device should be in the top metal layer. Refer to “Appendix A” for: • Pad sizes and typical wirebond length used in the wirebonded IPD products. • Recommended solder thermal profile, landing pattern recommendation and bump specifications used in the flip chip IPD products. www.statschippac.com 50 All rights reserved. Rev 02/2009