1/4 Structure : Silicon Monolithic Integrated Circuit Product name : Wide Bandwidth Audio-Video SW for TV Type : BH7645KS2 Outer dimensions : Fig.1 SQFP-T52 Block diagram : Fig.2 Features : 1) 2) 3) 4) 5) 6) 7) 8) 9) 10) 11) Video inputs selector : 2-inputs component, 2-inputs Y/C, and 2-inputs composite Component inputs : Correspond to D5 standard Built-in LPF selector(6.75MHz/13.5MHz/30MHz/Through) Built-in Video MUTE function Audio inputs selector : 6-inputs (Lch, Rch) Built-in Power-on MUTE function I2C-BUS control Optional Slave address modifications(90H/92H) I2C-BUS is compatible with fast mode of Version2.0, but not compatible with Hs mode Built-in detector 3ch(S_SW1/S_SW2/S_SW3) Built-in output port 2ch(PORT1_OUT/PORT2_OUT) ○Absolute Maximum Ratings (Ta=+25℃) Parameter Supply voltage1 (2pin, 29pin, 33pin, 39pin, 44pin) Supply voltage2 (12pin) Power dissipation Input voltage range VIDEO PART, LOGIC PART AUDIO PART Storage temperature range Symbol Vcc1 Ratings 7 Unit V Vcc2 Pd VIN1 8.8 1300 *1 0 ～ Vcc1+0.2 V mW V VIN2 0 ～ Vcc2+0.2 V Tstg -55 ～ +125 ℃ Range +4.5 ～ +5.5 +7.5 ～ +8.5 -40 ～ +85 Unit V V ℃ *1 When mounting on a 70mm×70mm×1.6mm PCB board Reduced by 13mW/℃ at Ta = +25℃ or higher ○Operating Range Parameter Supply voltage1 (2pin, 29pin, 33pin, 39pin, 44pin) Supply voltage2 (12pin) Operating temperature range Symbol Vcc1 Vcc2 Topr * This product is not designed for protection against radioactive rays. * Note the power supply sequence. REV. A 2/4 ○Electrical characteristics （Unless otherwise specified, Ta= 25℃, Vcc1=5.0V, Vcc2=8.0V） Item Min. Limits Typ. Max. ICCV GVV GF1-1V GF1-2V GF2-1V GF2-2V GF3-1V GF3-2V － -0.5 -1.5 -1.5 -1.5 - 55 0.0 0.0 -30 0.0 -30 0.0 -18 GF4-1V -3.0 VOMV CTSWV CTCHV MTV Symbol Unit Conditions 80 0.5 1.0 -20 1.0 -20 1.0 -10 mA dB dB ｄB dB dB dB dB No signal Vin=1.0Vpp, f=100kHz Vin=1.0Vpp, f=6.75MHz/100kHz Vin=1.0Vpp, f=27MHz/100kHz Vin=1.0Vpp, f=13.5MHz/100kHz Vin=1.0Vpp, f=54MHz/100kHz Vin=1.0Vpp, f=30MHz/100kHz Vin=1.0Vpp, f=74MHz/100kHz -0.5 2.0 dB Vin=1.0Vpp, f=54MHz/100kHz 2.6 － － － 3.0 -60 -60 -60 -50 -50 -50 Vpp dB dB dB f=10kHz, THD=1.0% Vin=1.0Vpp, f=10MHz Vin=1.0Vpp, f=10MHz Vin=1.0Vpp, f=10MHz ZINV 100 150 － kΩ ICCA GV0A GV6A GFA THDA － -0.5 5.5 -3.0 － 10 0.0 6.0 0.0 0.03 15 0.5 6.5 3.0 0.1 mA dB dB dB % 0dB VOM0A 2.0 2.4 － Vrms 6dB VOM6A 2.0 2.4 － Vrms CTCHA CTSWA MTA NA PSRRA ZINA － － － － － 100 -100 -100 -100 30 -45 150 -85 -85 -85 50 -38 － dB dB dB uVrms dB kΩ Vin1L Vin1H IINI2C VinL Vin2L Vin2H ZINADR Vin2L Vin2H ZINSSW 0 2.0 -10 0 0 2.0 70 0 2.0 100 － － 0 － － － 100 － － 150 1.0 Vcc1 10 0.4 1.0 Vcc1 130 1.0 Vcc1 － V V uA V V V kΩ V V kΩ Low Level input voltage High Level input voltage VPL － － 0.5 V IL=2.5mA IPH － － 5.0 uA Vcc2=8.0V [VIDEO PART] Circuit current Voltage gain Frequency characteristics1 [f=6.75MHz LPF MODE] Frequency characteristics 2 [f=13.5MHz LPF MODE] Frequency characteristics 3 [f=30MHz LPF MODE] Frequency characteristics 4 [f=THROUGH MODE] Maximum output level SW crosstalk Channel crosstalk MUTE attenuation Bias input terminal Input impedance [AUDIO PART] (at Gain=0dB) Circuit current 0dB 6dB Frequency characteristics Total harmonic distortion Voltage gain Maximum output level Channel crosstalk SW crosstalk MUTE attenuation Remain noise PSRR Input impedance [LOGIC PART etc.] VIL [SCL] VIH [SDA] Input bias current SDA output voltage VIL [ADR] VIH Input impedance VIL [S_SW1] [S_SW2] VIH [S_SW3] Input impedance PORT output [PORT1_OUT] voltage [PORT2_OUT] Leak current No signal Vin=1.0Vrms, f=1kHz Vin=1.0Vrms, f=1kHz Vin=1.0Vrms, f=50kHz/1kHz Vin=1.0Vrms, f=1kHz ※1 Maximum value of distortion<0.3% f=1kHz ※1 Maximum value of distortion<0.3% f=1kHz ※1 Vin=2.0Vrms, f=1kHz ※1 Vin=2.0Vrms, f=1kHz ※1 Vin=2.0Vrms, f=1kHz ※1 ※1 ※2 IL=3.0mA(sink) Low Level input voltage High Level input voltage Low Level input voltage High Level input voltage Pull up resistance ※1 400HzHPF + 30kHzLPF ON ※2 Vin=0.3Vpp, f=100Hz at VCC, 30kHzLPF ON REV. A 3/4 テレビ用Hd対応AVスイ CY/Y/ CVBSout1 GND PBout1 GND RGBout PR/Cout1 DVcc5V SDA SCL DGND Vcc5V AU Lout Rout 39 38 37 36 35 34 33 32 31 30 29 28 27 25 R6in 0dB Clamp CYin1 41 0dB I2C LOGIC Gain_SEL ADDRESS 42 CY_SW Vcc5V Video IN2 44 BH7645KS2 名 ： PB_SW Bias PBin1 45 P-on Mute 0/6dB P-on Mute 6.75M/13.5M/ 30M/Through Mute 23 R5in 22 L5in LPF2 6.75M/13.5M/ 30M/Through Mute TEST1 46 24 L6in 0/6dB LPF1 Clamp CYin2 43 BH7645KS2 26 GND AU PORT1 OUT 40 0dB ： Vcc5V RGBout ○Block diagram ○Physical dimensions 21 R4in Audio_SW 20 L4in PR_SW LPF3 PBin2 47 S SW3 48 S SW S SW2 49 Bias 6.75M/13.5M/ 30M/Through Mute Bias Clamp Bias Clamp PRin1 50 Clamp Clamp 17 R2in 16 L2in Mute 6 7 8 CVBS2 GND Video IN 9 10 11 12 13 PORT2 OUT 5 Vcc8V AU 4 C1in2 3 Vref AU 2 C1in1 1 GND 14 L1in Y1in2 PRin2 52 Vref Video 15 R1in CVBS1 S SW1 51 Vcc5V Video IN1 Fig.1 SQFP-T52 ( UNIT:mm ) 18 L3in 6in-1out Y1in1 長 ： 1) ビデオ入力セレクタ： ーネント入力2 系統、Y/C 入力2 系 19 R3in Mute C_SW Y_SW Bias Lot No. Bias Fig.2 Block diagram Pin number Pin name Pin number Pin name Pin number Pin name Pin number Pin name 1 Y1in1 14 L1in 27 Rout 40 PORT1 OUT 2 Vcc5V Video IN1 15 R1in 28 Lout 41 CYin1 ADDRESS 3 CVBS1 16 L2in 29 Vcc5V AU 42 4 Vref Video 17 R2in 30 DGND 43 CYin2 5 Y1in2 18 L3in 31 SCL 44 Vcc5V Video IN2 6 GND 19 R3in 32 SDA 45 PBin1 TEST1 7 CVBS2 20 L4in 33 DVcc5V 46 8 GND Video IN 21 R4in 34 PR/Cout1 47 PBin2 9 C1in1 22 L5in 35 GND RGBout 48 S SW3 10 Vref AU 23 R5in 36 PBout1 49 S SW2 11 C1in2 24 L6in 37 GND 50 PRin1 12 Vcc8V AU 25 R6in 38 CY/Y/CVBSout1 51 S SW1 13 PORT2 OUT 26 GND AU 39 Vcc5V RGBout 52 PRin2 ○Pin number and Pin name REV. A 4/4 ○Cautions for use (1) Absolute maximum ratings If the absolute maximum ratings for applied voltage and/or operation temperature are exceeded, LSI damage may result. Therefore, do not apply voltage or use in a temperature that exceeds these absolute maximum ratings. If it is possible that absolute maximum ratings will be exceeded, use a physical safety device such as a fuse and make sure that no conditions that might exceed the absolute maximum ratings will be applied to the LSI IC. (2) Power supply line Design PCB pattern to provide low impedance for the wiring between the power supply and the GND lines. In this regard, for the digital block power supply and the analog block power supply, even though these power supplies has the same level of potential, separate the power supply pattern for the digital block from that for the analog block, thus suppressing the diffraction of digital noises to the analog block power supply resulting from impedance common to the wiring patterns. For the GND line, give consideration to design the patterns in a similar manner. Furthermore, for all power supply terminals to ICs, mount a capacitor between the power supply and the GND terminal. At the same time, in order to use an electrolytic capacitor, thoroughly check to be sure the characteristics of the capacitor to be used present no problem including the occurrence of capacity dropout at a low temperature, thus determining the constant. (3) GND potential Regardless of the operation mode, the voltage of the GND pin should be at least the minimum voltage. Actually check whether or not the voltage at each pin, including transient phenomena, is less than the GND pin voltage. (4) Thermal design The thermal design should be done using an ample margin that takes into consideration the allowable dissipation under actual use conditions. (5) Shorts between pins and mounting errors When mounting LSI ICs onto the circuit board, make sure each LSI's orientation and position is correct. The ICs may become damaged if they are not mounted correctly when the power is turned on. Similarly, damage may also result if a short occurs, such as when a foreign object is positioned between pins in an IC, or between a pin and a power supply or GND connection. (6) Operation in strong electromagnetic field When used within a strong electromagnetic field, evaluate carefully to avoid the risk of operation faults. (7) Power supply sequence [Power-up sequence] Supply voltage1 (Vcc1 : 2pin, 29pin, 33pin, 39pin, 44pin) must be powered up before or at the same time as the supply voltage2 (Vcc2 : 12pin). [Power-down sequence] Supply voltage2 (Vcc2 : 12pin) must be powered up before or at the same time as the supply voltage1(Vcc1 : 2pin, 29pin, 33pin, 39pin, 44pin). REV. A Notice Notes No copying or reproduction of this document, in part or in whole, is permitted without the consent of ROHM Co.,Ltd. The content specified herein is subject to change for improvement without notice. The content specified herein is for the purpose of introducing ROHM's products (hereinafter "Products"). If you wish to use any such Product, please be sure to refer to the specifications, which can be obtained from ROHM upon request. Examples of application circuits, circuit constants and any other information contained herein illustrate the standard usage and operations of the Products. The peripheral conditions must be taken into account when designing circuits for mass production. Great care was taken in ensuring the accuracy of the information specified in this document. However, should you incur any damage arising from any inaccuracy or misprint of such information, ROHM shall bear no responsibility for such damage. The technical information specified herein is intended only to show the typical functions of and examples of application circuits for the Products. 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