Datasheet

AOD402
N-Channel Enhancement Mode Field Effect Transistor
General Description
Features
The AOD402 uses advanced trench technology and
design to provide excellent R DS(ON) with low gate
charge. This device is suitable for use in PWM, laod
switching and general purpose applications.
VDS (V) = 30V
ID = 18 A (VGS = 20V)
RDS(ON) < 15 mΩ (VGS = 20V)
RDS(ON) < 18 mΩ (VGS = 10V)
RDS(ON) < 44 mΩ (VGS = 4.5V)
100% UIS Tested!
100% Rg Tested!
-RoHS Compliant
-Halogen Free*
TO-252
D-PAK
Top View
D
Bottom View
D
G
S
G
S
S
G
Absolute Maximum Ratings T A=25°C unless otherwise noted
Parameter
Symbol
Drain-Source Voltage
VDS
Gate-Source Voltage
VGS
TC=25°C
Continuous Drain
Current G
C
C
Repetitive avalanche energy L=0.1mH
TC=25°C
Power Dissipation
B
Power Dissipation
A
C
TA=25°C
Junction and Storage Temperature Range
Maximum Junction-to-Case
IDM
40
IAR
18
A
EAR
40
mJ
A
Alpha & Omega Semiconductor, Ltd.
W
30
2.5
W
1.6
TJ, TSTG
t ≤ 10s
Steady-State
Steady-State
A
60
-55 to 175
Symbol
B
V
12
PDSM
TA=70°C
A
±25
ID
PD
TC=100°C
Thermal Characteristics
Parameter
Maximum Junction-to-Ambient
Maximum Junction-to-Ambient
Units
V
18
TC=100°C
Pulsed Drain Current
Avalanche Current
Maximum
30
RθJA
RθJC
Typ
16.7
40
1.9
°C
Max
25
50
2.5
Units
°C/W
°C/W
°C/W
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AOD402
Electrical Characteristics (TJ=25°C unless otherwise noted)
Symbol
Parameter
STATIC PARAMETERS
BVDSS
Drain-Source Breakdown Voltage
Conditions
Min
ID=250µA, VGS=0V
30
IGSS
Gate-Body leakage current
VDS=0V, VGS=±25V
VGS(th)
Gate Threshold Voltage
VDS=VGS, ID=250µA
1
On state drain current
VGS=10V, VDS=5V
40
TJ=55°C
5
100
nA
3
V
12
15
17.4
21
VGS=10V, ID=18A
15
18
VGS=4.5V, ID=6A
36
44
TJ=125°C
A
gFS
Forward Transconductance
VDS=5V, ID=18A
24
VSD
Diode Forward Voltage
IS=18A, VGS=0V
0.8
IS
Maximum Body-Diode Continuous Current
DYNAMIC PARAMETERS
Input Capacitance
Ciss
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
Rg
Gate resistance
VGS=0V, VDS=15V, f=1MHz
VGS=0V, VDS=0V, f=1MHz
SWITCHING PARAMETERS
Qg(10V)
Total Gate Charge
Qgs
Gate Source Charge
Qgd
Gate Drain Charge
tD(on)
Turn-On DelayTime
tr
Turn-On Rise Time
tD(off)
Turn-Off DelayTime
tf
Turn-Off Fall Time
µA
2.4
VGS=20V, ID=18A
Static Drain-Source On-Resistance
Units
1
Zero Gate Voltage Drain Current
RDS(ON)
Max
V
VDS=24V, VGS=0V
IDSS
ID(ON)
Typ
VGS=10V, VDS=10V, ID=18A
VGS=10V, VDS=15V, ID=18A,
RL=0.82Ω, RGEN=3Ω
mΩ
mΩ
S
1
V
18
A
769
pF
185
pF
131
pF
0.7
Ω
15.9
nC
2.44
nC
4.92
nC
6.2
ns
10.9
ns
16
ns
4.8
ns
trr
Body Diode Reverse Recovery Time
IF=18A, dI/dt=100A/µs
18
Qrr
Body Diode Reverse Recovery Charge IF=18A, dI/dt=100A/µs
8.1
ns
nC
A: The value of R θJA is measured with the device mounted on 1in 2 FR-4 board with 2oz. Copper, in a still air environment with TA =25°C. The
Power dissipation PDSM is based on R θJA and the maximum allowed junction temperature of 150°C. The value in any a given application
depends on the user's specific board design, and the maximum temperature fo 175°C may be used if the PCB allows it.
B. The power dissipation PD is based on TJ(MAX)=175°C, using junction-to-case thermal resistance, and is more useful in setting the upper
dissipation limit for cases where additional heatsinking is used.
C: Repetitive rating, pulse width limited by junction temperature TJ(MAX)=175°C.
D. The R θJA is the sum of the thermal impedence from junction to case R θJC and case to ambient.
E. The static characteristics in Figures 1 to 6 are obtained using <300 µs pulses, duty cycle 0.5% max.
F. These tests are performed with the device mounted on 1 in 2 FR-4 board with 2oz. Copper, in a still air environment with TA=25°C. The SOA
curve provides a single pulse rating.
G. The maximum current rating is limited by bond-wires.
*This device is guaranteed green after data code 8X11 (Sep 1ST 2008).
Rev4: Oct 2008
THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,
FUNCTIONS AND RELIABILITY WITHOUT NOTICE.
Alpha & Omega Semiconductor, Ltd.
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AOD402
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
40
30
10V
6V
35
25
30
7V
20
20
ID(A)
25
ID (A)
VDS=5V
5V
4.5V
15
125°C
15
10
10
VGS=4V
5
25°C
5
3.5V
0
0
0
1
2
3
4
2
5
2.5
60
4
4.5
5
5.5
Normalized On-Resistance
1.8
50
RDS(ON) (mΩ
Ω)
3.5
VGS(Volts)
Figure 2: Transfer Characteristics
VDS (Volts)
Fig 1: On-Region Characteristics
40
VGS=4.5V
30
VGS=10V
20
10
VGS=20V
0
0
5
10
15
20
25
30
1.6
VGS=10V, 18A
VGS=20V,18A
1.4
1.2
1
0.8
0
ID (A)
Figure 3: On-Resistance vs. Drain Current and
Gate Voltage
25
50
75
100
125
150
175
Temperature (°C)
Figure 4: On-Resistance vs. Junction
Temperature
60
1.0E+02
50
1.0E+01
ID=18A
125°C
1.0E+00
40
IS (A)
RDS(ON) (mΩ
Ω)
3
30
125°C
20
1.0E-01
1.0E-02
25°C
1.0E-03
10
25°C
1.0E-04
0
4
8
12
16
20
VGS (Volts)
Figure 5: On-Resistance vs. Gate-Source Voltage
Alpha & Omega Semiconductor, Ltd.
1.0E-05
0.0
0.2
0.4
0.6
0.8
1.0
1.2
VSD (Volts)
Figure 6: Body-Diode Characteristics
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AOD402
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
1200
10
VDS=15V
ID=18A
A
1000
Ciss
Capacitance (pF)
VGS (Volts)
8
6
4
800
600
Coss
400
2
200
Crss
0
0
4
8
12
16
0
20
0
Qg (nC)
Figure 7: Gate-Charge Characteristics
100.0
5
10
15
20
25
VDS (Volts)
Figure 8: Capacitance Characteristics
60
T J(Max)=150°C, T A=25°C
50
1ms
Power (W)
0.1s
1s
1.0
10s
DC
1
10
Zθ JA Normalized Transient
Thermal Resistance
1
D=T on/T
T J,PK =T A+PDM.ZθJA.RθJA
RθJA=50°C/W
30
20
0
0.001
100
0.01
0.1
1
10
100
1000
Pulse Width (s)
Figure 10: Single Pulse Power Rating Junction-toAmbient (Note F)
VDS (Volts)
Figure 9: Maximum Forward Biased Safe
Operating Area (Note F)
10
40
10
0.1
0.1
T J(Max)=150°C
T A=25°C
100µs
10ms
ID (Amps)
10.0
RDS(ON)
limited
30
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
0.1
PD
0.01
0.001
0.00001
Single Pulse
0.0001
0.001
T on
0.01
0.1
1
T
10
100
1000
Pulse Width (s)
Figure 11: Normalized Maximum Transient Thermal Impedance (Note F)
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AOD402
Gate Charge Test Circuit & Waveform
Vgs
Qg
10V
+
+ Vds
VDC
-
Qgs
Qgd
VDC
DUT
-
Vgs
Ig
Charge
Resistive Switching Test Circuit & Waveforms
RL
Vds
Vds
DUT
Vgs
90%
+ Vdd
VDC
-
Rg
10%
Vgs
Vgs
td(on)
tr
td(off)
ton
tf
toff
Unclamped Inductive Switching (UIS) Test Circuit & Waveforms
L
2
EAR= 1/2 LIAR
Vds
BVDSS
Vds
Id
+ Vdd
Vgs
Vgs
I AR
VDC
-
Rg
Id
DUT
Vgs
Vgs
Diode Recovery Test Circuit & Waveforms
Q rr = - Idt
Vds +
DUT
Vds -
Isd
Vgs
Ig
Alpha & Omega Semiconductor, Ltd.
Vgs
L
Isd
+ Vdd
t rr
dI/dt
I RM
Vdd
VDC
-
IF
Vds
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