Regulators ICs for Digital Cameras and Camcorders System Switching Regulator IC with Built-in FET (10V) BD8355MWV No.11036EAT20 ●Description BD8355MWV is a system switching regulator for Li 2 cell composed of 6 step-down synchronous rectification channels and 1 step-up Di rectification channel for LED application. Using a charge-pump system for high side FET driver and including power MOSFET reduce the number of peripheral devices and realize high efficiency. ●Functions 1) Includes step-down 6 CH (CH1~6), step-up for LED 1CH (7CH) total 7CH included. 2) Includes Power MOSFET for all channels. 3) Includes Charge-pump circuit for high side driver. 4) Operating frequency of 750 kHz. 5) CH1 and 4 are common, 3 and 5 are also common, and others are possible to turn ON/OFF independently. 6) Includes Short Circuit Protection (SCP), Under Voltage Lock Out (UVLO) and Thermal Shut Down (TSD). 7) Includes Short Circuit Protection for CH6 (SCP6). 8) Includes Over Voltage Protection for CH7. 9) Thermally enhanced UQFN056V7070 package (7mm×7mm, 0.4mm pitch) ●Applications For digital single-lens reflex camera, digital video camera ●Absolute maximum ratings（Ta＝25℃） Parameter Power Supply Voltage Maximum Current Symbol Ratings Unit VCC, VBAT, VHx1~6 -0.3~11.0 V VLx1~6 -0.3~VHx V VLx7 -0.3~28.0 V HVREG CTL14, CTL2, CTL35, CTL6 CTL7 -0.3~15.0 V -0.3~11.0 V -0.3~7.0 V IomaxLx1, Lx4, Lx5 ±1.5 A IomaxLx2, Lx3 ±0.8 A IomaxLx6 ±2.0 A IomaxLx7 Power Dissipation Pd +1.0 A 420 (*1) mW 930 (*2) mW Operating Temperature Topr -25~+85 ℃ Storage Temperature Tstg -55~+125 ℃ Junction Temperature Tjmax 125 ℃ *1 Without external heat sink, power dissipation degrades by 4.2mW/℃ above 25℃. *2 Power dissipation degrades by 9.3mW/℃ above 25℃, when mounted on a 74.2mm×74.2mm×1.6mmt grass epoxy PCB. www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 1/20 2011.12 - Rev.A Technical Note BD8355MWV ●Recommended Operating Conditions(Ta=-25~+85℃) Parameter Ratings Symbol Unit Min. Typ. Max. VCC, VBAT, VHx1~6 4.0 7.2 10.0 V VREGA Output Capacitor CVREGA 0.47 1.0 2.2 μF VREGD Output Capacitor CVREGD 0.47 1.0 2.2 μF HVREG Output Capacitor CHVREG 0.47 1.0 2.2 μF Flying Capacitor CFLY 0.047 0.1 0.22 μF Oscillator Frequency Fosc 500 750 1800 kHz Timing Resistor RRT 15 47 82 kΩ Power Supply Voltage ●Electrical Characteristics(Ta=25℃,Vcc=VBAT=7.2V, fosc=750kHz with no designation) Limits Parameter Symbol Unit Min. Typ. Max. Conditions 【Reference Voltage】 VREGA Output Voltage VREGA 3.54 3.60 3.66 V VREGA=-1mA Line Regulation DVli - - 10 mV VCC=4V~10V, VREGA=-1mA Load Regulation DVlo - - 10 mV VREGA=-1mA~-5mA VREGD 3.50 3.60 3.70 V VREGD=-10mA VBAT +3.60 24 - V Iout=0mA, FB=2.5V RHVREG VBAT +3.50 - 40 Ω Iout=-30mA, CFLY=0.1µF fosc 650 750 850 kHz Df - 0 2 % CH7 0% Duty Threshold Voltage Vth0 0.2 0.3 - V CH7 Max Duty Dmax 86 92 96 % Threshold Voltage Veth1 0.790 0.800 0.810 V Output Voltage L VFBL1 - 0.03 0.2 V Output Voltage H VFBH1 3.3 3.5 - V Isink1 4.0 17.0 - mA INV1=0.9V, FB1=1.75V Isource1 - -140 -70 µA INV1=0.7V, FB1=1.75V Ibias1 -100 0 100 nA INV1=0V Threshold Voltage Veth 0.990 1.000 1.010 V Output Voltage L VFBL - 0.03 0.2 V INV=1.1V Output Voltage H VFBH 3.3 3.5 - V INV=0.9V 【Bias Voltage】 VREGD Output Voltage 【Charge Pump】 HVREG Output Voltage Output Impedance HVREG 【Oscillator】 Oscillator Frequency Oscillator Frequency cofficient RT=47kΩ VCC=4V~10V 【PWM Comparator】 【Error Amplifier 1】(CH1) Output Sink Current Output Source Current Input Bias Current INV1=0.9V INV1=0.7V 【Error Amplifier 2】(CH2~6) Output Sink Current Output Source Current Input Bias Current Isink 4.0 17.0 - mA INV=1.1V, FB=1.75V Isource - -140 -70 µA INV=0.9V, FB=1.75V Ibias -100 0 100 nA INV=0V Veth7 0.285 0.300 0.315 V 【Error Amplifier 3】(CH7) Threshold Voltage Output Voltage L VFBL7 - 0.03 0.2 V INV=0.4V Output Voltage H VFBH7 3.3 3.5 - V INV=0.2V Output Sink Current Output Source Current Input Bias Current www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. Isink7 4.0 17.0 - mA INV=0.4V, FB=1.75V Isource7 - -140 -70 µA INV=0.2V, FB=1.75V Ibias7 -50 0 50 nA INV7=0V 2/20 2011.12 - Rev.A Technical Note BD8355MWV Parameter Symbol Limits Min. Typ. Max. Unit Conditions 【Soft Start】 CH1 Soft Start Time Tss1 1.3 2.5 3.7 msec CH1 CH2-6 Soft Start Time Tss2-6 1.5 3.1 4.6 msec CH2~6 CH7 Duty Restriction Time TDTC7 12.0 15.0 18.0 msec CH7 RLx 300 500 700 Ω CTL=0V CH1 High Side Nch FET On Resistor RonH1 - 0.27 0.44 Ω Lx1=-50mA CH1 Low Side Nch FET On Resistor RonL1 - 0.15 0.24 Ω Lx1=50mA CH2 High Side Nch FET On Resistor RonH2 - 0.42 0.68 Ω Lx2=-50mA CH2 Low Side Nch FET On Resistor RonL2 - 0.30 0.48 Ω Lx2=50mA CH3 High Side Nch FET On Resistor RonH3 - 0.52 0.84 Ω Lx3=-50mA 【 Driver】 CH1~6 Lx Pull-down Resistor CH3 Low Side Nch FET On Resistor RonL3 - 0.20 0.32 Ω Lx3=50mA CH4 High Side Nch FET On Resistor RonH4 - 0.20 0.32 Ω Lx4=-50mA CH4 Low Side Nch FET On Resistor RonL4 - 0.30 0.48 Ω Lx4=50mA CH5 High Side Nch FET On Resistor RonH5 - 0.23 0.37 Ω Lx5=-50mA CH5 Low Side Nch FET On Resistor RonL5 - 0.22 0.36 Ω Lx5=50mA CH6 High Side Nch FET On Resistor RonH6 - 0.22 0.36 Ω Lx6=-50mA CH6 Low Side Nch FET On Resistor RonL6 - 0.30 0.48 Ω Lx6=50mA CH7 Nch FET On Resistor Ron7 - 0.50 0.80 Ω Lx7=50mA Vthuvlo1 3.3 3.4 3.5 V VCC pin voltage Hysteresis Voltage DVuv 25 100 200 mV Threshold Voltage2 Vthuvlo2 - 2.5 2.7 V VREGA pin voltage Threshold Voltage3 Vthuvlo3 - 3.15 3.35 V VREGD pin voltage Timer Start Voltage Vstart 2.65 2.8 2.95 V FB1~5, 7 pin v oltage CH6 Timer Start Voltage Vstart6 0.45 0.50 0.55 V INV6 pin voltage SCP pin Threshold Voltage Vscpth 0.9 1.0 1.1 V SCP6 pin Threshold Voltage Vscp6th 0.9 1.0 1.1 V SCP pin Source Current Iscp -1.4 -1.0 -0.6 µA SCP=0.1V SCP6 pin Source Current Iscp6 -1.4 -1.0 -0.6 µA SCP6=0.1V SCP pin Stand-by Voltage Vstscp - 10 100 mV CTL=3V, FB=0V SCP6 pin Stand-by Voltage Vstscp6 - 10 100 mV CTL6=3V, INV6=1.0V VOVP7 26.5 28.0 29.5 V 【Under Voltage Lock Out(UVLO)】 Threshold Voltage1 VCC pin voltage 【Short Circuit Protection(SCP)】 【Over Voltage Protection(OVP)】 CH7 OVP Threshold Voltage Vo7 pin voltage 【Control】 CTL1-6 Control Voltage CTL7 Control Voltage Active VCTLH 2 - VCC V Non-Active VCTLL -0.3 - 0.4 V Active VCTLH 2 - 5.5 V Non-Active VCTLL -0.3 - 0.4 V RCTL 0.6 1.0 1.4 MΩ VCC pin Istb1 - 0 5 µA Hx pin Istb2 - 0 5 µA Hx1~6=10V, sum of Hx1~6 Lx7 pin Istb3 - 0 5 µA Lx7=28V Icc - 6.0 9.0 mA CTL=3V, FB=2.5V CTL pin Pull-Down Resistor 【Whole device】 Stand-by Current Circuit Current CTL=0V ◎This product is not designed for normal operation within a radioactive environment. www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 3/20 2011.12 - Rev.A Technical Note BD8355MWV ●Package dimensions Fig. 1 Package dimension www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 4/20 2011.12 - Rev.A Technical Note BD8355MWV ●PIN Assignments Pin No. Pin Name 1 INV7 2 FB6 3 INV6 4 FB5 5 INV5 6 GND 7 FB4 8 INV4 9 INV3 10 FB3 11 INV2 12 FB2 13 SCP6 14 15 16 CTL7 INV1 FB1 17 SCP 18 19 20 21 22 23 24 25 26 27 28 RT VREGA VCC VREGD CMINUS HVREG CPLUS VBAT Hx1 Lx1 Lx1 Pin Descriptions CH7 Error Amplifier Negative Input Pin CH6 Error Amplifier Output Pin CH6 Error Amplifier Negative Input Pin CH5 Error Amplifier Output Pin CH5 Error Amplifier Negative Input Pin Ground Pin CH4 Error Amplifier Output Pin CH4 Error Amplifier Negative Input Pin CH3 Error Amplifier Negative Input Pin CH3 Error Amplifier Output Pin CH2 Error Amplifier Negative Input Pin CH2 Error Amplifier Output Pin CH6 Short Circuit Protection Delay Time Setting Pin with External Capacitor CH7 ON/OFF Control Pin CH1 Error Amplifier Negative Input Pin CH1 Error Amplifier Output Pin CH1-5 and CH7 Short Circuit Protection Delay Time Setting Oscillator Frequency Adjustment Pin with External 3.6V Reference Output Voltage Pin Input Supply Voltage Pin 3.6V Lowside Transistor Bias Voltage Output Pin Pin for Connecting Chargepump Flying Capacitor Chargepump Voltage Output Pin Pin for Connecting Chargepump Flying Capacitor Chargepump Input Supply Voltage Pin CH1 Highside Transistor and Driver Supply Voltage Pin for Connecting to Inductor of CH1 Pin for Connecting to Inductor of CH1 Pin No. 29 30 31 32 33 34 35 36 37 38 39 40 Pin Name CTL35 CTL14 PGND12 PGND12 Lx2 Hx2 Hx3 Lx3 PGND34 PGND34 Lx4 Lx4 Pin Descriptions CH3, 5 ON/OFF Control Pin CH1, 4 ON/OFF Control Pin Ground Pin for CH1, 2 Output Ground Pin for CH1, 2 Output Pin for Connecting to Inductor of CH2 CH2 Highside Transistor and Driver Supply Voltage CH3 Highside Transistor and Driver Supply Voltage Pin for Connecting to Inductor of CH3 Ground Pin for CH3, 4 Output Ground Pin for CH3, 4 Output Pin for Connecting to Inductor of CH4 Pin for Connecting to Inductor of CH4 41 CTL6 CH6 ON/OFF Control Pin 42 43 44 CTL2 Hx4 Hx4 CH2 ON/OFF Control Pin CH4 Highside Transistor and Driver Supply Voltage CH4 Highside Transistor and Driver Supply Voltage 45 Hx5 46 47 48 49 50 51 52 53 54 55 56 Lx5 PGND56 PGND56 Lx6 Lx6 Hx6 Hx6 Lx7 PGND7 Vo7 FB7 CH5 Highside Transistor and Driver Supply Voltage Pin Pin for Connecting to Inductor of CH5 Ground Pin for CH5, 6 Output Ground Pin for CH5, 6 Output Pin for Connecting to Inductor of CH6 Pin for Connecting to Inductor of CH6 CH6 Highside Transistor and Driver Supply Voltage CH6 Highside Transistor and Driver Supply Voltage Pin for Connecting to Inductor of CH7 Ground Pin for CH7 Output Voltage Monitor Pin for CH7 Over Voltage Protection CH7 Error Amplifier Output Pin ●PIN Assignments Fig. 2 Pin Assignments www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 5/20 2011.12 - Rev.A Technical Note BD8355MWV ●Block diagram and application circuit UNREG A 3.3kΩ FB1 33kΩ 220pF HX1 16kΩ 75kΩ HVREG ERRORAMP1 － ＋ ＋ 330pF INV1 0.8V 4.7uF A DRIVER CH1 Step Down DC/DC (Current mode) Lx1 VREGD Vo1=1.15V Iomax=1.2A 4.7uH 10uF DRIVER PGND12 FB2 B HX2 47kΩ 56kΩ INV2 20kΩ 1.0V C 6.8kΩ HVREG ERRORAMP2 － ＋ ＋ 1000pF 4.7uF B Vo2=3.8V DRIVER CH2 Step Down DC/DC (Current mode) Lx2 VREGD Iomax=0.6A 10uH 10uF DRIVER FB3 43kΩ 330pF HX3 12kΩ INV3 91kΩ//130kΩ 1.0V D HVREG ERRORAMP3 － ＋ ＋ 330pF 4.7uF Lx3 VREGD 10uF FB4 HVREG ERRORAMP4 － ＋ ＋ 1000pF INV4 20kΩ Iomax=0.6A 10uH DRIVER 39kΩ 36kΩ+36kΩ C Vo3=1.8V DRIVER CH3 Step Down DC/DC (Current mode) 1.0V HX4 4.7uF DRIVER CH4 Step Down DC/DC (Current mode) VREGD D Vo4=4.6V Lx4 Iomax=1.2A 10uH DRIVER 10uF PGND34 E FB5 HX5 20kΩ 33kΩ INV5 15kΩ HVREG ERRORAMP5 － ＋ ＋ 1000pF 1.0V 4.7uF E Vo5=3.2V DRIVER CH5 Step Down DC/DC (Current mode) Lx5 VREGD Iomax=1.2A 10uH 10uF DRIVER FB6 HX6 F 39kΩ 51kΩ 4.7uF F Vo6=4.2V DRIVER － ＋ INV6 16kΩ HVREG ERRORAMP6 1000pF CH6 Step Down DC/DC (Current mode) 1.0V Lx6 VREGD Iomax=1.8A 10uH 10uF DRIVER FB7 30kΩ PGND56 2.7kΩ ERRORAMP7 － 6800pF G 560pF INV7 OCP 1.0uF 33uH Vo7=WLED Iomax=50mA ＋ VREGD CH7 Step Up DC/DC (Voltage mode) 0.3V SS TIMER LX7 1uF DRIVER PGND7 Vo7 PROTECTION Latch G CTL7 SCP6 0.047uF ＋ 10Ω UVLO － 0.5V SCP 0.047uF SCP6 TIMER CP_SW － － － － － － ＋ SCP TIMER OVPCOMP HVREG C+ 1.0uF VBAT CP DRIVER 2.8V VREGD 0.1uF 0.1uF CCP_SW VREGD VREGD=3.6V 1.0uF SHUT DOWN OSC VREGA VREGA=3.6V VCC CTL7 CTL6 CTL2 CTL35 GND 47kΩ CTL14 RT 1.0uF 10uF Fig. 3 Application circuit * We are confident that the above applied circuit diagram should be recommended, but please thoroughly confirm its characteristics when using it. In addition, when using it with the external circuit’s constant changed, please make a decision that allows a sufficient margin in light of the fluctuations of external components and ROHM’s IC in terms of not only static characteristic but also transient characteristic. www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 6/20 2011.12 - Rev.A Technical Note BD8355MWV ●Timing chart Fig. 4 CH1-6 startup sequence Fig. 5 CH7 startup sequence Fig. 6 stop sequence www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 7/20 2011.12 - Rev.A Technical Note BD8355MWV ●Functional Description / peripheral devices setting 1. Internal Regulator (VREGA, VREGD) Both VREGA and VREGD are internal regulator of 3.6 V output. Bypass VREGA/VREGD to GND with a capacitor between 0.47 µF and 2.2 µF. In addition, it needs care for the voltage between VREGA and VREGD not to excess 0.3 V to avoid IC malfunctions. 2. Control block (SHUT DOWN) Inputting voltages to CTL14, 2, 35, 6, and 7 control ON/OFF of respective channels. Note that it is impossible to independently control CH1 and 4, and to independently control CH3 and 5. In addition, turn on any CTL1-6 and wait 500 usec before turning on CTL7. Input higher voltage than 2 V to CTL14, 2, 35, or 6 to turn on each channel. Open or input voltage -0.3 ~ 0.4 V to those to turn off. Input 2 ~ 5.5 V to CTL7 to turn on CH7. Open or input voltage -0.3 ~ 0.4 V to CTL7 to turn off. The states of output terminals (Lx1-7), FB terminals, SCP/SCP6 terminals, and internal regulator (VREGA and VREGD) are written below. Each CTL terminal contains pull down resistor of 1MΩ (typ.) CTL 14 2 35 6 L L L L H L L L L H L L L L H L L L L H L* L* L* L* H H H H 7 L L L L L H H 1 L A L L L L* A 2 L L A L L L* A 3 L L L A L L* A Lx 4 L A L L L L* A 5 L L L A L L* A 6 L L L L A L* A 7 H-Z H-Z H-Z H-Z H-Z A A 1 L A L L L L* A 2 L L A L L L* A 3 L L L A L L* A FB 4 5 L L A L L L L A L L L* L* A A 6 L L L L A L* A 7 L L L L L A A VREGA VREGD L A A A A A A * Turn on any CTL1-6 before turn on CTL7. Conditions of Lx1 ～ 6, FB1 ～ 6, SCP6 are changed with active channel. 3. L A A A A A A SCP SCP6 L A A A L A A L L L L A L* A A: active Output voltage/current setting Fig. 7 Setting of feedback resistance (a) Setting output voltage of CH1-6 The reference voltages of ERROR AMP. are 0.8 V (CH1) and 1 V (CH2-6). The output voltages are determined as equation (1) and (2). Set the value of feedback resistance R1 and R2 which are connected to INV1-6 pin. (b) Setting output current of CH7 The reference voltage of CH7 ERROR AMP. is 0.3 V. The current flowing LED is determined as equation (3). Set the value of feedback resistance R3, considering the tolerance current of LED. 4. Startup/Stop sequence To avoid rush current on startup, each channel has soft start function. The output voltage of CH1 reaches to the target in Tss1=2.5msec (typ.) and the output voltage of CH2 ~ 6 reaches to the target in Tss2-6=3.1msec (typ.). In case of CH7, the output of error amplifier is restricted in TDTC7=15msec (typ.). Note that Tss1-6, TDTC7 vary from typical value Ttyp as following with setting of switching frequency. 5. Protection matrix The following table displays state of outputs when protection is operating. Lx1-5 Lx6 Lx7 FB1-6 FB7 Short Circuit Protection (CH1-5,7) H-Z A H-Z A A Short Circuit Protection (CH6) A H-Z A A A Under Voltage Lockout (VCC) H-Z H-Z H-Z NA NA Under Voltage Lockout (VREGA) H-Z H-Z H-Z NA NA Under Voltage Lockout (VREGD) H-Z H-Z H-Z NA NA Under Voltage Lockout (HVREG) H-Z H-Z A NA A H-Z H-Z H-Z NA NA Thermal Shutdown （TSD） www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 8/20 SCP SCP6 A A A A NA NA NA NA NA NA NA NA NA NA NA NA NA NA A: active NA: non-active VREGA VREGD HVREG A A A A A NA A A A A A NA 2011.12 - Rev.A Technical Note BD8355MWV 6. Short circuit protection (SCP, SCP6) For CH1 ~ 5 and 7, monitoring the output voltages of error amplifier (FB voltage), if the voltages become more than 2.8 V, the output of SCPCOMP will become “L” level, and transistor “M1” will turn off. Thus the current “1µA” be supplied to CSCP the capacitor connected to SCP terminal. The outputs stop when SCP terminal voltage reaches 1 V. The time from short circuit detect to outputs stop (tscp) is set as shown below. Vo1 FB1 INV1 － Vo2 FB2 INV2 － tSCP[s] = 1.0 × CSCP[µF] FB2 ＋ Vo3 On the other hand, short circuit of CH6 is detected when the error amplifier input of CH6 (INV6) becomes less than 0.5 V. The time from short circuit detect to output stop (tscp6) is set with CSCP6 as tscp. To release from short circuit protection latch state, turn CTL terminal to “L” level. Connect SCP/SCP6 terminal to GND when the function of short circuit protection is not used. 7. FB1 ＋ FB3 INV3 － FB3 1μA ＋ SCP CSCP － － － － － － Vo4 FB4 M1 ＋ 2.8V INV4 － FB4 ＋ Over voltage protection(OVP) In CH7, when LED is open, INV7 become L and output voltage increase suddenly. If that condition continues Lx7 voltage increase and exceed break down voltage.CH7 has over voltage protection circuit (OVP) not to exceed break down voltage. When the voltage of VO7 terminal becomes more than 28V (typ.), OVP function works and CH7 stops operating. Once OVP is detected, CH7 becomes latch state. To release from latch state, turn off CTL7. Vo5 FB5 INV5 － FB5 ＋ Vo7 FB7 INV7 － FB7 ＋ 8. Thermal shutdown circuit (TSD) The TSD circuit protects the IC against thermal runaway and heat damage. The TSD thermal sensor detects junction temperature. When the temperature reaches the TSD threshold (typ: 175 ), the circuit switches the outputs of all channels, VREGA, and VREGD OFF. At the same time, it sets the FB1-7 terminals “L” level. The hysteresis width (typ: 15 ) provided between the TSD function start temperature (threshold) and the stop temperature serves to prevent malfunctions from temperature fluctuations. Fig. 8 Block diagram of short circuit protection circuit. Vo6 1μA INV6 SCP6 － ー ＋ 9. Under Voltage Lockout (UVLO) Under voltage lockout prevents IC malfunctions that could otherwise occur due to power supply fluctuation at power ON or abrupt power OFF. This system turns OFF each channel output when the VCC voltage becomes lower than 3.4 V. The UVLO detect voltage has 0.1 V hysteresis to prevent malfunctions from power supply fluctuation. In addition, UVLO works when an internal regulator voltage drops down. The outputs of all channels are turned OFF when VREGD becomes lower than 3.15 V or VREGA becomes lower than 2.4 V. Moreover, the outputs of CH1-6 are turned OFF when HVREG becomes lower than VCC+2.5 V. The switching frequency The switching frequency is set by the resistor connected to the RT terminal. Set the frequency with referring fig. 19. www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 9/20 C SCP6 ＋ FB6 SS TIMER M2 0.5V Fig. 9 Block diagram of short circuit protection6 circuit. 2011.12 - Rev.A Technical Note BD8355MWV 10. Selection of output inductor A combination of the output inductor and the output capacitor form a second-order smoothing filter for switch waveform and provide DC output voltage. If the inductance is low, its package size is minimized, but the penalty is higher ripple current, with lower efficiency and an increase of output noise. Conversely, higher inductance increases the package size, but lowers ripple current, consequently, and suppress the output ripple voltage. Generally, set inductance as that the ripple current is about 20-50 % of their output current. Below equations are the relations of between inductance and ripple current. (step down) L[H] (VIN[V]‐VOUT[V]) IL[A] VOUT[V] VIN[V] 1 fosc [Hz] (step up) L[H] (VOUT[V]‐VIN[V]) IL[A] VIN[V] VOUT[V] 1 fosc [Hz] L: inductance VIN: input voltage ⊿IL: ripple current VOUT: output voltage fosc: switching frequency IOUT: output load current In addition, set larger values than Ipeak that is calculated from below equation. IL⁄2 (step down) Ipeak=IOUT (step up) Ipeak= IOUT× VOUT⁄VIN ⁄ η⁄100 + IL⁄2 （η: efficiency[%]） 11. Phase Compensation The components shown will add poles and zeros to the loop gain as given by the following expression: ・CFB adds a pole whose frequency is given by: Application (A: error amplifier open loop gain) VOUT ・RFB adds a zero whose frequency is given by: COUT RL ・The output capacitor adds both a pole and a zero to the loop: VOUT RFB CFB R1 ERRORAMP (INV) R2 － ＋ (FB) Fig. 10 Phase compensation setting Where, RL is output load resistance, and ESR is the equivalent series resistance of the output capacitor. CFB forms a pole and a zero. Changing the value of CFB moves the frequency of both the pole and the zero. The CFB pole is typically referred to as the dominant pole, and its primary function is to roll off loop gain and reduce the bandwidth. The RFB zero is required to add some positive phase shift to offset some of the negative phase shift from the two lowfrequency poles. Without this zero, these two poles would cause -180° of phase shift at the unity-gain crossover, which is clearly unstable. 12. Precaution in the layout of Printed Circuit Board When switching regulator is operating, large current flow through the path of Power Supply – Inductor – Output Capacitor. In laying a pattern of the board, make this line as short and wide as possible to decrease impedance. The switching noise on INV1-7 terminals may cause the output oscillation. To avoid interference of the noise, make the line between voltage divider resistor and INV terminals as shortened as possible and not crossed at switching line. www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 10/20 2011.12 - Rev.A Technical Note BD8355MWV ●Reference data 8.00 4.00 6.00 3.00 VREGA [V] 5.00 ICC [mA] 10.00 4.00 2.00 2.00 1.00 0.00 0.00 0 2 4 6 VCC [V] 8 10 12 0 3.64 0.84 3.62 0.82 3.60 3.58 3.56 6 VCC [V] 8 10 12 0.80 0.78 0.76 -40 -20 0 20 40 60 80 100 -40 -20 Ambient Temperature [℃] 0 20 40 60 80 100 Ambient Temperature [℃] Fig. 13 VREGA vs ambient temperature Fig. 14 CH1 ErrorAmp. INV threshold vs ambient temperature 1.04 1.04 1.02 1.02 INV6 Threshold [V] INV2 Threshold [V] 4 Fig. 12 VREGA vs supply voltage INV1 Threshold [V] VREGA [V] Fig. 11 Circuit current vs supply voltage (all cannels ON) 2 1.00 0.98 0.96 1.00 0.98 0.96 -40 -20 0 20 40 60 80 100 -40 -20 Ambient Temperature [℃] 0 20 40 60 80 100 Ambient Temperature [℃] Fig. 15 CH2 ErrorAmp. INV threshold vs ambient temperature Fig. 16 CH6 ErrorAmp. INV threshold vs ambient temperature 900 0.34 Frequency[kHz] INV7 Threshold [V] 850 0.32 0.30 0.28 800 750 700 ‐conditions‐ ・RT=47kΩ 650 600 0.26 -40 -20 0 20 40 60 80 -40 100 Fig. 17 CH7 ErrorAmp. INV threshold vs ambient temperature www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. -20 0 20 40 60 80 100 Ambient Temperature [℃] Ambient Temperature [℃] 11/20 Fig. 18 Frequency vs ambient temperature 2011.12 - Rev.A Technical Note BD8355MWV 5.0 10000 VREGA [V] Frequency [kHz] 4.0 1000 3.0 2.0 1.0 0.0 100 10 0 100 1 RT [kΩ] 2 CTL [V] 3 4 Fig. 20 CTL terminal characteristic Fig. 19 Switching frequency vs timing resistance CTL14 CTL14 Vo1 (0.5V/div) Vo1 (0.5V/div) 1msec Lx1 (5V/div) Lx1 (5V/div) Iin (50mA) 1msec Iin (50mA) Fig. 21 CH1 startup waveform Fig. 22 CH1 stop waveform CTL2 CTL2 Vo2 (2V/div) Vo2 (2V/div) 1msec Lx2 (5V/div) Lx2 (5V/div) Iin (50mA) 1msec Iin (50mA) Fig. 23 CH2 startup waveform Fig. 24 CH2 stop waveform CTL35 CTL35 Vo3 (1V/div) Vo3 (1V/div) 1msec Lx3 (5V/div) 1msec Lx3 (5V/div) Iin (50mA) Iin (50mA) Fig. 25 CH3 startup waveform www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. Fig. 26 CH3 stop waveform 12/20 2011.12 - Rev.A Technical Note BD8355MWV CTL4 CTL14 Vo4 (2V/div) Vo4 (2V/div) 1msec Lx4(5V/div) Lx4 (5V/div) Iin (50mA) 1msec Iin (50mA) Fig. 27 CH4 startup waveform Fig. 28 CH4 stop waveform CTL35 CTL35 Vo5 (2V/div) 1msec Vo5 (2V/div) Lx5 (5V/div) Lx5 (5V/div) Iin (50mA) 1msec Iin (50mA) Fig. 29 CH5 startup waveform Fig. 30 CH5 stop waveform CTL6 CTL6 Vo6 (2V/div) Vo6 (2V/div) 1msec Lx6 (5V/div) Lx6 (5V/div) Iin (100mA) 1msec Iin (100mA) Fig. 31 CH6 startup waveform Fig. 32 CH6 stop waveform CTL7 CTL7 Vo7 (3V/div) Offset: 7.2V Vo7 (3V/div) Offset: 7.2V 2msec Lx7 (8V/div) Lx7 (8V/div) Iin (300mA) Iin (300mA) Fig. 33 CH7 startup waveform www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 2msec Fig. 34 CH7 stop waveform 13/20 2011.12 - Rev.A Technical Note 100 100 95 95 90 90 85 85 Efficiency [%] Efficiency [%] BD8355MWV 80 75 70 VBAT=4.2V 65 VBAT=5.0V L1: DEM3518C 4.7uH (TOKO) Vo1=1.15V fosc=750kHz 60 55 200 400 600 800 70 VBAT=8.4V 55 1200 VBAT=4.2V 65 60 VBAT=10V 1000 75 VBAT=7.2V 0 1400 Iout [mA] 95 90 90 85 85 Efficiency [%] Efficiency [%] 100 95 80 75 70 VBAT=4.2V L3: DEM3518C 10uH (TOKO) Vo3=1.8V fosc=750kHz 55 VBAT=5.0V VBAT=7.2V 100 200 300 400 500 VBAT=10V 600 700 800 80 75 70 55 VBAT=10V VBAT=5.5V L4: DEM3518C 10uH (TOKO) Vo4=4.6V fosc=750kHz 65 60 VBAT=8.4V 50 VBAT=7.2V VBAT=8.4V VBAT=10V 50 0 100 200 300 400 500 600 700 800 0 200 400 Iout [mA] 95 90 90 85 85 Efficiency [%] 100 95 80 75 70 VBAT=4.2V VBAT=5.0V L5: DEM3518C 10uH (TOKO) Vo5=3.2V fosc=750kHzv 60 55 VBAT=7.2V 200 400 600 1000 1200 1400 800 1200 75 70 VBAT=5.5V L6: DEM4518C 10uH (TOKO) Vo6=4.2V fosc=750kHz 65 55 VBAT=10V 1000 80 60 VBAT=8.4V 50 0 800 Fig. 38 Efficiency vs load current (CH4) 100 65 600 Iout [mA] Fig. 37 Efficiency vs load current (CH3) Efficiency [%] VBAT=8.4V Fig. 36 Efficiency vs load current (CH2) 100 60 VBAT=7.2V Iout [mA] Fig. 35 Efficiency vs load current (CH1) 65 VBAT=5.0V L2: DEM3518C 10uH (TOKO) Vo2=3.8V fosc=750kHz 50 50 0 80 VBAT=7.2V VBAT=8.4V VBAT=10V 50 1400 0 Iout [mA] 200 400 600 800 1000 1200 1400 1600 1800 2000 Iout [mA] Fig. 39 Efficiency vs load current (CH5) Fig. 40 Efficiency vs load current (CH6) 100 95 Efficient [%] 90 85 80 75 VBAT=10V 70 VBAT=8.4V L7: NR3015T330M 33uH (TAIYO YUDEN) LED x 4 fosc=750kHzv 65 60 55 VBAT=7.2V VBAT=5.0V VBAT=4.2V 50 0 10 20 30 40 50 60 70 Iout [mA] Fig. 41 Efficiency vs load current (CH7) www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 14/20 2011.12 - Rev.A Technical Note BD8355MWV ●Power Dissipation Reduction Fig. 42 Power dissipation vs ambient temperature www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 15/20 2011.12 - Rev.A Technical Note BD8355MWV ●PIN equivalent circuit Pin name INV1 INV2 INV3 INV4 INV5 INV6 INV7 Equivalent circuit Pin name Equivalent circuit VREGA FB1 FB2 FB3 FB4 FB5 FB6 INV GND CTL14 CTL2 CTL35 CTL6 CTL7 FB7 SCP SCP6 RT VCC VREGA GND VREGD CMINUS www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 16/20 2011.12 - Rev.A Technical Note BD8355MWV Pin name Equivalent circuit Pin name HVREG HVREG CPLUS VBAT VCC CPLUS VBAT GND Lx7 PGND7 www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. HX1 LX1 HX2 LX2 PGND12 HX3 LX3 HX4 LX4 PGND34 HX5 LX5 HX6 LX6 PGND56 Equivalent circuit Hx HVREG VREGD Lx PGND GND Vo7 17/20 2011.12 - Rev.A Technical Note BD8355MWV ●Notes for use 1.) Absolute maximum ratings This product is produced with strict quality control. However, the IC may be destroyed if operated beyond its absolute maximum ratings. If the device is destroyed by exceeding the recommended maximum ratings, the failure mode will be difficult to determine (e.g. short mode, open mode). Therefore, physical protection counter-measures (like fuse) should be implemented when operating conditions beyond the absolute maximum ratings anticipated. 2.) GND potential Ensure a minimum GND pin potential in all operating conditions. In addition, ensure that no pins other than the GND pin carry a voltage lower than or equal to the GND pin, including during actual transient phenomena. 3.) Thermal design Use a thermal design that allows for a sufficient margin in light of the power dissipation (Pd) in actual operating conditions. 4.) Inter-pin shorts and mounting errors Use caution direction and position the IC for mounting on printed circuit boards. Improper mounting may result in damage the IC. In addition, Output-output short and output-power supply/ground short condition may destroy the IC 5.) Operation in a strong electromagnetic field Exposing the IC within a strong electric/magnetic field may cause malfunction. 6.) Common impedance Power supply and ground wiring should reflect consideration of the need to lower common impedance and minimize ripple as much as possible (by making wiring as short and thick as possible or rejecting ripple by incorporating inductance and capacitance). 7.) Voltage of CTL pins The threshold voltage of CTL pins are 0.4 V and 2.0 V. Standby state is set below 0.4 V while running state is set beyond 2.0 V. The region between 0.4 V and 2.0 V is not recommended and may cause improper operation. The rise and fall time must be under 10 msec. In case to put capacitors to CTL pins, it is recommended using under 0.01µF. The maximum permissible voltage of CTL7 is 5.5 V. CTL7 pin should not be connected to VCC voltage. Turn on any CTL1-6 and wait more than 500 usec before turn on CTL7. 8.) Thermal shutdown circuit (TSD circuit) The IC incorporates a built-in thermal shutdown circuit (TSD circuit). The TSD circuit is designed only to shut the IC off to prevent runaway thermal operation. It is not designed to protect the IC or guarantee its operation. Do not continue to use the IC after operating this circuit or use the IC in an environment where the operation of this circuit is assumed. 9.) Applications with modes that VCC/GND and other pins except Lx and HVREG potential are reversed may cause damage internal IC circuits. In addition, modes that each pins sink current may also cause damage the circuits. Therefore, It is recommended to insert a diode to prevent back current flow or bypass diodes. Bypass Di Counterdurrent prevention Di VCC Output pin www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 18/20 2011.12 - Rev.A Technical Note BD8355MWV 10.) Rush current at the time of power supply injection. An IC which has plural power supplies could have momentary rush current at the time of power supply injection. Please take care about power supply coupling capacity and width of power Supply and GND pattern wiring 11.) Please use it so that VCC and PVCC terminal should not exceed the absolute maximum ratings. Ringing might be caused by L element of the pattern according to the position of the input capacitor, and ratings be exceeded. Please will assume the example of the reference ,the distance of IC and capacitor, use it by 5.0mm or less when thickness of print pattern are 35um, pattern width are 1.0mm. 12.) Testing on application boards When testing the IC on an application board, connecting a capacitor to a pin with low impedance subjects the IC to stress. Always discharge capacitors after each process or step. Ground the IC during assembly steps as an antistatic measure, and use similar caution when transporting or storing the IC. Always turn the IC’s power supply off before connecting it to or removing it from a jig or fixture during the inspection process. 13.) Thermal fin. There is no problem in the operating of IC even if the thermal fin on the back of package doesn’t connect anywhere. But it is recommended to connect GND on the PCB board for radiation. 14.) IC Terminal Input This IC is a monolithic IC that has a P- board and P+ isolation for the purpose of keeping distance between elements. A P-N junction is formed between the P-layer and the N-layer of each element, and various types of parasitic elements are then formed. For example, an application where a resistor and transistor are connected to a terminal (shown in Fig.43) ○When GND > (terminal A) at the resistor and GND > (terminal B) at the transistor (NPN), the P-N junction operates as a parasitic diode ○When GND > (terminal B) at the transistor (NPN), a parasitic NPN transistor operates as a result of the N layers of other elements in the proximity of the aforementioned parasitic diode. Parasitic elements are structurally inevitable in the IC due to electric potential relationships. The operation of parasitic elements induces the interference of circuit operations, causing malfunctions and possibly the destruction of the IC. Please be careful not to use the IC in a way that would cause parasitic elements to operate. For example, by applying a voltage that is lower than the GND (P-board) to the input terminal. Resistor Transistor (NPN) (Terminal A) (Terminal A) P＋ Ｎ Ｐ N P-board GND Parasitic element Ｐ＋ P＋ Ｎ Ｎ Ｂ (Terminal A) Ｅ Ｃ Ｎ Parasitic element GND Ｐ Ｎ P-board Ｐ＋ GND (Terminal B) Ｎ B C E GND Parasitic element GND Neighboring element Parasitic element Fig. 43 Simple Structure of Bipolar IC (Sample) www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 19/20 2011.12 - Rev.A Technical Note BD8355MWV ●Ordering part number B D 8 Part No. 3 5 5 M Part No. W V - Package MWV: UQFN056V7070 E 2 Packaging and forming specification E2: Embossed tape and reel UQFN056V7070 7.0±0.1 7.0±0.1 <Tape and Reel information> 4.7±0.1 1 E2 The direction is the 1pin of product is at the upper left when you hold ( reel on the left hand and you pull out the tape on the right hand ) 14 15 4.7±0.1 56 0.5±0.1 1500pcs (0.22) 0.08 S C0.2 Embossed carrier tape Quantity Direction of feed S +0.03 0.02 -0.02 1.0MAX 1PIN MARK Tape 28 43 42 0.9 1pin 29 0.4 +0.05 0.2 -0.04 www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. (Unit : mm) Reel 20/20 Direction of feed ∗ Order quantity needs to be multiple of the minimum quantity. 2011.12 - Rev.A Notice Notes No copying or reproduction of this document, in part or in whole, is permitted without the consent of ROHM Co.,Ltd. The content specified herein is subject to change for improvement without notice. The content specified herein is for the purpose of introducing ROHM's products (hereinafter "Products"). If you wish to use any such Product, please be sure to refer to the specifications, which can be obtained from ROHM upon request. Examples of application circuits, circuit constants and any other information contained herein illustrate the standard usage and operations of the Products. The peripheral conditions must be taken into account when designing circuits for mass production. Great care was taken in ensuring the accuracy of the information specified in this document. However, should you incur any damage arising from any inaccuracy or misprint of such information, ROHM shall bear no responsibility for such damage. The technical information specified herein is intended only to show the typical functions of and examples of application circuits for the Products. ROHM does not grant you, explicitly or implicitly, any license to use or exercise intellectual property or other rights held by ROHM and other parties. ROHM shall bear no responsibility whatsoever for any dispute arising from the use of such technical information. The Products specified in this document are intended to be used with general-use electronic equipment or devices (such as audio visual equipment, office-automation equipment, communication devices, electronic appliances and amusement devices). The Products specified in this document are not designed to be radiation tolerant. While ROHM always makes efforts to enhance the quality and reliability of its Products, a Product may fail or malfunction for a variety of reasons. Please be sure to implement in your equipment using the Products safety measures to guard against the possibility of physical injury, fire or any other damage caused in the event of the failure of any Product, such as derating, redundancy, fire control and fail-safe designs. ROHM shall bear no responsibility whatsoever for your use of any Product outside of the prescribed scope or not in accordance with the instruction manual. The Products are not designed or manufactured to be used with any equipment, device or system which requires an extremely high level of reliability the failure or malfunction of which may result in a direct threat to human life or create a risk of human injury (such as a medical instrument, transportation equipment, aerospace machinery, nuclear-reactor controller, fuelcontroller or other safety device). ROHM shall bear no responsibility in any way for use of any of the Products for the above special purposes. If a Product is intended to be used for any such special purpose, please contact a ROHM sales representative before purchasing. If you intend to export or ship overseas any Product or technology specified herein that may be controlled under the Foreign Exchange and the Foreign Trade Law, you will be required to obtain a license or permit under the Law. Thank you for your accessing to ROHM product informations. More detail product informations and catalogs are available, please contact us. ROHM Customer Support System http://www.rohm.com/contact/ www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. R1120A