1/4
STURUCTURE
Type
PRODUCUT SERIES
THYSICAL DIMENSIONS
BLOCK DIAGRAM
FEATURES
Silicon Monolithic Integrated Circuit
6 Channel Switching Regulator control system
BD9831AMWV
Fig. 1 (Plastic Mold)
Fig. 2
● Step Down 5CH, Step Up 1CH total 6CH included.
● FET 4ch (CH1~CH4) for Synchronous Switching Regulator
● Short Circuit Protection (SCP)
● Under Voltage Lockout Function (UVLO)
● Thermal Shut Down Function (TSD)
● Independent ON/OFF Function Each Channel(Stand_by Current Is Under 5uA)
● UQFN056V7070 Package
Absolute Maximum Ratings（Ta=25℃）
Parameter
Power Supply Voltage
BOOT-Lx Voltage
Symbol
VCC,PVCC1～6
BOOT1～4
Lx1～4,OUT5,6
ΔBOOT1～4
Power Dissipation
Pd
Operating Temperature
Storage Temperature
Junction Temperature
Topr
Tstg
Tjmax
Input Voltage
Limits
12
17.5
12
5.5
420(*1)
930(*2)
-30～+85
-55～+125
125
Units
V
V
V
V
mW
mW
℃
℃
℃
(*1) Without external heat sink, the power dissipation degrades by 4.2mW/℃ above 25℃.
(*2)Power dissipation degrades by 9.3mW/℃ above 25℃, when mounted on a PCB (74.2mm×74.2mm×1.6mm).
Recommended Operating Conditions（Ta=25℃）
Parameter
Power Supply Voltage
BOOT-Lx Voltage
CH1～4 H NMOS Drain Current
CH1～4 L NMOS Drain Current
Frequency Stability (*4)
VREGA – GND Capacitor
VCC – VREGD Capacitor
BOOT – Lx Capacitor
Symbol
VCC,PVCC1～56
BOOT1～4
⊿BOOT1～4
Idhnl
Idlnl
fosc
CVREGA
CVREGD
CBOOT
Min
4
3.5
3.5
300
0.47
0.47
0.047
(*3) FET Drain Current Max value.Set the current value within Power dissipation in the application.
(*4) Max 1MHz for Ch1 ~ Ch4.
Status of this document
The Japanese language version of this document shall be the official specification.
Any translation of this document shall be for reference only.
REV.B
Spec.
Typ
7
500
1.0
1.0
0.1
Max
11
16
5.0
1.5(*3)
1.5(*3)
2000
2.2
2.2
0.22
Units
V
V
V
A
A
KHz
uF
uF
uF
2/4
● Electrical Characteristics （Ta=25℃，VCC=7V，fosc=500kHz with no designation）
Parameter
【Whole Device】
Standby Current
Ciucuit Current
【Reference Voltage】
Output Voltage
Line regulation
Load Reguration
Output current at VREGA PIN shorted
【Bias Voltage】
Output Voltage
【Oscillator】
Oscillator Frequency CH1-CH6
Oscillator Frequency cofficient
【Current Mode Circuit】
Minimum OFF time of H Nch (CH1)
Minimum OFF time of H Nch (CH2)
Minimum OFF time of H Nch (CH3)
Minimum OFF time of H Nch (CH4)
SEL control voltage
【PWM Comparatpr】
0％ Duty threshold (CH5,6)
100％Duty threshold (CH5)
Max Duty cycle CH6
【ERRORAMP1】(CH1)
Threshold Voltage
Output Voltage L
Output Voltage H
Output Sink Current
Output Source Current
Input Bias Current
Voltage Gain
Frequency Bandwidth
【ERRORAMP2】(CH2～6)
Threshold Voltage
Output Voltage L
Output Voltage H
Output Sink Current
Output Source Current
Input Bias Current
Voltage Gain
Frequency Bandwidth
【Driver】
Lx Pull-down resistor (CH1～4)
Limits
Typ.
Max.
Ist
Icc
-
0.1
6.0
5
9.0
uA
mA
FB=0V
VREGA
DVli
DVlo
Ios
2.475
-30
2.500
-
2.525
10
10
-5
V
mV
mV
mA
VREGA=-1mA
VCC=4V～10V, VREGA=-1mA
VREGA=-1mA～-5mA
VREGA=0V
VREGD
4.90
5.00
5.10
V
fosc
Df
450
-
500
0
550
2
kHz
％
Toffmin1
Toffmin2
Toffmin3
Toffmin4
VSELH
VSELL
2
-0.3
-
100
100
100
100
VCC
0.8
nsec
nsec
nsec
nsec
V
V
Vt0
Vt100
Dmax6
1.00
81
1.10
1.60
90
1.70
99
V
V
％
VETH
VOL
VOH
ISINK
0.790
2.2
1.8
-150
60
1
0.800
0.03
2.4
3.6
-100
-50
80
4
0.810
0.2
-50
-
V
V
V
mA
uA
nA
dB
MHz
INV=0.9V
INV=0.7V
INV=0.9V, FB=1.25V
INV=0.7V, FB=1.25V
INV=0V
open loop gain
IBIAS
AV
BW
0.990
2.2
1.8
-150
60
1
1.000
0.03
2.4
3.6
-100
-50
80
4
1.010
0.2
-50
-
V
V
V
mA
uA
nA
dB
MHz
INV=1.1V
INV=0.9V
INV=1.1V, FB=1.25V
INV=0.9V, FB=1.25V
INV=0V
open loop gain
RLx
TUPPER
TLOWER
RonH1
RonL1
RonH2
RonL2
RonH3
RonL3
RonH4
RonL4
RonH5
RonL5
RonH6
RonL6
300
-
500
25
25
0.38
0.18
0.28
0.28
0.27
0.22
0.28
0.28
9
9
9
9
700
50
50
0.65
0.31
0.48
0.48
0.46
0.37
0.48
0.48
16
16
16
16
Ω
nsec
nsec
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
VCTLH
VCTLL
RCTL
2
-0.3
250
400
VCC
0.8
700
V
V
kΩ
ISOURCE
IBIAS
AV
BW
VETH
VOL
VOH
ISINK
ISOURCE
Simultaneous off time setting (CH1～4)
H Nch resistor(CH1)
L Nch resistor(CH1)
H Nch resistor(CH2)
L Nch resistor(CH2)
H Nch resistor(CH3)
L Nch resistor(CH3)
H Nch resistor(CH4)
L Nch resistor(CH4)
Output ON resistor(CH5)
Output ON resistor(CH6)
【Control Block】
CTL vol
Min.
Symbol
ON
OFF
CTL1～6 Pull-Down resistor
【Soft Start block】
Standby Voltage
Vstsc
10
100
Input Charge Current
ISOFT
-1.4
-1.0
-0.6
【Short Circuit Protection (SCP) Timer】
Timer Start Voltage
Vtime
2.1
2.2
2.3
Threshold Voltage
Vtsc
0.9
1.0
1.1
Source Current
Iscp
-1.4
-1.0
-0.6
Standby Voltage
Vstsc
10
100
【Short Circuit Detective Comparator 】
Threshold Voltage
VTH
0.95
1.0
1.05
Input Bias Current
IBIAS
-15
-10
-5
【Under Voltage Lockout (UVLO)】
Threshold Voltage1
Vstd1
3.3
3.4
3.5
Hysteresis Voltage
25
100
200
⊿Vst
Threshold Voltage2
Vstd2
1.8
2.0
2.2
Threshold Voltage3
Vstd3
2.8
3.0
3.2
○This product is not designed for normal operation within a radioactive environment.
REV.B
Units
mV
uA
V
V
uA
mV
Condition
VREGD=-10mA
RT=10kΩ, CT=220pF, SEL=“L”
VCC=4V～10V
(fosc'=fosc/2)(CH1～4)
CTL=0V
Lx1=-50mA
Lx1=50mA
Lx2=-50mA
Lx2=50mA
Lx3=-50mA
Lx3=50mA
Lx4=-50mA
Lx4=50mA
IOUT5=-15mA
IOUT5=15mA
IOUT6=-15mA
IOUT6=15mA
SOFT1～6=0.1V
FB1～6 Voltage
SCP=0.1V
V
uA
SCP1=0V
V
mV
V
V
VCC voltage
VCC voltage
VREGA voltage
VREGD voltage
3/4
● Package
ＢＤ９８３１A
Lot No.
Fig. 1
● Block Diagram
● Pin Description
BOOT1
PVCC1
ERRORAMP1
INV1
SOFT1
－
SS TIMER
CH1
Step Down DC/DC
(Current mode)
＋
Pin Name
Pin Descriptions
Pin No.
Pin Name
Pin Descriptions
1
SEL
CH1～CH4 Oscillator Frequency Cotrol Pin
29
BOOT4
Input Supply Voltage Pin for CH4 Output
2
SOFT1
CH1 Soft Start Delay time Setting Pin
with External Capacitor
30
PVCC4
Input Supply Voltage Pin for CH4 Output
3
INV1
CH1Error Amplifier Negative Input Pin
31
Lx4
Pin for Connecting to Inductor
4
FB1
CH1 Error Amplifier Output Pin
32
PGND34
Ground Pin for CH3、4 Output
5
SOFT2
CH2 Soft Start Delay time Setting Pin
with External Capacitor
33
PGND34
Ground Pin for CH3、4 Output
6
INV2
CH2 Error Amplifier Negative Input Pin
34
Lx3
Pin for Connecting to Inductor
Pin No.
Lx1(2pin)
PGND12(2pin)
FB1
BOOT2
SOFT2
PVCC2
ERRORAMP2
－
INV2
SS TIMER
CH2
Step Down DC/DC
(Current mode)
＋
Lx2
FB2
7
FB2
CH2 Error Amplifier Output Pin
35
Lx3
Pin for Connecting to Inductor
8
SOFT3
CH3 Soft Start Delay time Setting Pin
with External Capacitor
36
PVCC3
Input Supply Voltage Pin for CH3 Output
Lx3(2pin)
9
INV3
CH3 Error Amplifier Negative Input Pin
37
BOOT3
Input Supply Voltage Pin for CH3 Output
PGND34(2pin)
10
FB3
CH3 Error Amplifier Output Pin
38
BOOT2
Input Supply Voltage Pin for CH2 Output
11
SOFT4
CH4 Soft Start Delay time Setting Pin
with External Capacitor
39
PVCC2
Input Supply Voltage Pin for CH2 Output
PVCC4
12
INV4
CH4 Error Amplifier Negative Input Pin
40
Lx2
Pin for Connecting to Inductor
Lx4
13
FB4
CH4 Error Amplifier Output Pin
41
CTL3
CH3 ON/OFF Control Pin
14
SOFT5
CH5 Soft Start Delay time Setting Pin
with External Capacitor
42
CTL2
CH2 ON/OFF Control Pin
15
INV5
CH5 Error Amplifier Negative Input Pin
43
CTL1
CH1 ON/OFF Control Pin
16
FB5
CH5 Error Amplifier Output Pin
44
PGND12
Ground Pin for CH1、2 Output
BOOT3
SOFT3
PVCC3
ERRORAMP3
－
INV3
SS TIMER
CH3
Step Down DC/DC
(Current mode)
＋
FB3
BOOT4
ERRORAMP4
INV4
SOFT4
－
SS TIMER
CH4
Step Down DC/DC
(Current mode)
＋
FB4
ERRORAMP5
INV5
SOFT5
－
SS TIMER
PVCC56
CH5
Step Down DC/DC
(Voltage mode)
＋
FB5
17
SOFT6
45
PGND12
Ground Pin for CH1、2 Output
PGND56
18
INV6
CH6 Error Amplifier Negative Input Pin
46
Lx1
Pin for Connecting to Inductor
19
FB6
CH6 Error Amplifier Output Pin
47
Lx1
Pin for Connecting to Inductor
20
SCP1
Short Detective Comparator
Negative Input Pin
48
PVCC1
Input Supply Voltage Pin for CH1Output
21
SCP
Short Circuit Protection Delay time Setting Pin
with External Capacitor
49
BOOT1
Input Supply Voltage Pin for CH1Output
22
OUT6
CH6 NchFET Driver Output Pin
50
VREGD
Bias Output Voltage Pin
23
PGND56
Ground Pin for CH5、6 Driver
51
VCC
Input Supply Voltage Pin
24
OUT5
Output Pin for CH5 PchFET Driver
52
VREGA
Reference Output Voltage Pin
25
PVCC56
Input Supply Voltage Pin for CH5、6 Driver
53
GND
Ground Pin
26
CTL6
CH6 ON/OFF Control Pin
54
SLOPE
Slope Setting Pin with external Resistor
27
CTL5
CH5 ON/OFF Control Pin
55
RT
Oscillator Frequency Adjustment Pin
with external Resistor
28
CTL4
CH4 ON/OFF Control Pin
56
CT
Oscillator Frequency Adjustment Pin
with external Capacitor
ERRORAMP6
－
INV6
SOFT6
OUT5
CH6 Soft Start Delay time Setting Pin
with External Capacitor
SS TIMER
CH6
Step Up DC/DC
(Voltage mode)
＋
OUT6
FB6
PROTECTION
SCP1
SCP
SCP TIMER
－
－
－
－
－
－
＋
2.2V
CTL1
CTL2
CTL3
CTL4
CTL5
CTL6
VREGA
VCC
UVLO
SHUT DOWN
VREGD
OSC
GND
RT
CT SLOPE
SEL
VREGA VREGD
Fig. 2
REV.B
4/4
● Operation Notes
１.) Absolute maximum ratings
Use of the IC in excess of absolute maximum ratings such as the applied voltage or operating temperature range may result in IC deterioration or damage.
Assumptions should not be made regarding the state of the IC (short mode or open mode) when such damage is suffered. A physical safety measure such
as a fuse should be implemented when use of the IC in a special mode where the absolute maximum ratings may be exceeded is anticipated.
２.) GND potential
Ensure a minimum GND pin potential in all operating conditions. In addition, ensure that no pins other than the GND pin carry a voltage lower than or equal
to the GND pin, including during actual transient phenomena.
３.) Thermal design
Use a thermal design that allows for a sufficient margin in light of the power dissipation (Pd) in actual operating conditions.
４.) Inter-pin shorts and mounting errors
Use caution when orienting and positioning the IC for mounting on printed circuit boards. Improper mounting may result in damage to the IC. Shorts
between output pins or between output pins and the power supply and GND pin caused by the presence of a foreign object may result in damage to the IC.
５.) Operation in a strong electromagnetic field
Use caution when using the IC in the presence of a strong electromagnetic field as doing so may cause the IC to malfunction.
６.) Common impedance
Power supply and ground wiring should reflect consideration of the need to lower common impedance and minimize ripple as much as possible (by
making wiring as short and thick as possible or rejecting ripple by incorporating inductance and capacitance).
７.) Voltage of CTL pin
The threshold voltages of CTL pin are 0.8V and 2.0V. STB state is set below 0.8V while action state is set beyond 2.0V.
The region between 0.8V and 2.0V is not recommended and may cause improper operation.
The rise and fall time must be under 10msec. In case to put capacitor to STB pin, it is recommended to use under 0.01μF.
８.) Thermal shutdown circuit (TSD circuit)
This IC incorporates a built-in thermal shutdown circuit (TSD circuit). The TSD circuit is designed only to shut the IC off to prevent runaway thermal
operation. Do not continue to use the IC after operating this circuit or use the IC in an environment where the operation of the thermal shutdown circuit is
assumed.
９.) Applications with modes that reverse VCC and pin potentials may cause damage to internal IC circuits.
For example, such damage might occur when VCC is shorted with the GND pin while an external capacitor is charged.
diode for preventing back current flow in series with VCC or bypass diodes between VCC and each pin.
It is recommended to insert a
10.) Relationship between PVCC - VCC
Because diode was connecting between PVCC (Anode) – VCC (Cathode) for prevent electrostatic breakdown,
it must be set PVCC – VCC < 0.3V voltage relationship.
11.) Rush current at the time of power supply injection.
An IC which has plural power supplies, or CMOS IC could have momentaly rush current at the time of power supply injection.
Because there exists inside logic uncertainty state. Please take care about power supply coupling capacity and width of power
Supply and GND pattern wiring.
12.) Please use it so that VCC and PVCC terminal should not exceed the absolute maximum ratings. Ringing might be caused by L element of the pattern
according to the position of the input capacitor, and ratings be exceeded. Please will assume the example of the reference ,the distance of IC and capacitor,
use it by 5.0mm or less when thickness of print pattern are 35um, pattern width are 1.0mm.
13.) Testing on application boards
When testing the IC on an application board, connecting a capacitor to a pin with low impedance subjects the IC to stress. Always discharge capacitors
after each process or step. Ground the IC during assembly steps as an antistatic measure, and use similar caution when transporting or storing the IC.
Always turn the IC's power supply off before connecting it to or removing it from a jig or fixture during the inspection process.
14.) IC pin input
This monolithic IC contains P+ isolation and PCB layers between adjacent elements in order to keep them isolated.
P/N junctions are formed at the intersection of these P layers with the N layers of other elements to create a variety of parasitic elements.
For example, when a resistor and transistor are connected to pins as shown in following chart,
{ the P/N junction functions as a parasitic diode when GND > (Pin A) for the resistor or GND > (Pin B) for the transistor (NPN).
{ Similarly, when GND > (Pin B) for the transistor (NPN), the parasitic diode described above combines with the N layer of other adjacent
elements to operate as a parasitic NPN transistor.
The formation of parasitic elements as a result of the relationships of the potentials of different pins is an inevitable result of the IC's architecture. The
operation of parasitic elements can cause interference with circuit operation as well as IC malfunction and damage. For these reasons, it is necessary to
use caution so that the IC is not used in a way that will trigger the operation of parasitic elements, such as by the application of voltages lower than the
GND (PCB) voltage to input and output pins.
Resistance
Transistor (NPN)
(PinA)
Ｅ
Ｃ
Ｎ
Ｐ
Ｎ
Ｐ
＋
Ｐ
Ｎ
P substrate
Parasitic diode
ＧＮＤ
Ｐ
＋
Ｎ
Ｎ
(PinA)
Ｂ
(PinB)
＋
Parasitic diode
ＧＮＤ
Ｐ
Ｐ
Ｎ
P substrate
ＧＮＤ
(PinB)
＋
Ｎ
Ｂ
Ｃ
Ｅ
ＧＮＤ
Parasitic elementals
Other adiacent components
REV.B
ＧＮＤ
Parasitic diode
Notice
Notes
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The content specified herein is for the purpose of introducing ROHM's products (hereinafter
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which can be obtained from ROHM upon request.
Examples of application circuits, circuit constants and any other information contained herein
illustrate the standard usage and operations of the Products. The peripheral conditions must
be taken into account when designing circuits for mass production.
Great care was taken in ensuring the accuracy of the information specified in this document.
However, should you incur any damage arising from any inaccuracy or misprint of such
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The technical information specified herein is intended only to show the typical functions of and
examples of application circuits for the Products. ROHM does not grant you, explicitly or
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