Hi-performance Regulator IC Series for PCs Main Power Supply ICs for Note PC (Linear Regulator Integrated) No.10030EAT26 BD9528MUV ●Description BD9528MUV is a 2ch switching regulator controller with high output current which can achieve low output voltage (1.0V~ 5.5V) from a wide input voltage range (5.5V~28V). High efficiency for the switching regulator can be realized by utilizing an external N-MOSFET power transistor. A new technology called H3RegTM(High speed, High efficiency, High performance) is a Rohm proprietary control method to realize ultra high transient response against load change. SLLM (Simple Light Load Mode) technology is also integrated to improve efficiency in light load mode, providing high efficiency over a wide load range. For protection and ease of use, 2ch LDO (5V/100mA, 3.3V/100mA), the soft start function, variable frequency function, short circuit protection function with timer latch, over voltage protection, and Power good function are all built in. This switching regulator is specially designed for Main Power Supply of laptop PC. ●Features 1) 2ch H3REGTM DC/DC Converter controller 2) Adjustable Simple Light Load Mode (SLLM), Quiet Light Load Mode (QLLM) and Forced continuous Mode 3) Thermal Shut Down (TSD), Under Voltage LockOut (UVLO), Over Current Protection (OCP), Over Voltage Protection (OVP), Short circuit protection with 0.75ms timer-latch (SCP) 4) Soft start function to minimize rush current during startup 5) Switching Frequency Variable (f=200kHz~500kHz) 6) Built-in Power good circuit 7) Built-in 2ch Linear regulator (5V/100mA,3.3V/100mA) 8) Built in reference voltage(0.7V) 9) VQFN032V5050 package 10) Built-in BOOT-Di 11) Built-in output discharge ●Applications Laptop PC, Desktop PC, LCD-TV, Digital Components www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 1/33 2010.03 - Rev.A Technical Note BD9528MUV ●Absolute maximum ratings (Ta=25℃) Parameter Terminal Voltage Power Dissipation1 Power Dissipation2 Power Dissipation3 Power Dissipation4 Operating temperature Range Storage temperature Range Junction Temperature Symbol VIN, CTL,SW1,SW2 EN1, EN2, PGOOD1, PGOOD2 Vo1, Vo2, MCTL1, MCTL2 FS1, FS2, FB1, FB2, ILIM1, ILIM2, SS1, SS2, LG1, LG2, REF,REG2 BOOT1, BOOT2 BOOT1-SW1, BOOT2-SW2, HG1-SW1, HG2-SW2 HG1 HG2 PGND1, PGND2 Pd1 Pd2 Pd3 Pd4 Topr Tstg Tjmax Limits 30 *1*2 Unit V 6 *1*2 V REG1+0.3 *1 V 35 *1*2 V 7 *1*2 V BOOT1+0.3 *1*2 BOOT2+0.3 *1*2 AGND±0.3 *1*2 0.38 *3 0.88 *4 3.26 *5 6 4.56 * -20~+100 -55~+150 +150 V V V W W W W ℃ ℃ ℃ *1 Do not however exceed Pd. *2 Instantaneous surge voltage, back electromotive force and voltage under less than 10% duty cycle. *3 Reduced by 3.0mW for each increase in Ta of 1℃ over 25℃ (when don’t mounted on a heat radiation board ) *4 Reduced by 7.0mW for increase in Ta of 1℃ over 25℃. (when mounted on a board 74.2mm×74.2mm×1.6mm Glass-epoxy PCB which has 1 layer. (Copper foil area : 20.2mm2) *5 Reduced by 26.1mW for increase in Ta of 1℃ over 25℃. (when mounted on a board 74.2mm×74.2mm×1.6mm Glass-epoxy PCB which has 4 layers. (1st and 4th copper foil area : 20.2mm2, 2nd and 3rd copper foil area : 5505mm2) *6 Reduced by 36.5mW for increase in Ta of 1℃ over 25℃. (when mounted on a board 74.2mm×74.2mm×1.6mm Glass-epoxy PCB which has 4 layers. (All copper foil area : 5505mm2) ●Operating conditions(Ta=25℃) Parameter Terminal Voltage MIN ON TIME ★ Symbol VIN CTL EN1, EN2, MCTL1, MCTL2 BOOT1, BOOT2 SW1, SW2 BOOT1-SW1, BOOT2-SW2, HG1-SW1, HG2-SW2 Vo1, Vo2, PGOOD1, PGOOD2 TONmin MIN. 5.5 -0.3 -0.3 4.5 -0.3 -0.3 -0.3 - MAX. 28 28 5.5 33 28 5.5 5.5 150 Unit V V V V V V V nsec This product should not be used in a radioactive environment. www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 2/33 2010.03 - Rev.A Technical Note BD9528MUV ●Electrical characteristics (unless otherwise noted, Ta=25℃ VIN=12V, CTL=OPEN, EN1=EN2=5V, FS1=FS2=51kΩ) Standard Value Parameter Symbol Unit Condition 250 μA CTL=5V, EN1=EN2=0V 130 230 μA Vo1=5V 6 12 18 μA CTL=0V VCTLL -0.3 - 0.8 V CTL High Voltage VCTLH 2.3 - 28 V CTL bias current ICTL -18 -12 -6 μA EN Low Voltage VENL -0.3 - 0.8 V EN High Voltage VENH 2.3 - 5.5 V EN bias current IEN - 3 6 μA EN=3V REG1 output voltage VREG1 4.90 5.00 5.10 V IREG1=1mA Maximum current IREG1 100 - - mA IREG2=0mA Line Regulation Reg.l1 - 90 180 mV VIN=5.5 to 25V Load Regulation Reg.L1 - 30 50 mV IREG1=0 to 30mA REG2 output voltage VREG2 3.27 3.30 3.33 V IREG2=1mA Maximum current IREG2 100 - - mA IREG1=0mA Line Regulation Reg.l2 - - 20 mV VIN=5.5 to 25V Load Regulation Reg.L2 - - 30 mV IREG2=0 to 30mA Input threshold voltage REG1th 4.1 4.4 4.7 V Input delay time TREG1 1.5 3.0 6.0 ms Switch resistance RREG1 - 1.0 3.0 Ω REG1_UVLO 3.9 4.2 4.5 V dV_UVLO 50 100 200 mV Feedback voltage1 VFB1 0.693 0.700 0.707 V FB1 bias current IFB1 - 0 1 μA RDISOUT1 50 100 200 Ω Feedback voltage2 VFB2 0.693 0.700 0.707 V FB2 bias current IFB2 - 0 1 μA RDISOUT2 50 100 200 Ω MIN. TYP. MAX. ISTB 70 150 IIN 60 ISHD CTL Low Voltage VIN standby current VIN bias current VIN shut down mode current CTL=0V [5V linear regulator](VIN) [3.3V linear regulator] [5V linear regulator](Vo1) Vo1: Sweep up [Under Voltage lock out block] REG1 threshold voltage Hysteresis voltage REG1: Sweep up REG1, Sweep down [Output voltage sense block] Output discharge resistance1 Output discharge resistance2 www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 3/33 FB1=REF FB2=REF 2010.03 - Rev.A Technical Note BD9528MUV ●Electrical characteristics – Continued (unless otherwise noted, Ta=25℃ VIN=12V, CTL=OPEN, EN1=EN2=5V, FS1=FS2=51kΩ) Standard Value Parameter Symbol Unit MIN. TYP. MAX. Condition [H3REG block] Ontime1 TON1 0.760 0.910 1.060 μs Vo1=5V Ontime2 TON2 0.470 0.620 0.770 μs Vo2=3.3V Maximum On time 1 TONMAX1 2.5 5 10 μs Vo1=5V Maximum On time 2 TONMAX2 1.65 3.3 6.6 μs Vo2=33V Minimum Off time TOFFMIN - 0.2 0.4 μs HG higher side ON resistor HGHON - 3.0 6.0 Ω HG lower side ON resistor HGLON - 2.0 4.0 Ω LG higher side ON resistor LGHON - 2.0 4.0 Ω LG lower side ON resistor LGLON - 0.5 1.0 Ω VOVP 0.77 (+10%) 0.84 (+20%) 0.91 (+30%) V dV_OVP 50 150 300 mV SCP threshold voltage VSCP 0.42 (-40%) 0.49 (-30%) 0.56 (-20%) V Delay time TSCP 0.4 0.75 1.5 ms dVSMAX 80 100 120 mV VPGTHL 0.525 (-25%) 0.595 (-15%) 0.665 (-5%) V VPGL - 0.1 0.2 V Delay time TPGOOD 0.4 0.75 1.5 ms Power good leakage current ILEAKPG -2 0 2 μA Charge current ISS 1.5 2.3 3.1 μA Standby voltage VSS_STB - - 50 mV VMCTL_L -0.3 - 0.3 V V μA [FET driver block] [Over voltage protection block] OVP threshold voltage OVP Hysteresis [Short circuit protection block] [Current limit protection block] Offset voltage ILIM=100kΩ [Power good block] Power good low threshold Power good low voltage IPGOOD=1mA VPGOOD=5V [Soft start block] [Mode control block] MCTL Low voltage MCTL High voltage VMCTL_H 2.3 - REG1 +0.3 MCTL bias current IMCTL 8 16 24 www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 4/33 MCTL=5V 2010.03 - Rev.A Technical Note BD9528MUV ●Output condition table Input EN1 Low Low High High Low Low High High CTL Low Low Low Low High High High High EN2 Low High Low High Low High Low High Output REG2(3.3V) DC/DC1 OFF OFF OFF OFF OFF OFF OFF OFF ON OFF ON OFF ON ON ON ON REG1(5V) OFF OFF OFF OFF ON ON ON ON DC/DC2 OFF OFF OFF OFF OFF ON OFF ON ※ CTL pin is connected to VIN pin with 1MΩ resistor(pull up) internal IC. ※ EN pin is connected to AGND pin with 1MΩ resistor(pull down) internal IC. 3 1 2 31 32 22 23 PGND1 LG1 SW1 HG1 BOOT1 PGND2 LG2 SW2 HG2 BOOT2 VIN VIN Vo2 Adjustable Vo1 Adjustable ●Block Diagram, Application circuit 24 26 25 REG1 REG1 REG1 REG1 CL2 SCP2 OVP2 AGND Short through Protection Circuit Short through Protection Circuit 13 CL1 SCP1 OVP1 FS1 FS2 UVLO EN2 REF FB2 11 Timer REG1 PGOOD1 Power Good Short Circuit Protect 20 EN1 FB1 Thermal Protection 14 6 REF 12 SS1 19 ILIM2 ILIM1 17 3.3V Reg EN2 SW1 PGND1 MCTL SLLM Mode Control 5V Reg Vo1 Reference Block REG1 PGND2 SW2 REF 8 CL1 Over Current Protect CL2 Over Current Protect SS2 SCP1 H3RegTM Controller Block FS1 Timer FS2 REF H3RegTM Controller Block SLLMTM Block MCTL Over Voltage Protect OVP1 MCTL TSD Timer Timer Power Good PGOOD2 SLLMTM Block Over Voltage Protect OVP2 SCP2 5 Short Circuit Protect REG1 RFS1 15 10 EN1 4 Vo1 16 27 3.3V 18 MCTL2 REG2 REG2 5V 5.5~28V www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 28 1uF REG1 29 MCTL1 30 REG1 VIN 9 VIN 7 CTL Vo2 21 5/33 2010.03 - Rev.A Technical Note BD9528MUV LG2 PGND2 MCTL1 ILIM1 SS1 PGOOD1 17 Input 25 16 26 15 27 14 28 13 FIN MCTL2 FS1 FB1 AGND 29 12 REF 30 11 31 10 32 9 2 HG2 SW2 1 4 3 6 7 8 ILIM2 VIN 18 Vo2 REG1 19 SS2 REG2 20 5 PGOOD2 Vo1 21 EN2 LG1 22 BOOT2 PGND1 23 EN1 24 BOOT1 HG1 SW1 ●Pin Configuration MCTL1 MCTL2 Low Low High High Low High Low High Control Mode SLLM QLLM Forced Continuous Mode Forced Continuous Mode ※MCTL pin is connected to AGND pin with 500kΩ resistor ( pull down) internal IC FB2 FS2 CTL ●Pin Function Table PIN No. 1 2 3 4 5 6 7 8 PIN name SW2 HG2 BOOT2 EN2 PGOOD2 SS2 Vo2 ILIM2 9 CTL 10 11 12 13 14 15 16 17 18 19 20 FS2 FB2 REF AGND FB1 FS1 MCTL2 ILIM1 MCTL1 SS1 PGOOD1 21 EN1 22 23 24 25 26 27 28 29 30 31 32 reverse BOOT1 HG1 SW1 PGND1 LG1 Vo1 REG2 REG1 VIN LG2 PGND2 FIN PIN Function Highside FET source pin 2 Highside FET gate drive pin 2 HG Driver power supply pin 2 Vo2 ON/OFF pin (High=ON, Low,OPEN=OFF) Vo2 Power Good Open Drain Output pin Vo2 Soft start pin Vo2 Output voltage sense pin OCP setting pin 2 Linear regulator ON/OFF pin (High,OPEN=ON, Low=OFF) Input pin for setting Vo2 frequency Vo2 output voltage feedback pin Output voltage setting pin Input pin Ground Vo1 output voltage feedback pin Input pin for setting Vo1 frequency Mode switch pin 2 ( OPEN = L ) OCP setting pin 1 Mode switch pin 1 ( OPEN = L ) Vo1 Soft start pin Vo1 Power Good Open Drain Output pin Vo1 ON/OFF pin (High=ON, Low,OPEN=OFF) HG Driver power supply pin Highside FET gate drive pin 1 Highside FET source pin 1 Lowside FET source pin 1 Lowside FET gate drive pin 1 Vo1 Output voltage sense pin 3.3V Linear regulator output pin 5V Linear regulator output pin Power supply input pin Lowside FET gate drive pin 2 Lowside FET source pin 2 Exposed Pad1, connect to GND www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 6/33 2010.03 - Rev.A Technical Note BD9528MUV ●Electrical characteristic curves (Reference data) HG 10V/div SW 10V/div HG 10V/div SW 10V/div LG 5V/div LG 5V/div 2us 2us Fig.1 Switching Waveform (Vo=5V, PWM, Io=0A) Fig.2 Switching Waveform (Vo=5V, PWM, Io=8A) HG 10V/div SW 10V/div 10us 2us 10us HG 10V/div SW 10V/div www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 10us Fig.11 Switching Waveform (Vo=1V, QLLM, Io=0A) 7/33 LG 5V/div LG 5V/div HG 10V/div SW 10V/div 2us LG 5V/div Fig.9 Switching Waveform (Vo=1V, PWM, Io=0A) HG 10V/div SW 10V/div LG 5V/div Fig.10 Switching Waveform (Vo=1V, PWM, Io=8A) 2us Fig.6 Switching Waveform (Vo=3.3V, PWM, Io=8A) Fig.8 Switching Waveform (Vo=3.3V, SLLM, Io=0A) Fig.7 Switching Waveform (Vo=3.3V, QLLM, Io=0A) 2us LG 5V/div HG 10V/div SW 10V/div HG 10V/div SW 10V/div LG 5V/div LG 5V/div Fig.3 Switching Waveform (Vo=5V, QLLM, Io=0A) Fig.5 Switching Waveform (Vo=3.3V, PWM, Io=0A) HG 10V/div SW 10V/div 10us 10us HG 10V/div SW 10V/div LG 5V/div Fig.4 Switching Waveform (Vo=5V, SLLM, Io=0A) HG 10V/div SW 10V/div LG 5V/div HG 10V/div SW 10V/div 10us LG 5V/div Fig.12 Switching Waveform (Vo=1V, SLLM, Io=0A) 2010.03 - Rev.A Technical Note BD9528MUV ●Electrical characteristic curves (Reference data) – Continued 100 100 80 80 100 80 7V 7V 12V 21V 40 12V 60 12V 40 η[%] 60 η[%] η[%] 7V 21V 20 20 1 10 100 Io[mA] 1000 21V 40 20 0 0 60 1 10000 10 Fig.13 Efficiency (Vo=5V, PWM) 100 Io[mA] 1000 0 10000 1 Fig.14 Efficiency (Vo=5V, QLLM) 100 10 100 Io[mA] 1000 10000 Fig.15 Efficiency (Vo=5V, SLLM) 100 100 5V 80 7V η[%] 7V 21V 40 12V 60 60 21V 40 20 20 0 0 1 10 100 Io[mA] 1000 Fig.16 Efficiency (Vo=3.3V, PWM) 10 100 Io[mA] 1000 10000 1 12V 7V η[%] 20 12V 21V 40 1 10 100 Io[mA] 1000 10000 Fig.19 Efficiency (Vo=1V, PWM) 1 10 100 Io[mA] 20us 1000 10000 Vo 100mV/div 1 10 100 Io[mA] 1000 10000 20us Vo 100mV/div IL 5A/div Io 5A/div www.rohm.com 21V 40 Fig.21 Efficiency (Vo=1V, SLLM) 20us © 2010 ROHM Co., Ltd. All rights reserved. 12V 60 0 0 Fig.20 Efficiency (Vo=1V, QLLM) Fig.22 Transient Response (Vo=5V, PWM, Io=0→8A) 10000 20 20 0 1000 7V 80 60 21V 40 100 Io[mA] 100 80 7V 10 Fig.18 Efficiency (Vo=3.3V, SLLM) 100 60 21V Fig.17 Efficiency (Vo=3.3V, QLLM) 100 80 40 0 1 10000 12V 20 η[%] η[%] 60 η[%] 80 7V 12V η[%] 80 Vo 100mV/div IL 5A/div Io 5A/div IL 5A/div Io 5A/div Fig.23 Transient Response (Vo=5V, PWM, Io=8→0A) 8/33 Fig.24 Transient Response (Vo=3.3V, PWM, Io=0→8A) 2010.03 - Rev.A Technical Note BD9528MUV ●Electrical characteristic curves (Reference data) – Continued 20us 20us Vo 100mV/div Vo 100mV/div Fig.26 Transient Response (Vo=1V, PWM, Io=0→8A) Vo 50mV/div Fig.27 Transient Response (Vo=1V, PWM, Io=8→0A) 2us 10us Fig.29 Output Voltage (Vo=5V, PWM, Io=8A) Fig.30 Output Voltage (Vo=5V, QLLM, Io=0A) Vo 50mV/div Vo 50mV/div 2us Fig.31 Output Voltage (Vo=5V, SLLM, Io=0A) 2us Fig.32 Output Voltage (Vo=3.3V, PWM, Io=0A) Fig.33 Output Voltage (Vo=3.3V, PWM, Io=8A) Vo 50mV/div Fig.34 Output Voltage (Vo=3.3V, QLLM, Io=0A) www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. Vo 50mV/div 2us Vo 50mV/div 10us 2us Fig.35 Output Voltage (Vo=3.3V, SLLM, Io=0A) 9/33 IL 5A/div Io 5A/div Vo 50mV/div Vo 50mV/div 2us Fig.28 Output Voltage (Vo=5V, PWM, Io=0A) Vo 100mV/div IL 5A/div Io 5A/div IL 5A/div Io 5A/div Fig.25 Transient Response (Vo=3.3V, PWM, Io=8→0A) 20us Vo 50mV/div 2us Fig.36 Output Voltage (Vo=1V, PWM, Io=0A) 2010.03 - Rev.A Technical Note BD9528MUV ●Electrical characteristic curves (Reference data) – Continued Vo 50mV/div Vo 50mV/div 2us Vo 50mV/div 10us Fig.37 Output Voltage (Vo=1V, PWM, Io=8A) 2us Fig.38 Output Voltage (Vo=1V, QLLM, Io=0A) Fig.39 Output Voltage (Vo=1V, SLLM, Io=0A) EN1 5V/div EN1 5V/div EN1 5V/div Vo1 2V/div Vo1 2V/div Vo1 2V/div EN2 5V/div EN2 5V/div EN2 5V/div Vo2 2V/div Vo2 2V/div Vo2 2V/div Fig.40 Wake up waveform (EN1=EN2) Fig.42Wake up waveform (EN1→EN2) Fig.41 Wake up waveform (EN2→EN1) IOUT-frequency (VOUT=5V, R(FS)=68kΩ) frequency [kHz] PGOOD1 2V/div EN2 5V/div 500 450 450 400 VIN=7.5V VIN=12V VIN=18V 350 PGOOD2 2V/div IOUT-frequency (VOUT=5V, R(FS)=68kΩ) 500 frequency [kHz] EN1 5V/div 400 VIN=7.5V VIN=12V VIN=18V 350 300 300 0 1 2 3 4 5 6 7 0 1 2 3 IOUT [A] 700 2.5 5 6 7 Fig.45 Io-frequency (Vo=3.3V, PWM, RFS=68kΩ) Fig.44 Io-frequency (Vo=5V, PWM, RFS=68kΩ) Fig.43Wake up waveform (EN1/2→PGOOD1/2) 4 IOUT [A] 5.500 5.000 600 VOUT=5V 500 frequency [kHz] ONTIME [usec] VOUT=3.3V 1.5 1 VOUT=5V 4.500 VOUT=3.3V 4.000 VIN=7.5V(-5℃) VIN=21V(-5℃) VIN=7.5V(75℃) 3.500 400 VOUT [V] 2 300 VIN=21V(75℃) 3.000 2.500 2.000 200 1.500 0.5 1.000 100 0.500 0 0 0 50 100 150 RFS [kΩ] Fig.46 FS-ONTIME www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 0.000 0 50 100 RFS [kΩ] Fig.47 FS-frequency 10/33 150 0 2 4 6 8 10 12 14 16 IOUT [A] Fig.48 Ta-IOCP (Vo=5V) 2010.03 - Rev.A Technical Note BD9528MUV ●Electrical characteristic curves (Reference data) – Continued IOUT - REG2 voltage IOUT - REG1 voltage 3.500 3.000 5.1 3.4 5 3.3 REG1 voltage [V] VIN=21V(-5℃) VOUT [V] VIN=7.5V(75℃) VIN=21V(75℃) 2.000 1.500 REG2 voltage [V] VIN=7.5V(-5℃) 2.500 4.9 4.8 4.7 1.000 3.2 3.1 3 2.9 4.6 0.500 2.8 4.5 0.000 0 2 4 6 8 10 12 14 16 IOUT [A] Fig.49 Ta-IOCP (Vo=3.3V) www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 0 50 100 150 200 IOUT [mA] Fig.50 IREG1-REG1 11/33 250 0 50 100 150 200 250 IOUT [mA] Fig.51 IREG2-REG2 2010.03 - Rev.A Technical Note BD9528MUV ●Pin Descriptions ・VIN (30 pin) This is the main power supply pin. The input supply voltage range is 5.5V to 25V. The duty cycle of BD9528MUV is determined by input voltage and control output voltage. Therefore, when VIN voltage fluctuated, the output voltage also becomes unstable. Since VIN line is also the input voltage of switching regulator, stability depends on the impedance of the voltage supply. It is recommended to establish bypass capacitor and CR filter suitable for the actual application. ・CTL (9 pin) When CTL pin voltage is at least 2.3V, the status of the linear regulator output becomes active (REG1=5V, REG2=3.3V). Conversely, the status switches off when CTL pin voltage goes lower than 0.8V. The switching regulator doesn’t become active when the status of CTL pin is low, if the status of EN pin is high. (※CTL pin is connected to VIN pin with 1MΩ resistor(pull up) internal IC) ・EN1, 2 (21 pin, 4 pin) When EN pin voltage is at least 2.3V, the status of the switching regulator becomes active. Conversely, the status switches off when EN pin voltage goes lower than 0.8V. (※EN pin is connected to AGND pin with 1MΩ resistor(pull down) internal IC) ・REG1 (29 pin) This is the output pin for 5V linear regulator and also active in power supply for driver and control circuit of the inside. The standby function for REG1 is determined by CTL pin. The voltage is 5V, with 100mA current ability. It is recommended that a 10μF capacitor (X5R or X7R) be established between REG1 and GND. ・REG2 (28 pin) This is the output pin for 3.3V linear regulator. The standby function for REG2 is determined by CTL. The voltage is 3.3V, with 50mA current ability. It is recommended that a 10μF capacitor (X5R or X7R) be established between REG2 and GND. ・REF (12 pin) This is the setting pin for output voltage of switching regulator. This IC controls the voltage in the status of REF≒FB. ・FB 1, 2 (14 pin, 11 pin) This is the feedback pin from the output of switching regulator. This IC controls the voltage in the status of REF≒FB. ・Vo1 (27 pin) This is the output discharge pin, and output voltage feedback pin for frequency setting. When the voltage is beyond 4.4V from the external power supply during operation, it supplies REG1. ・Vo2 (7 pin) This is the output discharge pin, and output voltage feedback pin for frequency setting. ・SS1, 2 (19 pin, 6 pin) This is the setting pin for soft start. The rising time is determined by the capacitor connected between SS and GND, and the fixed current inside IC after it is the status of low in standby mode. It controls the output voltage till SS voltage catch up the REF pin to become the SS terminal voltage. ・FS1, 2 (15 pin, 10 pin) This is the input pin for setting the frequency. It is available to set it in frequency range is 200KHz to 500kHz. ・ILIM1, 2 (17 pin, 8 pin) BD9528MUV detects voltage differential between SW and PGND, and set OCP. OCP setting current value is determined by the resistance value of ILIM pin. FET of various Ron is available. ・PGOOD 1, 2 (20 pin, 5 pin) This is the open drain pin for deciding the output of switching regulator. ・MCTL1, 2 (18 pin, 16 pin) This is the switching shift pin for SLLM (Simple Light Load Mode). MCTL pin is at low level when it goes lower than 0.8V, and at high level when it goes higher than 2.3V. (※MCTL pin is connected to AGND pin with 500kΩ resistor(pull down) internal IC) ・AGND (13 pin) This is the ground pin. www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 12/33 2010.03 - Rev.A Technical Note BD9528MUV ・BOOT1, 2 (22 pin, 3 pin) This is the power supply pin for high side FET driver. The maximum voltage range to GND pin is to 35V, to SW pin is to 7V. In switching operations, the voltage swings from (VIN+REG1) to REG1 by BOOT pin operation. ・HG1, 2 (23 pin, 2 pin) This is the highside FET gate drive pin. It is operated in switching between BOOT to SW. In case the output MOS is 3ohm /the status of Hi, 2ohm/the status of Low, it is operated hi-side FET gate in high speed. ・SW1, 2 (24 pin, 1 pin) This is the ground pin for high side FET drive. The maximum voltage range to GND pin is to 30V. Switching operation swings from the status of BOOT to the status of GND. ・LG1, 2 (26 pin, 31 pin) This is the lowside FET gate drive pin. It is operated in switching between REG1 to PGND. In case the output MOS is 2ohm /the status of Hi, 0.5ohm/the status of Low, it is operated low-side FET gate in high speed. ・PGND1, 2 (25 pin, 32 pin) This is the ground pin for low side FET drive. www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 13/33 2010.03 - Rev.A Technical Note BD9528MUV ●Explanation of Operation 3 The BD9528MUV is a 2ch synchronous buck regulator controller incorporating ROHM’s proprietary H REG CONTROLLA control system. Because controlling of output voltage by a comparator, high response is realized with not relying on the switching frequency. And, when VOUT drops due to a rapid load change, the system quickly restores VOUT by extending the TON time interval. Thus, it serves to improve the regulator’s transient response. Activating the Light Load Mode will also exercise Simple Light Load Mode (SLLM) control when the load is light, to further increase efficiency. VIN H3RegTM control Comparator for output voltage control Vout/Vin Circuit FB HG A Driver B VOU T SW LG Internal reference voltage REF Transient Circuit (Normal operation) FB When FB falls to a reference voltage (REF), the drop is detected, activating the H3REG CONTROLLA system.<Route A> ( tON= ) VOUT × 1 [sec]・・・(1) REF HG VIN f HG output is determined by the formula above. After the status of HG is OFF, LG go on outputting until output voltage become FB=REF. LG (VOUT drops due to a rapid load change) FB When VOUT drops due to a rapid load change, and the voltage remains below reference voltage after the programmed tON time interval has elapsed (Output of a comparator for output voltage control =H), the system quickly restores VOUT by extending the tON time, improving the transient response.<Route B> After VOUT restores (FB=REF), HG turns to be OFF, and it goes back to a normal operation. REF tON +α Io HG LG (when VIN drops) VIN tON1 tON2 tON3 tON4 tON4+α H3RegTM HG tOFF1 t OFF2 t OFF3 tOFF4=tOFF3 tOFF4=t OFF3 LG FB REF Output voltage drops FB=REF If VIN voltage drops because of the battery voltage fall, ontime tON and offtime tOFF is determined by the following formula: tON=VOUT/VIN×I/f and tOFF=(VIN-VOUT)/VIN×f so that tON lengthen and tOFF shorten to keep output voltage constant. However, if VIN still drops and tOFF equals to tminoff (tminoff:Minimum OFF time, regulated inside IC) , because tOFF cannot shorten any 3 TM more, as a result output voltage drops. In H Reg system, lengthening tON time than regulated tON (lengthen tON time until FB>REF) www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 14/33 2010.03 - Rev.A Technical Note BD9528MUV enables to operate stable not to drop the output voltage even if VIN turns to be low. With the reason above, it is suitable for 2-cell battery. Light Load Control (SLLM) FB In SLLM, when the status of LG is OFF and the coil current is within 0A (it flows to SW from VOUT.), SLLM function is operated to prevent output next HG. The status of HG is ON, when FB falls below reference voltage again. REF HG LG 0A (QLLM) FB REF In QLLM, when the status of LG is OFF and the coil current is within 0A (it flows to SW from VOUT.), QLLM function is operated to prevent output next HG. Then, FB falls below the output programmed voltage within the programmed time (typ=40μs), the status of HG is ON. In case FB doesn’t fall in the programmed time, the status of LG is ON forcedly and VOUT falls. As a result, he status of next HG is ON. HG LG 0A MCTL1 L L H 3 MCTL2 L H X Control mode SLLM QLLM PWM Running PWM PWM PWM The BD9528MUV operates in PWM mode until SS pin reaches cramp voltage (2.5V), regardless of the control mode setting, in order to operate stable during the operation. . TM *Attention: H Reg CONTROLLA monitors the supplying current from capacitor to load, using the ESR of output capacitor, and realize the rapid response. Bypass capacitor used at each load (Ex. Ceramic capacitor) exercises the effect with connecting to each load side. Do not put a ceramic capacitor on COUT side of power supply. ● Timing Chart • Soft Start Function COUT Load Soft start is exercised with the EN pin set high. Current control takes effect at startup, enabling a moderate output voltage “ramping start.” Soft start timing and incoming current are calculated with formulas (2) and (3) below. EN TSS SS Soft start time Tss= VOUT REF×Css [sec] ・・・(2) 2.3μA(typ) Incoming current IIN= IIN Co×VOUT Tss [A] ・・・(3) (Css: Soft start capacitor; Co: Output capacitor) www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 15/33 2010.03 - Rev.A Technical Note BD9528MUV Notes when waking up with CTL pin or VIN pin If EN pin is High or short (or pull up resistor) to REG1 pin, IC starts up by switching CTL pin, the IC might fail to start up (SCP function) with the reason below, please be careful of SS pin and REF pin capacitor capacity. REG1 REG2 FB VIN CTL Inner reference circuit BG SCP circuit Delay SCP REF SCP_REF 1ms(typ.) SCP PWM SS (Switching control signal) CTL (VIN) REG1 REG2 REG1, REG2 REG1 UVLO cancellation BG 0.49V(typ) SCP_REF (REF start-up time<SS start-up time) SCP function masked SCP mask cancellation FB starts up as SS reference REF SS FB SS FB (REF start-up time>SS start-up time) REF FB SCP mask SCP mask cancellation SS SCP function is masked until SS pin reaches cramp voltage (2.5V). www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 16/33 FB starts up as REF reference After the end of SS wake-up, within SCP delay time (1ms), if REF voltage does not reach SCP_REF(0.49V), SCP turns ON and shut down. 2010.03 - Rev.A Technical Note BD9528MUV ●Output Discharge It will be available to use if connecting VOUT pin to DC/DC output. (Total about 100Ω) . Discharge function operates when ①EN=’L’ ②UVLO=ON(If input voltage is low) ③SCP Latch time ④TSD=ON. The function at output discharge time is shown as left. VIN,CTL EN (1)during EN=’H’→‘L’ If EN pin voltage is below than EN threshold voltage, output discharge function is operated, and discharge output capacitor charge. VOUT VIN, CTL REG1 VOUT The efficiency of VIN voltage drop Output Discharge Output Hi-Z UVLO ON www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. (2) during VIIN=CTL=H→0V ① IC is in normal operation until REG1 voltage becomes lower than UVLO voltage. However, because VIN voltage also becomes low, output voltage will drop, too. ② If REG1 voltage reaches the UVLO voltage, output discharge function is operated, and discharge output capacitor charge. ③ In addition, if REG1 voltage drops, inner IC logic cannot operate, so that output discharge function does not work, and becomes output Hi-z. (In case, FB has resistor against GND, discharge at the resistor.) 17/33 2010.03 - Rev.A Technical Note BD9528MUV ・Timer Latch Type Short Circuit Protection FB Short protection kicks in when output falls to or below REF X 0.7. When the programmed time period elapses, output is latched OFF to prevent destruction of the IC. (HG=Low, LG=Low) Output voltage can be restored either by reconnecting the EN pin or disabling UVLO. REF×0.7 1ms(typ) SCP EN / UVLO ・Over Voltage Protection REF×1.2 FB When output rise to or above REF×1.2 (typ), output over voltage protection is exercised, and low side FET goes up maximum for reducing output.(LG=High, HG=Low).When output falls, output voltage can be restored., and go back to the normal operation. HG LG Switching ・Over current protection circuit tON tON tON tON During the normal operation, when FB becomes less than REF, HG becomes High during the time tON, and after HG becomes OFF, it output LG. However, when inductor current exceeds ILIMIT threshold, next HG pulse doesn’t pulsate until it is lower than ILIMIT level. HG LG IL www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 18/33 2010.03 - Rev.A Technical Note BD9528MUV ● External Component Selection 1. Inductor (L) selection The inductor value is a major influence on the output ripple current. As formula (4) below indicates, the greater the inductor or the switching frequency, the lower the ripple current. (VIN-VOUT)×VOUT [A]・・・(4) ΔIL= L×VIN×f The proper output ripple current setting is about 30% of maximum output current. ΔIL=0.3×IOUTmax. [A]・・・(5) ΔIL VIN IL VOUT (VIN-VOUT)×VOUT L L= Co ΔIL×VIN×f [H]・・・(6) (ΔIL: output ripple current; f: switch frequency) Output ripple current ※Passing a current larger than the inductor’s rated current will cause magnetic saturation in the inductor and decrease system efficiency. In selecting the inductor, be sure to allow enough margin to assure that peak current does not exceed the inductor rated current value. ※To minimize possible inductor damage and maximize efficiency, choose a inductor with a low (DCR, ACR) resistance. 2.Output Capacitor (CO) Selection VIN When determining the proper output capacitor, be sure to factor in the equivalent series resistance required to smooth out ripple volume and maintain a stable output voltage range. Output ripple voltage is determined as in formula (7) below. VOUT L ΔVOUT=ΔIL×ESR+ESL×ΔIL/TON・・・(7) ESR Co (ΔIL: Output ripple current; ESR: CO equivalent series resistance) ※ In selecting a capacitor, make sure the capacitor rating allows sufficient margin relative to output voltage. Note that a lower ESR can minimize output ripple voltage. Output Capacitor Please give due consideration to the conditions in formula (8) below for output capacity, bear in mind that output rise time must be established within the soft start time frame. Capacitor for bypass capacitor is connected to Load side which connect to output in output capacitor capacity (CEXT, figure above). Please set the soft start time or over current detecting value, regarding these capacities. Co≦ Tss×(Limit-IOUT) VOUT ・・・(8) Tss: Soft start time Limit: Over current detection Note: Improper capacitor may cause startup malfunctions. 3. Input Capacitor (Cin) Selection The input capacitor selected must have low enough ESR resistance to fully support large ripple output, in order to prevent extreme over current. The formula for ripple current IRMS is given in (9) below. VIN Cin VOUT L IRMS=IOUT× √VIN(VIN-VOUT) VIN Co [A]・・・(9) IOUT Where VIN=2×VOUT, IRMS= 2 Input Capacitor A low ESR capacitor is recommended to reduce ESR loss and maximize efficiency. www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 19/33 2010.03 - Rev.A Technical Note BD9528MUV 4. MOSFET Selection MOSFET may cause the loss as below, so please select proper FET for each. <Loss on the main MOSFET> VIN Pmain=PRON+PGATE+PTRAN main switch VOUT = VIN VOUT L ×RON×IOUT2+Ciss×f×VDD+ 2 VIN ×Crss×IOUT×f IDRIVE ・・・(10) (Ron: On-resistance of FET; Ciss: FET gate capacitance; f: Switching frequency Crss: FET inverse transfer function; IDRIVE: Gate peak current) Co <Loss on the synchronous MOSFET> synchronous switch Psyn=PRON+PGATE = VIN-VOUT VIN ×RON×IOUT2+Ciss×f×VDD ・・・(11) 5. Setting output voltage This IC is operated that output voltage is REF≒FB. And it is operated that output voltage is feed back to FB pin. <Output Voltage> V OUT (R1 R2) REF(0.7V) R2 ⊿V OUT ⊿I Ripple ESR ⊿I Ripple (V IN V OUT ) ※(Notice) (⊿VOUT:Output ripple voltage) ⊿V OUT (⊿Iripple: ripple current of coil, ESR: ESR of output capacitor) 2 (L:inductance[H] f:switching frequency[Hz]) 1 V OUT (L V IN f) Please set ⊿VOUT more than 20mV Ex. VIN=20V,VOUT=5V,f=300kHz,L=2.5uH,ESR=20mΩ,R1=56KΩ,R2=9.1kΩ -6 3 ⊿Iripple=(20V-5V)×5V/(2.5×10 H×20V×300×10 Hz)=5[A] -3 ⊿VOUT=5A×20×10 Ω=0.1[V] VOUT=(51kΩ+9.1kΩ)/9.1kΩ+1/2×0.1V=5.057[V] Select (R1 + R2) under 100KΩ(recommend) VIN H3REG CONTROLLA VIN R Q SLLM Output voltage Driver S SLLM Circuit FB VIN R1 R2 www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 20/33 2010.03 - Rev.A Technical Note BD9528MUV 6. Setting over current protection VIN Detecting the ON resistance (between SW and PGND voltage) of MOSFET at low side, it set the over current voltage protection. Over current reference voltage (ILIM_ref) is determined as in formula(12) below. L VOUT SW Co 10×103 PGND RILIM ILIM_REF = [A]・・・(12) RILIM[KΩ]×RON[mΩ] (RILIM: Resistance for setting of over current voltage protection value[kΩ] RON: Low side ON resistance value of FET[mΩ]) However, the value, which set the over current protection actually, is determined by the formula (13) below. 1 △IL Iocp= ILIM_ref + 2 1 I × Vo ・・・(13) × VIN - Vo × = ILIM_ref + VIN f 2 L (△IL:Coil ripple current[A], VIN:Input voltage[V], Vo:Output voltage[V] f:Switching frequency[HZ], L:Coil inductance[H]) Coil current Iocp ILIM_ref (Example) If load current 5A want to be realized with VIN=6~19V, VOUT=5V, f=400kHZ, L=2.5uH, RON=20mΩ, the formula would be below. 10k 1 I × Vo > 5 × VIN - Vo × + Iocp= RILIM[kΩ] ×RON[mΩ] VIN 2 f L When VIN=6V, Iocp will be minimum(this is because the ripple current is also minimum) so that if each condition is input, the formula will be the following: RILIM<109.1[kΩ]. ※To design the actual board, please consider enough margin for FET ON resistor dispersion, Coil inductor dispersion, IC over current reference value dispersion, frequency dispersion. 7. Relation between output voltage and TON time The BD9528MUV, both 1ch and 2ch, are high efficiency synchronous regulator controller with frequency variable. TON time varies with Input voltage [VIN], output voltage [VOUT], and RFS of FS pin resistance. TON time is calculated with the following formula: VOUT・RFS [nsec]・・・(14) TON =k VIN From TON time above, frequency on application condition is following: VOUT 1 × [kHz]・・・(15) VIN Ton However, real-life considerations (such as the external MOSFET gate capacitor and switching speed) must be factored in as they affect the overall switching rise and fall time, so please confirm in reality by the instrument. Frequency = 3.5 VIN=7V VIN=7V VIN=12V VIN=12V 2 ontime[us] 2 1.5 0.9 VIN=7V 0.8 VIN=21V VIN=12V 0.7 ontime[us] VIN=21V 2.5 ontime[us] 1 2.5 3 1.5 1 VIN=21V 0.6 0.5 0.4 0.3 1 0.2 0.5 0.5 0.1 0 0 0 0 20 40 60 80 100 120 RFS[kΩ] RFS – ontime(VOUT=5V) www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 0 20 40 60 RFS[kΩ] 80 100 RFS – ontime(VOUT=3.3V) 21/33 120 0 20 40 60 RFS[kΩ] 80 100 120 RFS – ontime(VOUT=1V) 2010.03 - Rev.A Technical Note BD9528MUV 8. Relation between output voltage and frequency Because the BD9528MUV is TON time focused regulator controller, if output current is up, switching loss of Coil, MOSFET and output capacitor will increase, and frequency will be fast. Loss of each Coil, MOSFET and output capacitor are below. ① Coil loss 2 = IOUT × DCR VOUT ② MOSFET(High Side) loss ③ MOSFET(Low Side) loss 2 = IOUT × Ronh × 2 = IOUT × Ronl × (1- VIN VOUT ) VIN (Ronh : ON resistance of high side MOSFET, Ronl : ON resistance of low side MOSFET, ESR : Output capacitor equivalent cascade resistance) Regarding those loss above and frequency formula, it is determined below. T (=1/Freq) = VIN × IOUT × TON ・・・(16) VOUT × IOUT + ① + ② + ③ However, real-life considerations (such as parasitic resistance element of Layout pattern) must be factored in as they affect the loss, please confirm in reality by the instrument. www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 22/33 2010.03 - Rev.A Technical Note BD9528MUV ●I/O Equivalent Circuit 1, 24pin (SW2, SW1) BOOT 2, 23pin (HG2, HG1) BOOT 3, 22pin (BOOT2, BOOT1) BOOT HG HG SW SW 4, 21pin (EN2, EN1) 5, 20pin (PGOOD2, PGOOD1) 6, 19pin (SS2, SS1) REG1 12pin (REF) 11, 14pin (FB2, FB1) 10, 15pin (FS2, FS1) 9pin (CTL) 26, 31pin (LG1, LG2) REG1 16, 18pin (MCTL2, MCTL1) VIN REG1 www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 23/33 2010.03 - Rev.A Technical Note BD9528MUV ●I/O Equivalent Circuit 7, 27pin (Vo2, Vo1) 28pin (REG2) 29pin (REG1) REG1 VIN 30pin (VIN) www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. VIN 8, 17pin (ILIM2, ILIM1) 24/33 2010.03 - Rev.A Technical Note BD9528MUV ●Evaluation Board Circuit (Vo1=5V/8A f1=300kHz Vo2=3.3V/8A f2=300kHz) VIN 7V~28V R1 CTL VIN CTL VIN BD9528MUV 30 VIN C1 BOOT1 R2 9 EN1 HG1 R3 REG1 21 EN1 4 EN2 SW1 R9 C9 CTL EN1 REG1 22 23 C10 C7 R10 Q2 VO1 SW1 L1 24 EN2 EN2 VIN C13 D1 R4 REG1 5V 29 LG1 PGND1 28 C14 C15 C16 C17 C23 R17 R11 Q1 REG1 C2 REG2 3.3V 26 REG2 FB1 25 14 C24 C3 R18 12 REF Vo1 C4 19 SS1 6 SS2 27 VIN BOOT2 3 HG2 2 SW2 1 LG2 31 PGND2 32 FB2 11 R12 C8 R13 C5 C6 17 ILIM1 C12 VO2 L2 C18 R14 ILIM2 R6 15 C11 Q4 SW2 R5 8 VIN Q3 D2 R19 C19 C20 C21 C22 C25 C26 FS1 R20 R7 Vo2 10 REG1 PGOOD1 R15 R8 MCTL1 7 FS2 PGOOD1 18 20 REG1 PGOOD2 MCTL1 R16 R28 PGOOD2 5 MCTL2 16 MCTL2 AGND R27 DESIGNATION R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R18 R19 R20 R27 R28 C1 C2 C3 C4 C5 C6 RATING 0Ω 0Ω 0Ω 68kΩ 68kΩ 75kΩ 75kΩ 0Ω 0Ω 0Ω 0Ω 0Ω 0Ω 100kΩ 100kΩ 91kΩ 15kΩ 30kΩ 8.2kΩ 0Ω 0Ω 10uF(25V) 10uF(6.3V) 10uF(6.3V) 0.1uF(6.3V) 2200pF(50V) 2200pF(50V) 13 PART No. MCR03 MCR03 MCR03 MCR03 MCR03 MCR03 MCR03 MCR03 MCR03 MCR03 CM32X7R106M25A GRM21BB10J106KD GRM21BB10J106KD GRM21BB10J104KD GRM188B11H102KD GRM188B11H102KD www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. COMPANY ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM KYOCERA MURATA MURATA MURATA MURATA MURATA DESIGNATION C7 C8 C9 C10 C11 C12 C13 C14 C15 C16 C17 C18 C19 C20 C21 C22 C23 C24 C25 C26 D1 D2 L1 L2 Q1 Q2 Q3 Q4 U1 25/33 RATING 0.47uF(10V) 0.47uF(10V) 10uF(25V) 10uF(25V) 330uF 330uF Diode Diode 2.5uH 2.5uH FET FET FET FET - PART No. GRM188B11A474KD GRM188B11A474KD CM32XR7106M25A CM32XR7106M25A 6TPE330MI 6TPE330MI RSX501L-20 RSX501L-20 CDEP105NP-2R5MC-32 CDEP105NP-2R5MC-32 uPA2709 uPA2709 uPA2709 uPA2709 BD9528MUV COMPANY MURATA MURATA KYOCERA KYOCERA SANYO SANYO ROHM ROHM Sumida Sumida NEC NEC NEC NEC ROHM 2010.03 - Rev.A Technical Note BD9528MUV ●Evaluation Board Circuit for Low input voltage(Vo1=5V/8A f1=300kHz Vo2=3.3V/8A f2=300kHz) VIN 6V~28V R1 CTL VIN CTL VIN BD9528MUV 30 VIN C1 BOOT1 R2 9 EN1 HG1 R3 REG1 21 EN1 4 EN2 SW1 R9 C9 CTL EN1 REG1 22 23 C10 C7 R10 Q2 VO1 SW1 L1 24 EN2 EN2 VIN C13 D1 R4 REG1 5V 29 LG1 PGND1 28 C14 C15 C16 C17 C23 R17 R11 Q1 REG1 C2 REG2 3.3V 26 REG2 FB1 25 14 C24 C3 R18 12 REF Vo1 C4 19 SS1 6 SS2 27 VIN BOOT2 3 HG2 2 SW2 1 LG2 31 PGND2 32 FB2 11 R12 C8 R13 C5 C6 17 ILIM1 C12 VO2 L2 C18 R14 ILIM2 R6 15 C11 Q4 SW2 R5 8 VIN Q3 D2 R19 C19 C20 C21 C22 C25 C26 FS1 R20 R7 Vo2 10 REG1 PGOOD1 R15 R8 MCTL1 7 FS2 PGOOD1 18 20 REG1 PGOOD2 MCTL1 R16 R28 PGOOD2 5 MCTL2 16 MCTL2 AGND R27 DESIGNATION R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R18 R19 R20 R27 R28 C1 C2 C3 C4 C5 C6 RATING 0Ω 0Ω 0Ω 68kΩ 68kΩ 75kΩ 75kΩ 0Ω 10Ω 10Ω 0Ω 10Ω 10Ω 100kΩ 100kΩ 56kΩ 9.1kΩ 30kΩ 8.2kΩ 0Ω 0Ω 10uF(25V) 10uF(6.3V) 10uF(6.3V) 0.1uF(6.3V) 2200pF(50V) 2200pF(50V) 13 PART No. MCR03 MCR03 MCR03 MCR03 MCR03 MCR03 MCR03 MCR03 MCR03 MCR03 CM32X7R106M25A GRM21BB10J106KD GRM21BB10J106KD GRM21BB10J104KD GRM188B11H102KD GRM188B11H102KD www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. COMPANY ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM ROHM KYOCERA MURATA MURATA MURATA MURATA MURATA DESIGNATION C7 C8 C9 C10 C11 C12 C13 C14 C15 C16 C17 C18 C19 C20 C21 C22 C23 C24 C25 C26 D1 D2 L1 L2 Q1 Q2 Q3 Q4 U1 26/33 RATING 0.47uF(10V) 0.47uF(10V) 10uF(25V) 10uF(25V) 330uF 330uF 10pF(50V) Diode Diode 2.5uH 2.5uH FET FET FET FET - PART No. GRM188B11A474KD GRM188B11A474KD CM32XR7106M25A CM32XR7106M25A 6TPB330ML 6TPE330MI RSX501L-20 RSX501L-20 CDEP105NP-2R5MC-32 CDEP105NP-2R5MC-32 uPA2709 uPA2709 uPA2709 uPA2709 BD9528MUV COMPANY MURATA MURATA KYOCERA KYOCERA SANYO SANYO ROHM ROHM Sumida Sumida NEC NEC NEC NEC ROHM 2010.03 - Rev.A Technical Note BD9528MUV ●Handling method of unused pin during using only DC/DC 1ch If using only 1ch DC/DC and 2ch pin is set to be off at all times, please manage the unused pin as diagram below. PIN No, 1 2 3 4 5 6 7 8 10 11 31 PIN name SW2 HG2 BOOT2 EN2 PGOOD2 SS2 Vo2 ILIM1 FB2 FS2 LG2 VIN 12V VIN BD9528MUV CTL VIN VIN C1 BOOT1 R2 9 22 HG1 R3 21 EN1 4 EN2 SW1 R9 C9 CTL EN1 REG1 EN1 VIN R1 30 CTL Management GND Open Open GND GND GND GND GND GND GND Open 23 R10 C10 C7 Q2 VO1 SW1 L1 24 C13 D1 REG1 5V 29 LG1 PGND1 28 R17 R11 C14 C15 C16 C17 C23 Q1 REG1 C2 REG2 3.3V 26 REG2 FB1 25 14 C24 C3 R18 12 REF 19 SS1 6 SS2 Vo1 C4 BOOT2 HG2 C5 17 ILIM1 8 ILIM2 SW2 27 3 2 1 R5 LG2 15 FS1 10 FS2 PGND2 32 FB2 10 Vo2 7 R7 REG1 PGOOD1 R15 MCTL1 PGOOD1 18 20 MCTL1 R28 PGOOD2 5 MCTL2 16 MCTL2 AGND R27 www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 13 27/33 2010.03 - Rev.A Technical Note BD9528MUV ●Example of PCB layout L Vo1 Co ⑥ ⑤ L-FET (CH1) ③ ‘Silent’GND R FS1 CTL R Vo2 EN2 R R R ② C C SS2 FS2 PGOOD2 FB2 LG2 BOOT2 REF VIN SW2 Cin AGND REG1 HG2 C REG2 PGND2 H-FET (CH2) FB1 ILIM2 ① R R MCTL2 Vo1 VIN ② ILMI1 EN1 LG1 PGOOD1 SW1 HG1 PGND1 BOOT1 Cin ④ MCTL1 H-FET (CH1) C SS1 C High current GND High current GND ⑤ ③ L-FET (CH2) ‘Silent’GND ⑥ Co L Vo2 ①Because high pulse current rush into power loop, consisted of input capacitor Cin, Output inductor L, and Output capacitor Co, this part layout should be built, including GND pattern, at parts side (upper side). Also ,please avoid to draw via formation in power loop line. (The reason is that it will be a factor of noise because via oneself holds some nH parasitic inductance) ②FB pin has comparatively high impedance, so floating capacity should be minimum as possible. And feedback wiring from output should be taken properly, and put on shield, not going through around L (because of magnetic). Please be careful in drawing) ③Trace from SW node pin to inductor should be cut short . And both inductor element pattern should be kept away. (Closer wiring has SW node noise influence Vo by parasitic capacity between wiring ). This layout example shows that SW node is outside, but if the application board will be like that , SW node should be shielding, and consider the influence to other circuit. ④Input capacitor Cin should be placed cloase to IC with low inductance and low impedance . If that is difficult, please place a capacitor for high frequency removal with PKG size small like 0.1uF (ESL small). ⑤2 layer and 3 layer are plain GND, so connect from parts side GND to plain GND by low impedance with many via as possible. Inner GND is only for shielding, so that not to form loop for high current . ⑥Please take GND pattern space widely, and design layout to be able to increase radiation efficiency. ⑦FS pin nad ILIM pin has high impedance. External resistor should be connected to “Silent GND”. www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 28/33 2010.03 - Rev.A Technical Note BD9528MUV Input current A Input current B Vin SW pin voltage DC/DC Inductor current Vout H3Reg controller Feed back line GND Power GND Power GND Analog GND Output current GND Output current GND This part is shortened. Current leveled By capacitor current current Vin Charger current Pulsed current flows by ON/OFF of the switch Cin Input current A t Input current B Noise output !! This part is shortened. L The noise has decreased by LC filter Vout current Voltage SW t Vin Inductor ripple current Cout Output current 0V t t SW pin voltage www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. Inductor current 29/33 2010.03 - Rev.A Technical Note BD9528MUV The influence of inductor is noted The impedance of the output is low = It may be long SW L Vout Cout FB The impedance of this line is high The impedance of FB pin is higher www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 30/33 This distance is shorted as much as possible 2010.03 - Rev.A Technical Note BD9528MUV ●Notes for use 1. This integrated circuit is a monolithic IC, which (as shown in the figure below), has P+ isolation in the P substrate and between the various pins. A P-N junction is formed from this P layer and N layer of each pin, with the type of junction depending on the relation between each potential, as follows: When GND> element A> element B, the P-N junction is a diode. When element B>GND element A, the P-N junction operates as a parasitic transistor. Parasitic diodes inevitably occur in the structure of the IC. The operation of parasitic diodes can result in mutual interference among circuits, as well as operating malfunctions and physical damage. Therefore, be careful to avoid methods by which parasitic diodes operate, such as applying a voltage lower than the GND (P substrate) voltage to an input pin. Resistor Transistor (NPN) Pin A Pin B C B Pin B E Pin A N N P N + P P + N Parasitic element P P substrate Parasitic element B N P+ P C + N E Parasitic P substrate GND Parasitic element GND GND GND Other adjacent elements 2. In some modes of operation, power supply voltage and pin voltage are reversed, giving rise to possible internal circuit damage. For example, when the external capacitor is charged, the electric charge can cause a VCC short circuit to the GND. In order to avoid these problems, inserting a VCC series countercurrent prevention diode or bypass diode between the various pins and the VCC is recommended. Bypass diode Counter current prevention diode VCC Pin 3. Absolute maximum rating Although the quality of this IC is rigorously controlled, the IC may be destroyed when applied voltage or operating temperature exceeds its absolute maximum rating. Because short mode or open mode cannot be specified when the IC is destroyed, it is important to take physical safety measures such as fusing if a special mode in excess of absolute rating limits is to be implemented. 4.GND potential Make sure the potential for the GND pin is always kept lower than the potentials of all other pins, regardless of the operating mode. 5. Thermal design In order to build sufficient margin into the thermal design, give proper consideration to the allowable loss (Power Dissipation) in actual operation. 6. Short-circuits between pins and incorrect mounting position When mounting the IC onto the circuit board, be extremely careful about the orientation and position of the IC. The IC may be destroyed if it is incorrectly positioned for mounting. Do not short-circuit between any output pin and supply pin or ground, or between the output pins themselves. Accidental attachment of small objects on these pins will cause shorts and may damage the IC. 7. Operation in strong electromagnetic fields Use in strong electromagnetic fields may cause malfunctions. Use extreme caution with electromagnetic fields. www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 31/33 2010.03 - Rev.A Technical Note BD9528MUV 8. Thermal shutdown circuit This IC is provided with a built-in thermal shutdown (TSD) circuit, which is activated when the operating temperature reaches 175℃ (standard value), and has a hysteresis range of -15℃ (standard value). When the IC chip temperature rises to the threshold, all the inputs automatically turn OFF. Note that the TSD circuit is provided for the exclusive purpose shutting down the IC in the presence of extreme heat, and is not designed to protect the IC per se or guarantee performance when or after extreme heat conditions occur. Therefore, do not operate the IC with the expectation of continued use or subsequent operation once the TSD is activated. 9. Capacitor between output and GND When a larger capacitor is connected between the output and GND, Vcc or VIN shorted with the GND or 0V line – for any reason – may cause the charged capacitor current to flow to the output, possibly destroying the IC. Do not connect a capacitor larger than 1000uF between the output and GND. 10. Precautions for board inspection Connecting low-impedance capacitors to run inspections with the board may produce stress on the IC. Therefore, be certain to use proper discharge procedure before each process of the operation. To prevent electrostatic accumulation and discharge in the assembly process, thoroughly ground yourself and any equipment that could sustain ESD damage, and continue observing ESD-prevention procedures in all handling, transfer and storage operations. Before attempting to connect components to the test setup, make certain that the power supply is OFF. Likewise, be sure the power supply is OFF before removing any component connected to the test setup. 11. GND wiring pattern When both a small-signal GND and high current GND are present, single-point grounding (at the set standard point) is recommended, in order to separate the small-signal and high current patterns, and to be sure the voltage change stemming from the wiring resistance and high current does not cause any voltage change in the small-signal GND. In the same way, care must be taken to avoid wiring pattern fluctuations in any connected external component GND. ●Thermal Derating Curve ◎ VQFN032V5050 [mW] 1000 74.2mm×74.2mm×1.6mm θj-a=142.0℃/W 880mW Glass-epoxy PCB Power Dissipation [Pd] 800 600 IC Only θj-a=328.9℃/W 400 380mW 200 0 25 50 75 100 125 150 [℃] Ambient Temperature [Ta] www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 32/33 2010.03 - Rev.A Technical Note BD9528MUV ●Ordering part number B D 9 Part No. 5 2 8 M Part No. U V Package MUV: VQFN032V5050 - E 2 Packaging and forming specification E2: Embossed tape and reel VQFN032V5050 <Tape and Reel information> 5.0 ± 0.1 5.0±0.1 1.0MAX 3.4±0.1 0.4 ± 0.1 1 8 9 32 16 25 24 0.75 0.5 2500pcs E2 The direction is the 1pin of product is at the upper left when you hold ) (0.22) ( reel on the left hand and you pull out the tape on the right hand 3.4 ± 0.1 +0.03 0.02 -0.02 S C0.2 Embossed carrier tape Quantity Direction of feed 1PIN MARK 0.08 S Tape 17 +0.05 0.25 -0.04 1pin (Unit : mm) www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. Reel 33/33 Direction of feed ∗ Order quantity needs to be multiple of the minimum quantity. 2010.03 - Rev.A Notice Notes No copying or reproduction of this document, in part or in whole, is permitted without the consent of ROHM Co.,Ltd. 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If a Product is intended to be used for any such special purpose, please contact a ROHM sales representative before purchasing. If you intend to export or ship overseas any Product or technology specified herein that may be controlled under the Foreign Exchange and the Foreign Trade Law, you will be required to obtain a license or permit under the Law. Thank you for your accessing to ROHM product informations. More detail product informations and catalogs are available, please contact us. ROHM Customer Support System http://www.rohm.com/contact/ www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. R1010A