EL2257 ® Data Sheet February 28, 2002 FN7063 125MHz Single Supply, Clamping Op Amp Features The EL2257 is a single supply op amp. Prior single supply op amps have generally been limited to bandwidths and slew rates one-fourth of that of the EL2257. The 125MHz bandwidth, 275V/µs slew rate and 0.05%/0.05° differential gain/differential phase makes this part ideal for single or dual supply video speed applications. With its voltage feedback architecture, this amplifier can accept reactive feedback networks, allowing them to be used in analog filtering applications. The inputs can sense signals below the bottom supply rail and as high as 1.2V below the top rail. Connecting the load resistor to ground and operating from a single supply, the outputs swing completely to ground without saturating. The outputs can also drive to within 1.2V of the top rail. The EL2257 will output ±100mA and will operate with single supply voltages as low as 2.7V, making them ideal for portable, low power applications. • Specified for +3V, +5V, or ± 5V applications The EL2257 has a high speed disable feature. Applying a low logic level to all ENABLE pins reduces the supply current to 0µA within 50ns. Each amplifier has its own ENABLE pin. This is useful for both multiplexing and reducing power consumption. The EL2257 also has an output voltage clamp feature. This clamp is a fast recovery (< 7ns) output clamp that prevents the output voltage from going above the preset clamp voltage. This feature is desirable for A/D applications, as A/D converters can require long times to recover if overdriven. The EL2257 is available in 14-pin SO (0.150") and 14-pin PDIP packages and operates over the industrial temperature range of -40°C to +85°C. For single amplifier applications, see the EL2150 and EL2157. For space-saving, industrystandard pinout dual and quad applications, see the EL2250 and EL2450. TAPE & REEL PKG. NO. EL2257CS 14-Pin SO (0.150") - MDP0027 EL2257CS-T7 14-Pin SO (0.150") 7” MDP0027 EL2257CS-T13 14-Pin SO (0.150") 13” MDP0027 14-Pin PDIP - MDP0031 1 • Large input common-mode range 0V < VCM < VS - 1.2V • Output swings to ground without saturating • -3dB bandwidth = 125MHz • ±0.1dB bandwidth = 30MHz • Low supply current = 5mA • Slew rate = 275V/µs • Low offset voltage = 4mV max • Output current = ±100mA • High open loop gain = 80dB • Differential gain = 0.05% • Differential phase = 0.05° Applications • Video amplifiers • PCMCIA applications • A/D drivers • Line drivers • Portable computers • High speed communications • RGB printer, fax, scanner applications • Broadcast equipment • Active filtering Pinout PACKAGE EL2257CN • Output voltage clamp • Multiplexing Ordering Information PART NUMBER • Power-down to 0µA EL2257 [14-PIN SO (0.150”), PDIP] TOP VIEW INA+ 1 + - 14 INA- 13 OUTA CLAMPA 2 ENABLEA 3 12 NC GND 4 11 VS+ ENABLEB 5 10 NC 9 OUTB 8 INB- CLAMPB 6 INB+ 7 + - CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright © Intersil Americas Inc. 2003. All Rights Reserved. Elantec is a registered trademark of Elantec Semiconductor, Inc. All other trademarks mentioned are the property of their respective owners. EL2257 Absolute Maximum Ratings (TA = 25°C) Supply Voltage between VS and GND . . . . . . . . . . . . . . . . . . . 12.6V Input Voltage (IN+, IN-, ENABLE, CLAMP) . . . GND–0.3V, VS+0.3V Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±6V Maximum Output Current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90mA Output Short Circuit Duration. . . . . . . . . . . . . . . . See Note 1 page 3 Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See curves Storage Temperature Range . . . . . . . . . . . . . . . . . .-65°C to +150°C Ambient Operating Temperature Range . . . . . . . . . .-40°C to +85°C Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . . +150°C CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA DC Electrical Specifications VS = +5V, GND = 0V, TA = 25°C, VCM = 1.5V, VOUT = 1.5V, VCLAMP = +5V, VENABLE = +5V, unless otherwise specified. PARAMETER DESCRIPTION CONDITIONS VOS Offset Voltage TCVOS Offset Voltage Temperature Coefficient Measured from TMIN to TMAX IB Input Bias Current VIN = 0V IOS Input Offset Current VIN = 0V TCIOS Input Bias Current Temperature Measured from TMIN to TMAX Coefficient PSRR Power Supply Rejection Ratio CMRR MIN TYP -4 MAX UNIT 4 mV 10 -1100 µV/°C -5.5 -10 µA 150 +1100 nA 50 nA/°C 45 70 dB Common-mode Rejection Ratio VCM = 0V to +3.8V 50 65 dB VCM = 0V to +3.0V 55 70 dB VS = VENABLE = 2.7V to 12V, VCLAMP = OPEN CMIR Common-mode Input Range 0 RIN Input Resistance Common-mode CIN Input Capacitance SO (0.150") package 1 VS-1.2 V 2 MΩ 1 pF PDIP package 1.5 pF mΩ ROUT Output Resistance AV = +1 40 ISON Supply Current - Enabled (per amplifier) VS = VCLAMP = 12V, VENABLE = 12V 5 6.5 mA ISOFF Supply Current - Shut-down (per VS = VCLAMP = 10V, VENABLE = 0.5V amplifier) VS = VCLAMP = 12V, VENABLE = 0.5V 0 50 µA PSOR Power Supply Operating Range AVOL Open Loop Gain VOP Positive Output Voltage Swing 5 2.7 VS = VCLAMP = 12V, VOUT = 2V to 9V, RL = 1kΩ to GND 65 2 V dB VOUT = 1.5V to 3.5V, RL = 1kΩ to GND 70 dB VOUT = 1.5V to 3.5V, RL = 150Ω to GND 60 dB 10.8 V 10.0 V 4.0 V VS = 12V, AV = 1, RL = 1kΩ to 0V 9.6 VS = ±5V, AV = 1, RL = 1kΩ to 0V Negative Output Voltage Swing 12.0 80 VS = 12V, AV = 1, RL = 150Ω to 0V VON µA VS = ±5V, AV = 1, RL = 150Ω to 0V 3.4 3.8 V VS = 3V, AV = 1, RL = 150Ω to 0V 1.8 1.95 V VS = 12V, AV = 1, RL = 150Ω to 0V 5.5 VS = ±5V, AV = 1, RL = 1kΩ to 0V -4.0 VS = ±5V, AV = 1, RL = 150Ω to 0V -3.7 8 mV V -3.4 V EL2257 DC Electrical Specifications VS = +5V, GND = 0V, TA = 25°C, VCM = 1.5V, VOUT = 1.5V, VCLAMP = +5V, VENABLE = +5V, unless otherwise specified. (Continued) PARAMETER IOUT DESCRIPTION Output Current (Note 1) CONDITIONS VS = ±5V, AV = 1, RL = 10Ω to 0V MIN TYP ±75 ±100 mA ±60 mA VS = ±5V, AV = 1, RL = 50Ω to 0V IOUT,OFF Output Current - Disabled VIH-EN ENABLE Pin Voltage for Power- Relative to GND pin up VIL-EN ENABLE Pin Voltage for Shutdown Relative to GND pin IIH-EN ENABLE Pin Input Current High(Note 2) VS = VCLAMP = 12V, VENABLE = 12V IIL-EN ENABLE Pin Input Current - Low VS = VCLAMP = 12V, VENABLE = 0.5V (Note 2) VOR-CL Voltage Clamp Operating Range (Note 3) Relative to GND pin VACC-CL CLAMP Accuracy (Note 4) VIN = 4V, RL = 1kΩ to GND, VCLAMP = 1.5V and 3.5V IIH-CL CLAMP Pin Input Current - High VS = VCLAMP = 12V IIL-CL CLAMP Pin Input Current - Low (per amp) VENABLE = 0.5V MAX 0 20 2.0 µA V 0.5 V 340 410 µA 0 1 µA VOP V 100 250 mV 12 25 µA 1.2 -250 VS = 12V, VCLAMP = 1.2V UNIT -30 -15 µA NOTES: 1. Internal short circuit protection circuitry has been built into the EL2257. See the Applications section. 2. If the disable feature is not desired, tie the ENABLE pins to the VS pin, or apply a logic high level to the ENABLE pins. 3. The maximum output voltage that can be clamped is limited to the maximum positive output Voltage, or VOP. Applying a voltage higher than VOP inactivates the clamp. If the clamp feature is not desired, either tie the CLAMP pin to the VS pin, or simply let the CLAMP pin float. 4. The clamp accuracy is affected by VIN and RL. See the Typical Curves Section and the Clamp Accuracy vs VIN and RL curve. Closed Loop AC Electrical Specifications VS = +5V, GND = 0V, TA = 25°C, VCM = +1.5V, VOUT = +1.5V, VCLAMP = +5V, VENABLE = +5V, AV = +1, RF = 0Ω, RL = 150Ω to GND pin unless otherwise specified. (Note 1) PARAMETER BW BW DESCRIPTION -3dB Bandwidth (VOUT = 400mVP-P) ±0.1dB Bandwidth (VOUT = 400mVP-P) CONDITIONS MIN TYP MAX UNIT VS = 5V, AV = 1, RF = 0Ω 125 MHz VS = 5V, AV = -1, RF = 500Ω 60 MHz VS = 5V, AV = 2, RF = 500Ω 60 MHz VS = 5V, AV = 10, RF = 500Ω 6 MHz VS = 12V, AV = 1, RF = 0Ω 150 MHz VS = 3V, AV = 1, RF = 0Ω 100 MHz VS = 12V, AV = 1, RF = 0Ω 25 MHz VS = 5V, AV = 1, RF = 0Ω 30 MHz VS = 3V, AV = 1, RF = 0Ω 20 MHz GBWP Gain Bandwidth Product VS = 12V, @ AV = 10 60 MHz PM Phase Margin RL = 1kΩ, CL = 6pF 55 ° SR Slew Rate VS = 10V, RL = 150Ω, VOUT = 0V to 6V 275 V/µs VS = 5V, RL = 150Ω, VOUT = 0V to +3V 300 V/µs 200 tR,tF Rise Time, Fall Time ±0.1V step 2.8 ns OS Overshoot ±0.1V step 10 % tPD Propagation Delay ±0.1V step 3.2 ns 3 EL2257 Closed Loop AC Electrical Specifications VS = +5V, GND = 0V, TA = 25°C, VCM = +1.5V, VOUT = +1.5V, VCLAMP = +5V, VENABLE = +5V, AV = +1, RF = 0Ω, RL = 150Ω to GND pin unless otherwise specified. (Note 1) PARAMETER tS DESCRIPTION CONDITIONS MIN TYP MAX UNIT 0.1% Settling Time VS = ±5V, RL = 500Ω, AV = 1, VOUT = ±3V 40 ns 0.01% Settling Time VS = ±5V, RL = 500Ω, AV = 1, VOUT = ±3V 75 ns dG Differential Gain (Note 2) AV = 2, RF = 1kΩ 0.05 % dP Differential Phase (Note 2) AV = 2, RF = 1kΩ 0.05 ° eN Input Noise Voltage f = 10kHz 48 nV/√Hz iN Input Noise Current f = 10kHz 1.25 pA/√Hz tDIS Disable Time (Note 3) 50 ns tEN Enable Time (Note 3) 25 ns tCL Clamp Overload Recovery 7 ns NOTES: 1. All AC tests are performed on a “warmed up” part, except slew rate, which is pulse tested. 2. Standard NTSC signal = 286mVP-P, f = 3.58MHz, as VIN is swept from 0.6V to 1.314V. RL is DC coupled. 3. Disable/Enable time is defined as the time from when the logic signal is applied to the ENABLE pin to when the supply current has reached half its final value. 4 EL2257 Typical Performance Curves Non-Inverting Frequency Response (Gain) Non-Inverting Frequency Response (Phase) 3dB Bandwidth vs Temperature for Non-Inverting Gains Inverting Frequency Response (Gain) Inverting Frequency Response (Phase) 3dB Bandwidth vs Temperature for Inverting Gains Frequency Response for Various RL Frequency Response for Various CL Non-Inverting Frequency Response vs Common Mode Voltage 5 EL2257 Typical Performance Curves (Continued) 3dB Bandwidth vs Supply Voltage for Non-Inverting Gains Frequency Response for Various Supply Voltages, AV = + 1 PSSR and CMRR vs Frequency 3dB Bandwidth vs Supply Voltage for Inverting Gains Frequency Response for Various Supply Voltages, AV = + 2 PSRR and CMRR vs Die Temperature Open Loop Gain and Phase vs Frequency Open Loop Voltage Gain vs Die Temperature Closed Loop Output Impedance vs Frequency 6 EL2257 Typical Performance Curves (Continued) Large Signal Step Response, VS = +3V Large Signal Step Response, VS = +5V Small Signal Step Response Slew Rate vs Temperature 7 Large Signal Step Response, VS = +12V Large Signal Step Response, VS = ±5V Settling Time vs Settling Accuracy Voltage and Current Noise vs Frequency EL2257 Typical Performance Curves (Continued) Differential Gain for Single Supply Operation 2nd and 3rd Harmonic Distortion vs Frequency Output Voltage Swing vs Frequency for THD < 0.1% 8 Differential Phase for Single Supply Operation 2nd and 3rd Harmonic Distortion vs Frequency Output Voltage Swing vs Frequency for Unlimited Distortion Differential Gain and Phase for Dual Supply Operation 2nd and 3rd Harmonic Distortion vs Frequency Output Current vs Die Temperature EL2257 Typical Performance Curves (Continued) Supply Current vs Supply Voltage (per amplifier) Supply Current vs Die Temperature (per amplifier) Input Resistance vs Die Temperature Offset Voltage vs Die Temperature (4 Samples) Input Bias Current vs Input Voltage Input Offset Current and Input Bias Current vs Die Temperature Positive Output Voltage Swing vs Die Temperature, RL = 150Ω to GND Negative Output Voltage Swing vs Die Temperature, RL = 150Ω to GND Clamp Accuracy vs Die Temperature 9 EL2257 Typical Performance Curves (Continued) Clamp Accuracy RL = 150Ω Clamp Accuracy RL = 1kΩ Clamp Accuracy RL = 10kΩ Disable Response for a Family of DC Inputs Enable Response for a Family of DC Inputs OFF Isolation Disable/Enable Response for a Family of Sine Waves Package Power Dissipation vs Ambient Temperature JEDEC JESD51-3 Low Effective Thermal Conductivity Test Board EL2257 Channel to Channel Isolation vs Frequency 1.8 1.54W Power Dissipation (W) 1.6 PD I θ 1.4 JA = 1.2 81 1.042W SO 1 θJ 0.8 P1 4 °C / W 14 ( 0.1 50 ”) 20 °C /W A =1 0.6 0.4 0.2 0 0 25 50 75 85 100 Ambient Temperature (°C) 10 125 150 EL2257 Simplified Schematic (One Channel) Applications Information Product Description The EL2257, connected in voltage follower mode, -3dB bandwidth is 125MHz while maintaining a 275V/µs slew rate. With an input and output common mode range that includes ground, this amplifier was optimized for single supply operation, but will also accept dual supplies. It operates on a total supply voltage range as low as 2.7V or up to 12V. This makes them ideal for +3V applications, especially portable computers. While many amplifiers claim to operate on a single supply, and some can sense ground at their inputs, most fail to truly drive their outputs to ground. If they do succeed in driving to ground, the amplifier often saturates, causing distortion and recovery delays. However, special circuitry built into the EL2257 allows the output to follow the input signal to ground without recovery delays. Power Supply Bypassing And Printed Circuit Board Layout As with any high frequency device, good printed circuit board layout is necessary for optimum performance. Ground plane construction is highly recommended. Pin lengths should be as short as possible. The power supply pins must be well bypassed to reduce the risk of oscillation. The combination of a 4.7µF tantalum capacitor in parallel with a 0.1µF ceramic capacitor has been shown to work well when placed at each supply pin. For single supply operation, where the GND pin is connected to the ground plane, a single 4.7µF tantalum capacitor in parallel with a 0.1µF ceramic capacitor from the VS+ pin to the GND pin will suffice. 11 For good AC performance, parasitic capacitance should be kept to a minimum. Ground plane construction should be used. Carbon or Metal-Film resistors are acceptable with the Metal-Film resistors giving slightly less peaking and bandwidth because of their additional series inductance. Use of sockets, particularly for the SO (0.150") package should be avoided if possible. Sockets add parasitic inductance and capacitance which will result in some additional peaking and overshoot. Supply Voltage Range and Single-Supply Operation The EL2257 has been designed to operate with supply voltages having a span of greater than 2.7V, and less than 12V. In practical terms, this means that the EL2257 will operate on dual supplies ranging from ±1.35V to ±6V. With a single-supply, the EL2257 will operate from +2.7V to +12V. Performance has been optimized for a single +5V supply. Pins 11 and 4 are the power supply pins on the EL2257. The positive power supply is connected to pin 11. When used in single supply mode, pin 4 is connected to ground. When used in dual supply mode, the negative power supply is connected to pin 4. As supply voltages continue to decrease, it becomes necessary to provide input and output voltage ranges that can get as close as possible to the supply voltages. The EL2257 has an input voltage range that includes the negative supply and extends to within 1.2V of the positive supply. So, for example, on a single +5V supply, the EL2257 has an input range which spans from 0V to 3.8V. The output range of the EL2257 is also quite large. It includes the negative rail, and extends to within 1V of the top EL2257 supply rail with a 1kΩ load. On a +5V supply, the output is therefore capable of swinging from 0V to +4V. On split supplies, the output will swing ±4V. If the load resistor is tied to the negative rail and split supplies are used, the output range is extended to the negative rail. Choice of Feedback Resistor, RF The feedback resistor forms a pole with the input capacitance. As this pole becomes larger, phase margin is reduced. This increases ringing in the time domain and peaking in the frequency domain. Therefore, RF has some maximum value which should not be exceeded for optimum performance. If a large value of RF must be used, a small capacitor in the few picofarad range in parallel with RF can help to reduce this ringing and peaking at the expense of reducing the bandwidth. As far as the output stage of the amplifier is concerned, RF + RG appear in parallel with RL for gains other than +1. As this combination gets smaller, the bandwidth falls off. Consequently, RF has a minimum value that should not be exceeded for optimum performance. For AV = +1, RF = 0Ω is optimum. For AV = -1 or +2 (noise gain of 2), optimum response is obtained with RF between 500Ω and 1kΩ. For AV = -4 or +5 (noise gain of 5), keep RF between 2kΩ and 10kΩ. kept above 1.25V, dG and dP are a respectable 0.03% and 0.03°. For other biasing conditions see the Differential Gain and Differential Phase vs. Input Voltage curves. Output Drive Capability In spite of their moderately low 5mA of supply current, the EL2257 is capable of providing ±100mA of output current into a 10Ω load, or ±60mA into 50Ω. With this large output current capability, a 50Ω load can be driven to ±3V with VS = ±5V, making it an excellent choice for driving isolation transformers in telecommunications applications. Driving Cables and Capacitive Loads When used as a cable driver, double termination is always recommended for reflection-free performance. For those applications, the back-termination series resistor will decouple the EL2257 from the cable and allow extensive capacitive drive. However, other applications may have high capacitive loads without a back-termination resistor. In these applications, a small series resistor (usually between 5Ω and 50Ω) can be placed in series with the output to eliminate most peaking. The gain resistor (RG) can then be chosen to make up for any gain loss which may be created by this additional resistor at the output. Disable/Power-Down Video Performance For good video performance, an amplifier is required to maintain the same output impedance and the same frequency response as DC levels are changed at the output. This can be difficult when driving a standard video load of 150Ω, because of the change in output current with DC level. Differential Gain and Differential Phase for the EL2257 are specified with the black level of the output video signal set to +1.2V. This allows ample room for the sync pulse even in a gain of +2 configuration. This results in dG and dP specifications of 0.05% and 0.05° while driving 150Ω at a gain of +2. Setting the black level to other values, although acceptable, will compromise peak performance. For example, looking at the single supply dG and dP curves for RL = 150Ω, if the output black level clamp is reduced from 1.2V to 0.6V dG/dP will increase from 0.05%/0.05° to 0.08%/0.25°. Note that in a gain of +2 configuration, this is the lowest black level allowed such that the sync tip doesn’t go below 0V. If your application requires that the output goes to ground, then the output stage of the EL2257, like all other single supply op amps, requires an external pull down resistor tied to ground. As mentioned above, the current flowing through this resistor becomes the DC bias current for the output stage NPN transistor. As this current approaches zero, the NPN turns off, and dG and dP will increase. This becomes more critical as the load resistor is increased in value. While driving a light load, such as 1kΩ, if the input black level is 12 Each amplifier in the EL2257 can be individually disabled, placing each output in a high-impedance state. The disable or enable action takes only about 40ns. When all amplifiers are disabled, the total supply current is reduced to 0mA, thereby eliminating all power consumption by the EL2257. The EL2257 amplifier’s power down can be controlled by standard CMOS signal levels at each ENABLE pin. The applied CMOS signal is relative to the GND pin. For example, if a single +5V supply is used, the logic voltage levels will be +0.5V and +2.0V. If using dual ±5V supplies, the logic levels will be -4.5V and -3.0V. Letting all ENABLE pins float will disable the EL2257. If the power-down feature is not desired, connect all ENABLE pins to the VS+ pin. The guaranteed logic levels of +0.5V and +2.0V are not standard TTL levels of +0.8V and +2.0V, so care must be taken if standard TTL will be used to drive the ENABLE pins. Output Voltage Clamp The EL2257 amplifier has an output voltage clamp. This clamping action is fast, being activated almost instantaneously, and being deactivated in < 7ns, and prevents the output voltage from going above the preset clamp voltage. This can be very helpful when the EL2257 is used to drive an A/D converter, as some converters can require long times to recover if overdriven. The output voltage remains at the clamp voltage level as long as the product of the input voltage and the gain setting exceeds the clamp voltage. For example, if the EL2257 is connected in a gain of 2, and +3V DC is applied to the CLAMP pin, any EL2257 voltage higher than +1.5V at the inputs will be clamped and +3V will be seen at the output. Each amplifier of the EL2257 have their own CLAMP pin, so individual clamp levels may be set. Figure 1 below is the EL2257 with each amplifier unity gain connected. Amplifier A is being driven by a 3VP-P sinewave and has 2.25V applied to CLAMPA, while amplifier B is driven by a 3VP-P triangle wave and 1.5V is applied to CLAMPB. The resulting output waveforms, with their outputs being clamped is shown in Figure 2. FIGURE 3. The clamp accuracy is affected by 1) the CLAMP pin voltage, 2) the input voltage, and 3) the load resistor. Depending upon the application, the accuracy may be as little as a few tens of millivolts up to a few hundred millivolts. Be sure to allow for these inaccuracies when choosing the clamp voltage. Curves of Clamp Accuracy vs. VCLAMP and VIN for 3 values of RL are included in the Typical Performance Curves section. FIGURE 1. Unlike amplifiers that clamp at the input and are therefore limited to non-inverting applications only, the EL2257 output clamp architecture works for both inverting and non-inverting gain applications. There is also no maximum voltage difference limitation between VIN and VCLAMP which is common on input clamped architectures. The voltage clamp operates for any voltage between +1.2V above the GND pin, and the minimum output voltage swing, VOP. Forcing the CLAMP pin much below +1.2V can saturate transistors and should therefore be avoided. Forcing the CLAMP pin above VOP simply de-activates the CLAMP feature. In other words, one cannot expect to clamp any voltage higher than what the EL2257 can drive to in the first place. If the clamp feature is not desired, either let the CLAMP pin float or connect it to the VS+ pin. EL2257 Comparator Application FIGURE 2. Figure 3 shows the output of amplifier A of the same circuit being driven by a 0.5V to 2.75V square wave as the clamp voltage is varied from 1.0V to 2.5V, as well as the unclamped output signal. The rising edge of the signal is clamped to the voltage applied to the CLAMP pin almost instantaneously. The output recovers from the clamped mode within 5–7ns, depending on the clamp voltage. Even when the CLAMP pin is taken 0.2V below the minimum 1.2V specified, the output is still clamped and recovers in about 11ns. 13 The EL2257 can be used as a very fast, single supply comparator by utilizing the clamp feature. Most op amps used as comparators allow only slow speed operation because of output saturation issues. However, by applying a DC voltage to the CLAMP pin of the EL2257, the maximum output voltage can be clamped, thus preventing saturation. Figure 4 is amplifier A of an EL2257 implemented as a comparator. 2.25V DC is applied to the CLAMP pin, as well as the IN- pin. A differential signal is then applied between the inputs. Figure 5 shows the output square wave that results when a ±1V, 10MHz triangular wave is applied, while Figure 6 is a graph of propagation delay vs. overdrive as a square wave is presented at the input. EL2257 VIN 1 75Ω 2 14 + - 12 4 11 6 FIGURE 5. 8 FIGURE 8. Multiplexing with the EL2257 The ENABLE pins on the EL2257 allow for multiplexing applications. Figure 9 shows an EL2257 with both outputs tied together, driving a back terminated 75Ω video load. Two sinewaves of varying amplitudes and frequencies are applied to the two inputs. Logic signals are applied to each of the ENABLE pins to cycle through turning each of the amplifiers on, one at a time. Figure 10 shows the resulting output waveform at VOUT. Switching is complete in about 50ns. Notice the outputs are tied directly together. Decoupling resistors at each output are not necessary. In fact, adding them approximately doubles the switching time to 100ns. 1.3VP-P 1MHz Video Sync Pulse Remover Application All CMOS Analog to Digital Converters (A/Ds) have a parasitic latch-up problem when subjected to negative input voltage levels. Since the sync tip contains no useful video information and it is a negative going pulse, we can chop it off. Figure 7 shows a unity gain connected amplifier A of an EL2257. Figure 8 shows the complete input video signal applied at the input, as well as the output signal with the negative going sync pulse removed. 1 2 CLK 1 of 2 Decoder 13 3 12 4 11 5 10 150Ω 6 7.5VP-P 5MHz 14 + - + - 7 9 8 FIGURE 9. 14 9 FIGURE 7. FIGURE 4. FIGURE 6. +5V 10 + - 7 Propagation Delay vs Overdrive EL2257 as a Comparator 13 3 5 VOUT 150Ω VOUT 0.1µF 4.4µF EL2257 where: N = Number of amplifiers VS = Total supply voltage ISMAX = Maximum supply current per amplifier VOUT = Maximum output voltage of the application RL = Load resistance tied to ground FIGURE 10. Short Circuit Current Limit The EL2257 has internal short circuit protection circuitry that protect it in the event of its output being shorted to either supply rail. This limit is set to around 100mA nominally and reduces with increasing junction temperature. It is intended to handle temporary shorts. If an output is shorted indefinitely, the power dissipation could easily increase such that the part will be destroyed. Maximum reliability is maintained if the output current never exceeds ±90mA. A heat sink may be required to keep the junction temperature below absolute maximum when an output is shorted indefinitely. If we set the two PDMAX equations, [1] and [2], equal to each other, and solve for VS, we can get a family of curves for various loads and output voltages according to: R L × ( T JMAX - T AMAX ) 2 --------------------------------------------------------------- + ( V OUT ) N × θ JA V S = ---------------------------------------------------------------------------------------------( I S × R L ) + V OUT Figure 11 below shows total single supply voltage VS vs. RL for various output voltage swings for the PDIP and SO (0.150") packages. The curves assume worst-case conditions of TA = +85°C and IS = 6.5mA per amplifier. EL2257 Single Supply Voltage vs. RLoad for Various VOUT and Packages Power Dissipation With the high output drive capability of the EL2257, it is possible to exceed the 150°C Absolute Maximum junction temperature under certain load current conditions. Therefore, it is important to calculate the maximum junction temperature for the application to determine if power-supply voltages, load conditions, or package type need to be modified for the EL2257 to remain in the safe operating area. The maximum power dissipation allowed in a package is determined by: T JMAX - T AMAX PD MAX = -------------------------------------------θ JA where: TJMAX = Maximum junction temperature TAMAX = Maximum ambient temperature θJA = Thermal resistance of the package PDMAX = Maximum power dissipation in the package The maximum power dissipation actually produced by an IC is the total quiescent supply current times the total power supply voltage, plus the power in the IC due to the load, or: V OUT PD MAX = N × V S × I SMAX + ( V S - V OUT ) × ---------------RL 15 FIGURE 11. EL2257 EL2257 Macromodel (one channel) * Revision A, October 1995 * Pin numbers reflect a standard single opamp. * When not being used, the clamp pin, pin 1, * should be connected to Vsupply, pin 7 * Connections: +input * | -input * | | +Vsupply * | | | -Vsupply * | | | | output * | | | | | clamp * | | | | | | .subckt EL2257/el 3 2 7 4 6 1 * * Input Stage * i1 7 10 250µA i2 7 11 250µA r1 10 11 4K q1 12 2 10 qp q2 13 3 11 qpa r2 12 4 100 r3 13 4 100 * * Second Stage & Compensation * gm 15 4 13 12 4.6m r4 15 4 15Meg c1 15 4 0.36pF * * Poles * e1 17 4 15 4 1.0 r6 17 25 400 c3 25 4 1pF r7 25 18 500 c4 18 4 1pF * * Connections:IN+IN+IN+IN+IN+IN+IN+INININININ * Output Stage & Clamp * i3 20 4 1.0mA q3 7 23 20 qn q4 7 18 19 qn q5 7 18 21 qn q6 4 20 22 qp q7 7 23 18 qn d1 19 20 da d2 18 1 da r8 21 6 2 r9 22 6 2 r10 18 21 10k r11 7 23 100k d3 23 24 da d4 24 4 da d5 23 18 da * * Power Supply Current * ips 7 4 3.2mA 16 EL2257 * * Models * .model qn npn(is800e-18 bf150 tf0.02nS) .model qpa pnp(is810e-18 bf50 tf0.02nS) .model qp pnp(is800e-18 bf54 tf0.02nS) .model da d(tt0nS) .ends All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 17