ISL8130EV1Z User Guide

Application Note 1760
Author: Manjing Xie
ISL8130EV1Z - Boost Converter
Introduction
Evaluation Board Specifications
ISL8130EV1Z is a standard boost converter, which features
the universal PWM controller, ISL8130. The evaluation board
delivers 32V output at 1.25A. All the necessary components
are within the 1.425” x 1.15” PCB area.
The ISL8130 is a universal PWMcontroller. It is designed to
drive N-Channel MOSFETs in a synchronous rectified buck
topology for up to 25A instant MOSFET current and can be
configured for boost, buck/boost and sepic converters as well.
The ISL8130 integrates control, output adjustment, monitoring
and protection functions into a single package. The ISL8130
provides simple, voltage mode control with fast transient
response.
ISL8130 Key Features
TABLE 1. EVALUATION BOARD ELECTRICAL SPECIFICATIONS
SPEC
DESCRIPTION
MIN
TYP
MAX
UNIT
12
16
V
VIN
Board Input Range
6
IOC
Input Current
8
VOUT
30.5
A
32
33.5
V
IOUT
VIN = 6V
1.25
A
IOUT
VIN = 12V
2.5
A

VIN = 6V, IOUT = 1.25A
90
%

VIN = 12V, IOUT = 2.5A
93.5
%
• Operates From:
- - 4.5V to 5.5V Input for 5V Input
- - 5.5V to 16V Input
• Resistor-Selectable Switching Frequency from 100kHz to
1.4MHz
• Voltage Margining and External Reference Tracking Modes
• Kelvin Current Sensing
- Upper MOSFET rDS(ON) for Current Sensing for Buck and
Buck/Boost Converter
- Precision Resistor for Boost and Sepic Converter
• Extensive Protection Functions:
- Overvoltage, Overcurrent, Undervoltage
• Power-Good Indicator
FIGURE 1. ISL8130EV1Z TOP VIEW
TABLE 2. RECOMMENDED COMPONENT SELECTION FOR QUICK EVALUATION
VOUT
(V)
R22
(k)
VIN (MIN)
(V)
IOUT
(A)
FSW(KHz)/RT(K)
MOSFET
FORWARD DIODE
INDUCTOR (L, ISAT)
32
174
6
1.25
330kHz/43.2k
BSC100N06LS G
SS5P6
10µH, 10A
24
130
9
2
500kHz/28.7k
BSC059N04 LS
SS3P4L
10µH, 7A
12
63.4
4.5
3
500kHz/28.7k
BSC057N03 LS
SS5P3
2.2µH, 15A
NOTES:
1. Please select the output capacitor with a voltage rating higher than the output.
2. Please contact Intersil Sales for assistance.
August 7, 2012
AN1760.2
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas Inc. 2012. All Rights Reserved.
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.
Application Note 1760
ISL8130EV1Z
FIGURE 2. ISL8130EV1Z TEST SET-UP
Recommended Equipment
Probe Set-up
The following equipment is recommended for evaluation:
• 0V to 20V power supply with 15A source current capability
• Electronic load capable of sinking 2A @ 40V
• Digital Multi meters (DMMs)
OUTPUT
CAP
OUTPUT
OUTPUT
CAP
CAP
OR
ORMOSFET
MOSFET
• 100MHz Quad-Trace Oscilloscope
Quick Test Setup
1. Ensure that the Evaluation board is correctly connected to the
power supply and the electronic load prior to applying any
power. Please refer to Figure 2 for proper set-up.
2. Leave JP3 in the open position
3. Turn on the power supply; VIN< 16V
4. Adjust input voltage VIN within the specified range and
observe output voltage. The output voltage variation should
be within 5%.
5. Adjust load current within 1.25A. The output voltage variation
should be within 5%.
FIGURE 3. OSCILLOSCOPE PROBE SET-UP
VOUT Setting
The output voltage is set by the resistor divider, R13 and R22.
R 13 + R 22
V OUT = --------------------------  0.6V
R 13
(EQ. 1)
Resistor R21 is a resistor jumper for loop gain measurement. It is
recommended to set R21 = 50 for loop gain measurement.
6. Use oscilloscope to observe output ripple voltage and phase
node ringing. For accurate measurement, please refer to
Figure 3 for proper probe set-up.
Component Selection
7. Optimization. Please refer to Table 2 on page 1 for
optimization recommendation.
The controller, ISL8130 and input capacitors are connected from
the VIN rail to GND. MOSFET, diode and the output capacitors are
connected from the VOUT rail to GND. Please select component
with sufficient voltage rating.
8. For 5V input applications, please tie the VCC5V to VIN and do
not allow VIN to go above 5.5V.
NOTE: Test points: VIN+, VIN-, VO+ and VO- are for voltage measurement
only. Do not allow high current through these test points.
Component Voltage Stress
Inductor Selection
It is recommended to select inductor so that the ripple current
ratio is between 30% to 50%. For low-core-loss magnetic
material, higher ripple ratio would ease the compensation design
2
AN1760.2
August 7, 2012
Application Note 1760
For example:
and help to reduce the size of the inductor. Please refer to
Equation 2 for recommended indcutor value:
VOUT = 32V, IOUT = 1.25A, VINmin = 6V
(EQ. 2)
IORMS = 2.6A
Where D is the duty cycle, iR is the inductor ripple ratio.
It is recommended to select an inductor with a saturation current
higher than the maximum overcurrent threshold.
Current Sensing:
For accurate overcurrent detection, it is recommended to set the
voltage across the current sensing resistor, RCS, higher than
50mV. Taking variation into consideration, when precision
current sensing resistor is used, RSEN = 665. .
The OC threshold should be higher than the peak inductor current
at maximum load current. The maximum peak inductor usually
occurs at VINmin and can be calculated using Equation 3.
(EQ. 3)
(EQ. 4)
Where: IOCSET is the OCSET pin sinking current for overcurrent
detection. The IOCSET(min) = 80A.
In “Inductor Selection” on page 2, it is recommended that the
inductor saturation current be higher than the maximum
overcurrent threshold. The maximum overcurrent threshold can
be calculated by Equation 5.
R SEN  I OCSET  max 
I OCmax = ----------------------------------------------------R CS
(EQ. 5)
Where IOCSET(max) = 120A.
Input Capacitors
The input RMS current of a boost is much smaller than the
output RMS in general. Please refer to Equation 6 for input RMS
current calculation:
V IN
V IN 

I INRMS = ------------------------------   1 – -------------   12 
L BST  F SW 
V OUT
The other important factor is stability. The right-half-plane zero,
fRHP of a boost converter imposes a big challenge for stability. It
is recommended to set cross over frequency below the fRHP and
above the boost converter natural resonant frequency, fN. It is
recommended to use sufficient output capacitors so that the fN
is much lower than fRHP. Equation 8 is provided for total output
capacitance estimation.
 I Omax  2
C out   ------------------  L BST  400
 V INmin
(EQ. 8)
where LBST is the boost inductor.
For right-half-plane zero calculation, fRHP:
Refer to Equation 4 for RCS calculation.
R SEN  I OCSET  min 
R CS  ---------------------------------------------------I LPK
For applications with FSW < 1MHz, it is still rule of thumb that the
aluminum electrolytic capacitors take the ripple current. Please
select electrolytic capacitors with ripple current greater than the
maximum IORMS, as calculated by Equation 7.
V in
f RHP = ------------------------------------2  I L  L BST
(EQ. 9)
For boost converter natural resonant frequency, fN:
1–D
f N = -------------------------------------------------2  C OUT  L BST
(EQ. 10)
Output Disconnect
The boost converter cannot protect from an output short circuit
event. It relies on the input power supply overcurrent protection
or output disconnect circuit for output short circuit events.
Figure 4 is a simple output disconnect circuit, which can be used
as a reference. The circuit is inserted between the cathode of the
diode and the boost output.
M1
1
V INmin
I Omax  V OUT 1
V INmin

I LPK = ----------------------------------- + ---  ------------------------------   1 – ------------------
2 L BST  F SW 
V INmin
V OUT 
Dmax = 81.25%
R8
31.6K
(EQ. 6)
The bulk capacitor used is used to stabilize system stability and
can be considered as the output capacitor of the input power
supply.
2
2
V OUT
L BST = -------------------------------------------------  D   1 – D 
i R  I Omax  F SW
Output Capacitors
D2
11V
It is recommended to use a combination of aluminum capacitors
with high capacitance and low ESR ceramic capacitors at the
output for optimum ripple and load transient performance.
The low ESL and ESR ceramic capacitors should be placed close
to the MOSFET and diode.
When selecting the output capacitors, there are two important
requirements: the ripple current and the stability.
The output RMS current worst case occurs at VIN_min and
maximum load. See Equation 7 for output ripple current
calculation:
D max
I ORMS = I OUT  ----------------------1 – D max
PGOOD
M2
NFET
FIGURE 4. OUTPUT DISCONNECT CIRCUIT
(EQ. 7)
3
AN1760.2
August 7, 2012
Application Note 1760
Typical Performance Curves
95
32.4
93
32.3
VOUT REGULATION(V)
EFFICIENCY (%)
91
VIN = 12V
89
VIN = 6V
87
85
83
81
32.2
32.1
32.0
VIN = 12V
31.9
31.8
31.7
79
77
VIN = 6V
0
0.5
1.0
1.5
LOAD CURRENT(A)
2.0
2.5
31.6
0
0.5
1.0
1.5
2.0
2.5
LOAD CURRENT(A)
FIGURE 5. EFFICIENCY vs LOAD CURRENT
VO(AC) AT 200mV/DIV
TIME AT1µs/DIV
FIGURE 7. OUTPUT RIPPLE (V IN = 6V, LOAD = 1.25A, 20MHz BW)
FIGURE 6. VOUT LOAD REGULATION
VO(AC) AT 200mV/DIV
TIME AT 1µs/DIV
FIGURE 8. OUTPUT RIPPLE (V IN = 12V, LOAD = 2.5A, 20MHz BW)
VO(AC) AT 200mV/DIV
VO AT 10V/DIV
VEN/SS AT 2V/DIV
ISTEP AT 500mA/DIV
PGOOD AT 5V/DIV
TIME AT 50ms/DIV
FIGURE 9. SOFT-START (C SS - 0.47µF, C DEL = 0.1µF)
4
TIME AT 1msec/DIV
FIGURE 10. LOAD TRANSIENT (VIN = 12V, LOADSTEP FROM 0.375A
TO 1.0A)
AN1760.2
August 7, 2012
Application Note 1760
Typical Performance Curves (Continued)
VO AT 20V/DIV
VO AT 20V/DIV
IL AT 5A/DIV
VEN/SS AT 2V/DIV
FIGURE 11. OVERCURRENT PROTECTION AT OVERLOAD WITH OUTPUT DISCONNECT (VBST IS THE OUTPUT BEFORE THE OUTPUT DISCONNECT
FET. VO IS THE OUTPUT AFTER THE DISCONNECT FET)
5
AN1760.2
August 7, 2012
Schematic
P16
1
1
2
2
2
2
2
C O10
12 0uF
1
1
32V @ 1.25A
R 20
50 K
C O8
1uF
GN D
1
U2
J 12
1
1
P13
10uF
C 22
R 19
1
C D EL
0.1u F
1
CO1
DN P
GND
C O5
DNP
1
VC C 5_2
2
2
C O6
DNP
2
1
EN/SS
C1 4
0.4 7uF
C O7
4 .7 uF
2
3
VOU T
C O4
1u F
2
Q6
BSC 100N 0 6LS
C O3
DNP
1
4 PVC C _2
1
1
1
5
P1 0
P GOOD
C O2
4.7u
C O9
12 0uF
2
C D EL
D1
SS5P6
1
PGOOD
2
1
2
P GN D
1
6
J 11
3
2
LGAT E
EN SS
2
7
0
1
C OM P
1
2
PH _Bs t
R 15
VOUT
GN D
2
PVC C
1
VOU T _Bst
2
PH ASE
FB
2
1
RT
1
2
U GAT E
R PG2
100K
1
8
BOOT
SGN D
1
P11
1
P2
1
2
2
3
2
1
1
EN SS2
PGOOD
1
1
9
ISEN
VIN
2
C 36 D N P
2
1
2
20
VC C 5
10
DN P
2
19
Cc
10nF
R7
20 K
17
C OM P2 1 8
1
Cp
18 0pF
16
F B_Bst
2
2
R T _Bst
R EF IN
GN D
R2 2
17 4K
R 21
2
N 1 6246 185
1
0
2
2
1
1
R 13
3.32K
1
R 24
2k
C5
2
2
1
1000pF
L3
ISEN
1
2
PH _ Bst
D N P, Optional F ootprint
AN1760.2
August 7, 2012
Disc laimer: THIS EVALUATIO N BOARD AND MATERIALS ARE PROVIDED ‘AS-IS’ FOR EVALUATION
PURP OSES ON LY. INTERSIL C ORPORAT ION AND ITS SUBSIDIARIES (‘I NTERSIL’) DISCLAIM ALL
WARR ANTIES, INCLUDING WITH OUT LIM ITATION FITNESS FOR A PARTIC ULAR PURPOSE AND
MERC HANTABI LITY. Intersil provid es the evaluation platform a nd design proposals to help
our custome rs to develop p roducts . However, factors beyond In tersil’s control, incl uding
with out lim itation compone nt vari ations, temperature changes and PCB layout, could
sign ificant ly affect Inter sil pro duct performance. It remains the customers'
resp onsibil ity to verify t he actu al circuit performance.
T it le
S ize
B
D a te:
ISL8130EVAL1Z Boost C onverter
D ocument N umber
< D oc>
T uesday, M ay 01, 2012
Sheet
1
of
Application Note 1760
1
R6
43.2K
OC SET
NC
R 12
1
15
DI SABL E
P15
1
1
14
1
EN ABLE
1
GN D
2
13
VC C 5_2
R EF OU T
1
C 21
0.1uF
J3
6V to 16 V
C IN 2
D NP
J 10
C sen
1000pF
R EF IN _Bst
2
12
VIN
CIN1
100u F
L2
10uH
1
1
11
2
CI N 4
DN P
ISE N
R se n
66 5
isl 81 30
VIN
2
C IN 3
10uF
1
2
R 16
100K
R EF OU T _B st
6
C 35
10uF
1
2
1
1
RC S
5m
1
R EF OUT
J9
VIN
2
1
1
VC C 5_2
1
2
1
J2
3
2
2
P12
I NT. REF
C 34
2.2uF
1
EXT . REF
P14
Ext. R EF
Application Note 1760
Bill of Materials
ITEM
QTY
REFERENCE
VALUE
DESCRIPTION
PART #
VENDOR
ESSENTIAL COMPONENTS
1
1
CIN1
100µF
Alum. CAP, 35V
AVE107M35F24T-F
CDE
2
1
CIN3
10µF
Ceramic CAP, X5R, 25V, sm1206
Generic
Generic
3
1
C14
0.47µF
Ceramic CAP, X5R, 16V, sm0603
Generic
Generic
4
2
C21, CDEL
0.1µF
Ceramic CAP, X5R, 50V, sm0603
Generic
Generic
5
2
C22, C35
10µF
Ceramic CAP, X5R, 10V, sm0805
Generic
Generic
6
1
C34
2.2µF
Ceramic CAP, X5R, 16V, sm0805
Generic
Generic
7
2
CO4, CO8
1µF
Ceramic CAP, X5R, 50V, sm0805
Generic
Generic
8
2
CO7, CO2
4.7µF
Ceramic CAP, X5R, 50V, sm1206
Generic
Generic
9
1
Cc
10nF
Ceramic CAP, NP0 or C0G, sm0603
Generic
Generic
10
2
C5, Csen
1000pF
Ceramic CAP, NP0 or C0G, sm0603
Generic
Generic
11
1
Cp
180pF
Ceramic CAP, NP0 or C0G, sm0603
Generic
Generic
12
2
CO9, CO10
120µF
Alum. Cap, 50V, Radial 8 X 8 X 15
EEU-FR1H121L
Panasonic ECG
13
1
D1
Schottky Diode, 60V
SS5P6
Vishay
14
1
L2
Inductor
DR127-100-R
Cooper
15
1
Q6
Single Channel NFET, 60V
BSC100N06LS
Infineon
16
1
RCS
5m
Precision RES, sm2010, 1W
PMR50HZPJU5L0
ROHM
17
2
RPG2, R16
100k
Resistor, sm0603, 10%
Generic
Generic
18
1
Rsen
665
Resistor, sm0603, 1%
Generic
Generic
19
1
R6
43.2k
Resistor, sm0603, 1%
Generic
Generic
20
1
R7
20k
Resistor, sm0603, 1%
Generic
Generic
21
1
R13
3.32k
Resistor, sm0603, 1%
Generic
Generic
22
2
R15, R21
0
Resistor, sm0603, 10%
Generic
Generic
23
1
R19
1
Resistor, sm0603, 10%
Generic
Generic
24
1
R20
51k
Resistor, sm0603, 10%
Generic
Generic
25
1
R22
174k
Resistor, sm0603, 1%
Generic
Generic
26
1
R24
2k
Resistor, sm0603, 10%
Generic
Generic
27
1
U2
PWM Controller, 20L QSOP
ISL8130IAZ
Intersil
10µH
EVALUATION BOARD HARDWARE
27
2
J10, 12
Banana Jack (Black)
111-0703-001
Emerson
28
2
J9, J11,
Banana Jack (Red)
111-0703-002
Emerson
29
2
J2, J3
1x3 Header
Generic
Generic
30
2
J2, J3
Connector Jumper
SPC02SYAN
Sullins
31
8
P2, P10, P11, P12, P13,
P14, P15, P16,
1514-2
Keystone
N/A
N/A
OPTIONAL COMPONENTs
32
CIN2, CIN4, CO3, CO6,
CO1, CO5, C36, L3, R12
7
DO NOT POPULATE
N/A
AN1760.2
August 7, 2012
Application Note 1760
ISL8130EV1Z PCB Layout
ISL8130EV1Z
FIGURE 12. TOP SILKSCREEN
FIGURE 13. TOP LAYER
FIGURE 14. BOTTOM SILKSCREEN
FIGURE 15. BOTTOM LAYER
Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is
cautioned to verify that the Application Note or Technical Brief is current before proceeding.
For information regarding Intersil Corporation and its products, see www.intersil.com
8
AN1760.2
August 7, 2012