LINEAR TECHNOLOGY MAY 1996 IN THIS ISSUE . . . COVER ARTICLE LT®1307 Micropower DC/DC Converter Eliminates Electrolytic Capacitors ............ 1 Steve Pietkiewicz Issue Highlights ...................... 2 LTC in the News ....................... 2 DESIGN FEATURES The LT1210: A 1-Ampere, 35MHz Current Feedback Amplifier .... 6 William Jett and Mitchell Lee The LT1207: An Elegant Dual 60MHz, 250mA Current Feedback Amplifier ................................. 9 Kevin R. Hoskins The LTC®1400: World’s Smallest 400ksps 12-Bit ADC Has It All! .............................................. 14 Kevin R. Hoskins and William C. Rempfer Ultralow Power Comparators Include Reference .................. 19 James Herr LT1462, LT1463, LT1464 and LT1465: Micropower Dual and Quad JFET Op Amps Feature C-Load™ Capability and Pico Ampere Input Bias Currents .............................................. 21 Alexander Strong Selection Criteria for CCFL Circuits ........................ 24 Jim Williams LTC1454/54L and LTC1458/58L: Dual and Quad 12-Bit, Rail-to-Rail, Micropower DACs ................... 29 Hassan Malik and Jim Brubaker DESIGN INFORMATION LTC1538-AUX: a New Addition to LTC’s Adaptive Power™ Controller Family .................. 33 Steve Hobrecht DESIGN IDEAS ......................................... 35–41 (complete list on page 35) New Device Cameos ................ 42 Design Tools .......................... 44 VOLUME VI NUMBER 2 LT1307 Micropower DC/DC Converter Eliminates Electrolytic by Steve Pietkiewicz Capacitors The relentless push towards increasing miniaturization in portable electronic products has created the need for small, high speed, low voltage DC/DC converter ICs. Recent incorporation of wireless communications capability in these products imposes new restrictions on DC/DC converter oscillator frequency. Most DC/DC converter ICs presently available use some form of variable frequency control to achieve acceptable efficiency during periods of light load. Often, this variable frequency can cause significant spectral energy to occur in the sensitive 455kHz band, creating difficult interference problems with the system IF amplifier. The pulse-skipping regulation used by these devices produces large ripple currents, and therefore requires high value capacitors to reduce output ripple voltage. To best meet the demands of today’s product designers, the DC/DC converter IC must possess three attributes: small, low cost ceramic capacitors for both input and output and by employing fixed frequency 575kHz switching to keep spectral energy out of the 455kHz band. Dense, high speed bipolar process technology enables the LT1307 to fit in the MSOP package, and micropower circuitry results in just 60µA quiescent current at no load. Conversion efficiency exceeds 80%, and the device also includes a low battery detector. The LT1307 is the only DC/DC converter IC that can start and run while powering a 3.3V, 75mA or 5V, 40mA load from a depleted (1.0V) cell. Operation The LT1307 combines a currentmode, fixed frequency PWM architecture with Burst Mode™ micropower operation to maintain high efficiency at light loads. Operation can best be understood by referring to the block diagram in Figure 1. Q1 and Q2 form a bandgap reference core whose loop is closed ❏ Low voltage micropower around the output of the converter. operation to extend battery life When VIN is 1.0V, the feedback volt❏ High frequency switching to age of 1.22V, along with an 80mV reduce the physical size of drop across R1 and R2, forward biassociated components ases Q1 and Q2’s base-collector ❏ Fixed-frequency operation junctions to 300mV. Because this is outside the 455kHz band not enough to saturate either transisThe LT1307 micropower current tor, FB can be at a higher voltage than mode PWM switching regulator ful- VIN. When there is no load, FB rises fills these requirements by using continued on page 3 , LTC and LT are registered trademarks of Linear Technology Corporation. Adaptive Power, C-Load and Burst Mode are trademarks of Linear Technology Corporation. EDITOR'S PAGE Issue Highlights The May issue of Linear Technology, our longest ever, features a host of exciting new LTC products. This month’s lead article debuts the LT1307, a micropower, fixed frequency DC/DC converter that minimizes interference in the sensitive 455kHz band, and can start and run while powering a 3.3V/75mA or 5V/40mA load from a depleted cell. Also in the power department, we introduce the LTC1538-AUX and LTC1539, new additions to the family of Adaptive Power controller devices first introduced in the February issue. Both of these products include two controllers: one programmable to 3.3V or 5V using an internal resistive divider, and a second that can control an adjustable regulator capable of output voltages of 1.19V to 10V, determined by an external divider. They also feature an auxiliary linear regulator controller that can also serve as a simple voltage comparator. Several amplifiers are featured in this issue. The LT1210 is a 1A, 35MHz CFA that operates on ±5V to ±15V supplies and delivers slew rates from 200V/µs to 1000V/µs, depending on the supply voltage and configuration. Its combination of high slew rate, 1A output and ±15V operation allows the LT1210 to deliver significant power at frequencies in the 1MHz–10MHz range. The LT1207, a dual 60MHz 250mA CFA, also operates on ±5V to ±15V supplies and includes optional external compensation for driving capacitive loads. The LT1462/LT1464 and LT1463/LT1465 are dual and quad versions, respectively, of the first micropower JFET op amps to offer pico ampere input bias currents and unity-gain stability with capacitive loads up to 10nF. Data converters are also represented in this issue. The LTC1400 is a complete 400ksps 12-bit serial ADC 2 LTC in the News... Linear Technology Reports Record Sales and Earnings but Raises Caution on Subsequent Quarter’s Growth Net sales for our third quarter, which ended March 31, 1996, were a record $104,710,000, an increase of 54% over net sales of $68,135,000 for the third quarter of the previous year. The company also reported record net income for the quarter of $37,764,000 or $0.48 per share, an increase of 73% over $21,805,000 or $0.28 per share, reported for the third quarter of last year. A cash dividend of $0.04 will be paid on May 15, 1996 to shareholders of record on April 26, 1996. According to Robert H. Swanson, President and CEO, “We achieved outstanding financial results as our sales and profits reached record levels. However, our new business booked did not accelerate at the end of the quarter as we had planned. The semiconductor industry overall has experienced a turndown in demand and we also are being impacted by this,” Swanson said. “If this climate continues, our quarterly sales and profits will slip backwards moderately from levels reported above. Fundamentally, our market has excellent prospects and the company continues to introduce leading edge products and prudently in a space-saving SO-8 package. Its typical power dissipation at 400ksps is just 60mW; this is further reduced by power-saving Nap and Sleep modes. The LTC1454/LTC1454L are dual 12bit single-supply, rail-to-rail DACs. These parts feature an easy-to-use SPI compatible interface and each DAC has its own rail-to-rail voltage output buffer amplifier. The LTC1458/ LTC1458L are quad versions of this family. build infrastructure to solidify its position as a leader in the field.” Looking at last year as an indicator of future trends, the San Jose Mercury News said in its Business Monday section on April 15, “A review of the 10 companies that registered the highest profitability—measured in terms of income as a percentage of sales—shows who’s tops when it comes to bottom line performance. ...The true top performer in this important category was Milpitas-based Linear Technology Corp., the leader in the analog integrated circuit market....” “It was one for the books,” said the editors of Business Week magazine in the March 25 issue. “In 1995, America’s most valuable companies grew even more valuable—by an astonishing 35%.” Linear Technology Corp. not only churned out record earnings in ’95, but moved up significantly in the rankings of The Business Week 1,000, a list ranking companies by market capitalization. LTC sprinted up through the pack, now ranking near the upper third as 352nd most valuable company, up from 557th in 1994 and well above such companies as AMD (573rd), Analog Devices (390th), Cypress Semiconductor (916th), Maxim (539th), National Semiconductor Corp. (600th) and Xilinx (445th). Also in this issue is an extensive discussion of circuitry for driving cold cathode fluorescent lamps (CCFLs) used for backlighting LCD displays. LTC has been at the forefront of research in this discipline. We conclude with a selection of Design Ideas, and a selection of New Device Cameos highlighting forthcoming LTC parts. As always, we welcome reader feedback. Please let us know how Linear Technology magazine can better serve you. Linear Technology Magazine • May 1996 DESIGN FEATURES 90 VIN 6 VIN R2 40k + gm Q1 Q2 × 10 3 SHUTDOWN 1 – FB 2 LBI ERROR AMPLIFIER + + 7 LBO 8 ENABLE – BIAS R3 30k A1 R4 140k – 200mV + Σ + R Q3 Q + A=3 575kHz OSCILLATOR 0.15Ω – 4 GND Figure 1. LT1307 block diagram LT1307, continued from page 1 Low frequency ripple voltage appears at the output. The ripple frequency is dependent on load current and output capacitance. This Burst Mode operation keeps the output regulated and reduces average current into the IC, resulting in high efficiency even at load currents of 100µA or less. If the output load increases sufficiently, A1’s output remains high, resulting in continuous operation. When the LT1307 is running continuously, peak switch current is controlled by VC to regulate the output voltage. The switch is turned on at the beginning of each switch cycle. When the summation of a signal repL1 10µH C1 1µF 1.5V CELL SHUTDOWN VIN LBI D1 SW FB LT1307 SHDN LBO GND VC R3 100k C3 680pF R1 1.02M 1% R2 604k 1% 3.3V 75mA C2 10µF C1 = MURATA-ERIE GRM235Y5V105Z01 MARCON THCS50E1E105Z TOKIN 1E105ZY5U-C103-F C2 = MURATA-ERIE GRM235Y5V106Z01 MARCON THCS50E1E105Z TOKIN 1E106ZY5U-C304-F D1 = MOTOROLA MBR0520L L1 = SUMIDA CD43-100 Figure 2. Single cell to 3.3V boost converter delivers 75mA at 1.0V input. Changing R1 to 1.87M moves the output voltage to 5V. Linear Technology Magazine • May 1996 VIN = 1.5V 1 10 LOAD CURRENT (mA) 100 300 Figure 3. 3.3V efficiency S A2 slightly above 1.22V, causing VC (the error amplifier’s output) to decrease. When VC reaches the bias voltage on hysteretic comparator A1, A1’s output goes low, turning off all circuitry except the input stage, error amplifier and low battery detector. Total current consumption in this state is 60µA. As output loading causes the FB voltage to decrease, A1’s output goes high, enabling the rest of the IC. Switch current is limited to approximately 100mA initially after A1’s output goes high. If the load is light, the output voltage (and FB voltage) will increase until A1’s output goes low, turning off the rest of the LT1307. VIN = 1.25V 50 0.1 5 DRIVER FF + VIN = 1.00V 60 SW – 70 A4 COMPARATOR RAMP GENERATOR 80 SHDN VC EFFICIENCY (%) R1 40k resenting switch current and a ramp generator (introduced to avoid subharmonic oscillations at duty factors greater than 50%) exceeds the VC signal, comparator A2 changes state, resetting the flip-flop and turning off the switch. Output voltage increases as switch current is increased. The output, attenuated by a resistor divider, appears at the FB pin, closing the overall loop. Frequency compensation is provided by an external series RC network connected between the VC pin and ground. Low-battery detector A4’s open-collector output (LBO) pulls low when the LBI pin voltage drops below 200mV. There is no hysteresis in A4, allowing it to be used as an amplifier in some applications. The entire device is disabled when the SHDN pin is brought low. To enable the converter, SHDN must be at VIN or at a higher voltage. Single-Cell Boost Converter A complete single-cell to 3.3V converter is shown in Figure 2. The circuit generates 3.3V at up to 75mA from a 1.0V input. The 10µF ceramic output capacitor can be obtained from several vendors. Efficiency, detailed in Figure 3, peaks at 80% and exceeds 70% over the 1:500 load range of 200µA to 100mA at a 1.25V input. Changing the value of R1 to 1.87MΩ moves the output to 5V. Efficiency of the 5V output converter is depicted in Figure 4. Figure 5’s oscillograph shows output voltage and inductor current as the load current is stepped from 5mA to 55mA, revealing substantial detail about the operation of the 3 DESIGN FEATURES 90 VIN = 1.00V VIN = 1.25V VIN = 1.5V 60 50 0.1 VIN = 1.25V 500µs/DIV Figure 5. Transient response with 5mA to 55mA load step 10 1 LOAD CURRENT (mA) 100 200 Figure 4. Efficiency at 5V output LT1307. With a 5mA load, VOUT (top trace) exhibits a ripple voltage of 60mV at 4kHz. The device is in Burst Mode at this output current level. Burst Mode operation enables the converter to maintain high efficiency at light loads by turning off all circuitry inside the LT1307 except the reference and error amplifier. When the LT1307 is not switching, quiescent current decreases to 60µA. When switching, inductor current (middle trace) is limited to approximately 100mA. Switching frequency inside the “bursts” is 575kHz. As the load is stepped to 55mA, the device shifts from Burst Mode to constant switching mode. Inductor current increases to about 300mA peak and the low frequency Burst Mode ripple goes away. R3 and C3 stabilize the loop. DC/DC Converter Noise Considerations Switching regulator noise is a significant concern in many communications systems. The LT1307 is designed to keep noise energy out of the 455kHz band at all load levels while consuming only 60µW–100µW at no load. At light load levels, the device is in Burst Mode, causing low frequency ripple to appear at the output. Figure 6 details spectral noise directly at the output of Figure 1’s circuit in a 1kHz to 1MHz bandwidth. The converter supplies a 5mA load from a 1.25V input. The Burst Mode fundamental at 5.1kHz and its harmonics are quite evident, as is the 575kHz switching frequency. Note, however, the absence of significant 4 ILOAD 55mA 5mA RBW = 100Hz 30 20 10 0 –10 –20 –30 –40 –50 –60 energy at 455kHz. Figure 7’s plot reduces the frequency span from 255kHz to 655kHz with a 455kHz center. Burst Mode low frequency ripple creates sidebands around the 575kHz switching fundamental. These sidebands have low signal amplitude at 455kHz, measuring –55dBmVRMS. As load current is further reduced, the Burst Mode frequency decreases. This spaces the sidebands around the switching frequency closer together, moving spectral energy further away from 455kHz. Figure 8 shows the noise spectrum of the converter with the load increased to 20mA. The LT1307 shifts out of Burst Mode, eliminating low frequency ripple. Spectral energy is present only at the switching fundamental and its harmonics. Noise voltage measures –5dBmV RMS or 560µVRMS at the 575kHz switching frequency, and is below –60dBmVRMS for all other frequencies in the range. By combining Burst Mode with fixed frequency operation, the LT1307 keeps noise away from 455kHz, making the device ideal for RF applications where the absence of noise in the this band is critical. Output filtering can reduce output conducted noise. Figure 2’s circuit, supplying a 50mA load at 3.3V from a 1.3V source, is shown with an output filter (R4 and C4) in Figure 9. The lowpass filter created by R4 and C4 places a pole at 34kHz, reducing high frequency spikes considerably. Viewed in a 50MHz bandwidth, the filter reduces switching spikes from about 10mVP–P to about 1mVP–P, as detailed in Figure 10. Beware, though; the oscilloscope used in Figure 10’s oscillograph (a Tektronix Type 547) is helping with the filtering by attenuating frequencies above 50MHz. Figure 1 10 100 FREQUENCY (kHz) 1000 Figure 6. Spectral noise plot of 3.3V converter delivering 5mA load. Burst Mode fundamental at 5.1kHz is 23dBmVRMS or 14mVRMS. –20 OUTPUT NOISE VOLTAGE (dBmVRMS) 70 IL 200mA/DIV –25 RBW = 100Hz –30 –35 –40 –45 –50 –55 –60 –65 –70 255 455 FREQUENCY (kHz) 655 Figure 7. Span centered at 455kHz shows –55dBmVRMS (1.8µVRMS) at 455kHz. Burst Mode creates sidebands 5.1kHz apart around the switching frequency fundamental of 575kHz. 0 OUTPUT NOISE VOLTAGE (dBmVRMS) EFFICIENCY (%) 80 OUTPUT NOISE VOLTAGE (dBmVRMS) 40 VOUT 200mV/DIV AC COUPLED RBW = 100Hz –10 –20 –30 –40 –50 –60 –70 –80 –90 –100 255 455 FREQUENCY (kHz) 655 Figure 8. With converter delivering 20mA, low frequency sidebands disappear. Noise is present only at the 575kHz switching frequency. 11 shows the same circuit viewed on a 400MHz oscilloscope. The filter still attenuates but the magnitude of switching noise is far higher (140mVP–P unattenuated). A small amount of copper trace can be used in Linear Technology Magazine • May 1996 DESIGN FEATURES L1 10µH D1 VOUT1 VIN R2 1.02M 1% SW VLBI 100mV/DIV R4 4.7Ω VOUT2 FB LT1307 1.5V CELL C1 1µF ISW 100mA/DIV GND VC R1 100k R3 604k 1% VSHUTDOWN ON OFF C4 1µF C2 10µF 50µs/DIV Figure 13. Start-up response of LED circuit. Many switching cycles elapse before current flows in LEDs because of C1 charging. C3 680pF Figure 9. Figure 2's circuit with output filter R4/C4 place of the resistor if the attendant voltage drop is unacceptable. A surprisingly small amount of trace is needed to create an effective filter; a PC trace of 1 oz. copper, 1 inch long by 10 mils wide, has an inductance of 29nH. Inductive reactance at 50MHz (2πfL) is 9.1Ω. A combination of copper trace and 0.1µF ceramic capacitors will reduce high frequency spikes to acceptable levels in most systems. LED Driver LEDs require current source drive. Typically, a 5V supply with a series resistor to limit current is used to power the LED. Although simple, this VOUT1 5mV/DIV AC COUPLED VOUT2 5mV/DIV AC COUPLED VIN = 1.3V cuit draws a only few microamperes. Start-up sequencing is detailed in Figure 13. The voltage at LBI stabilizes in about 200µs with minimal overshoot and ringing. The Lumex “Mega-Brite” red LEDs specified in Figure 12 provide enough light to act as a flashlight, providing young children with a high technology toy. Mounted on a small PC board with a push-button switch, the circuit entertained my two children for hours. They are both satisfied LT1307 customers. approach has poor efficiency and requires a voltage source higher than the 2V–3V forward drop of most LEDs. Additionally, each LED requires its own ballast resistor. Figure 12’s circuit uses the LT1307 configured as a current source to drive a series-connected pair of LEDs from a single-cell input. The IC’s low battery detector monitors the voltage across sense resistor R1. LBO drives Q1, necessary to provide correct phasing to the VC pin. Q1 and R2 drive the VC pin, overriding the internal error amplifier. With 200mV across R1, 25mA flows through the LED pair. C3 provides frequency compensation. For proper operation, the circuit must always supply enough power so as to not enter Burst Mode operation. This precludes driving most single LEDs (high brightness blue LEDs have a forward drop of 3.4V and can be driven singly). In shutdown mode, the cir- Conclusion As portable devices become smaller and add more features, space-efficient DC/DC converters become more important. The LT1307, with its combination of micropower operation from a single cell (1.0V), constant-frequency switching and the ability to use small external components, delivers the performance required in today’s products. 200ns/DIV Figure 10. VOUT1 is output voltage at 10µF capacitor C2; VOUT2 is after 4.7Ω/1µF output filter. Circuit supplies 50mA; oscilloscope bandwidth is 50MHz. L1 10µH VIN 100k AA CELL Q1 2N3906 SW LB0 FB + NC LT1307 D3 LBI SHDN C3 22µF R2 22k VOUT2 5mV/DIV AC COUPLED D2 VIN VC C2 1µF VOUT1 50mV/DIV AC COUPLED D1 R1 8Ω GND C1 1µF 100k ON/OFF VIN = 1.3V 200ns/DIV Figure 11. A faster oscilloscope shows more high frequency content at both outputs. Scope bandwidth is 400MHz. Linear Technology Magazine • May 1996 L1 =MURATA-ERIE LQH3C100K04 D1 =MOTOROLA MBR0520L VIN C1, C2 =CERAMIC D2, D3 =LUMEX SSL-X100133SRC/4 "MEGA-BRITE" RED LED OR PANASONIC LNG992CF9 HIGH BRIGHTNESS BLUE LED Figure 12. Single-cell LED driver supplies 25mA to LED string. Two red LEDs can be replaced by one blue LED. 5 DESIGN FEATURES The LT1210: A 1-Ampere, 35MHz Current Feedback Amplifier by William Jett and Mitchell Lee Introduction The LT1210 current feedback amplifier extends Linear Technology’s high speed driver solutions to the 1 ampere level. The device combines a 35MHz bandwidth with a guaranteed 1A output current, operation with ±5V to ±15V supplies and optional compensation for capacitive loads, making it well suited for driving low impedance loads. Short circuit protection and thermal shutdown ensure the device’s ruggedness. A shutdown feature allows the device to be switched into a high impedance, low current mode, reducing dissipation when the device is not in use. The LT1210 is available in the 7-pin TO220 package, the 7-pin DD surface mount package and the 16-pin SO16 surface mount package. High Output Current As with other LTC high speed amplifiers, the LT1210 sports a high slew rate, ranging from 200V/µs to 1000V/ µs depending on the supply voltage and the configuration. The combination of high slew rate, 1A output drive and ±15V operation enables the device to deliver significant power at frequencies in the 1–10MHz range. For example, at 2MHz, the device will swing ±10V into a 10Ω load, supplying 5W (+37dBm) to the load. Figure 1 shows the LT1210 configured for a gain of 4, driving a 10Ω load to 5W. A plot of the large signal performance for this circuit is shown in Figure 2. The –3dB point is approximately 18MHz. High output current allows the LT1210 to slew considerable capacitances at high rates. Although the LT1210 is capable of slewing 1V/ns in the fastest configuration, the slew rate driving large capacitive loads is determined by the available output current. The large signal behavior with CL = 10nF is shown in Figure 3. The slew rate is limited to about 150V/µs, determined by the current limit of 1.5A. 15V 1µF INPUT 5VPP 100nF + Power Supply Considerations There is no test more demanding of a power supply than to draw 1A current peaks at a high frequency, and that’s just what the LT1210 will do. The inherent output impedance of most supplies is low at frequencies of up to a few kilohertz, and from there the output bypass capacitors take over. But at high frequencies capacitor ESR and wiring inductance dominate the supply impedance. In order to obtain maximum output and minimum distortion from the LT1210, it is necessary to bypass the power supply rails at the chip. With the LT1210’s output stage pouring 1A current peaks into the load, 1Ω of capacitor ESR will cause an apparent droop of 1V, and equates to a 1dB loss of output power. Surface mount tantalum and ceramic capacitors make excellent low ESR bypass elements. For frequencies above 100kHz, use 1µF and 100nF ceramic capacitors close to the chip. If significant power must be delivered below 100kHz, capacitive reactance becomes a limiting factor. Larger ceramic or tantalum capacitors, such as 4.7µF, are recommended in place of the 1µF unit mentioned above. At very low frequencies, the net output impedance of the power 18 OFF SHUTDOWN ON RL = 10Ω, 10W 10nF 1µF –15V 100nF 680Ω 220Ω LARGE-SIGNAL VOLTAGE GAIN (dB) LT1210 – 15 12 9 6 3 0 103 Figure 1. Test circuit for measuring large-signal voltage gain. With 1 ampere current peaks delivered to the load, low ESR bypassing is mandatory. Surface mount ceramic capacitors are recommended. 6 AV = 4, RL = 10Ω RF = 680Ω, RG = 220Ω VS = ±15, VIN = 5VPP 104 105 106 FREQUENCY (Hz) 107 108 Figure 2. The large-signal performance is flat to 10MHz. Linear Technology Magazine • May 1996 DESIGN FEATURES AV = –1, RF = RG = 750Ω, VS = ±15V, RL = 10Ω, IQ = 36mA, 18mA, 9mA AV = +2, RF = RG = 750Ω, VS = ±15V, RL = 10Ω, IQ = 36mA, 18mA, 9mA Figure 3. LT1210 large-signal response, CL = 10,000pF Figure 4. LT1210 large-signal response versus IQ, AV = –1 Figure 5. LT1210 large-signal response versus IQ, AV = +2 supply and its reservoir capacitors will usually suffice to deliver high peak currents. Inadequate bypassing is evidenced by reduced output swing and “distorted” clipping effects when the amplifier is overdriven. When prototyping, always inspect the supply rails and look for ripple directly related to the output waveform. Significant supply modulation is the mark of poor bypassing. gauge, telephone-grade twisted pair wiring. The 1:3 transformer ratio allows just over 1W to reach the twisted pair at full output. Resistor RT acts as a primary side back-termination. The overall frequency response is flat to within 1dB from 500Hz to 2MHz. Distortion products at 1MHz are below –70dBc at a total output power of 560mW (load plus termination), rising to –56dBc at 2.25W. On a ±15V supply, a maximum output power of 5W is available when a 10Ω load is presented to the LT1210. With the transformer shown in Figure 6, a total load impedance of approximately 22Ω limits the output to 2.25W. Bridging allows nearly maxi- AV = +2, RF = RG = 3.6kΩ, VS = ±15V, CL = 10,000pF Shutdown and Quiescent Current Control The shutdown pin on the LT1210 provides a dual function; it can be used to shut off the device completely, reducing the quiescent current to typically less than 100µA and forcing the output stage into a high impedance state, or it can be used to control the quiescent current in the active mode. For lower frequency applications where the full bandwidth and slew rate of the device are not required, the quiescent current can be reduced by inserting a resistor in series with the shutdown pin. Figures 4 and 5 show the effect of reducing the quiescent supply current on large-signal response. The photos show that a full 20VP–P output swing is obtained in all cases, although the noninverting slew rate decreases as the supply current is reduced. Twisted Pair Driver Figure 6 shows a transformer-coupled application of the LT1210 driving a 100Ω twisted pair. This surge impedance is typical of PVC-insulated, 24 Linear Technology Magazine • May 1996 15V + 4.7µF* INPUT 100nF RT 11Ω, 2.5W + LT1210 T1 – 1 + 4.7µF* 3 RL = 100Ω, 2.5W 100nF 845Ω –15V *TANTALUM T1 = MIDCOM 671-7783 OR EQUIVALENT 274Ω Figure 6. Twisted pair is easily driven for applications such as ADSL. Voltage gain is about 12. 5VP–P input corresponds to full output. 15V INPUT 5.6Ω 2.5W + LT1210 – 680Ω T1 220Ω – 1 3 RL = 100Ω, 5W 910Ω LT1210 + 5.6Ω 2.5W T1 = MIDCOM 671-7783 OR EQUIVALENT –15V Figure 7. In a bridge configuration, the LT1210 can deliver almost 5W to a twisted pair (and another 5W to the back termination). 7 DESIGN FEATURES RT = 50Ω, 2.5W T1 T1 RL = 50Ω, 4W RL = 50Ω, 2.5W 15V INPUT 5VPP 15V + 1µF INPUT 5VPP LT1210 – + 330nF LT1210 10nF – 10nF –15V –15V 680Ω 680Ω 220Ω 220Ω T1 = COILTRONICS VERSA-PAC CTX-01-13033-X2 T1 = COILTRONICS VERSA-PAC CTX-01-13033-X2 Figure 8. Matched to a 50Ω load with a balun-mode transformer, this circuit delivers a measured 35.6dBm (almost 4W). Full-power band limits are 15kHz to slightly over 10MHz. mum output power to be delivered into standard 1:3 data communications transformers. Figure 7 shows a bridged application with two LT1210s, delivering approximately 9W maximum into the load and termination. At first glance the resistor values would suggest a gain imbalance between the inverting and noninverting sides of the bridge. On close inspection, however, it is apparent that both sides operate at a closed loop gain of 4 relative to the input signal. This ensures symmetric swing and maximum undistorted output. Matching 50Ω Systems Few practical systems exhibit a 10Ω impedance, so a matching transformer is necessary for applications Figure 9. Wide bandwidth can be obtained with even higher impedance transformations. Here, a 1:3 step-up matches 100Ω and develops nearly 4.5W. A measured +33dBm reaches the 50Ω load. Full-power band limits are 80kHz to 18MHz. driving other loads, such as 50Ω. Multifilar winding techniques exhibit the best high frequency characteristics. Suitable off-the-shelf components are available, such as the Coiltronics Versa-Pac™ series. These are hexafilar wound and give power bandwidths in excess of 10MHz. One disadvantage is that using a limited number of 1:1 windings makes it impossible to exactly transform 50Ω to the optimum 10Ω load. Nevertheless, there are several useful connections. In Figure 8 the windings are configured for a 2:4 step-up, reflecting 12.5Ω into the LT1210. The circuit exhibits 18dB gain and drives 50Ω to nearly +36dBm. The large-signal, low frequency response is limited by the 15V INPUT 5VP–P + LT1210 – T1 10nF RL = 50Ω, 9W 680Ω 100nF 220Ω – 910Ω LT1210 + 10nF –15V T1 = CTX-01-13033-X2 VERSA-PAC Figure 10. In this bridge amplifier, the LT1210 delivers +39.5dBm (9W) to a 50Ω load. Power band limits range from 40kHz to 14.5MHz. The sixth, otherwise-unused winding is connected in parallel with one secondary winding to avoid parasitic effects arising from a floating winding. 8 magnetizing inductance of the transformer to about 15kHz. The high frequency response is limited to 10MHz by the stack of four secondary windings. Reconfiguring the transformer windings allows double termination at full power (Figure 9). Here the transformer reflects 11.1Ω and the amplifier delivers over +33dBm to the load. Paralleled input windings limit the low frequency response to 80kHz, but fewer series secondary windings extend the high frequency corner to 18MHz. The coupling capacitor shown in these examples is added to block current flow through the transformer primary, arising from amplifier offsets. The capacitor value is based on setting XC equal to the reflected load impedance at the frequency where XL of the primary is also equal to the reflected load. This isolates the amplifier from a low impedance short at frequencies below transformer cutoff. In applications where a termination resistor is positioned between the LT1210 amplifier and the transformer, no coupling capacitor is necessary. Note that a low frequency signal, well below the transformer’s cutoff frequency, could result in high dissipation in the termination resistor. Another useful connection for the Versa-Pac transformer is shown in Figure 10. A 2:3 transformation continued on page 13 Versa-Pac is a trademark of Coiltronics, Inc. Linear Technology Magazine • May 1996 DESIGN FEATURES The LT1207: An Elegant Dual 60MHz, 250mA Current Feedback Amplifier by Kevin R. Hoskins Introduction The LT1207 is a dual version of Linear Technology’s LT1206 current feedback amplifier. Each amplifier has 60MHz bandwidth, guaranteed 250mA output current, operates on ±5V to ±15V supply voltages and offers optional external compensation for driving capacitive loads. These features and capabilities combine to make it well suited for such difficult applications as driving cable loads, wide-bandwidth video and high speed digital communication. The LT1207 includes a power-saving shutdown mode that reduces supply current to less than 100µA and places the output in a high impedance state. The amplifiers also feature short-circuit and thermal protection. The LT1207 is packaged in a fused-lead SO-16 package. Differential HDSL Transformer Driver LT1088 Differential Front End Figure 1 shows a differential in/out HDSL (transformer) driver using one LT1207 dual amplifier. The LT1207 is configured for a gain of ten and is able to easily drive the nominal 35Ω impedance to 10VP–P. The output signal amplitude remains flat over an 8MHz bandwidth, suitable for HDSL. A major benefit of differential operation is even-order -distortion cancellation, which helps ensure signal integrity. Additionally, the differential operation achieves better performance than single-ended drive circuits. This circuit can be used with HDSL-specific DSPs and DACs that have differential outputs. Using thermal conversion, the LT1088 wideband RMS/DC converter is an effective solution for applications such as RMS voltmeters, wideband AGC, RF leveling loops and high frequency noise measurements. Its thermal conversion method achieves vastly wider bandwidth than any other approach. It can handle input signals that have a 300MHz bandwidth and a crest factor of at least 40:1. The thermal technique employed relies on first principles: a wave form’s RMS value is defined as its heating value in a load. Another characteristic of the LT1088 is its low impedance inputs (50Ω and 250Ω), common to thermal converters. Though this low impedance represents a difficult load to most drive circuits, the LT1207 can handle it with ease. Featuring high input impedance and overload protection, the differential input, wideband thermal RMS/ DC converter in Figure 2 performs true RMS/DC conversion over a 0Hz to 10MHz bandwidth with less than 1% error, independent of input-signal wave shape. The circuit consists of a wideband input amplifier, RMS/ DC converter and overload protection.1 The LT1207 provides high input impedance, gain and output current capability necessary to drive the LT1088’s input heater. The 5k/24pF network across the LT1207’s 180Ω gain-set resistor is used to adjust a slight peaking characteristic at high frequencies, ensuring 1% flatness at 10MHz. The converter uses matched pairs of heaters and diodes and a control amplifier. R1 produces heat when the LT1207 drives it differentially. This heat lowers D1’s voltage. Differentially connected A3 responds by driving R2, heating D2 and closing the loop. A3’s DC output directly re- 5V + 0.1µF 3 4 2 + 1 16 1/2 LT1207 – 4.7µF 68.1Ω 15 511Ω 14 L1* 7 –5V FROM TRANSMIT 192kHz LOWPASS FILTER 0.1µF + 4.7µF 2 113Ω 5V + 0.1µF 6 8 4 4.7µF 9 6 7 5 + 8 9 1/2 LT1207 – 511Ω 68.1Ω 12 11 *MIDCOM 671-7108 –5V 0.1µF + 4.7µF Figure 1. High performance LT1207 differential HDSL transformer driver Linear Technology Magazine • May 1996 9 DESIGN FEATURES 0.022µF 1.5M 1k 3300pF 9.09M 15V 0.1µF 10µF 500Ω 2.7k 0.1µF 2.7k 1k 3 + LT1004 1.2V 15V + 5V 1,16 A1 1/2 2 LT1207 – 14 2 1k 3 15 4 0.01µF 8 A3 1/2 LT1078 – 1 1k Q1 2N2219 + 9.09M 0.1µF 12 10µF 3 250Ω 250Ω R1 R2 3k 10 + –5V 806Ω 5 D1 180Ω VIN 5k 5 LT1088 24pF 10MHz TRIM D2 6 + A4 1/2 LT1078 – 4 7 7 0.1µF VOUT 10k –15V 10µF –15V + 5V 14 0.1µF 0.1µF 5 806Ω 1 8,9 A2 12 1/2 7 6 LT1207 + 11 0.1µF 13 6 8 10k – 0.1µF 3 10µF + –5V 15V 15V 2 8 A5 1/2 LT1018 + 1 – 1k 1N914 15V 510k 6 + A6 1/2 5 LT1018 – 4 0.1µF 15V 2k 7 12k 15V 0.1µF 15V 10k LT1004 1.2V 4.7k –15V 10k Figure 2. Differential input 10MHz RMS/DC converter has 1% accuracy, high input impedance and overload protection. lates to the input signal’s RMS value, regardless of input frequency or wave shape. A4’s gain trim compensates residual LT1088 mismatches. The RC network around A3 frequency compensates the loop, ensuring good settling time. The LT1088 can suffer damage if the 250Ω input is driven beyond 9VRMS at 100% duty cycle. An easy remedy to this possibility is to reduce the driver supply voltage. This, however, sacrifices crest factor. Instead, a means of overload protection is included. The LT1018 monitors D1’s anode voltage. Should this voltage 10 become abnormally low, A5’s output goes low and pulls A6’s input low. This causes A6’s output to go high, shutting down the LT1207 and eliminating the overload condition. The RC network on A6’s input delays the LT1207’s reactivation. If the overload condition remains, shutdown is reinstated. This oscillatory action continues, protecting the LT1088 until the overload is corrected. The RMS/DC circuit’s 1% error bandwidth and CMRR performance are shown in Figures 3 and 4, respectively. CCD Clock Driver Charge-coupled-devices (CCDs) are used in many imaging applications, such as surveillance, hand-held and desktop computer video cameras, and document scanners. Using a “bucketbrigade,” CCDs require a precise multiphase clock signal to initiate the transfer of light-generated pixel charge from one charge reservoir to the next. Noise, ringing or overshoot on the clock signal must be avoided, since they introduce errors into the CCD output signal. These errors cause aberrations and perturbations in a displayed or printed image. Linear Technology Magazine • May 1996 DESIGN FEATURES 1.0 A ERROR (%) 0.5 0 B –0.5 –1.0 0 2 4 6 8 10 FREQUENCY (MHz) 12 14 Figure 3. Error plot for the differential-input RMS/DC converter. Gain boost at A2 preserves 1% accuracy but causes slight peaking before roll-off. Boost can be set for maximum bandwidth (A) or minimum error (B). have an input capacitance that varies over a range of 100pF to 2000pF and varies directly with the number of sensing elements (pixels). This presents a high capacitive load to the clock-drive circuitry. Second, CCDs typically require a clock signal whose magnitude is greater than the output capabilities of 5V interfaces and control circuitry. An amplifying filter built around the LT1207 will meet both challenges. Controlling clock signal rise and fall times is one way to avoid ringing or overshoot. This is done by conditioning the clock signal with a nonringing Gaussian filter. The circuit shown in Figure 5 uses the LT1207 to filter and amplify control circuitry clock output signals. To re- duce ringing and overshoot, each amplifier is configured as a thirdorder Gaussian lowpass filter with a 1.6MHz cutoff frequency. COMMON MODE REJECTION RATIO, VCM = 5VRMS Two challenges surface in the effort to avoid these error sources when driving a CCD’s input. First, CCDs >>1000:1 1000:1 900:1 800:1 700:1 600:1 500:1 1% ERROR POINT = 10.2MHz 400:1 300:1 200:1 100:1 0 0 2 4 6 8 10 FREQUENCY (MHz) 12 14 Figure 4. Common mode rejection ratio versus frequency for the differential-input RMS/DC converter. Layout, amplifier bandwidth and AC matching characteristics determine the curve. 45pF + 10µF 20V 0.1µF 1k 1k SIMULATED CCD ARRAY LOAD 1k 180pF 3 + – 5V 4fCLK 14 3 2 1 1CK 1D 12 13 1Q 5 3300pF 0.1µF 10µF 500kHz –10V 6 1k 74HC74 10 11 1Q 0.1µF + 2MHz 13 4 4 10 15 1/2 LT1207 91pF 2 1,16 2CK 2D 2Q 2Q 9 500kHz 510k 45pF 8 + 10µF 20V 0.1µF 1k 1k 180pF 1k 6 1/2 LT1207 91pF 5 8,9 + – 11 7 10 12 10 0.1µF 3300pF 0.1µF 10µF + –10V 1k 510k Figure 5. The LT1207 easily tames the high capacitance loads of CCD clock inputs without ringing or overshoot Linear Technology Magazine • May 1996 11 DESIGN FEATURES Thermal Considerations A B Figure 6a. Trace A is the quadrature drive signals. Trace B. is the voltage at the input of the simulated CCD of Figure 5, driven by HC logic. Figures 6a and 6b compare the response of a digital 5V clock-drive signal and the output of the LT1207, each driving a 3300pF load. The digital clock circuit has two major weaknesses that lead to jitter and image distortion. The CCD’s output is changing during charge transfer, producing glitches that decay exponentially. Conversely, the LT1207 circuit's output has a flat top and controlled rise and fall. If an ADC is used to sample a CCD output, the conversion will be much more accurate when the LT1207 circuit is used to clock the pixel changes. With the LT1207’s filter configuration, the output has a controlled rise and fall time of approximately 300ns. Ringing and overshoot are absent from the LT1207’s output. Wide bandwidth, high output current capability and external compensation allow the LT1207 to easily drive the difficult load of a CCD’s clock input. Each LT1207 amplifier is capable of supplying up to a maximum of 1200mA output current. Depending on the output load and supply voltage, this part can generate significant power, which must be dissipated. Therefore, each amplifier in the LT1207 is protected against excessive junction temperature by individual thermal shutdown circuits. When junction temperatures exceed a safe operating threshold, the protection circuit cycles the overloaded amplifier between normal operation and an off state. The cycle time varies from 10ms to several seconds and depends on package and heat sink power dissipation and a thermal time constant. The LT1207’s copper lead frame draws heat away from the amplifiers, maximizing power handling characteristics. The PC board and its copper traces are used to dissipate the heat drawn through the lead frame. Although the PC board material has relatively high thermal resistance, the length/area ratio of the thermal resistance between layers is very small. Copper board stiffeners, copper planes, and plated-through holes contribute significant thermal resistance reduction and increased thermal dissipation. The thermal resistance of FR-4 board (3/32˝) with two-ounce copper with total area of up to 5000mm2 is shown in Figure 7. A B Figure 6b. Trace A is the quadrature signals. Trace B shows the voltage at the input of the simulated CCD of Figure 5, driven by the LT1207. Capacitive Loads Maintaining stability and supplying sufficient slew current when driving capacitive loads presents two nontrivial challenges to amplifier designers. Load capacitance affects amplifier output stage and overall loop stability. Load capacitance can cause the output stage to peak or even to oscillate. The amount of peaking depends on the value of the feedback components. As shown in Figure 8, additional networks can be used to reduce the peaking: a resistor in series with the load capacitance will isolate the output stage. Alternatively, a series RC snubber network in parallel with the load will overcome the load capacitance’s effects. Although the series resistance improves stability, it also increases the output impedance and reduces the output voltage swing. The snubber wastes power and reduces the current avail- THERMAL RESISTANCE (°C/W) 70 60 50 40 SERIES R + 30 OUTPUT 20 VIN – RF 10 CL 0 0 1000 3000 4000 2000 COPPER AREA (mm2) 5000 Figure 7. Thermal resistance versus total copper area (top + bottom) for FR-4, 2oz copper pc board 12 RG RC NETWORK (SNUBBER) Figure 8. Conventional approaches to driving capacitive loads Linear Technology Magazine • May 1996 DESIGN FEATURES able to drive load capacitance. The LT1207 overcomes these problems by offering an internal network and an optional connection to compensate the effects of capacitive loads. Adding a 0.01µF capacitor between the OUTPUT and COMP pins activates the network. The network smooths the output peaking, creating a flat overall response when using the correct feedback resistor. For example, the LT1207’s overall response is flat within 0.35dB when driving a 200pF load and using a 1.2 k feedback resistor. Refer to the LT1207 data sheet for more details. What happens to the overall frequency response when using compensation and driving resistive loads? A simple bandwidth reduction occurs. Using the above mentioned compensation when driving a 30Ω load reduces the bandwidth from 55MHz to 35MHz. Although capacitive loads and feedback components determine the small signal response, large signal response is a function of maximum output current. The LT1207, operating in its Quiescent Current Reduction VS = ±15V RF = RG = 3k In addition to reducing power supply current, the shutdown pin can be used to control the operating quiescent current. As the resistance connected between the shutdown pin and ground is increased, operating current and bandwidth decrease. Therefore, applications that do not require full bandwidth can also operate at low power. Refer to the LT1207 data sheet for more information covering the relation between bias current and bandwidth. RL = ∞ Figure 9. Large signal response, CL = 10,000pF Epilog fastest configuration, has a slew rate of 1V/ns. A current of 1mA/pF is required to drive a capacitor at this rate of change. Therefore, 10A is required to change the voltage on a 10,000pF capacitor at 1V/ns. Figure 9 shows the LT1207’s large signal behavior when loaded by 10,000pF. The slew rate is approximately 40V/µs, a function of the 400mA current limit of the amplifier used in this example. The LT1207 unites wide bandwidth, high output current and low power shutdown to form an effective solution for driving low impedance, high capacitance loads. Its novel compensation technique greatly enhances stability when driving capacitive loads. Unique fused-lead package technology allows high power operation in a surface mount 16-pin SO package. Note: 1 Thanks to Jim Williams for this circuit. LT1210, continued from page 8 Table 1. LT1210 performance 26 23 20 GAIN (dB) 17 14 11 8 5 –4 0.01 0.1 1.0 10.0 FREQUENCY (MHz) 100 Figure 11. Frequency response of Figure 10's circuit VS = ±15V Conditions Bandwidth AV = +2V, RL = 100Ω 50MHz 55MHz Bandwidth AV = +2V, RL = 10Ω 28MHz 35MHz Slew rate AV = +2V, RL = 10Ω 200V/µs 700V/µs Slew rate AV = –1V, RL = 10Ω 200V/µs 900V/µs Minimum output current 0.75A 1A Supply current 32mA 37mA Maximum input offset voltage 15mV 15mV Maximum inverting input current 60µA 60µA 2 –1 VS = ±5V Parameter Conclusion presents 11.1Ω to each LT1210 in a bridge, delivering a whopping 9W into 50Ω. In this circuit the lower frequency cutoff was limited by the choice of coupling capacitor to approximately 40kHz (the transformer is capable of 15kHz). The frequency response is shown in Figure 11. Linear Technology Magazine • May 1996 Table 1 summarizes the major performance specifications of the LT1210 on ±5 and ±15V supplies. Complete electrical characteristics are described in the datasheet. The LT1210 combines high output current with a high slew rate to form an effective solution for driving low impedance loads. Power levels of up to 5W can be supplied to a load at frequencies ranging from DC to beyond 10MHz. Authors can be contacted at (408) 432-1900 13 DESIGN FEATURES The LTC1400: World’s Smallest 400ksps 12-Bit ADC Has It All! by Kevin R. Hoskins and William C. Rempfer Introduction The LTC1400 achieves a high 400ksps sampling and conversion rate while consuming very little power and occupying minimal circuit board area. As shown in Figure 1, this physically diminutive part is big with features including sample-and-hold, 12-bit ADC, on-board reference, shutdown circuitry and serial interface. All of this functionality is contained within a space-saving SO-8 package. The LTC1400 operates on supply voltages of either +5V or ±5V. The input signal range is set by the supply voltage: 0V to 4.096V (unipolar) or 1.00 0.75 0.50 0.25 INL Full ADC Features in an SO8 Package input allows precise control of each sample/conversion, so vital to DSP applications that require precise sampling. The full-scale input range of 4.096V gives a convenient LSB value of 1mV. This voltage eases the application of single-supply operational amplifiers 0 –0.25 –0.50 –0.75 –1.00 0 512 1024 1536 2048 2560 3072 3504 4096 CODE Figure 2a. LTC1400 integral linearity 1.00 0.75 0.50 0.25 DNL ±2.048V (bipolar) at +5V or ±5V supplies, respectively. In either mode, the LSB is 1mV. The part’s high speed operation doesn’t sacrifice low power dissipation, which is typically just 60mW when converting at 400ksps. The dissipation is further reduced through power-saving shutdown modes, NAP and SLEEP. When invoked, NAP mode shuts down all internal circuitry except the reference, dropping dissipation to 6mW. Leaving the reference operating allows the part to return to full operation very quickly, since the reference bypass capacitance remains charged. When the converter is placed in SLEEP mode, everything is inactive and the power dissipation plummets to a minuscule 30µW (max). When operation resumes, the first data bit, REFRDY, changes from a logic 0 to a logic 1 when the reference output is valid. The LTC1400’s three wire serial interface is easy to connect to DSPs, microprocessors and microcontrollers. The interface consists of a serial clock (CLK), data output (DOUT) and a convert start (CONV) signal. The CONV Tomorrow’s digitally based signal processing and monitoring systems will require analog-to-digital converters (ADCs) that combine high resolution, high speed conversion with low power and small physical size. Satisfying these requirements helps create systems with low dissipation (and long battery life), small size and increased capability. In response to these requirements, Linear Technology introduces the LTC1400. 0 –0.25 –0.50 –0.75 SO-8 VDD –1.00 0 512 1024 1536 2048 2560 3072 3504 4096 CODE Figure 2b. LTC1400 differential linearity VREF 2.42V SAMPLEAND-HOLD 2.420V REFERENCE 0 DOUT SERIAL PORT 12 –20 CLK CONTROL LOGIC AND TIMING POWER DOWN CIRCUITRY AMPLITUDE (dB) AIN 12-BIT SWITCHED CAPACITOR ADC –40 –60 –80 CONV –100 –120 0 GND VSS Figure 1. LTC1400 block diagram 14 20 40 60 80 100 120 140 160 180 200 FREQUENCY (kHz) Figure 3a. This FFT shows that the second harmonic of the 95kHz full-scale input is masked by the low noise floor, a tribute to the LTC1400’s dynamic linearity. Linear Technology Magazine • May 1996 0 EFFECTIVE NUMBER OF BITS –40 –60 –80 –100 74 11 68 10 62 NYQUIST FREQUENCY 9 56 8 S/(N+D) (dB) AMPLITUDE (dB) –20 12 AMPLITUDE (dB BELOW THE FUNDAMENTAL) DESIGN FEATURES 7 6 5 4 3 2 1 –120 0 0 10k 20 40 60 80 100 120 140 160 180 200 FREQUENCY (kHz) Figure 3b. Even with inputs near Nyquist, the LTC1400’s dynamic linearity remains robust. to the converter’s analog input. This nearly 1V of headroom allows the use of op amps that can swing within 900mV of the supply without clipping. No-Compromise AC and DC Performance The LTC1400 achieves true 12-bit performance for both AC and DC specifications. The DC specifications fSAMPLE = 400kHz 100k INPUT FREQUENCY (Hz) 1M 2M Figure 4a. LTC1400 signal to (noise + distortion) versus input frequency 0 –10 fSAMPLE = 400kHz –20 –30 –40 –50 –60 –70 –80 –90 –100 10k 2ND HARMONIC THD 3RD HARMONIC 100k INPUT FREQUENCY (Hz) 1M 2M Figure 4b. LTC1400 THD versus input frequency include ±1LSB integral (INL) and differential (DNL) linearity, as shown in Figures 2a and 2b. INL, DNL, and no missing codes are guaranteed over the full 0°C to 70°C (C-grade) and –40°C to 85°C (I-grade) operating temperature ranges. In addition to these excellent DC specifications the device has a curvature-corrected precision 2.420V bandgap reference. For high frequency conversion applications, the LTC1400 excels with outstanding AC performance. The FFT’s in Figures 3a and 3b reveal the LTC1400’s dynamic performance. The curves in Figures 4a and 4b show the LTC1400’s SINAD and THD performance over an input frequency range of 10kHz to 2MHz. With a full-scale 100kHz input, the signal to noise- ANALOG GROUND PLANE 10Ω TO –5V 10µF TO 5V 0.1 + 0.1 – LTC1400 L O G I C DIGITAL GROUND PLANE Figure 5. An analog ground plane gives the best performance. A tight layout allows the use of surface mount tantalum or ceramic capacitors near the ADC. Digital I/O lines need to be run away from the analog circuitry and should be shielded by the digital ground. “X's” are feedthroughs to the bottom-layer ground planes. Linear Technology Magazine • May 1996 15 DESIGN FEATURES 5V WIDTH 10 MIL VCC WIDTH 100 MIL 0V TO 4.096V OR ±2.048V (1MV/LSB) INDUCTANCE (nH) = 5.08 L [2.303 log ((2L/(B+C)) + 0.5 + 0.2235 ((B + C)/L)] WHERE L = TRACE LENGTH, B = TRACE WIDTH, C = TRACE THICKNESS FOR 1 OZ COPPER AND 10 MIL TRACE: INDUCTANCE = 28.83 nH/in FOR 2 OZ COPPER AND 10 MIL TRACE: INDUCTANCE = 28.26 nH/in FOR 1 OZ COPPER AND 100 MIL TRACE: INDUCTANCE = 17.81 nH/in FOR 2 OZ COPPER AND 100 MIL TRACE: INDUCTANCE = 17.74 nH/in THICKNESS 1 OZ: 1.35 MILS 2 0Z: 2.70 MILS As with other high resolution, high speed ADCs, the LTC1400 needs some basic attention to layout details. These include grounding, bypassing and lead inductance. The best performance is achieved when the LTC1400 is applied as an analog device and powered from an analog supply. Its ground pin should be connected to an analog ground plane. The analog and digital ground planes should connect only at a PC board's ground input. Elsewhere, the analog ground plane should never be overlaid by, or touch, the digital ground plane. To ensure minimum inductance and best per- UNIPOLAR –5V formance, the analog ground plane can be overlaid by the analog supply traces or power plane that feeds the LTC1400 5V or ±5V power. Figure 5 shows some suggestions for proper layout and bypassing. The converter’s operating speed dictates that the power supply (VCC, and VSS, if –5V is used) and reference pins must be bypassed for best performance. The VCC and reference pins require a parallel combination of a 10µF and a 0.1µF bypass capacitor, whereas the VSS pin, if connected to – 5V, requires a 0.1µF capacitor. The capacitors should be placed as close as possible to their associated pins, with the 0.1µF capacitors closer than the 10µF. Narrow connecting circuit board traces should be avoided. Their comparatively high inductance can lead to compromised bypass performance and conversion errors. It is important Creating the Proper Setting for this Little Jewel VSS BIPOLAR Figure 6. The lower inductance of wide pc board traces ensures the best performance of bypass components. plus-distortion ratio (SINAD) is 72dB, as shown in Figure 4a. At Nyquist (200ksps), the SINAD is still robust at 70dB. By itself, total harmonic distortion is less than –80dB. LTC1400 AIN Figure 7. The input range is set by the supply chosen to power the LTC1400: ±5V selects bipolar (±2.048V) and 5V selects unipolar (0V to 4.096V). that the traces connected to the reference, ground, supply pins and bypass components be as wide as possible. This will minimize errors caused by inductive effects. Figure 6 compares the inductance per inch for 10mil and 100mil wide 1 and 2oz. copper traces. Driving the LTC1400’s analog input is easy. The input range is set by the supply chosen to power the L TC1400: ± 5V selects bipolar (±2.048V) and 5V selects unipolar (0V to 4.096V). See Figure 7. With infinite DC input resistance, it is easy to AC couple signals to the LTC1400’s analog input. Figure 8a shows how to AC couple a signal to the converter operating in bipolar mode. Figure 8b shows the circuit for applying bipolar signals when the converter operates in unipolar mode. 2.048V 2.048V 0V 0V 5V –2.048V 5V –2.048V VCC VCC VIN AIN R VIN LTC1400 AIN R VSS LTC1400 VREF VSS R –5V 4.096V VCM 4.096V 2.048V 0V 0V BIPOLAR MODE Figure 8a. AC coupling a signal in bipolar mode 16 UNIPOLAR MODE Figure 8b. Coupling a bipolar signal in unipolar mode Linear Technology Magazine • May 1996 DESIGN FEATURES 5V VCC LTC1390 1 15 2 16 3 14 4 12 5 13 6 11 7 10 8 9 DOUT CLK LTC1400 AIN CONV VREF VSS GND 5 DATA 6 CLK 7 CS change as it acquires an input signal’s magnitude. For a given sample time, any decrease in the S/H’s slew rate will prevent fully charging the hold capacitor to a voltage equal to the input signal. The held signal and subsequent conversion will not correctly represent the applied signal. The potential for these errors is easily circumvented by using a buffer, or, alternatively, by providing more time between conversions to allow the S/H longer to settle. If amplification or buffering is necessary, Figure 10 shows op amp configurations for both single 5V and ±5V operation. The op amps shown can easily handle 0V to 5V VCC + 0V TO 4.0V – DOUT CLK AIN LT1215 LTC1400 CONV VREF VSS GND 5 6 7 DATA SERIAL CLOCK CONVERT START 4 9.09kΩ 1kΩ 5V ±0.2048V VCC + ±2.048V LT1363 – LTC1400 CONV VREF VSS 1kΩ 9.09kΩ DOUT CLK AIN GND 5 6 7 DATA SERIAL CLOCK CONVERT START 4 – 5V Figure 10. Op amp configurations for single 5V and ±5V operation. The rail-to-rail op amp shown can easily handle 0V to 4.1V output signals. The high speed LT1363 drives the bipolar ±2.5V input with headroom to spare. Linear Technology Magazine • May 1996 SERIAL CLOCK CONVERT START DSP OR µP Figure 11. The LTC1440’s 3-wire serial I/O is simple to interface to a microprocessor or DSP. Figure 9. The LTC1400/LTC1391 combination can achieve a sampling rate of 400ksps/channel or 50ksps/8 channels. 0V TO 0.4V CONV DATA 4 – 5V For applications that have multiple inputs to convert, the LTC1400 can be used with the LTC1391 8channel multiplexer. This serially interfaced multiplexer is designed to share the serial connections with the converter and will operate on the same supply used by the LTC1400. The LTC1400/LTC1391 combination can achieve a sampling rate of 400ksps/ channel or 50ksps/8 channels (see Figure 9). Attempting to convert signals generated by unbuffered high impedance sources (RS < 1kΩ) can lead to conversion errors. High source impedance can slow the internal S/H’s rate of DOUT LTC1400 AIN CLK 4.1V output signals. The high speed LT1363 drives the bipolar ±2.048V input with headroom to spare. The LTC1400’s 3-wire serial I/O is pure pleasure to interface. As shown in Figure 11, a DSP or microprocessor supplies just two signals, CLK (clock) and CONV (convert start) and reads just one signal, DATA (serial data out). In DSP applications, the accuracy of time intervals between repetitive samples is very important to FFT accuracy. Any timing uncertainty will cause FFT errors such as spreading. To ensure that the LTC1400 captures a signal in a predictable manner, its S/H holds a signal’s magnitude on the rising edge of CONV. To make timing easy, the rising edge of CONV should be coincident with the rising edge of CLK, as shown in Figure 12. Data appears at the DATA pin on the second falling CLK edge after the rising edge of CONV. The first bit is REFRDY, followed by conversion results D11 through D0. The acquisition of the next sample begins before the completion of the current conversion and requires a maximum of 300ns or 270ns, respectively, for unipolar or bipolar inputs. The LTC1400 includes two power saving modes designed to minimize power dissipation. The NAP mode shuts down all internal circuitry except the reference. The SLEEP mode shuts downs all circuitry, reducing dissipation to just 30µW and saves the most power. Each mode is activated using the CLK and CONV signals, as shown in Figure 13. With CLK held at a logic low, two consecutive CONV pulses activate NAP mode and four consecutive CONV pulses activate SLEEP. The first rinsing edge on CLK returns the LTC1400 to normal operation. 17 DESIGN FEATURES SAMPLE N ANALOG INPUT SAMPLE N+1 SAMPLE N–1 CONVERT START SERIAL CLOCK DATA RR 11 10 9 8 7 6 5 4 3 2 1 0 RR 11 10 9 8 7 6 5 4 3 2 1 0 RR 11 10 9 Figure 12. The LTC1400’s S/H always captures and holds the input signal’s magnitude on the convert start’s rising edge. Data, beginning with the REFRDY bit, appears on DOUT, 1 1/2 clock cycles later. ACTIVE MODE NAP MODE ACTIVE MODE CONVERT START SERIAL CLOCK DATA 350ns WAKE-UP ACTIVE MODE SLEEP MODE ACTIVE MODE WAKE-UP TIME CONVERT START SERIAL CLOCK DATA 0 0 1 1 tWAKE-UP (POLE REFRDY BIT TO MONITOR WAKE-UP) Figure 13. Power saving NAP mode reduces supply current by 90%; it is activated by sending two convert start pusles to the LTC1400. SLEEP mode, which is activitated by four convert start pulses, reduces supply current by up to 99.99%. 100 18 bit, a logic 1, after SLEEP deactivation indicates that the reference voltage is fully operational and accurate conversions can commence. The REFRDY eliminates inaccurate wait intervals that guess the time needed before accurate conversions can resume. REFRDY is a foolproof way to monitor the LTC1400’s reference and know when conversions can resume. The amount of power saved by using NAP and SLEEP between conversions is related to the average sampling rate. As the average conversion rate is decreased from a maximum of 400ksps, NAP mode begins saving power immediately. As shown in Figure 14, the NAP mode’s greatest power savings (5mW versus 50mW) occurs in the range of below 6ksps. Figure 14 10 SUPPLY CURRENT (mA) While NAP mode is active, the reference remains fully operational and maintains the charge on its bypass capacitors. When the converter returns from NAP, REFRDY is a logic 1 and the first conversion will be valid. During SLEEP, the reference is shut down and the charge on its bypass capacitors goes to zero. When SLEEP is deactivated, all circuitry returns to full operation and the reference recharges its bypass capacitors. Since there is a limited amount of constant current to charge the capacitor, a finite time is needed and this time is different for different capacitance values. The guesswork of knowing when the capacitor is fully charged is eliminated by monitoring a conversion result’s REFRDY bit. The first valid NORMAL CONVERSION NAP MODE BETWEEN CONVERSION 1 0.1 SLEEP MODE BETWEEN CONVERSION 0.01 6.4MHz CLOCK 0.001 0.01 0.1 1 10 100 1k 10k 100k 1M SAMPLE RATE (Hz) Figure 14. NAP and SLEEP modes increase power efficiency significantly when used between conversions while the LTC1400 is operating at less than full speed. also indicates the amount of power savings possible when using the SLEEP mode versus average sampling rate. Additional savings, beyond continued on page 20 Linear Technology Magazine • May 1996 DESIGN FEATURES Ultralow Power Comparators Include Reference by James Herr Undervoltage/ With the explosion of battery-pow- glitches that commonly occur when Overvoltage Detector Introduction ered products has come a need for circuits that draw as little supply current as possible in order to extend battery life. Linear Technology’s new family of micropower comparators with built-in references is designed to meet that need. Drawing only 1µA of supply current per comparator, the LTC1440–LTC1445 family provides the perfect solution to battery-powered system monitoring problems. The LTC1440–LTC1445 family features 1µA comparators, adjustable hysteresis, TTL/CMOS outputs that sink and source current and a 1µA reference that can drive a bypass capacitor of up to 0.01µF without oscillation. The parts operate from a 2V to 11V single supply or a ±1V to ±5V dual supply. Each comparator’s input-voltage range swings from the negative supply rail to within 1.3V of the positive supply. The comparator propagation delay is 12µs with a 10mV overdrive, and the supply current 7 V+ + 3 IN + 8 4 IN – comparators change logic states have been eliminated. Table 1 summarizes the features of each member of the family. Voltage Reference The internal bandgap voltage reference has an output voltage of 1.182V±1% above V− for the LTC1440– LTC1443 and 1.221 ±1% for the LTC1444 and LTC1445. The reference output is capable of sourcing up to 200µA and sinking 15µA. The reference output can directly drive an external bypass capacitor of up to 0.01µF without oscillation. By placing a resistor in series with the bypass capacitor, ringing at the reference output can be eliminated and a greater capacitance value can be used. The bypass capacitor prevents reference load transients or power supply glitches from disturbing the reference voltage, which helps eliminate false triggering of the comparators when they are connected to the reference. Figure 1 shows the reference voltage settling during a power supply transient. OUT – 6 REF 51k 5% LTC1440 430Ω 5% 1µF Figure 3 shows a single cell lithiumion battery to 5V supply with the low-battery warning, low-battery shutdown and reset functions provided by the LTC1444. The LT1300 micropower step-up DC/DC converter boosts the battery voltage to 5V using L1 and D1. Capacitors C2 and C3 provide input and output filtering. The voltage-monitoring circuitry takes advantage of the LTC1444’s open-drain outputs and low supply voltage operation. Comparators A and B, along with R1, R2 and R3, monitor the battery voltage. When the battery voltage drops below 2.65V comparator A’s output pulls low to generate a nonmaskable interrupt to the micro- V– GND 7 R1 1.33M 1% V+ 3 IN+ A + 2 Figure 1a. Test circuit V+ Single-Cell Lithium-Ion Battery Supply VCC 5 HYST 2.4M 5% The LTC1442 can be easily configured as a window detector, as shown in Figure 2. R1, R2 and R3 form a resistive divider from VCC so that comparator A goes low when VCC drops below 4.5V, and comparator B goes low when VCC rises above 5.5V. A 10mV hysteresis band is set by R4 and R5 to prevent oscillations near the trip points. UNDERVOLTAGE (4.5V) OUT A 1 – R2 84.5k 1% POWER GOOD + 8V OUT B 8 4 IN – B 5V R3 392k 1% R4 2.4M 5% VREF 2mV/DIV OUT – 5 HYST OVERVOLTAGE (5.5V) 6 REF R5 10k 5% V– C1 0.01µF LTC1442 2 2ms/DIV Figure 1b. Reference settling Linear Technology Magazine • May 1996 Figure 2. Window detector 19 DESIGN FEATURES processor to warn of a low-battery condition. To protect the battery from over discharge, the output of comparator B is pulled high by R7 when the battery voltage falls below 2.45V. P-channel MOSFET Q1 and the LT1300 are turned off, dropping the quiescent current to 20µA. Q1 is needed to prevent the load circuitry from discharging the battery through L1 and D1. Comparators C and D provide the reset input to the microprocessor. As soon as the boost converter output rises above the 4.65V threshold set by R8 and R9, comparator C turns off and R10 starts to charge C4. After 200ms, comparator D turns off and the Reset pin is pulled high by R12. Conclusion With their built-in references, low supply current requirements and variety of configurations, Linear Technology’s LTC1440–45 family of micropower comparators is ideal for system monitoring in battery-powered devices such as PDAs, laptop and palmtop computers and handheld instruments. Table 1. Features of LTC1440–45 comparators Part Number Number of Comparators Supply Supply Current Adjustable Hysteresis Reference Comparator Output LTC1440 1 Dual 2.5µA Yes 1.182V ±1% CMOS LTC1441 2 Single 3.5µA No None CMOS LTC1442 2 Single 3.5µA Yes 1.182V ±1% CMOS LTC1443 4 Dual 5.5µA No 1.182V ±1% CMOS LTC1444 4 Single 5.5µA Yes 1.1221V ±1% Open-Drain LTC1445 4 Single 5.5µA Yes 1.1221V ±1% CMOS R1 1.1M 5% 5 R2 82.5k 1% 1 CELL LITHIUMION BATTERY 4 6 V+ A 1/4 LTC1444 6 7 VIN SW 2 + – R7 51k 5% – C2 100µF 3 1 14 NC NC R5 51k 5% R4 2.4M 5% D1 1N5817 + B 1/4 LTC1444 7 + HYST R3 1M 1% L1 10µH SUMIDA CD54-100 3 5 2 SENSE 1 SHDN 3 LT1300 ILIM + SEL PWR GND GND 8 R6 430Ω 5% C1 1µF 4 8 REF 1 2, 4 Q1 MMFT2955ETI C3 100µF R8 732k 1% 11 R9 267k 1% R10 3.37M 5% + C 1/4 LTC1444 10 16 13 D 1/4 LTC1444 – 12 LTC1444 REF + R11 51k 5% R12 51k 15 5% VCC NMI µP RESET – C4 0.22µF 9 V– C2, C3: AUX TPSD107M010R0100 OR SANYO OS-CON 16SA100M Figure 3. Single-cell to 5V supply LTC1400, continued from page 18 Conclusion that possible using only NAP, occurs below 8sps. In this range, the power dissipation drops to 5mW at 8sps and as low as 50µW at 0.1sps. 20 With its serial interface, small SO-8 package and NAP and SLEEP shutdown modes, the LTC1400 achieves high speed 400ksps sampling and conversion rates while consuming very little power and circuit board area. Its outstanding AC and DC specifications make it the choice for applications that include wide bandwidth control systems and DSP-based signal processing. Linear Technology Magazine • May 1996 DESIGN FEATURES LT1462, LT1463, LT1464 and LT1465: Micropower, Dual and Quad JFET Op Amps Feature C-Load Capability and Pico Ampere Input Bias Currents by Alexander Strong Introduction The LT1462/LT1464 duals and the LT1463/LT1465 quads are the first micropower op amps (30µA typical, 40µ A maximum per amp for the LT1462; 140µA typical, 200µA maximum per amp for the LT1464) to offer both pico ampere input bias currents (500fA typical) and unity-gain stability for capacitive loads up to 10nF. The outputs can swing a 10k load to Driving Large Capacitive Loads within 1.5 volts of either supply. Just like op amps that require an order of magnitude more supply current, the LT1462/LT1463 and the LT1464/ LT1465 have open loop gains of 600,000 and 900,000, respectively. These unique features, along with a 0.8mV offset, have not been incorporated into a single monolithic amplifier before. Amplifiers designed to drive large capacitive loads do so by minimizing output impedance. This is usually done by idling a large amount of current in the output transistors. This increases the frequency of the output pole caused by the load capacitance and output impedance. For example, VCC R6 R3 R4 R5 R7 R20 VCC Q17 Q6 Q3 Q4 Q34 Q5 Q7 R17 J3 J4 Q22 J5 Q18 40µA Q20 R18 C2 R10 Q16 OUT R10 +IN R19 J2 J1 Q29 Q21 10µA –IN Q28 C1 VEE Q15 R16 Q19 Q23 Q11 20µA Q25 Q12 Q24 10µA 10µA Q13 Q14 Q1 Q8 R5 R1 Q2 Q9 R2 R5 VEE Q10 Q26 Q27 R10 VEE 1464_01.eps DBD Figure 1. LT1464 Schematic Linear Technology Magazine • May 1996 21 DESIGN FEATURES V+ 1/4 LTC201 A 13 15 16 1 MCT2 4 C1, 10nF POLYSTYRENE 5 14 V– V+ 5 6 IN + – 1/4 LTC201 B 2 6 2 4 7 *R1 1/2 LT1464 1 MCT2 3 5 – 8 1/2 LT1464 1 + VOUT 4 V– 2 1 2 6 4 0.5pA = 0.05mV/SEC. 10nF TOTAL SUPPLY CURRENT = 460µA MAX. *R1 = 600Ω FOR ±15V SUPPLIES, R1 = 0Ω FOR ±5V SUPPLIES TYPICAL DROOP = 3 MODE IN A IN B FUNCTION MODE IN A IN B TRACK AND HOLD TRACK 0 0 HOLD 1 1 POSITIVE PEAK DETECTOR RESET 0 0 STORE 0 1 NEGATIVE PEAK DETECTOR RESET 0 0 STORE 1 0 LTC201 SWITCH IS OPEN FOR LOGIC “1” 1464_02.eps Figure 2. Low-droop track-and-hold circuit/peak detector an op amp with a 1MHz gain bandwidth product requires over 800µA of idle current through the output stage to achieve an output impedance of less than 159Ω. This idle current alone is more than four times the maximum supply current drawn by the LT1464. If this 159Ω output impedance is loaded by a 1nF capacitor, the phase margin will be degraded by 45˚. The LT1464/LT1465 can drive a 10nF load without idling lots of current in the output stage. The LT1462 and LT1463, with one fifth the bandwidth (200kHz typical) can drive the same 10nF capacitive load at one fifth the supply current (40µ A max). Instead of lowering the output impedance by increasing idling current, the bandwidth is lowered by employing a clever compensation technique when driving heavy load capacitance. Whenever the output encounters a large load capacitance, the LT1464/LT1465 automatically reduces the bandwidth by reflecting a portion of the load capacitance back to the gain node; this capacitance is then added to the compensation capacitance. C2 in Figure 1 is connected from the output to the gain node; at light 22 loads this capacitor is bootstrapped and is not added to compensation capacitor C1. When the output can no longer drive the output capacitance, C2 is no longer bootstrapped and is instead added to the compensation capacitance. Now instead of a 1MHz op amp trying to drive a large cap, a lower bandwidth op amp is able to drive the load capacitor. The same self-adjusting bandwidth allows the LT1462/LT1463 to drive the 10nF load with only a 40µA maximum supply current. This self-adjusting bandwidth works great for single gain-stage op amps. Small output idling currents make for attractive, low power supply currents. When the output can’t handle a load capacitance, the bandwidth is automatically lowered and phase margin is preserved. Wait a minute! Did you say single stage? How do you get a typical DC gain of 1 million out of a single gain stage, a micropower, low gm, JFETinput differential pair? The 40µA tail current in the LT1464/LT1465 gives a JFET gm of 1/9k; this implies a 900MΩ output impedance (gm × RO). The gain node does, indeed, have a super high impedance. Looking into the NPN mirror (Q1, Q2, Q11 and Q12) we see that Q12 is cascoded and its output resistance is canceled by Q13, resulting in a final output impedance of beta squared times that of the output impedance of Q2. The PNP current source (Q5) is cascoded by a FET (J5), resulting in an output impedance much greater than that of the NPN current mirror. The gain node is triple buffered to the output, which buffers the load by beta cubed, and the collector-base resistance of the first follower (Q16) is bootstrapped by follower Q28. When these three impedances are paralleled, the resulting impedance at the gain node is typically 900MΩ. The gain is further enhanced by the current boost circuits Q23, Q26 and Q27 for sinking Table 1. LT1462–65 typical parameters VS = ±15V, VCM = 0V, TA = 25˚C LT1462/LT1463 LT1464/LT1465 Units VOS 0.3 0.3 mV Ib 0.5 0.5 pA AVOL (RL=10k) 250 1000 V/mV ISUPPLY 30 140 µA GBW 200 1000 kHz CLOAD 10 10 pF −12.5 to 15 V Common Mode −12.5 to 15 Range Linear Technology Magazine • May 1996 DESIGN FEATURES R8 100k Q1 2N3904 C5 1µF D1 1N4148 C1 1nF +5 2 3 – 8 1/2 LT1462 1 R2 24k + 4 –5 5 C2 200pF 6 + 1/2 LT1462 – R4 10M PHOTODIODE 7 R5 24k C5 200pF DC OUT 3 2 1/2 LT1462 1 +5 – R7 10M D2 1N4148 R3 100k C3 0.47µF + 5 R10 50k D3 1N4148 6 + – Figure 2 is a track-and-hold circuit that uses a low cost optocoupler as a switch. Leakages for these parts are usually in the nano amp region with 1 to 5 volts across the output. Since there is less than 2mV across the junctions, less than 0.5pA leakage can be achieved for both optocouplers. The input signal is buffered by Linear Technology Magazine • May 1996 1464_03.eps DBD light meter. Figure 4 shows the relationship between DC output voltage and photodiode current. The AC component of the output of third op amp is compressed logarithmically and passed through capacitor C3 and pot R10 for amplitude control. The fourth op amp amplifies this AC signal which is generated across R13. The logarithmic compression of the AC photodiode current allows the user to examine the AC signals for a wide range of input currents. The LT1462/LT1463’s picoampere input bias currents, combined with its excellent drive capability, result in continued on page 32 1.6 1.4 1.2 DC OUTPUT (v) Applications one op amp while the other buffers the stored voltage; this results in a droop of 50µV/s with a 10nF cap. Figure 3 is a logging photodiode sensor using two LT1462 duals or an LT1463 quad. The low input bias current of the LT1462/LT1463 makes it a natural for amplifying low level signals from high impedance transducers. The 500fA of input bias current contributes only 0.4fA/√Hz of current noise. For example, a 1Meg ohm input impedance converts the noise current to a noise voltage of only 0.4nV/√Hz. Here, a photodiode converts light to a current, which is converted to a voltage by the first op amp. The first, second and third gain stages are logarithmic amplifiers that perform a logarithmic compression. A DC feedback path comprising R8, R9, C5 and Q1 is active only for nolight conditions, which are very rare, due to the picoampere sensitivity of the input. Q1 is off when light is present, isolating the photodiode from C5. When the feedback path is needed, a small filtered current through R8 keeps the output of the third op amp within an acceptable range. The third op amp’s output voltage, which is proportional to the photodiode current, can serve as a logarithmic DC R11 1M AC OUT R13 10k R12 10k Figure 3. Logging photodiode amplifier currents and Q22 and Q17 for sourcing currents. The input stage possesses two very desirable features. The first is an input common mode range that includes the positive rail; the second is that the drains of the input JFET see only a small IR drop across the load resistors R1 and R2, preventing phase reversal when the input common mode hits the negative rail. This is especially important in servo systems, where a change in phase can cause a lockup condition. Another advantage of low power consumption is the very small rise in die temperature, resulting in very low junction leakages. This is why the typical input bias currents are only 500fA in the LT1462–65. Sample-andhold applications are a natural for this family of op amps. 7 4 –5 R6 100k C4 10µF 8 1/2 LT1462 + R1 100Ω R9 1M 1.0 0.8 0.6 0.4 0.2 0 10 –11 10 –9 10 –7 10 –5 PHOTODIODE CURRENT (A) 10 –3 1464_04.eps Figure 4. DC output of logging photodiode amplifier 23 DESIGN FEATURES Selection Criteria for CCFL Circuits Previous LTC publications have discussed issues and circuitry related to powering cold cathode fluorescent lamps (CCFLs). 1 These lamps are almost universally employed for backlighting liquid crystal displays (LCDs). The large variety of displays and applications necessitates a wide range of circuit approaches. A single method providing optimal results in all situations, although desirable, remains elusive. As a result, a very wide array of potential solutions have been developed and presented. This makes selecting an approach for any given application somewhat confusing. Comfort arrives with the realization that the circuits fall into two broad categories. All approaches drive the lamp in either a “grounded” or “floating” configuration. Understanding these terms and their significance in selecting a lamp-driving approach is the subject of this tutorial. Sources of Energy Loss in Practical Applications Achieving high efficiency for a backlight design requires careful attention to the physical layout of the lamp, its leads and the construction of the display housing. Parasitic capacitance from any high voltage point to DC or AC ground creates a path for unwanted current flow. This parasitic current degrades electrical efficiency. The loss term is related to 1/2CV2f where C is the parasitic capacitance, V is the voltage at any point on the lamp and f is the operating frequency. Losses up to 25% have been observed. Layout techniques that increase parasitic capacitance include long high voltage lamp leads, reflective metal foil around the lamp and displays supplied in metal enclosures. Grounded circuits drive the lamp in single-ended fashion. Figure 1 shows one lamp electrode receiving drive with the other terminal essentially at ground. This causes significant loss via parasitic paths associated with the lamp’s driven end. 24 by Jim Williams PARASITIC LOSS PATH PARASITIC LOSS PATH PARASITIC LOSS PATH FULL AMPLITUDE HIGH VOLTAGE CCFL LAMP BALLAST CAPACITOR PARASITIC LOSS PATHS ESSENTIALLY 0V DIODES INTERNAL IN LT118X-BASED CIRCUITS TO FEEDBACK NODE ENERGY LOST IN PARASITIC PATHS = 1/2 CV 2 CCFL_1.eps Figure 1. Ground-referred lamp drive has large energy loss in high voltage regions due to full amplitude swing. The advantage gained varies considerably with display type, although a 10% to 20% reduction in lost energy is common. In some displays loss reduction is not as good, and occasionally the improvement is negligible. Heavily asymmetric wiring to or within the display can sometimes make floating drive more lossy than grounded drive. In such cases, testing in both modes is necessary to determine which type of drive is most efficient. A second advantage of floating operation is extended illumination range. Grounded lamps operating at relatively low currents may display the “thermometer effect”; that is, light intensity may be nonuniformly distributed along the lamp’s length. Figure 3’s grounded scheme shows that although lamp-current density is uniform, the associated field is imbalanced. The field’s low intensity, combined with its imbalance, means This is so because of the large voltage swing in this region. The parasitic paths near the lamp’s grounded end undergo relatively little swing, contributing small energy loss. Unfortunately, the lost energy is heavily voltage dependent (E = 1/2CV2) and net energy loss is excessive if drivenend parasitics are large. Figure 2’s configuration minimizes the losses by altering the drive scheme. In this case the lamp is driven from both ends instead of one end being grounded. This “floating” lamp arrangement requires only half the voltage swing at each end instead of full swing at one end. This introduces more loss in the parasitic paths previously tied to the grounded end. In most cases, these increased losses are favorably offset by the reduced swing because of the V2 loss term associated with voltage amplitude. PARASITIC LOSS PATH 1/2 AMPLITUDE HIGH VOLTAGE PARASITIC LOSS PATH PARASITIC LOSS PATH 1/2 AMPLITUDE HIGH VOLTAGE CCFL LAMP BALLAST CAPACITOR PARASITIC LOSS PATHS PARASITIC LOSS PATH ENERGY LOST IN PARASITIC PATHS = 1/2 CV2 CCFL_2.eps Figure 2. “Floating” lamp allows reduced bipolar drive, cutting losses due to parasitic capacitance paths. Formerly grounded lamp end’s paths absorb more energy than before, but overall loss is lower due to equation’s V2 term. Linear Technology Magazine • May 1996 DESIGN FEATURES Selecting which CCFL circuit to use for a specific application involves numerous trade-offs. A variety of issues determine which circuit is the “best” approach. At a minimum, the user should consider the following guidelines before committing to any approach. quire some efficiency trade-offs at moderate (1.5W to 3W) power levels. Some systems reduce backlight power when running from the battery, and this can have a pronounced effect on the design. Even seemingly small (e.g., 20%) reductions in power may eliminate painful trade-offs. In particular, high-turns-ratio transformers are required to support low voltage operation at full lamp output. These transformers work well, but are somewhat less efficient than those with lower turns ratios, due to their higher characteristic peak currents. Prevailing trends in battery technology encourage system operation at low voltages, necessitating extreme care in transformer selection and Royer circuit design. Display Characteristics Auxiliary Operating Voltages The display characteristics (including wiring losses) should be well understood. Typically, display manufacturers list lamp requirements. These specifications are often obtained from the lamp vendor, who usually tests in free air, with no significant parasitic loss paths. This means that the actual required power, start and running voltages may differ significantly from the datasheet specifications. The only way to be certain of display characteristics is to measure them. The measured display energy loss can determine whether a floating or grounded circuit is applicable. Low loss displays (relatively rare) usually provide better overall efficiency with grounded drive. As losses become worse (unfortunately, relatively common) floating drive becomes a better choice. Efficiency measurements in both modes may be required to determine the best choice. Auxiliary logic supply voltages should be used (if available) to run CCFL “housekeeping” currents, such as IC VIN pins. This saves power. Always run switching regulators from the lowest potential available, usually 3.3V or 5V. Many systems provide these voltages in switched form, making separate shutdown lines unnecessary. Turning off the switching regulator’s supply shuts down the entire backlight circuit. ESSENTIALLY GROUNDED FIELD STRENGTH INCREASES WITH INCREASING DISTANCE FROM GROUNDED END OF LAMP HIGH VOLTAGE LAMP TO FEEDBACK CCFL_3.eps Figure 3. Field strength versus distance for a ground referred lamp. Field imbalance promotes uneven illumination at low drive levels. that there is not enough energy to maintain uniform phosphor glow beyond some point. Lamps displaying the thermometer effect emit most of their light near the driven electrode, with rapid emission fall-off as distance from the electrode increases. Some displays require extended illumination range. “Thermometering” usually limits the lowest practical illumination level. One acceptable way to minimize thermometering is to eliminate the large field imbalance. The floating drive used to reduce energy loss also provides a way to minimize thermometering. Figure 4 shows the effects of floating drive on lamp-field balance. The balanced field provides excitation at both lamp ends, aiding low current illumination. In a well optimized floating-lamp display, thermometering starts in the lamp’s center, simultaneously proceeding towards both ends as drive is reduced. Selection Criteria The different characteristics of grounded and floating circuits should be kept in focus when reviewing a particular application’s requirements. FIELD STRENGTH INCREASES WITH INCREASING DISTANCE FROM CENTER OF LAMP HIGH VOLTAGE LAMP TRANSFORMER SECONDARY HIGH VOLTAGE CCFL_4.eps Figure 4. Field strength versus distance for a floating lamp. Improving field imbalance permits extended illumination range at low levels. Linear Technology Magazine • May 1996 Operating Voltage Range The operating voltage range spans the minimum and maximum voltages from which the circuit must operate. In battery-driven apparatus, the supply range can easily be 3:1 or greater. The best backlight performance is usually obtained in the 8V–28V range. In general, potentials below 7V re- Line Regulation Grounded lamp circuits, by virtue of their true global feedback, provide the best line regulation. For abrupt changes, a user may notice anything beyond a 1% variation in regulation. A grounded circuit easily meets this requirement; a floating circuit will usually do so. Excursions beyond 1%, caused by slowly changing line inputs, are not normally a problem because they are not detectable. Rapid line changes, such as plugging in a system AC line adapter, require good regulation to avoid annoying display flicker. Power Requirements The CCFL’s power requirement, including display and wiring losses, should be well defined over all condi- 25 DESIGN FEATURES Table 1. Characteristics of LT parts families Issues LT118X Series LT117X Series LT137X Series Optical Efficiency Grounded output versions display dependent. Floating versions usually 5% to 20% better Display dependent Display dependent Electrical Efficiency Grounded output versions––75% to 90%, depending on supply voltage and display. Floating output versions slightly lower 75% to 90%, depending on supply voltage and display 75% to 92%, depending on supply voltage and display Lamp Current Certainty 1% to 2% for grounded versions, 1% to 4% for floating output types 2% maximum 2% maximum Line Regulation 0.1% to 0.3% for grounded types, 0.5% to 6% for floating versions 0.1% to 0.3% 0.1% to 3% Operating Voltage Range 5.3V to 30V, depending on output power, temperature range, display, etc. 4.0V to 30V, depending on output power, temperature range, display, etc. 4.0V to 30V, depending on output power, temperature range, display, etc. Power Range 0.75W to 6W typical 0.75W to 20W typical 0.5W to 6W typical Supply Current Profile Continuous–– no high current peaks Continuous–– no high current peaks Continuous–– no high current peaks Shutdown Control Yes––logic compatible Requires small FET or bipolar transistor Yes––logic compatible Transient Response––Overshoot Excellent–– no optimization required Excellent––requires optimization in some cases Excellent––requires optimization in some cases Dimming Control Pot., PWM, variable DC voltage or current. LT1186 has serial digital input with data storage. Pot., PWM, variable DC voltage or current Pot., PWM, variable DC voltage or current Emissions Low Low Low, although high power versions may require attention tolayout and shielding Open Lamp Protection Internal to IC Requires external small-signal transistor and some discretes at high supply voltages Requires external small-signal transistor and some discretes at high supply voltages Size Low component count, small overall board footprint. 200kHz magnetics. Small––100kHz magnetics Small––1MHz magnetics for fastest versions Contrast Supply Capability Various contrast supply options available, including bipolar output No No tions, including temperature and lamp-specification variations. Usually, IC versions of floating lamp circuits are restricted to 3W to 4W output power, whereas grounded-circuit power is easily scaled. Supply Current Profile The backlight is often located far “forward” in the system. Impedance in cables, switches, traces and connectors can build up to significant levels. This means that a CCFL circuit should 26 draw operating power continuously, rather than requiring discrete, high current “chunks” from a lossy supply line. Royer-based architectures are nearly ideal in this regard, pulling current smoothly over time and requiring no special bypassing, supply impedance or layout treatment. Similarly, Royer-type circuits do not cause significant disturbances to the supply line, preventing noise injection back into the supply. Lamp Current Certainty Lamp current accuracy at full intensity is important for maintaining lamp life. Excessive overcurrent greatly shortens lamp life, while yielding little luminosity benefit. Grounded circuits are excellent in this category, with 1% accuracy usually achieved. Floating circuits are typically in the 2% range. Tight current tolerances do not benefit unit/unit display luminosity because lamp emission and Linear Technology Magazine • May 1996 DESIGN FEATURES Table 1. (continued) Issues LT1269/LT1270 LT1301 LT1173 Optical Efficiency Display dependent Display dependent Display dependent Electrical Efficiency 75% to 90%, depending on supply voltage and display 70% to 88%, depending on supply voltage and display 65% to 75%, depending on supply voltage and display Lamp Current Certainty 2% maximum 2% typical 5% Line Regulation 0.1% to 0.3% 0.1% to 0.3% 8% to 10% Operating Voltage Range 4.5V to 30V, depending on output power, temperature range, display, etc. 2V to 10V practical 2V to 6V practical Power Range 5W to 35W typical 0.02W to 1W practical Essentially 0W to about 0.6W Supply Current Profile Continuous–– no high current peaks Continuous–– no high current peaks Irregular––relatively high current peaking requires attention to supply rail impedance Shutdown Control Requires small FET or bipolar transistor Yes––logic compatible Logic compatible shutdown practical Transient Response––Overshoot Excellent––requires optimization in some cases Excellent–– no optimization required Excellent–– no optimization required Dimming Control Pot., PWM, variable DC voltage or current Pot., PWM, variable DC voltage or current Pot., PWM, variable DC voltage or current Emissions High power mandates attention to layout and shielding Very low Itsy-bitsy Open-Lamp Protection Requires external small-signal transistor and some discretes at high supply voltages Requires external small-signal tansistor and some discretes, but low supply voltages usually eliminate this consideration None, but low supply, low power operation usually eliminates this issue Size Relatively large due to high power 100kHz magnetics Very small––low power magnetics cut size Small––low power magnetics cut size Contrast Supply Capability No No No display attenuation variations approach ±20% and vary over life. Efficiency CCFL backlight efficiency should be considered from two perspectives. The electrical efficiency is the ability of the circuit to convert DC power to high voltage AC and deliver it to the load (lamp and parasitic) with minimum loss. The optical efficiency is perhaps more meaningful to the user. It is simply the ratio of display luminosity to DC power into the CCFL circuit. The electrical and optical losses are lumped together in this measurement to produce a luminosity versus power specification. It is quite significant that the electrical and optical peak efficiency operating points do not necessarily coincide. This is primarily Linear Technology Magazine • May 1996 due to the dependence of the lamp’s emissivity on wave shape. The optimum wave shape for emissivity may or may not coincide with the circuit’s electrical operating peak. In fact, it is quite possible for inefficient circuits to produce more light than more efficient versions. The only way to ensure peak efficiency in a given situation is to optimize the circuit to the display. Shutdown System shutdown almost always requires turning off the backlight. In many cases, the low voltage supply is already available in switched form. If this is so, the CCFL circuits turn off, absorbing very little power. If switched low voltage power is not available, the shutdown inputs may be used, requiring an extra control line. Transient Response The CCFL circuit should turn on the lamp without attendant overshoot or poor control loop settling characteristics. This can cause objectionable display flicker, and, in the worst case, result in transformer overstress and failure. Properly prepared floating and grounded CCFL circuits have good transient response, with LT118Xbased types being inherently easier to optimize. Dimming Control The method of dimming should be considered early in the design. All of the circuits shown in this article can be controlled by potentiometers, DC voltages and currents, pulse-width modulation or serial data protocols. Use a dimming scheme with high 27 DESIGN FEATURES Table 2. Features of LT118X series parts Part LT1182 LT1183 LT1184 LT1184F LT1186 Floating-Lamp Operation Yes Yes No Yes Yes Grounded-Lamp Operation Yes Yes Yes Yes Yes Bipolar Contrast Outputs Unipolar Contrast Outputs No No No Voltage Reference Available No Yes Yes Yes No Internal Control DAC No No No No Yes Contrast Supply cally based selection. Pure analytics are pretty—working circuits come from the bench. Some generalizations of limited use are, however, possible. Tables 1 and 2 attempt to summarize salient characteristics versus part type and may (however cautiously) be considered as a beginning point. 2 Table1 summarizes characteristics of all the circuits. Table 2 focuses on the features of the LT118X series parts. References: accuracy at maximum current to prevent excessive lamp drive. Open Lamp Protection The CCFL circuits deliver a current source output. If the lamp is broken or disconnected, the compliance voltage is limited by the transformer turns ratio and DC input voltage. Excessive voltage can cause arcing and resultant damage. Typically, the transformers withstand this condition, but open lamp protection will ensure against failures. This feature is built into the LT118X series; it must be added to other circuits. Size Backlight circuits usually have severe size and component-count limitations. The board must fit within tightly defined dimensions. LT118X series-based circuits offer the lowest component count, although board space is usually dominated by the Royer transformer. In extremely tight spaces, it may be necessary to physically segment the circuit, but this should be considered only as a last resort. Contrast Supply Capability Some LT118X parts provide contrastsupply outputs. The other circuits do not. The LT118X’s onboard contrast supply is usually an advantage, but space is sometimes so restricted that it cannot be used. In such cases the contrast supply must be remotely located. Emissions Backlight circuits rarely cause emission problems, and shielding is usually not required. Higher power versions (for example, above 5W) may require attention to meet emission requirements. The fast-rise switching regulator output sometimes causes more RFI than the high voltage AC waveform. If shielding is used, its parasitic effects are part of the inverter load and optimization must be carried out with the shield in place. Summary of Circuits The interdependence of backlight parameters makes summarizing or rating various approaches a hazardous exercise. There is simply no intellectually responsible way to streamline the selection and design process if optimum results are desired. A meaningful choice must be the outcome of laboratory-based experimentation. There are just too many interdependent variables and surprises for a systematic, theoreti- 1. Williams, Jim. Measurement and Control Circuit Collection. Linear Technology Corporation Application Note 45, June 1991. 2. Williams, Jim. Illumination Circuitry for Liquid Crystal Displays. Linear Technology Corporation Application Note 49, August 1992. 3. Williams, Jim. Techniques for 92% Efficient LCD Illumination. Linear Technology Corporation Application Note 55, August 1993. 4. Bonte, Anthony. LT1182 Floating CCFL with Dual Polarity Contrast. Linear Technology Corporation Design Note 99, March 1995. 5. Williams, Jim. A Fourth Generation of LCD Backlight Technology. Linear Technology Corporation Application Note 65, December 1995. Notes: 1 LTC’s investigation of CCFLs has been reported in a continuing series of publications, which appear in the “References” at the end of this article. In particular, reference 5 (the source of this text) reviews all previous work and presents recent findings. 2 Readers detecting author ambivalence about the inclusion of Tables 1 and 2 are not hallucinating. Authors can be contacted at (408) 432-1900 28 Linear Technology Magazine • May 1996 DESIGN FEATURES LTC1454/54L and LTC1458/58L: Dual and Quad 12-Bit, Rail-to-Rail, Micropower DACs by Hassan Malik and Jim Brubaker Dual and Quad Rail-to-Rail DACs Offer Flexibility and Performance The LTC1454 and LTC1454L are dual 12-bit, single supply, rail-to-rail voltage-output digital-to-analog converters. The LTC1458 and LTC1458L are quad versions of this family. These DACs have an easy-to-use, SPI-compatible interface. A CLR pin and power-on-reset both reset the DAC outputs to zero scale. DNL is guaranteed to be less than 0.5LSB. Each DAC has its own rail-to-rail voltage output buffer amplifier. The onboard reference is brought out to a separate pin and can be connected to the REFHI pins of the DACs. There is also a REFLO pin that can be used to offset the DAC range. For further flexibility the ×1/×2 pin for each DAC allows the user to select a gain of either 1 or 2. The LTC1454/54L are available in onboard reference and a convenient full scale of 2.5V when using the onboard reference and a gain-of-2 configuration. 16-pin PDIP and SO packages, and the LTC1458/58L are available in 28pin SO or SSOP packages. 5V and 3V Single Supply and Micropower Circuit Topology The LTC1454 and LTC1458 operate from a single 4.5V to 5.5V supply. The LTC1454 dissipates 3.5mW (ICC typical = 700µA), whereas the LTC1458 dissipates 6.5mW (I CC typical = 1.3mA). There is an onboard reference of 2.048V and a nominal full scale of 4.095V when using the onboard reference and a gain-of-2 configuration. The LTC1454L and LTC1458L operate on a single supply with a wide range of 2.7V to 5.5V. The LTC1454L dissipates 1.35mW (ICC typical = 450µA), whereas the LTC1458L dissipates 2.4mW (ICC typical = 800µA) from a 3V supply. There is a 1.22V Dual and Quad DACs Offer Lots of Functionality in Convenient Packages Figures 1 and 2 show block and pin diagrams for the LTC1454/54L and the LTC1458/58L, respectively. Both these parts offer the user a great deal of flexibility. The ×1/×2 pin for each DAC can be used to select a gain of either 1 or 2. An internal reference can be used to drive the REFHI input of the DACs. The user can also offset the DAC output by means of the REFLO pin and can set an arbitrary full scale by driving the REFHI pin with the appropriate source. R R X1/X2B 1 16 VOUTB CLR 2 15 VCC CLK 3 14 REFHIB 13 GND 12 REFLO 11 REFHIA 10 REFOUT 9 VCC – DIN CS/LD 5 DOUT 6 X1/X2A LD 12-BIT DAC-B REGISTER 4 7 + DAC B 24-BIT SHIFT REGISTER LD 12-BIT DAC-A REGISTER + DAC A A – POWER-ON RESET R VOUTA B REFERENCE LTC1454L: 1.22V LTC1454: 2.048V R 8 Figure 1. Dual rail-to-rail micropower 12-bit DACs offer application flexibility in a small 16-lead SO package. Linear Technology Magazine • May 1996 29 DESIGN FEATURES X1/X2C 1 VOUTC 2 28 VCC DAC C LD LD 12-BIT DAC C REGISTER 12-BIT DAC B REGISTER 27 X1/X2B DAC B CS/LD 3 26 VOUTB POWER-ON-RESET DIN 4 REFHIC 5 25 CLR 24 REFHIB GND 6 23 GND REFLOC 7 22 REFLOB 48-BIT SHIFT REGISTER REFLOD 8 21 REFLOA REFHID 9 20 REFHIA LTC1458: 2.048V LTC1458L: 1.22V DOUT 10 CLK 11 18 NC NC 12 VOUTD 13 19 REFOUT 17 VOUT A DAC D 12-BIT DAC D REGISTER 12-BIT DAC A REGISTER LD LD DAC A X1/X2D 14 16 X1/X2A 15 VCC REFHI + VOUT – REFLO X1/X2 Figure 2. LTC1458/LTC1458L block diagram: quad rail-to-rail micropower 12-bit DACs in small 28-pin SSOP packages 30 Linear Technology Magazine • May 1996 DESIGN FEATURES LTC1454L: 2.7V TO 5.5V LTC1454: 4.5V TO 5.5V LTC1454L/LTC1454 X1/X2 B µP TO NEXT DAC FOR DAISY-CHAINING OUTPUT A LTC1454L: 0V TO 2.5V LTC1454: 0V TO 4.095V VOUT B CLR VCC CLK REFHI B DIN GND CS/LD REFLO DOUT REFHI A X1/X2 A REF VOUT A VCC OUTPUT B LTC1454L: 0V TO 2.5V LTC1454: 0V TO 4.095V Guaranteed 0.5LSB DNL The LTC1454 and LTC1458 family uses a proprietary architecture that was first used in the LTC1257 and is described in more detail in Volume III Number 3 of Linear Technology. This architecture uses a patented interpolator to achieve 12-bit linearity and is guaranteed to be monotonic. The typical DNL is better than 0.2LSB, over two times better than the worst-case specification of 0.5LSB. 0.1µF LTC1454L: 1.22V LTC1454: 2.048V True Rail-to-Rail Performance 1454_2.eps Figure 3. Single-supply operation and a three-wire serial interface makes these dual DACs flexible and easy to use. When the ×1/×2 pin is tied to GND, a gain of 2 is set and the full-scale output is twice the REFHI input. For a gain of 1, the ×1/×2 pin should be tied to the VOUT pin. In this configuration, the full-scale output is equal to the REFHI input. The onboard reference is available on a dedicated pin, REFOUT, which can be used to drive the REFHI pin of any DAC. The DACs can be used for multiplying-type applications by driving the REFHI pin externally. For the LTC1454L and LTC1458L, REFOUT is 1.22V and the gain resistors have been sized so that when REFOUT is tied to REFHI and a gain of 2 configuration is selected, the full-scale output is 2.5V (actual gain is 2.05). On the LTC1454 and LTC1458, REFOUT is 2.048V; when this is tied to REFHI and a gain-of-2 configuration is selected, the full-scale output is 4.095V. The DAC outputs swing from REFLO to full scale and the user can offset the output swing above ground by moving REFLO. Figure 3 illustrates how the LTC1454 or LTC1454L is typically applied. When connected as shown, in a gain-of-2 configuration, the outputs swing from 0V to 2×REF. 12-bit segment is for DAC-A and the second is for DAC-B; in the LTC1458/ 58L data is loaded first for DAC-A then for DACs B, C and D. The MSB is loaded first in these 12-bit segments. When CS/LD is high, the DAC registers are loaded from the shift register and the CLK is disabled internally to prevent noise. Data is latched in the DAC registers on the falling edge of CS/LD. Data is shifted out MSB first through the DOUT pin. The DOUT pin permits daisy chaining several DACs. The CLR pin resets the outputs of the DACs to zero scale when it is driven low; it should be tied to VCC for normal operation. The output op amp on these parts can swing to within 5mV of VCC or ground when unloaded, giving these rail-torail DACs an exceptional output swing capability. The op amp can source or sink 5mA even at a 4.5V supply and has an output impedance of 50Ω when swinging to the rails. It has a wide input common mode range that extends from ground up to VCC – 1.5V. The output glitch at mid scale is 20 nV•s and the digital feedthrough is a negligible 0.15nV•s. When used as a multiplying DAC, the SINAD is better than 85dB with an input of up to 2VP–P at 2kHz and 4VP–P output. LTC1458L/LTC1458 VOUT X1/X2C VCC 5V VOUTC X1/X2B 0.1µF CS/LD VOUTB DIN REFHIC GND 500Ω CLR REFHIB GND REFLO C REFLOB REFLOD REFLOA REFHI D REFHIA Easy-to-Use, Flexible Interface DOUT Data is shifted into the input shift register on the rising edge of CLK. Data is loaded for both DACs as one word, 24 bits long for the LTC1454/ 54L and 48 bits for the LTC1458/ 58L. In the LTC1454/54L the first CLK N/C N/C VOUTA VOUTD X1/X2A X1/X2D VCC Linear Technology Magazine • May 1996 REFOUT Figure 4. A 12-bit DAC with digitally controlled zero scale and full scale 31 DESIGN FEATURES Flexibility Allows a Host of Applications 5V These products can be used in a wide range of applications, including digital calibration, industrial process control, automatic test equipment, cellular telephones and portable, battery-powered systems. 0.1µF X1/X2 B A 12-Bit DAC with Digitally Programmable Full Scale and Offset Figure 4 shows how to use one LTC1458 to make a 12-bit DAC with a digitally programmable full scale and offset. DAC-A and DAC-B are used to control the offset and full scale of DAC-C. DAC-A is connected in a ×1 configuration and controls the offset of DAC-C by moving REFLO C above ground. The minimum value to which this offset can be programmed is 10mV. DAC-B is connected in a ×2 configuration and controls the full scale of DAC-C by driving REFHIC . Note that the voltage at REFHIC must be less than or equal to VCC/2, corresponding to DAC-B’s code ≤ 2,500 for VCC = 5V, since DAC-C is being operated in ×2 mode for full rail-to-rail output swing. The transfer characteristic is: VOUTC = 2 × [DC × (2 × DB- DA) + DA] × REFOUT CLR VCC CLK CLK REFHI B DIN DIN CS/LD VIN B: 1.22V ± 1.22V GND LTC1454L REFLO CS/LD DOUT VOUT A VOUT B VOUT B X1/X2 A REF VOUT A VCC VO = A/B = (VIN – VREF) ( VIN A: 1.22V ± 1.22V REFHI A VIN – 1.22 )( 1.22V 5k GAIN ( ) DIN – 1 +1 + V REF 4096 ) 1454_4.eps D 2.05 IN –1.05 + 1.22V 4096 Figure 5. Single-supply 4-quadrant multiplying DAC Conclusion The LTC1454/54L and LTC1458/58L offer dual and quad 12-bit standalone performance in a 16-pin or 28-pin package. Their low supply current, excellent DNL and a wide range of built-in functions allows these parts to be used in a host of applications where flexibility, power, DNL and single supply operation are important. where REFOUT = The reference output DA = (DAC-A digital code)/4096 this sets the offset DB = (DAC-B digital code)/4096 this sets the full scale DC = (DAC-C digital code)/4096 A Single-Supply, 4-Quadrant Multiplying DAC The LTC1454L can also be used for four-quadrant multiplying with an offset signal ground of 1.22V. This application is shown in Figure 5. The inputs are connected to REFHIB or REFHIA and have a 1.22V amplitude around a signal ground of 1.22V. The outputs will swing from 0V to 2.44V, as shown by the equation with the figure. 32 LT1462–1465, continued from page 23 an input-current range of eight decades for a typical supply current of only 60µA. Conclusion The LT1462/LT1464 duals and the LT1463/LT1465 quads combine many advantages found in many different op amps, such as low power, (LT1464/LT1465 are 140µA, LT1462/ LT1463 are 30µA typical per amplifier), wide input common mode range that includes the positive rail and pico ampere input bias currents. Not only is the output swing specified with 2k and 10k loads, gain is also specified for the same load condi- tions, which is unheard-of for micropower op amps. The 1MHz (LT1464/LT1465) or 250kHz (LT1462/LT1463) bandwidth self adjusts to maintain stability for capacitive loads up to 10nF. And don’t forget the low 0.8mV offset voltage and DC gains of 1 million (LT1464/ L T1465) or 250,000 (LT1462/ LT1463) even with 10k loads. The LT1462/LT1464 are available now as a dual, in the low cost 8-pin plastic dips and the space-saving SO8 package, and the LT1463/LT1465 are available in the 14-pin dip and SO14 packages. Linear Technology Magazine • May 1996 DESIGN INFORMATION LTC1538-AUX: a New Addition to LTC’s Adaptive Power Controller Family by Steve Hobrecht Adaptive Power: You’re designing a new product that Constant Frequency and requires a very efficient, low noise, Low Current Efficiency Introduction multiple-output power supply. You need a linear, low noise power source for instrumentation, multimedia or telecommunications subsystems. A standby 0–20mA, 5V power source that draws very low quiescent current is needed to power a wake-up interrupt function. The overall system cost is important and you want a flexible power architecture that will allow adaptations to ensure present and future product differentiation. Look no further—the LTC1538-AUX/ LTC1539 products will perform all of the above requirements and, of course, many more. The LTC1538-AUX/ LTC1539 are new members of Linear Technology’s line of Adaptive PowerTM, all N-channel drive, constant-frequency DC/DC controllers. These synchronous buck-controllers operate over a 3.5V–36V supply voltage range, while maintaining constant frequency over two decades of output current range (LTC1539). Portable electronic equipment, including notebook computers, PDAs and RF-linked data terminals, has stringent power supply requirements. Efficiency, noise, input supply range and overall system cost are all important factors when considering which integrated circuit should be chosen as the “brains” of the power supply system. Different architectures are available within the market that look, at first sight, to be remarkably similar. Hidden behind the scenes of a power supply controller is the method by which it supplies the two, three, or more output voltages it provides. There are many different approaches to providing a few fixed voltages for future portable products. Linear Technology Magazine • May 1996 The LTC1435–LTC1439 DC/DC controllers, introduced in the February issue of Linear Technology magazine, are a new family of parts that incorporate an Adaptive Power output stage. This new architecture allows two previously incompatible parameters—constant frequency and good low current efficiency—to coexist within the same power supply. The article goes on to describe most of the salient features of the new architecture, including an all-N-channel output stage(s), wide (3.5V–36V) input voltage range, very low dropout voltage (99% duty cycle) and a low dropout, adjustable linear regulator controller. The LTC1538-AUX and LTC1539 are two new members of the family, which provide a 5V standby linear regulator that is kept active even when both channels of these dual controllers are shut down. This 5V supply can deliver power for a wake-up circuit that is common in keyboard-driven portable systems today. The LTC1538-AUX is a dual DC/ DC controller, available in a 28-pin package, that includes the following functions: 1. A first controller, programmable to 3.3V or 5V using an accurate internal resistive divider. 2. A second controller that can control an adjustable regulator capable of output voltages of 1.19V–10V, determined by an external resistive divider. 3. A secondary feedback input (SFB1) used in conjunction with the first controller to generate a third output voltage that can supply power regardless of the load on the first controller’s primary winding. The SFB1 input forces continuous operation on the first controller using a simple voltage mode loop. 4. An auxiliary linear regulator controller that can provide a low dropout regulator function for output voltages of 1.2V and higher, limited only by the external output circuit. The auxiliary regulator function can also be used as a simple voltage comparator if a regulator is not required. The LTC1539 is a dual DC/DC controller available in a 36-pin SSOP package with all of the above LTC1538-AUX functions in addition to: 1. The second controllers can also be programmed to 3.3V or 5V using an accurate internal resistive divider. 2. A power-on-reset (POR1) output that is low during shutdown and is held low during start-up until the first controller’s output voltage rises to within 7.5% of its final programmed value. The first controller’s output voltage sensing is different from the LTC1438’s and LTC1439’s sensing of the second controller. This power-good signal allows the LTC1539 to monitor the first controller’s output voltage and provide an indication of the secondary winding’s output voltage. 3. An internal hysteretic comparator that has its inverting input tied to a 1.19V reference. The output is an open-drain type and can be pulled up to any available supply of up to 10V. 33 DESIGN INFORMATION 10Ω + VIN 5.2-28V MBRS1100T3 22µF 35V X2 24V 0.1µF KEYBOARD CONTROLLER SIGNAL 100Ω T1 15µH 100Ω 1 TGL1 BOOST1 28 + 3.3µF 35V 0.033Ω M1 VOUT1 5V/3A 0.1µF 2 RUN/SS1 SW1 SENSE+1 VIN SENSE–1 BG1 27 + 1000pF 1000pF 4 CMDSH-3 25 220pF 5 10kΩ VPRGM1 INT VCC 100µF 10V X2 26 24 MBRS140T3 M2 0.1µF 4.7µF, 16V + 3 1000pF 6 ITH1 PGND GND 23 + 56pF 7 COSC BG2 22 M4 100µF 10V X2 VOUT2 3.3V/3.5A MBRS140T3 LTC1538CG-AUX 8 SGND EXT VCC 21 L1 10µH 470pF 9 SFB1 SW2 ITH2 TGL2 0.033Ω 20 + 22µF 35V X2 1000pF 10kΩ 10 19 M3 0.1µF 100pF 11 220kΩ 390kΩ 3pF 12 220pF BOOST2 SENSE2– AUXON SENSE2+ AUXFB 17 CMDSH-3 1000pF 13 0.1µF VOSENS2 18 10Ω 10Ω 14 RUN/SS2 AUXDR 5V STANDBY 16 AUX ON/OFF 15 47k Q1 2N2907A KEYBOARD CONTROLLER SIGNAL AUX 12V OUT 1MΩ + NOTES: VIN 5.2-28V; SWITCHING FREQUENCY = 200kHz 5V-3A / 3.3V-3.5A / 12V-120mA M1-M4 = Si4412DY T1 = DALE LPE-6562-A092; 15µH; 1:2.2 L1 = SUMIDA CDRH125-100MC 10µH INPUT AND OUTPUT CAPACITORS ARE AVX-TPS SERIES HAVING A MAXIMUM ESR SPECIFICATION 4.7µF 25V 100k LTC1538-AUX provides 3.3V/3.5A, 5V/3A, 12V/120mA and 5V/20mA standby power. Notebook Computer Power Solution The circuit shown in Figure 1 is a power solution for a portable notebook computer. The switching controllers provide 5V at 3A, 3.3V at 3.5A and a regulated 12V/120mA output using the auxiliary regulator. See the LTC1538-AUX/ LTC1539 data sheet for techniques illustrating how to generate other voltage and current combinations using the auxiliary regulator. The circuit provides a standby 5V output to power a keyboard con34 troller. The keyboard controller has the ability to control the run/softstart (RUN/SS1 and RUN/SS2) pins of the LTC1538-AUX using simple logic gates. The turn-on sequence is determined by the ratio of Css1 and Css2. The secondary winding of transformer T1 develops a somewhat unregulated voltage due to the loading on VOUT1. The SFB1 control pin will keep the minimum voltage of the secondary output to approximately 13V, but the peak voltage is affected by the loading and leakage inductance of the transformer. The auxiliary regulator will keep the 12V supply well within its normal ±5% specified tolerance. Short-circuit protection can be added to this circuit if required, but it is assumed here that the protection will only be required at the user PCMCIA interface and will therefore be taken care of as part of the interface and not duplicated here. Linear Technology Magazine • May 1996 DESIGN IDEAS The New LTC1435 Makes a Great Microprocessor Core Voltage Regulator The LTC1435 is a constant-frequency, current mode, synchronous step-down switching regulator that controls external N-Channel MOSFETs for very efficient, low noise operation. This controller is well suited for many DC/DC converter applicaDESIGN IDEAS The New LTC1435 Makes a Great Microprocessor Core Voltage Regulator .......... 35 John Seago How to Ring a Phone with a Quad Op Amp ............. 37 Dale Eagar tions. With a wide input voltage range of 3.5V to 36V and low dropout (99% duty cycle) capability, the LTC1435 is a good choice for battery-powered circuits that must also operate from a higher voltage AC adapter/battery charger. The current mode architecture provides excellent load and line regulation, and internal slope compensation eliminates subharmonic oscillations. The 1%-tolerance reference ensures good initial setpoint accuracy. Switching frequency can be set between 50kHz and 400kHz, so circuit efficiency, component size and transient response can be prop- by John Seago erly balanced for each application. The LTC1435 features logic-level on/ off control, and output current softstart, which provides a delayed output-current ramp to the load. When the controller is shut down, voltage is removed from the load and quiescent input current drops to a mere 15µA. The LTC1435 is available in the popular 16-pin SO package. Current microprocessor architectures require different voltages for the core and the I/O ring. For portable computer applications, the microprocessor core voltage is reduced for lower power consumption. Three 5.5V-28V + C9 22µF 35V C1 68pF 1 COSC TG + C10 22µF 35V 16 Q1 SI4412 C2 0.1µF 2 R1 10k RUN/SS BOOST 15 C3 330pF 3 ITH SW SFB VIN 14 C6 0.1µF C14 47pF 4 C4 100pF 6 7 SGND INT VCC VOSENS BG SENSE– PGND 12 C5 0.001µF 8 C9, C10 = C12, C13 = D1 = D2 = L1 = Q1 = Q2 = R2 = SENSE+ EXT VCC C7 0.1µF 2.9V @2.65A C11 470pF 11 10 R2 0.033Ω D1 MBRS0530 13 LTC1435 5 L1 10µH R3 35.7k + C13 100µF 10V Q2 SI4412 + + C8 4.7µF D2 MBRS140T3 9 C12 100µF 10V R4 24.9k AVX, TPSE226M035 AVX, TPSD107M010 MOTOROLA, MBRS0530 MOTOROLA, MBRS140T3 SUMIDA, CDRH125-10 SILICONIX, SI4412DY IRC, LR2010-01-R033-F Figure 1. 2.9V regulator for portable Pentium processor Linear Technology Magazine • May 1996 35 DESIGN IDEAS 2.9V 10V 100mVP-P 50mV/DIV 0.0V 5V/DIV 4A 1V/DIV 4A 2A/DIV 0.0V 1.25A 1A/DIV 0.0A 0.0A 0.0A 500µs/DIV 2A/DIV 200µs/DIV 2µs/DIV Figure 2. LTC1435 output voltage transient response Figure 4. Soft-start output voltage and inductor current Figure 5. Inductor input voltage and current wave forms high current regulated voltages, 5V, 3.3V and 2.9V, are commonly required. Several IC manufacturers offer two-output controllers, like the LTC1438, which are normally used for 5V and 3.3V. Another controller is required to generate the 2.9V. Figure 1 shows a simple circuit using the LTC1435 to provide 2.9V at 2.65 amps for the Intel portable Pentium ® processor. The circuit's 165kHz switching frequency was selected as a compromise between transient response and circuit efficiency. This frequency is determined by the value of C1. Output voltage transient response is shown in Figure 2. The transient response can be adjusted for other applications by changing the values of compensation components R1, C3 and C14. Efficiency curves for different input voltages and load currents up to 3.2 amps are shown in Figure 3. Another feature of the LTC1435 is the option to maintain constant switching frequency under all load conditions or to select Burst Mode™ operation for the highest efficiency at light loads. Pulling the SFB pin high enables Burst Mode when load current drops to a low value. However, Burst Mode can degrade transient response at low input voltages and should not be used for pulsed load applications where good transient response at low input voltage is required. The SFB pin in the circuit of Figure 1 is grounded, which will defeat the Burst Mode and ensure constant frequency operation. It is sometimes necessary to shut down power to the load. RUN/SS is a dual-function pin on the LTC1435 that provides both output voltage on/off control and output current soft-start capability. When RUN/SS (pin 2) is pulled low by an open collector or open drain device, the output voltage is turned off and the controller shuts down. The soft-start feature takes over when the low is removed from pin 2. Figure 4 shows the output voltage under no-load conditions at turn-on, with the soft-start capacitor C2 equal to 0.1µF. This simulates the start up conditions of a microprocessor held in standby until after the input voltage has stabilized. If the regulator is started under full-load conditions, the output current ramp time will be approximately 0.5s/µF of soft-start capacitance. The output voltage during this soft-start period depends on the load impedance. If soft-start is not required, capacitor C2 is not used and the current limit setting of the regulator determines the maximum load current during start-up. In order to properly enhance the top MOSFET (Q1), INT VCC is level shifted by charge pumping capacitor C6 to INT VCC minus one diode drop. C6 provides the power to turn Q1 on and off. The INT VCC of the LTC1435 is regulated to 5V, but will increase with higher voltage applied to EXT VCC, up to a maximum of 10V. For outputs between 5V and 10V, the output should be connected to EXT VCC. The power loss of the INT VCC linear regulator will be replaced by the more efficient switcher output and the gate-drive voltage of both MOSFETs will be increased for lower “ON” resistance. Figure 5 shows L1 input voltage and current with a 10 volt input, 2.9 volt output, and 2.65 amp load current. 100 5.5V INPUT EFFICIENCY (%) 90 10V INPUT 15V INPUT 80 70 20V INPUT 60 50 0.01A 28V INPUT 0.1A 1.0A 10A Figure 3. LTC1435 efficiency curves for different input voltages Pentium is a registered trademark of Intel Corporation. 36 Authors can be contacted at (408) 432-1900 Linear Technology Magazine • May 1996 DESIGN IDEAS How to Ring a Phone with a Quad Op Amp by Dale Eagar V+ Requirements R1 When your telephone rings, exactly what is the phone company doing? This question comes up frequently, as it seems everyone is becoming a telephone company. Deregulation opens many new opportunities, but if you want to be the phone company you must ring bells. The voltage requirement for ringing a telephone bell is a 87VRMS 20Hz sine wave superimposed on –48VDC. The module makers have solutions for ring-tone generation, solutions that are expensive in several ways: R2 + LT1491 V– – R3 C1 V– F NOTE: FB Ring-tone generation requires two high voltages, 60VDC and –180VDC. Figure 1 details the switching power supply that delivers the volts needed to run the ring-tone circuit. This switcher can be powered from any voltage from 5V to 30V, and is shut down when not in use, conserving power. The transformer and optocoupling yield a fully floating output. Faraday shields in the transformer eliminate most switcher noise, preventing mystery system noise problems later. Table 1 is the build diagram of the transformer used in the switching power supply. 2 70T #34 5 220µF 1 20T #26 + 0.47µF 3A 60V + 200T #34 4 4 60V VC 0.47µF 8 6 3 –180V MUR160 10k 1 180V GND 3 0.01 5 4N28 2 2k 10k 4 2N3904 RING 10k 1 330Ω 0.1µF DI_RING_01.eps Figure 1. The switching power supply Linear Technology Magazine • May 1996 OR What the module makers offer is a solution to a problem that, by its nature, calls for unusual design techniques. What we offer here is a design that you can own, tailor to your specific needs, lay out on your circuit board and put on your bill of materials. Finally, you will be in control of the black magic (and high voltages) of ring-tone generation. + 2 DUTY FACTOR = 50% Not Your Standard Bench Supply = SECONDARY GROUND LT1070 1 R3 C1 An Open-Architecture Ring-Tone Generator 7 SW FREQ = Figure 2. Op amp intentionally oscillates T1 VIN 2 R 3 2 REPRESENTS A FLOATING GROUND, NOT EQUAL TO F 60V 5 R1= DI_RING_02.eps MUR160 5V – 30V V+ F ❏ They cost a lot ❏ They force their footprint and height profile on your system ❏ They are of fixed design, not allowing the user to modify internal functionality ❏ The components used in the modules are purchased and stocked by the module maker, whose policies and schedules may not be in your best interest = PRIMARY GROUND 1 FREQ Quad Op Amp Rings Phones When a phone rings, it rings with a cadence, a sequence of rings and pauses. The standard cadence is one second ringing followed by two seconds of silence. We use the first 1/4 of the LT1491 as a cadence oscillator (developed in Figures 2 and 3) whose output is at VCC for one second and then at VEE for two seconds (see Figure 7). This sequence repeats every three seconds, producing the all-toofamiliar pattern. The actual ringing of the bell is performed by a 20Hz AC sine wave signal at a level of 87VRMS, 37 DESIGN IDEAS V+ R1 47k R2 10k Table 1. Ring-tone high voltage transformer build diagram 2 SEC 1 SEC V+ Materials F + R4 33k LT1491 V– – R3 1.6M 1 Hz 3 DUTY FACTOR =33.3% FREQ = C1 1µF OUTPUT STARTS HIGH ON POWERUP. V– 2 EFD 20–15–3F8 Cores 1 EFD 20–15–8P Bobbin 2 EFD 20– Clip 2 .007" Nomex Tape for Gap DI_RING_03.eps Figure 3. Duty factor is skewed Start Pin 1 200T #34 Winding 1 V+ 100K 1 Wrap .002" Mylar Tape 150K Start Pin 2 70T #34 V+ F Winding 2 GATE + V– LT1491 OUT 500K V– 0.1 Connect Pin 3 1T Foil Tape Faraday Shield 1 S 20 1 Wrap .002" Mylar Tape DUTY FACTOR = 50% V– F Term Pin 7 1 Wrap .002" Mylar Tape V+ – HIGH = OSCILLATE Term Pin 8 DI_RING_04.eps Shields Connect Pin 6 1T Foil Tape Faraday Shield Figure 4. Gated 20Hz oscillator 1 Wrap .002" Mylar Tape 10k 300k 100K 1.6M F SQUARE WAVE OUT – – CR1 500k 1µF 620k 0.1 20Hz CADENCE F V– V– DI_RING_05.eps Figure 5. Sequencer: cadenced 20Hz oscillator node labeled “square out” to a half sine wave, half square wave. Appending the filter to the waveform sequencer creates the waveform engine detailed in Figure 8. The output of this waveform engine is shown in the bottom trace in Figure 7. This waveform engine is shown in block form in Figure 9. C4 0.047 superimposed on –48VDC. The 20Hz Square Wave Plus Filter signal is implemented with the sec- Equals Sine Wave ond amplifier in the LT1491 (Figure 4) which acts as a gated 20Hz oscillator. Connecting the circuit shown in Figure 3 to the circuit shown in Figure 4 and adding three resistors yields the sequencer as shown in Figure 5. The waveform, labled “Square Out,” is the fourth trace in Figure 7. This waveform is the output of Figure 5. 38 Term Pin 5 Finish with Mylar Tape 300k LT1491 LT1491 33k Winding 3 + + 47k Start Pin 4 20T #26 150k Thevenin will tell you that the output impedance of the sequencer shown in Figure 5 is 120kΩ. This impedance can be recycled and used as the input resistance of the filter that follows. The filter detailed in Figure 6 uses the Thevenin resistor on its input, yielding a slick, compact design while distorting the nice waveform on the – RTHEVEVIN 120k R11 10k LT1491 + OUTPUT IMPEDANCE OF FIGURE 6 SINE OUT C3 0.068 F DI_RING_06.eps Figure 6. Filter to remove the sharp edges Linear Technology Magazine • May 1996 DESIGN IDEAS 1 SEC POWER NEXT RING 2 SEC 15V 20Hz ON V+ OFF WAVEFORM ENGINE V+ SINE OUT 6V SINE OUT VREF REF CADENCE V– F V– –6V DI_RING_09.eps –15V V+ 20Hz Figure 9. Waveform engine V– SQUARE OUT 2 + 5 V 15V REG 2 – V 5 SINE OUT 60V 47k 15V OUT V+ 2 + 5 V WAVEFORM ENGINE 2 – V 5 0.01µF IN COM F SINE OUT 10k 150k – REF V– DI_RING_07.eps HV F Figure 7. Timing of waveform engine + –15V REG –15V OUT F We now build a system-level block diagram of our ring tone generator. We start with the waveform engine of Figure 9, add a couple of 15V regulators and a DC offset (47k resistor), then apply some voltage gain with a high voltage amplifier to ring the bell. This hypothetical system-level block diagram is detailed in Figure 10. Figure 11 shows the output waveform of the ring tone generator; the sequenced ringing starts when the high voltage supply (Figure 1) is turned on, and continues as long as the power supply is enabled. –180V What’s Wrong with This Picture (Figure 10) Careful scrutiny of Figure 10 reveals an inconsistency: even though the three fourths of the LT1491 in the waveform engine block are powered by ±15V, the final amplifier is shown as powered from 60V and –180V; this poses two problems: first the LT1491 is a quad op amp and all four sections have to share the same supply pins, and second, the LT1491 will not meet specification when powered from 60V and –180V. This is because 240V is 33k Building High Voltage Amplifiers Setting aside the waveform engine for a moment, we will develop a high voltage amplifier. We start with the 10k – F + 300k LT1491 150k + LT1491 LT1491 GATED SINE WAVE OUTPUT – – F greater than the absolute maximum rating of 44V (V+ to V-). Linear Technology products are noted for their robustness and conservative “specmanship,” but this is going too far. It is time to apply some tricks of the trade. 0.068 620k 100K 47k DI_RING_10.eps Figure 10. High voltage amplifier 10k + F IN COM F Mapping Out the Ring-Tone Generator in Block Form RL 1.6M 1N4148 16k F 0.47 1µF 0.47 620k F DI_RING_08.eps V– Figure 8. Waveform synthesizer Linear Technology Magazine • May 1996 39 DESIGN IDEAS REV –15V REF +VIN RFF POWER ON 100k 620Ω IRF620 42V SINE –48V OUT –138V DI_RING_11.eps + 15V IRF9620 2N3904 AV = – RFB RFF V– DI_RING_13.eps X X X 620Ω X X IN 2N3906 15V V+ – OFF 3 SEC RL RFB 100k Figure 11. System output Figure 13. Standard op amp form REF REV +15V –VIN DI_RING_12.eps Figure 12. High differential voltage regulators ±15V regulators shown in Figure 10; these are not your run-of-the-mill regulators, these are high differential voltage regulators, constructed as shown in Figure 12. Using these regulators and the final section of the LT1491 quad op amp, we can build a high voltage amplifier. We will use the ±15V regulators as the “output transistors” of our amplifier, because they can both take the voltage and dissipate the power required to provide the ring voltage and current. By connecting the op amp to the regulators, one gets a free cascode high voltage amplifier. This is because the supply current for the op amp is also the regulator current. The trouble one encounters when so doing is that the input common mode range of the op amp is not wide enough to accommodate the full output voltage range of the composite amplifier. This would not be a problem if the amplifier were used as a unity-gain noninverting RFF Inverting Op Amp Circuit Gets Morphed Let’s focus on this transformative step as it relates to the simple inverting amplifier shown in Figure 13.* Were we to look at the amplifier in Figure 13 in some strange Darwinistic mood, we might see that the power supplies (batteries) are in fact an integral part of our amplifier. Such an observation would lead us to redraw the circuit to look like Figure 14 where the center of RFB RFF AV = – – + X + RL X X RFF AV = – + – DI_RING_14.eps RFB RL RFB RFF + – V+ Y IN IN – Y the two batteries are brought out of the amplifier as the negative terminal of the output. Once that is done, one is free to swap the polarities of the inputs and outputs, yielding the circuit shown in Figure 15. Finally we pull the two batteries back out of the amplifier to get our morphed inverting amplifier (Figure 16). Isn’t assisting evolution fun?† Applying the evolutionary forces just described to the block diagram in Figure 10, we get the block diagram in Figure 17. Actually Figure 17 contains three strangers, R18, R21 and C6, parts not predicted by our evolutionary path (unless R18 = 0Ω and R21 is open) These parts are needed because, in our metamorphosis going from Figure 14 to Figure 15, the amplifier’s internal compensation node was moved from ground to the amplifier’s output. These parts correct the compensation for the new configuration. RFB RFB RFF IN X amplifier, but in this system we need gain to get from our 12VP–P to 87VRMS. Moving the amplifier’s output transistor function out of the op amp and into the ±15V regulators moves the effective amplifier output from the op amp output to the center of the two supplies sourcing the ±15V regulators. This is a transformative step in the evolution of amplifiers from low voltage op amps to high voltage, extended supply amplifiers. Y RL + Y – V– Y AV = – DI_RING_15.eps DI_RING_16.eps RFB RFF Y Figure 14. Hide the batteries inside the op amp 40 Figure 15. Trade inputs and outputs Figure 16. Pull the batteries back out of the amplifier Linear Technology Magazine • May 1996 DESIGN IDEAS Ring-Trip Sense Editor’s Notes: * The grounds X and Y, shown in Figures 13–16, are for illustrating the the effects of “evolution.” Ground X may be regarded as “arbitrary exemplary ground,” and ground Y as “postmetamorphic exemplary ground.” Ground X and ground Y are not the same. Now that we can ring the telephone, we must sense when the phone is picked up. This is done by sensing the DC current flowing to the phone while it is ringing, using the ring-trip sense circuit comprising R23–R26, C7, Q5 and Opto1 of Figure 18, the complete ring-tone generator. This circuit will ring more than ten phones at once, and is protected on its output from shorts to ground or to either the +60V or the –180V supply. † Evolutionary theory invloves pure, random chance. What you have done here requires purposeful thought and design. 150k 0.01µF 15V REG 15V V+ Conclusion WAVEFORM ENGINE Here is a ring tone generator you can own, a robust circuit that is stable into any load. If your system design requires a circuit with different specifications, you can easily tailor this circuit to meet your needs. Don’t hesitate to call us if we can help you with your design. OUT 10k SINE OUT + 60V IN COM C6 R18 R21 LT1491 – REF V– RL 47k F F 180V –15V COM OUT IN –15V REG DI_RING_17.eps Figure 17. Post-evolution block diagram 60V R16 100k R2 47k R3 10k C2 0.47µF 3 R1 33k 2 + U1A LT1491 1 D1 1N4148 Q1 IRF628 R5 100k 5 6 R6 10k C3 0.047µF + U1B LT1491 – 7 R7 16k – R9 300k R11 10k C4 0.068µF 10 9 Z1 15V 100k R4 1.6M CADENCE OSCILLATOR R8 620k U1C LT1491 8 13 – R12 R10 SMOOTHING FILTER 10k 620k R14 10k C5 0.01µF R15 47k 20Hz OSCILLATOR R17 620 + 12 C1 1µF Q3 2N3904 R13 130k 4 – U1D LT1491 14 R18 100 + 11 R24 420 C7 47µF R23 4.7k R26 2k *OPTO1 R25 4.7k Q5 2N3904 LOAD UP TO TEN PHONES Z2 15V Q2 IRF9620 *LED OF OPTO 1 ILLUMINATES WHEN THE PHONE IS OFF THE HOOK Q4 2N3906 R21 150 POWER AMPLIFIER –100V R19 620 R20 100K C6 0.033µF DI_RING_18.eps Figure 18. Ring-tone generator Linear Technology Magazine • May 1996 41 NEW DEVICE CAMEOS New Device Cameos LTC1263: 12V, 60mA Flashers, personal digital assistants, inMemory Programming Supply struments and palm-top computers. in 8-Pin SO Package LT1507 500kHz Monolithic The LTC1263 flash-memory programming supply is a DC/DC converter Buck-Mode Switching that provides the regulated 12V (+5%), Regulator 60mA output necessary to program double byte wide flash memories. Without using any inductors, the LTC1263 can source up to 60mA continuously from an input voltage range of 4.75V to 5.5V. Only four external capacitors are required to complete an extremely small, surface mountable circuit. An internal charge pump uses a pair of external caps (0.47µF) to charge up the output cap (10µF) to 12V and then regulates it to within 5% with a voltage feedback loop. Typically, it takes 0.6ms to ramp the output from 5V to 12V. It takes longer, however, to discharge the output capacitor; it takes 6ms for the output to fall from 12V to 5V. Slow turn-on and turn-off times eliminate any slew-rate or voltage-overshoot problem. With no load, the supply current is typically 300µA. With a full load, the LTC1263 achieves better than 72% efficiency. The LTC1263 offers the same pinout as the LTC1262, so users of that part can acquire twice the flash programming speed and power without changing the existing setup. The output of the LTC1263 can be directly shorted to ground for a brief period without damaging the part. The LTC1263 also has a TTL-compatible shutdown pin that can be directly connected to a microprocessor. In the shutdown mode, VOUT returns to 5V and the supply current drops to about 1µA. The guaranteed 60mA and 12V output not only makes the LTC1263 the preferred choice in flash-memory programming supplies, it is also the ideal solution for compact 12V op amp supplies and battery-powered systems such as notebook comput- 42 The LT1507 is a monolithic buckmode switching regulator, functionally identical to the LT1375 but optimized for lower input voltage applications. It will operate over a 4V to 15V input range, compared with 5.5V to 25V for the LT1375. A 1.5A switch is included on the die, along with all the necessary oscillator, control and logic circuitry. High switching frequency allows a considerable reduction in the size of external components. The topology is current mode for fast transient response and good loop stability. Both fixed output voltage (3.3V) and adjustable parts are available. A special high speed bipolar process and new design techniques allow this regulator to achieve high efficiency at a high switching frequency. Efficiency is maintained over a wide output current range by keeping quiescent supply current to 4mA and by using a supply-boost capacitor to allow the NPN power switch to saturate. A shutdown signal will reduce supply current to 20µA. The LT1507 can be externally synchronized to frequencies from 570kHz to 1MHz with logic-level signals. The LT1507 is available in standard 8-pin SO and PDIP packages. Temperature rise is kept to a minimum by the high efficiency design. Full cycle-by-cycle short-circuit protection and thermal shutdown are provided. The device uses standard surface mount external parts, including the inductor and capacitors. LT1353: 250µA, 3MHz, 200V/µs C-Load™ Quad Op Amp The LT1353 is a quad operational amplifier ideal for low power applications that also require high speed, low distortion, outstanding output drive, DC accuracy, fast settling or stability with a capacitive load. A mere 1mA of supply current powers all four 3MHz, 200V/µs op amps. Each robust output drives a 1kΩ load to a minimum of ±13V on ±15V supplies. Distortion is less that 0.03% for a 20kHz, 20VP–P sine wave into 1kΩ. These C-Load amplifiers are stable with any capacitive load, so they are excellent as buffers or for driving Ato-D converters. Settling time for a 10V step is 700ns to 10mV (0.1%) and 1250ns to 1mV (0.01%). The AC performance in no way compromises the DC specifications. Input offset voltage is less than 600µV. Input bias and offset currents are less than 50nA and 15nA, respectively. Voltage gain driving a 2kΩ load is 30V/mV minimum. The LT1353 operates over a wide supply-voltage range and is specified from ±2.5V to ±15V. The LT1353 uses the industrystandard pinout in the 14-lead plastic SO surface mount package. LTC1069-1: Low Power, 8th-Order, Progressive Elliptic Lowpass Filter The LTC1069-1 is a monolithic 8th-order lowpass filter featuring clock-tunable cutoff frequency and 2.5mA power supply current with a single 5V supply. The LTC1069-1 can also operate with a single 3.3V supply. The cutoff frequency (fCUTOFF) is equal to the clock frequency divided by 100. The gain at fCUTOFF is –0.7dB and the typical passband ripple is ±0.15dB up to 0.9 times cutoff. The stopband attenuation of the LTC1069-1 features a progressive elliptic response, reaching 20dB attenuation at 1.2 times cutoff, 52dB attenuation at 1.4 times cutoff and 70dB attenuation at twice cutoff. The LTC1069-1 passband can be clock tuned to cutoff frequencies of Linear Technology Magazine • May 1996 NEW DEVICE CAMEOS up to 12kHz with ±5V supplies and to cutoff frequencies up to 8kHz with a single 5V supply. The low power feature of the LTC1069-1 does not penalize the device’s dynamic range. With ±5V supplies and an input range of 0.3VRMS to 2.5VRMS, the signal to (noise + THD) ratio is ≥70dB. The wideband noise of the LTC 1069-1 is 130µVRMS. Other filter responses with lower power or higher speeds can be obtained. Please contact LTC marketing for details. The LTC1069-1 is available in an 8-pin miniDIP or an 8-pin narrow SO package. LTC1068: Very Low Noise, High Accuracy, Quad Universal Filter Building Block The LTC1068 consists of four identical low noise, high accuracy, 2nd-order switched-capacitor filter building blocks. Each building block, together with three to five resistors, can provide 2nd-order filter functions such as lowpass, highpass, bandpass and notch. High precision, high performance, quad 2nd-order, dual 4th-order or single 8th-order filters can be designed with an LTC1068. The center frequency of each 2ndorder section is tuned with an external clock. The clock-to-center frequency ratio is set internally to 100:1, and can be modified by external resistors. The sampling rate of the LTC1068 is twice the clock frequency. The maximum input frequency can approach twice the clock frequency before aliasing occurs. Mask-programmable versions of the LTC1068 with thin-film resistors can be designed to realize custom active filters in monolithic form. Clockto-center-frequency ratios higher or lower than 100:1 can also be obtained. Please contact LTC marketing for details. The LTC1068 is available in a 24pin DIP or a 28-pin SSOP package. Linear Technology Magazine • May 1996 LTC1069-7: Linear Phase, 8th-Order Lowpass Filter The LTC1069-7 is a monolithic, clocktunable, linear phase, 8th-order lowpass filter. The amplitude response of the filter approximates that of a raised cosine filter with an alpha of one. The gain at the cutoff frequency is –3dB and the attenuation at twice the cutoff frequency is 43dB. The cutoff frequency is set by an external clock and is equal to the clock frequency divided by 25. The internal sampling frequency to cutoff frequency ratio is 50:1. The LTC1069-7 can operate from a single 3V supply or dual supplies up to ±5V. A maximum cutoff frequency of 200kHz can be obtained with ±5V supplies. The gain and phase response of the LTC1069-7 are useful in digital communication systems that must perform pulse shaping and channel bandwidth limiting. The LTC1069-7 can also be used in any system that requires an analog filter with linear phase and a sharp rolloff in the vicinity of its cutoff frequency. The LTC1069-7 has a wide dynamic range. With ±5V supplies and an input range of 0.1VRMS to 2VRMS, the signal to (noise + THD) ratio is ≥60dB. The wideband noise of the LTC1069-7 is 160µVRMS. Other filter responses with lower power or higher speeds can be obtained. Please contact LTC marketing for details. The LTC1069-7 is available in an 8-pin miniDIP or 8-pin SO package. LT1237 RS232 Transceiver Meets IEC-1000-4-2 ESD Protection Standards The popular LT1237 three-driver fivereceiver RS232 transceiver has been upgraded to pass the IEC-1000-4-2 level 4 ESD test. The chip is internally protected against ±15kV air-gap or ±8kV contact-mode discharges. The IEC-1000-4-2 test, formerly known as IEC-801-2, must be passed by all equipment sold in Europe. The LT1237's on-chip protection eliminates the cost and board area required by the external transient suppression devices that are usually required to successfully meet the IEC ESD protection requirements. The enhanced ESD protection has been achieved without compromising the electrical performance of the device. Present LT1237 users will see no change in electrical performance. The 3-driver, 5-receiver device retains all of the electrical performance features which make it popular with notebook PC manufacturers. Operation to 120kbaud with full 2500pF loads and up to 250kbaud with 1000pF loads is not degraded by the enhanced ESD protection devices. The micropower keep-alive receiver is still available for monitoring an incoming line while the system is otherwise shut down. The LT1237 is available in 28-pin DIP, SO and SSOP packages. For further information on the above or any of the other devices mentioned in this issue of Linear Technology, use the reader service card or call the LTC literature service number: 1-800-4-LINEAR. Ask for the pertinent data sheets and application notes. Adaptive Power, Burst Mode, and C-Load are trademarks of Linear Technology Corpo, LTC and LT are trademarks used ration. only to identify products of Linear Technology Corp. Other product names may be trademarks of the companies that manufacture the products. Information furnished by Technology Corporation is believed to be accurate and reliable. However, Linear Technology makes no representation that the circuits described herein will not infringe on existing patent rights. 43 DESIGN TOOLS Applications on Disk NOISE DISK This IBM-PC (or compatible) program allows the user to calculate circuit noise using LTC op amps, determine the best LTC op amp for a low noise application, display the noise data for LTC op amps, calculate resistor noise and calculate noise using specs for any op amp. Available at no charge. SPICE MACROMODEL DISK This IBM-PC (or compatible) high density diskette contains the library of LTC op amp SPICE macromodels. The models can be used with any version of SPICE for general analog circuit simulations. The diskette also contains working circuit examples using the models and a demonstration copy of Available at no charge. PSPICETM by MicroSim. Technical Books World Headquarters Linear Technology Corporation 1630 McCarthy Boulevard Milpitas, CA 95035-7417 Phone: (408) 432-1900 FAX: (408) 434-0507 U.S. Area Sales Offices CENTRAL REGION Linear Technology Corporation Chesapeake Square 229 Mitchell Court, Suite A-25 Addison, IL 60101 Phone: (708) 620-6910 FAX: (708) 620-6977 1990 Linear Databook • Volume I — This 1440 page collection of data sheets covers op amps, voltage regulators, references, comparators, filters, PWMs, data conversion and interface products (bipolar and CMOS), in both commercial and military grades. The catalog features well over 300 devices. $10.00 NORTHEAST REGION Linear Technology Corporation 3220 Tillman Drive, Suite 120 Bensalem, PA 19020 Phone: (215) 638-9667 FAX: (215) 638-9764 1992 Linear Databook Supplement — This 1248 page supplement to the 1990 Linear Databook is a collection of all products introduced since then. The catalog contains full data sheets for over 140 devices. The 1992 Linear Databook Supplement is a companion to the 1990 Linear Databook, which should not be discarded. $10.00 Linear Technology Corporation 266 Lowell St., Suite B-8 Wilmington, MA 01887 Phone: (508) 658-3881 FAX: (508) 658-2701 1994 Linear Databook • Volume III — This 1826 page supplement to the 1990 Linear Databook and 1992 Linear Databook Supplement is a collection of all products introduced since 1992. A total of 152 product data sheets are included with updated selection guides. The 1994 Linear Databook Volume III is a supplement to the 1990 and 1992 Databooks, which should not be discarded. $10.00 NORTHWEST REGION Linear Technology Corporation 1630 McCarthy Blvd., Suite 205 Milpitas, CA 95035 Phone: (408) 428-2050 FAX: (408) 432-6331 1995 Linear Databook • Volume IV — This 1152 page supplement to the 1990, 1992 and 1994 Linear Databooks is a collection of all products introduced since 1994. A total of 80 product data sheets are included with updated selection guides. The 1995 Linear Databook Vol IV is a companion to the 1990, 1992 and 1994 Linear Databooks, which should not be discarded. $10.00 SOUTHEAST REGION Linear Technology Corporation 17000 Dallas Parkway Suite 219 Dallas, TX 75248 Phone: (214) 733-3071 FAX: (214) 380-5138 1990 Linear Applications Handbook • Volume I — 928 pages full of application ideas covered in depth by 40 Application Notes and 33 Design Notes. This catalog covers a broad range of “real world” linear circuitry. In addition to detailed, systems-oriented circuits, this handbook contains broad tutorial content together with liberal use of schematics and scope photography. A special feature in this edition includes a 22 page section on SPICE macromodels. $20.00 1993 Linear Applications Handbook • Volume II — Continues the stream of “real world” linear circuitry initiated by the 1990 Handbook . Similar in scope to the 1990 edition, the new book covers Application Notes 41 through 54 and Design Notes 33 through 69. Additionally, references and articles from nonLTC publications that we have found useful are also included. $20.00 Interface Product Handbook — This 424 page handbook features LTC’s complete line of line driver and receiver products for RS232, RS485, RS423, RS422, V.35 and AppleTalk applications. Linear’s particular expertise in this area involves low power consumption, high numbers of drivers and receivers in one package, mixed RS232 and RS485 devices, 10kV ESD protection of RS232 devices and surface mount packages. Available at no charge. SwitcherCAD Handbook — This 144 page manual, including disk, guides the user through SwitcherCAD—a powerful PC software tool which aids in the design and optimization of switching regulators. The program can cut days off the design cycle by selecting topologies, calculating operating points and specifying component values and manufacturer's part numbers. $20.00 1996 Power Solutions Brochure, First Edition — This 80 page collection of circuits contains real-life solutions for common power supply design problems. There are over 75 circuits, including descriptions, graphs and performance specifications. Topics include battery charging, PCMCIA power management, microprocessor and portable equipment power supplies, micropower switching regulators, switched capacitor conversion, off-line switching regulators, linear regulators and power management issues. Available at no charge. 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