IRFPS40N60K, SiHFPS40N60K Datasheet

IRFPS40N60K, SiHFPS40N60K
Vishay Siliconix
Power MOSFET
FEATURES
PRODUCT SUMMARY
VDS (V)
• Low Gate Charge Qg Results in Simple Drive
Requirement
600
RDS(on) ()
VGS = 10 V
Qg (Max.) (nC)
0.110
• Improved Gate, Avalanche and Dynamic dV/dt
Ruggedness
330
Qgs (nC)
84
Qgd (nC)
150
Configuration
Available
RoHS*
COMPLIANT
• Fully Characterized Capacitance and Avalanche Voltage
and Current
Single
• Enhanced Body Diode dV/dt Capability
D
• Compliant to RoHS Directive 2002/95/EC
APPLICATIONS
Super-247
• Hard Switching Primary or PFC Switch
G
• Switch Mode Power Supply (SMPS)
S
• Uninterruptible Power Supply
D
G
S
• High Speed Power Switching
N-Channel MOSFET
• Motor Drive
ORDERING INFORMATION
Package
Super-247
IRFPS40N60KPbF
Lead (Pb)-free
SiHFPS40N60K-E3
IRFPS40N60K
SnPb
SiHFPS40N60K
ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
LIMIT
Drain-Source Voltage
VDS
600
Gate-Source Voltage
VGS
± 30
Continuous Drain Current
VGS at 10 V
TC = 25 °C
ID
TC = 100 °C
Pulsed Drain Currenta
UNIT
V
40
24
A
IDM
160
4.5
W/°C
Single Pulse Avalanche Energyb
EAS
600
mJ
Repetitive Avalanche Currenta
IAR
40
A
EAR
57
mJ
PD
570
W
dV/dt
7.5
V/ns
TJ, Tstg
- 55 to + 150
Linear Derating Factor
Repetitive Avalanche
Energya
Maximum Power Dissipation
TC = 25 °C
Peak Diode Recovery dV/dtc
Operating Junction and Storage Temperature Range
Soldering Recommendations (Peak Temperature)
for 10 s
300d
°C
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Starting TJ = 25 °C, L = 0.84 mH, Rg = 25 , IAS = 38 A, dV/dt = 5.5 V/ns (see fig. 12a).
c. ISD  38 A, dI/dt  150 A/μs, VDD  VDS, TJ  150 °C.
d. 1.6 mm from case.
* Pb containing terminations are not RoHS compliant, exemptions may apply
Document Number: 91261
S11-0112-Rev. B, 31-Jan-11
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IRFPS40N60K, SiHFPS40N60K
Vishay Siliconix
THERMAL RESISTANCE RATINGS
PARAMETER
Maximum Junction-to-Ambient
Case-to-Sink, Flat, Greased Surface
Maximum Junction-to-Case (Drain)
SYMBOL
TYP.
MAX.
UNIT
RthJA
RthCS
RthJC
0.24
-
40
0.22
°C/W
SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
Static
Drain-Source Breakdown Voltage
VDS Temperature Coefficient
VDS
VGS = 0 V, ID = 250 μA
600
-
-
V
VDS/TJ
Reference to 25 °C, ID = 1 mA
-
0.63
-
V/°C
VGS(th)
VDS = VGS, ID = 250 μA
3.0
-
5.0
V
Gate-Source Leakage
IGSS
VGS = ± 30 V
-
-
± 100
nA
Zero Gate Voltage Drain Current
IDSS
VDS = 600 V, VGS = 0 V
-
-
50
VDS = 480 V, VGS = 0 V, TJ = 125 °C
-
-
250
Gate-Source Threshold Voltage
Drain-Source On-State Resistance
Forward Transconductance
μA
-
0.110
0.130

gfs
VDS = 50 V, ID = 24 Ab
21
-
-
S
VGS = 0 V,
VDS = 25 V,
f = 1.0 MHz, see fig. 5
-
7970
-
-
750
-
-
75
-
VDS = 1.0 V , f = 1.0 MHz
-
9440
-
VDS = 480 V , f = 1.0 MHz
-
200
-
-
260
-
-
-
330
RDS(on)
ID = 24 Ab
VGS = 10 V
Dynamic
Input Capacitance
Ciss
Output Capacitance
Coss
Reverse Transfer Capacitance
Crss
Output Capacitance
Coss
Effective Output Capacitance
Coss eff.
Total Gate Charge
Qg
Gate-Source Charge
Qgs
Gate-Drain Charge
Qgd
Turn-On Delay Time
td(on)
Rise Time
Turn-Off Delay Time
Fall Time
VGS = 0 V
VDS = 0 V to 480
Vc
ID = 38 A, VDS = 480 V,
see fig. 6 and 13b
VGS = 10 V
tr
VDD = 300 V, ID = 38 A,
RG = 4.3 , see fig. 10b
td(off)
tf
-
-
84
-
-
150
-
47
-
-
110
-
-
97
-
-
60
-
-
-
40
-
-
160
pF
nC
ns
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode Current
IS
Pulsed Diode Forward Currenta
ISM
Body Diode Voltage
VSD
Body Diode Reverse Recovery Time
Body Diode Reverse Recovery Charge
Body Diode Recovery Current
Forward Turn-On Time
trr
Qrr
IRRM
ton
MOSFET symbol
showing the
integral reverse
p - n junction diode
D
A
G
S
TJ = 25 °C, IS = 38 A, VGS = 0 Vb
TJ = 25 °C
TJ = 125 °C
TJ = 25 °C
IF = 38 A, dI/dt = 100
A/μs
TJ = 125 °C
TJ = 25 °C
-
-
1.5
-
630
950
-
730
1090
-
14
20
-
17
25
-
39
58
V
ns
μC
A
Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Pulse width  300 μs; duty cycle  2 %.
c. Coss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 % to 80 % VDS.
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Document Number: 91261
S11-0112-Rev. B, 31-Jan-11
IRFPS40N60K, SiHFPS40N60K
Vishay Siliconix
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
1000
1000
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
100
10
100
I D, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
TOP
1
0.1
4.5V
0.01
T J= 150 ° C
10
TJ = 25 °C
1
0.1
20μs PULSE WIDTH
Tj = 25°C
V DS= 50V
20μs PULSE WIDTH
0.001
0.1
1
10
0.01
100
4
6
VDS, Drain-to-Source Voltage (V)
Fig. 1 - Typical Output Characteristics
100
3.5
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
20μs PULSE WIDTH
Tj = 150°C
0.1
1
10
VDS, Drain-to-Source Voltage (V)
Fig. 2 - Typical Output Characteristics
100
13
15
I D = 38A
2.5
(Normalized)
R DS(on) , Drain-to-Source On Resistance
ID, Drain-to-Source Current (A)
1
Document Number: 91261
S11-0112-Rev. B, 31-Jan-11
11
3.0
4.5V
0.1
10
Fig. 3 - Typical Transfer Characteristics
TOP
10
8
V GS, Gate-to-Source Voltage (V)
2.0
1.5
1.0
0.5
V GS = 10V
0.0
-60
-40
-20
0
20
40
60
TJ , Junction Temperature
80
100
120
140
160
( ° C)
Fig. 4 - Normalized On-Resistance vs. Temperature
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IRFPS40N60K, SiHFPS40N60K
Vishay Siliconix
100000
1000
VGS
C
iss
C
rss
C
oss
= 0V,
f = 1 MHZ
=C +C , C
SHORTED
gs
gd
ds
=C
gd
=C +C
ds
gd
100
Ciss
I SD , Reverse Drain Current (A)
C, Capacitance(pF)
10000
1000
Coss
100
Crss
T J= 150 ° C
10
TJ = 25 °C
1
V GS = 0 V
10
0.1
1
10
100
0.2
1000
VDS, Drain-to-Source Voltage (V)
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
12
0.6
0.9
1.3
1.6
V SD,Source-to-Drain Voltage (V)
Fig. 7 - Typical Source-Drain Diode Forward Voltage
1000
I D = 38A
OPERATION IN THIS AREA
LIMITED BY R DS(on)
VDS = 480V
VDS = 300V
ID, Drain-to-Source Current (A)
VDS = 120V
10
VGS , Gate-to-Source Voltage (V)
100
7
5
2
100μsec
10
1msec
1
10msec
Tc = 25°C
Tj = 150°C
Single Pulse
0.1
0
0
50
100
150
200
250
QG, Total Gate Charge (nC)
Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage
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1
10
100
1000
10000
VDS , Drain-toSource Voltage (V)
Fig. 8 - Maximum Safe Operating Area
Document Number: 91261
S11-0112-Rev. B, 31-Jan-11
IRFPS40N60K, SiHFPS40N60K
Vishay Siliconix
RD
VDS
40
VGS
D.U.T.
RG
+
- VDD
30
I D , Drain Current (A)
10 V
Pulse width ≤ 1 µs
Duty factor ≤ 0.1 %
20
Fig. 10a - Switching Time Test Circuit
VDS
10
90 %
0
25
50
75
100
TC , Case Temperature
125
150
10 %
VGS
( ° C)
td(on)
Fig. 9 - Maximum Drain Current vs. Case Temperature
td(off) tf
tr
Fig. 10b - Switching Time Waveforms
(Z thJC )
1
D = 0.50
0.1
Thermal Response
0.20
0.10
0.05
0.01
0.02
0.01
P DM
SINGLE PULSE
(THERMAL RESPONSE)
t1
t2
Notes:
1. Duty factor D =
2. Peak T
0.001
0.00001
0.0001
0.001
0.01
t1/ t 2
J = P DM x Z thJC
0.1
+TC
1
t 1, Rectangular Pulse Duration (sec)
Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case
Document Number: 91261
S11-0112-Rev. B, 31-Jan-11
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IRFPS40N60K, SiHFPS40N60K
Vishay Siliconix
VGS(th) Gate threshold Voltage (V)
5.0
15 V
Driver
L
VDS
D.U.T.
RG
+
A
- VDD
IAS
20 V
tp
0.01 Ω
4.5
4.0
ID = 250μA
3.5
3.0
2.5
Fig. 12a - Unclamped Inductive Test Circuit
2.0
-75
-50
-25
0
25
50
75
100
125 150
T J , Temperature ( °C )
VDS
Fig. 12d - Threshold Voltage vs. Temperature
tp
QG
VGS V
QGS
IAS
QGD
VG
Fig. 12b - Unclamped Inductive Waveforms
Charge
1200
ID
EAS , Single Pulse Avalanche Energy (mJ)
960
TOP
17A
24A
BOTTOM
38A
Fig. 13a - Basic Gate Charge Waveform
Current regulator
Same type as D.U.T.
720
50 kΩ
12 V
0.2 µF
0.3 µF
480
+
D.U.T.
-
VDS
240
VGS
3 mA
0
25
50
75
100
Starting Tj, Junction Temperature
125
150
( ° C)
Fig. 12c - Maximum Avalanche Energy vs. Drain Current
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IG
ID
Current sampling resistors
Fig. 13b - Gate Charge Test Circuit
Document Number: 91261
S11-0112-Rev. B, 31-Jan-11
IRFPS40N60K, SiHFPS40N60K
Vishay Siliconix
Peak Diode Recovery dV/dt Test Circuit
+
D.U.T.
Circuit layout considerations
• Low stray inductance
• Ground plane
• Low leakage inductance
current transformer
+
-
-
Rg
•
•
•
•
+
dV/dt controlled by Rg
Driver same type as D.U.T.
ISD controlled by duty factor “D”
D.U.T. - device under test
+
-
VDD
Driver gate drive
P.W.
Period
D=
P.W.
Period
VGS = 10 Va
D.U.T. lSD waveform
Reverse
recovery
current
Body diode forward
current
dI/dt
D.U.T. VDS waveform
Diode recovery
dV/dt
Re-applied
voltage
Inductor current
VDD
Body diode forward drop
Ripple ≤ 5 %
ISD
Note
a. VGS = 5 V for logic level devices
Fig. 14 - For N-Channel
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?91261.
Document Number: 91261
S11-0112-Rev. B, 31-Jan-11
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Package Information
Vishay Siliconix
TO-274AA (HIGH VOLTAGE)
B
A
E
E4
A
D2
E1
A1
R
D1
D
L1
L
Detail “A”
C
b
e
A2
0.10 (0.25) M B A M
10°
b4
b2
Lead Tip
5°
Detail “A”
Scale: 2:1
MILLIMETERS
DIM.
MIN.
MAX.
INCHES
MIN.
MAX.
MILLIMETERS
DIM.
MIN.
MAX.
INCHES
MIN.
MAX.
A
4.70
5.30
0.185
0.209
D1
15.50
16.10
0.610
0.634
A1
1.50
2.50
0.059
0.098
D2
0.70
1.30
0.028
0.051
A2
2.25
2.65
0.089
0.104
E
15.10
16.10
0.594
0.634
b
1.30
1.60
0.051
0.063
E1
13.30
13.90
0.524
0.547
b2
1.80
2.20
0.071
0.087
e
b4
3.00
3.25
0.118
0.128
L
13.70
14.70
0.539
0.579
c
0.80
1.20
0.031
0.047
L1
1.00
1.60
0.039
0.063
D
19.80
20.80
0.780
0.819
R
2.00
3.00
0.079
0.118
5.45 BSC
0.215 BSC
ECN: S-82247-Rev. A, 06-Oct-08
DWG: 5975
Notes
1. Dimensioning and tolerancing per ASME Y14.5M-1994.
2. Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm (0.005") per side. These dimensions are measured at the
outer extremes of the plastic body.
3. Outline conforms to JEDEC outline to TO-274AA.
Document Number: 91365
Revision: 06-Oct-08
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Vishay Intertechnology, Inc. hereby certifies that all its products that are identified as RoHS-Compliant fulfill the
definitions and restrictions defined under Directive 2011/65/EU of The European Parliament and of the Council
of June 8, 2011 on the restriction of the use of certain hazardous substances in electrical and electronic equipment
(EEE) - recast, unless otherwise specified as non-compliant.
Please note that some Vishay documentation may still make reference to RoHS Directive 2002/95/EC. We confirm that
all the products identified as being compliant to Directive 2002/95/EC conform to Directive 2011/65/EU.
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requirements as per JEDEC JS709A standards. Please note that some Vishay documentation may still make reference
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Revision: 02-Oct-12
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Document Number: 91000