SiHS20N50C Datasheet

SiHS20N50C
Vishay Siliconix
Power MOSFET
FEATURES
PRODUCT SUMMARY
VDS (V) at TJ max.
•
•
•
•
•
•
•
•
560
RDS(on) ()
VGS = 10 V
Qg (Max.) (nC)
0.270
76
Qgs (nC)
21
Qgd (nC)
34
Configuration
Single
D
Low Figure-of-Merit Ron x Qg
100 % Avalanche Tested
High Peak Current Capability
dV/dt Ruggedness
Improved trr/Qrr
Improved Gate Charge
High Power Dissipations Capability
Compliant to RoHS Directive 2002/95/EC
Super-247
G
S
D
G
S
N-Channel MOSFET
ORDERING INFORMATION
Package
Lead (Pb)-free
Super-247
SiHS20N50C-E3
ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
LIMIT
Drain-Source Voltage
VDS
500
Gate-Source Voltage
VGS
± 30
Continuous Drain Current (TJ = 150 °C)e
VGS at 10 V
TC = 25 °C
TC = 100 °C
Pulsed Drain Currenta
UNIT
V
20
ID
A
11
IDM
80
1.8
W/°C
Single Pulse Avalanche Energyb
EAS
361
mJ
Maximum Power Dissipation
PD
250
W
dV/dt
5
V/ns
TJ, Tstg
- 55 to + 150
Linear Derating Factor
Peak Diode Recovery
dV/dtc
Operating Junction and Storage Temperature Range
Soldering Recommendations (Peak Temperature)
°C
300d
for 10 s
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature.
b. VDD = 50 V, starting TJ = 25 °C, L = 2.5 mH, Rg = 25 , IAS = 17 A.
c. ISD  18 A, dI/dt  380 A/μs, VDD  VDS, TJ  150 °C.
d. 1.6 mm from case.
e. Limited by maximum junction temperature.
THERMAL RESISTANCE RATINGS
PARAMETER
SYMBOL
TYP.
Maximum Junction-to-Ambient
RthJA
-
40
Maximum Junction-to-Case (Drain)
RthJC
-
0.5
Document Number: 91424
S11-0112-Rev. B, 31-Jan-11
MAX.
UNIT
°C/W
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SiHS20N50C
Vishay Siliconix
SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
VDS
VGS = 0 V, ID = 250 μA
500
-
-
V
VDS/TJ
Reference to 25 °C, ID = 1 mA
-
700
-
mV/°C
VGS(th)
VDS = VGS, ID = 250 μA
3.0
-
5.0
V
nA
Static
Drain-Source Breakdown Voltage
VDS Temperature Coefficient
Gate-Source Threshold Voltage (N)
Gate-Source Leakage
Zero Gate Voltage Drain Current
Drain-Source On-State Resistance
Forward Transconductance
IGSS
IDSS
VGS = ± 30 V
-
-
± 100
VDS = 500 V, VGS = 0 V
-
-
25
VDS = 400 V, VGS = 0 V, TJ = 125 °C
-
-
250
μA
-
0.225
0.270

gfs
VDS = 50 V, ID = 10 A
-
6.4
-
S
VGS = 0 V,
VDS = 25 V,
f = 1.0 MHz
-
2451
2942
-
300
360
RDS(on)
VGS = 10 V
ID = 10 A
Dynamic
Input Capacitance
Ciss
Output Capacitance
Coss
Reverse Transfer Capacitance
Crss
Total Gate Charge
Qg
VGS = 10 V
26
32
65
76
Gate-Source Charge
Qgs
Gate-Drain Charge
Qgd
Turn-On Delay Time
td(on)
-
80
-
tr
VDD = 250 V, ID = 18 A,
Rg = 9.1 
-
27
-
-
32
-
-
44
-
f = 1 MHz, open drain
-
1.1
-
-
-
20
-
-
80
-
-
1.5
-
503
-
ns
-
6.7
-
μC
-
30
-
A
Rise Time
Turn-Off Delay Time
td(off)
Fall Time
tf
Gate Input Resistance
Rg
ID = 18 A, VDS = 400 V
-
21
-
-
29
-
pF
nC
ns

Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode Current
IS
Pulsed Diode Forward Current
ISM
Body Diode Voltage
VSD
Body Diode Reverse Recovery Time
trr
Body Diode Reverse Recovery Charge
Qrr
Reverse Recovery Current
MOSFET symbol
showing the
integral reverse
p - n junction diode
D
A
G
S
TJ = 25 °C, IS = 18 A, VGS = 0 V
TJ = 25 °C, IF = IS,
dI/dt = 100 A/μs, V = 35 V
IRRM
V
The information shown here is a preliminary product proposal, not a commercial product datasheet. Vishay Siliconix is not committed to produce this or any similar
product. This information should not be used for design purposes, nor construed as an offer to furnish or sell such products.
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Document Number: 91424
S11-0112-Rev. B, 31-Jan-11
SiHS20N50C
Vishay Siliconix
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
ID, Drain Current (A)
60
50
40
30
100
VGS
Top
15 V
14 V
13 V
12 V
11 V
10 V
9.0 V
8.0 V
7.0 V
6.0 V
Bottom 5.0 V
TJ = 25 °C
TJ = 150 °C
ID, Drain Current (A)
70
20
TJ = 25 °C
1
0.1
7.0 V
10
0
0.01
0
6
12
18
24
30
5
6
7
8
9
Fig. 1 - Typical Output Characteristics, TC = 25 °C
Fig. 3 - Typical Transfer Characteristics
RDS(on), Drain-to-Source On Resistance
(Normalized)
VDS, Drain-to-Source Voltage (V)
VGS, Gate-to-Source Voltage (V)
40
ID, Drain Current (A)
10
VGS
Top
15 V
14 V
13 V
12 V
30
11 V
10 V
9.0 V
8.0 V
7.0 V
20
6.0 V
Bottom 5.0 V
TJ = 150 °C
7.0 V
10
0
0
6
12
18
24
30
VDS, Drain-to-Source Voltage (V)
Fig. 2 - Typical Output Characteristics, TC = 150 °C
Document Number: 91424
S11-0112-Rev. B, 31-Jan-11
10
3
2.5
ID = 17 A
2
1.5
VGS = 10 V
1
0.5
0
- 60 - 40 - 20
0
20 40 60 80 100 120 140 160
TJ, Junction Temperature (°C)
Fig. 4 - Normalized On-Resistance vs. Temperature
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SiHS20N50C
Vishay Siliconix
1000
VGS = 0 V, f = 1 MHz
Ciss = Cgs + Cgd, Cds Shorted
Crss = Cgd
Coss = Cds + Cgd
104
Operation in this area limited
by RDS(on)
ID, Drain Current (A)
Capacitance (pF)
105
Ciss
103
102
Coss
Crss
10
1
10
100
100
10
100 µs
1 ms
1
TC = 25 °C
TJ = 150 °C
Single Pulse
0.1
100
10
1000
1000
10 000
VDS, Drain-to-Source Voltage (V)
VDS, Drain-to-Source Voltage (V)
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
Fig. 8 - Maximum Safe Operating Area
20
20
ID = 17 A
VDS = 400 V
VDS = 250 V
VDS = 100 V
16
ID, Drain Current (A)
VGS, Gate-to-Source Voltage (V)
10 ms
12
8
15
10
5
4
0
0
0
30
60
90
120
QG, Total Gate Charge (nC)
25
50
75
100
125
150
TC, Case Temperature (°C)
Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage
Fig. 9 - Maximum Drain Current vs. Case Temperature
ISD, Reverse Drain Current (A)
100
TJ = 150 °C
10
TJ = 25 °C
1
VGS = 0 V
0.1
0.2
0.5
0.8
1.1
1.4
VSD, Source-to-Drain Voltage (V)
Fig. 7 - Typical Source-Drain Diode Forward Voltage
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Document Number: 91424
S11-0112-Rev. B, 31-Jan-11
SiHS20N50C
Vishay Siliconix
1
Normalized Effective Transient
Thermal Impedance
Duty Cycle = 0.5
0.2
0.1
0.1
0.05
0.02
Single Pulse
0.01
10-4
10-2
10-3
0.1
1
Pulse Time (s)
Fig. 10 - Normalized Thermal Transient Impedance, Junction-to-Case (Super-247)
RD
VDS
VDS
tp
VGS
D.U.T.
VDD
RG
+
- VDD
VDS
10 V
Pulse width ≤ 1 µs
Duty factor ≤ 0.1 %
IAS
Fig. 12b - Unclamped Inductive Waveforms
Fig. 11a - Switching Time Test Circuit
VDS
QG
90 %
10 V
QGS
10 %
VGS
QGD
VG
td(on)
td(off) tf
tr
Charge
Fig. 13a - Basic Gate Charge Waveform
Fig. 11b - Switching Time Waveforms
Current regulator
Same type as D.U.T.
L
Vary tp to obtain
required IAS
VDS
50 kΩ
D.U.T
RG
12 V
+
-
IAS
0.2 µF
0.3 µF
V DD
+
D.U.T.
-
VDS
10 V
tp
0.01 Ω
VGS
3 mA
Fig. 12a - Unclamped Inductive Test Circuit
IG
ID
Current sampling resistors
Fig. 13b - Gate Charge Test Circuit
Document Number: 91424
S11-0112-Rev. B, 31-Jan-11
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SiHS20N50C
Vishay Siliconix
Peak Diode Recovery dV/dt Test Circuit
+
D.U.T.
Circuit layout considerations
• Low stray inductance
• Ground plane
• Low leakage inductance
current transformer
+
-
-
Rg
•
•
•
•
+
dV/dt controlled by Rg
Driver same type as D.U.T.
ISD controlled by duty factor “D”
D.U.T. - device under test
+
-
VDD
Driver gate drive
P.W.
Period
D=
P.W.
Period
VGS = 10 Va
D.U.T. lSD waveform
Reverse
recovery
current
Body diode forward
current
dI/dt
D.U.T. VDS waveform
Diode recovery
dV/dt
Re-applied
voltage
Inductor current
VDD
Body diode forward drop
Ripple ≤ 5 %
ISD
Note
a. VGS = 5 V for logic level devices
Fig. 14 - For N-Channel
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Document Number: 91424
S11-0112-Rev. B, 31-Jan-11
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Revision: 02-Oct-12
1
Document Number: 91000