IRF IRFPS30N60KPBF

PD- 95906
SMPS MOSFET
IRFPS30N60KPbF
HEXFET® Power MOSFET
Applications
l Switch Mode Power Supply (SMPS)
l Uninterruptible Power Supply
l High Speed Power Switching
l Lead-Free
VDSS
RDS(on) typ.
ID
160mΩ
30A
600V
Benefits
l Low Gate Charge Qg results in Simple
Drive Requirement
l Improved Gate, Avalanche and Dynamic
dv/dt Ruggedness
l Fully Characterized Capacitance and
Avalanche Voltage and Current
Super-247™
Absolute Maximum Ratings
Parameter
ID @ TC = 25°C
ID @ TC = 100°C
IDM
PD @TC = 25°C
VGS
dv/dt
TJ
TSTG
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current 
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Peak Diode Recovery dv/dt ƒ
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
(1.6mm from case )
Max.
Units
30
19
120
450
3.6
± 30
13
-55 to + 150
A
W
W/°C
V
V/ns
300
°C
Avalanche Characteristics
Symbol
EAS
IAR
EAR
Parameter
Single Pulse Avalanche Energy‚
Avalanche Current
Repetitive Avalanche Energy
Typ.
Max.
Units
–––
–––
–––
520
30
45
mJ
A
mJ
Typ.
Max.
Units
–––
0.24
–––
0.28
–––
40
°C/W
Thermal Resistance
Symbol
RθJC
RθCS
RθJA
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Parameter
Junction-to-Case†
Case-to-Sink, Flat, Greased Surface
Junction-to-Ambient†
1
09/15/04
IRFPS30N60KPbF
Static @ TJ = 25°C (unless otherwise specified)
Symbol
V(BR)DSS
RDS(on)
VGS(th)
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
IDSS
Drain-to-Source Leakage Current
IGSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
∆V(BR)DSS/∆TJ
Min.
600
–––
–––
3.0
–––
–––
–––
–––
Typ.
–––
0.66
160
–––
–––
–––
–––
–––
Max. Units
Conditions
–––
V
VGS = 0V, ID = 250µA
––– V/°C Reference to 25°C, ID = 1mA†
190
mΩ VGS = 10V, ID = 18A „
5.0
V
VDS = VGS, ID = 250µA
50
VDS = 600V, VGS = 0V
µA
250
VDS = 480V, VGS = 0V, TJ = 125°C
100
VGS = 30V
nA
-100
VGS = -30V
Dynamic @ TJ = 25°C (unless otherwise specified)
Symbol
gfs
Qg
Qgs
Qgd
td(on)
tr
td(off)
tf
Ciss
Coss
Crss
Coss
Coss
Coss eff.
Parameter
Forward Transconductance
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Output Capacitance
Output Capacitance
Effective Output Capacitance
Min.
16
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
Typ.
–––
–––
–––
–––
29
120
56
50
5870
530
54
6920
140
270
Max. Units
Conditions
–––
S
VDS = 50V, ID = 18A
220
ID = 30A
64
nC
VDS = 480V
110
VGS = 10V „
–––
VDD = 300V
–––
I
D = 30A
ns
–––
RG = 3.9 Ω
–––
VGS = 10V „
–––
VGS = 0V
–––
VDS = 25V
–––
pF
ƒ = 1.0MHz
–––
VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz
–––
VGS = 0V, VDS = 480V, ƒ = 1.0MHz
–––
VGS = 0V, VDS = 0V to 480V …
Diode Characteristics
Symbol
IS
ISM
VSD
trr
Qrr
IRRM
ton
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode) 
Diode Forward Voltage
Reverse Recovery Time
Reverse RecoveryCharge
Reverse RecoveryCurrent
Forward Turn-On Time
Notes:
 Repetitive rating; pulse width limited by
max. junction temperature.
‚ Starting TJ = 25°C, L = 1.1mH, RG = 25Ω,
IAS = 30A
ƒ ISD ≤ 30A, di/dt ≤ 630A/µs, VDD ≤ V(BR)DSS,
Min. Typ. Max. Units
–––
–––
30
–––
–––
120
A
Conditions
MOSFET symbol
showing the
G
integral reverse
p-n junction diode.
TJ = 25°C, IS = 30A, VGS = 0V
TJ = 25°C, IF = 30A
di/dt = 100A/µs „
D
S
––– ––– 1.5
V
„
––– 640 960
ns
––– 11
16
µC
––– 31 –––
A
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
„ Pulse width ≤ 300µs; duty cycle ≤ 2%.
… Coss eff. is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS
† Rθ is measured at TJ approximately 90°C
TJ ≤ 150°C
2
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IRFPS30N60KPbF
100
VGS
TOP
15V
12V
10V
8.0V
7.0V
6.0V
5.5V
BOTTOM 5.0V
10
1
5.0V
0.1
10
5.0V
1
0.1
0.01
1
10
20µs PULSE WIDTH
Tj = 150°C
20µs PULSE WIDTH
Tj = 25°C
0.1
VGS
15V
12V
10V
8.0V
7.0V
6.0V
5.5V
BOTTOM 5.0V
TOP
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
100
0.1
100
1
VDS, Drain-to-Source Voltage (V)
3.0
T J = 150°C
T J = 25°C
VDS = 50V
20µs PULSE WIDTH
6.0
7.0
8.0
VGS , Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics
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9.0
2.0
(Normalized)
10.0
5.0
I D = 30A
2.5
RDS(on) , Drain-to-Source On Resistance
ID, Drain-to-Source Current ( A)
100.0
0.1
100
Fig 2. Typical Output Characteristics
Fig 1. Typical Output Characteristics
1.0
10
VDS, Drain-to-Source Voltage (V)
1.5
1.0
0.5
V GS = 10V
0.0
-60
-40
-20
0
20
40
60
TJ, Junction Temperature
80
100
120
140
( °C)
Fig 4. Normalized On-Resistance
Vs. Temperature
3
160
IRFPS30N60KPbF
VGS = 0V,
f = 1 MHZ
C iss
= C gs + Cgd ,
SHORTED
C, Capacitance (pF)
100000
20
ID= 30A
C ds
VGS , Gate-to-Source Voltage (V)
1000000
Crss = Cgd
Coss = Cds + Cgd
10000
Ciss
1000
Coss
100
Crss
VDS= 480V
VDS= 300V
VDS= 120V
16
12
8
4
0
10
1
10
100
0
1000
40
80
120
160
200
240
Q G Total Gate Charge (nC)
VDS, Drain-to-Source Voltage (V)
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
100.0
1000
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
OPERATION IN THIS AREA
LIMITED BY R DS(on)
10.0
TJ = 150°C
1.0
T J = 25°C
VGS = 0V
0.1
0.2
0.4
0.6
0.8
1.0
1.2
VSD, Source-toDrain Voltage (V)
Fig 7. Typical Source-Drain Diode
Forward Voltage
4
100
1msec
1
0.1
1.4
100µsec
10
Tc = 25°C
Tj = 150°C
Single Pulse
1
10
10msec
100
1000
10000
VDS , Drain-toSource Voltage (V)
Fig 8. Maximum Safe Operating Area
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IRFPS30N60KPbF
30
VGS
24
ID , Drain Current (A)
RD
V DS
D.U.T.
RG
+
-VDD
VGS
18
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
12
Fig 10a. Switching Time Test Circuit
VDS
6
90%
0
25
50
75
100
TC , Case Temperature
125
150
( °C)
10%
VGS
Fig 9. Maximum Drain Current Vs.
Case Temperature
td(on)
tr
t d(off)
tf
Fig 10b. Switching Time Waveforms
(Z thJC)
1
D = 0.50
0.1
Thermal Response
0.20
0.10
0.05
0.01
0.02
0.01
P DM
SINGLE PULSE
(THERMAL RESPONSE)
t1
t2
Notes:
1. Duty factor D =
2. Peak T
0.001
0.00001
0.0001
0.001
0.01
t1/ t 2
J = P DM x Z thJC
+T C
0.1
1
t 1, Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRFPS30N60KPbF
1000
15V
ID
TOP
+
V
- DD
IAS
20V
A
0.01Ω
tp
Fig 12a. Unclamped Inductive Test Circuit
V(BR)DSS
tp
EAS , Single Pulse Avalanche Energy (mJ)
D.U.T
RG
800
DRIVER
L
VDS
13A
19A
30A
BOTTOM
600
400
200
0
25
50
75
100
125
150
( °C)
Starting T , JJunction Temperature
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
I AS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator
Same Type as D.U.T.
QG
50KΩ
12V
.2µF
.3µF
QGS
QGD
D.U.T.
VG
+
V
- DS
VGS
3mA
Charge
Fig 13a. Basic Gate Charge Waveform
6
IG
ID
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
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IRFPS30N60KPbF
Peak Diode Recovery dv/dt Test Circuit
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
+
D.U.T
ƒ
+
‚
-
-
„
+

RG
•
•
•
•
dv/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test
Driver Gate Drive
P.W.
Period
D=
+
-
VDD
P.W.
Period
VGS=10V
*
D.U.T. ISD Waveform
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
VDD
Forward Drop
Inductor Curent
Ripple ≤ 5%
ISD
* VGS = 5V for Logic Level Devices
Fig 14. For N-Channel HEXFET® Power MOSFETs
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7
IRFPS30N60KPbF
Case Outline and Dimensions — Super-247
Super-247 (TO-274AA) Part Marking Information
EXAMPLE: THIS IS AN IRFPS37N50A WITH
ASSEMBLY LOT CODE 1789
ASSEMBLED ON WW 19, 1997
IN THE ASSEMBLY LINE "C"
PART NUMBER
INTERNATIONAL RECTIFIER
LOGO
IRFPS37N50A
719C
17
89
ASSEMBLY LOT CODE
Note: "P" in assembly line position
indicates "Lead-Free"
DATE CODE
YEAR 7 = 1997
WEEK 19
LINE C
TOP
Data and specifications subject to change without notice.
This product has been designed and qualified for the Industrial market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.09/04
8
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