Data Sheet

SO
T6
66
BF1206F
Dual N-channel dual gate MOSFET
Rev. 2 — 7 September 2011
Product data sheet
1. Product profile
1.1 General description
The BF1206F is a combination of two different dual gate MOSFET amplifiers with shared
source and gate2 leads.
The source and substrate are interconnected. Internal bias circuits enable Direct Current
(DC) stabilization and a very good cross-modulation performance during Automatic Gain
Control (AGC). Integrated diodes between the gates and source protect against excessive
input voltage surges. The transistor is encapsulated in a SOT666 micro-miniature plastic
package.
CAUTION
This device is sensitive to ElectroStatic Discharge (ESD). Therefore care should be taken
during transport and handling.
1.2 Features and benefits





Two low noise gain controlled amplifiers in a single package
Superior cross-modulation performance during AGC
High forward transfer admittance
High forward transfer admittance to input capacitance ratio
Suited for 3 volt applications
1.3 Applications
 Gain controlled low noise amplifiers for Very High Frequency (VHF) and Ultra High
Frequency (UHF) applications with 3 V supply voltage, such as digital and analog
television tuners
BF1206F
NXP Semiconductors
Dual N-channel dual gate MOSFET
1.4 Quick reference data
Table 1.
Quick reference data
Per MOSFET unless otherwise specified.
Symbol Parameter
Conditions
VDS
drain-source voltage (DC)
ID
drain current (DC)
yfs
forward transfer admittance
Ciss(G1)
NF
Xmod
input capacitance at gate1
Min
Typ
Max Unit
-
-
6
V
-
-
30
mA
amplifier A
17
22
32
mS
amplifier B
17
22
32
mS
amplifier A
-
2.4
2.9
pF
amplifier B
-
1.7
2.2
pF
amplifier A; f = 400 MHz
-
1.0
1.6
dB
amplifier B; f = 800 MHz
-
1.0
1.6
dB
ID = 4 mA
ID = 4 mA; f = 100 MHz
ID = 4 mA
noise figure
cross modulation
input level for k = 1 % at
40 dB AGC
amplifier A
92
97
-
dBV
amplifier B
93
98
-
dBV
2. Pinning information
Table 2.
Discrete pinning
Pin
Description
Simplified outline
1
gate1 (AMP A)
2
source
6
3
gate1 (AMP B)
4
drain (AMP B)
5
drain (AMP A)
6
gate2
5
Symbol
4
AMP A
G1A
G2
S
DA
AMP B
1
2
3
G1B
DB
sym111
3. Ordering information
Table 3.
Ordering information
Type number
BF1206F
BF1206F
Product data sheet
Package
Name
Description
Version
-
plastic surface mounted package; 6 leads
SOT666
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 7 September 2011
© NXP B.V. 2011. All rights reserved.
2 of 21
BF1206F
NXP Semiconductors
Dual N-channel dual gate MOSFET
4. Marking
Table 4.
Marking
Type number
Marking code
BF1206F
2N
5. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
Conditions
Min
Max
Unit
Per MOSFET
VDS
drain-source voltage (DC)
-
6
V
ID
drain current (DC)
-
30
mA
IG1
gate1 current
-
10
mA
IG2
gate2 current
-
10
mA
-
180
mW
Tsp  107 C
[1]
Ptot
total power dissipation
Tstg
storage temperature
65
150
C
Tj
junction temperature
-
150
C
[1]
Tsp is the temperature at the solder point of the source lead.
001aac193
250
Ptot
(mW)
200
150
100
50
0
0
50
100
150
200
Tsp (˚C)
Fig 1.
Power derating curve
6. Thermal characteristics
Table 6.
BF1206F
Product data sheet
Thermal characteristics
Symbol
Parameter
Rth(j-sp)
thermal resistance from junction
to solder point
Conditions
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 7 September 2011
Typ
Unit
240
K/W
© NXP B.V. 2011. All rights reserved.
3 of 21
BF1206F
NXP Semiconductors
Dual N-channel dual gate MOSFET
7. Static characteristics
Table 7.
Static characteristics
Tj = 25 C.
Symbol
Parameter
Conditions
Min
Typ
Max Unit
amplifier A
6
-
-
V
amplifier B
6
-
-
V
6
-
10
V
Per MOSFET; unless otherwise specified
V(BR)DSS
drain-source breakdown voltage
VG1-S = VG2-S = 0 V; ID = 10 A
V(BR)G1-SS
gate1-source breakdown voltage
V(BR)G2-SS
gate2-source breakdown voltage
VGS = VDS = 0 V; IG2-S = 10 mA
6
-
10
V
VF(S-G1)
forward source-gate1 voltage
VG2-S = VDS = 0 V; IS-G1 = 10 mA
0.5
-
1.5
V
VF(S-G2)
forward source-gate2 voltage
VG1-S = VDS = 0 V; IS-G2 = 10 mA
0.5
-
1.5
V
VG1-S(th)
gate1-source threshold voltage
VDS = 5 V; VG2-S = 4 V; ID = 100 A
0.3
-
1.0
V
VG2-S(th)
gate2-source threshold voltage
VDS = 5 V; VG1-S = 5 V; ID = 100 A
0.35 -
1.0
V
IDSX
drain cut-off current
VG2-S = 2.5 V; VDS = 2.8 V
amplifier A; RG1 = 270 k
3
-
6.5
mA
amplifier B; RG1 = 220 k
3
-
6.5
mA
amplifier A
-
-
50
nA
amplifier B
-
-
50
nA
-
-
20
nA
Min
Typ
Max
Unit
IG1-S
IG2-S
[1]
gate1 cut-off current
VGS = VDS = 0 V; IG1-S = 10 mA
[1]
VG1-S = 5 V; VG2-S = VDS = 0 V
gate2 cut-off current
VG2-S = 5 V; VG1-S = VDS = 0 V;
RG1 connects gate 1 to VGG = 2.8 V.
8. Dynamic characteristics
8.1 Dynamic characteristics for amplifier A
Table 8.
Dynamic characteristics for amplifier A
Common source; Tamb = 25 C; VG2-S = 2.5 V; VDS = 2.8 V; ID = 4 mA.
Symbol
Parameter
Conditions
yfs
forward transfer admittance
Tj = 25 C
Ciss(G1)
input capacitance at gate1
17
22
32
mS
f = 100 MHz
[1]
-
2.4
2.9
pF
Ciss(G2)
input capacitance at gate2
f = 100 MHz
[1]
-
3.2
-
pF
Coss
output capacitance
f = 100 MHz
[1]
-
1.1
-
pF
f = 100 MHz
[1]
-
15
30
fF
BS = BS(opt); BL = BL(opt)
[1]
f = 200 MHz; GS = 2 mS; GL = 0.5 mS
-
31
-
dB
f = 400 MHz; GS = 2 mS; GL = 1 mS
-
28
-
dB
f = 800 MHz; GS = 3.3 mS; GL = 1 mS
-
23
-
dB
f = 11 MHz; GS = 20 mS; BS = 0
-
3.5
-
dB
f = 400 MHz; YS = YS(opt)
-
1.0
1.6
dB
f = 800 MHz; YS = YS(opt)
-
1.1
1.7
dB
Crss
Gtr
NF
reverse transfer capacitance
transducer power gain
noise figure
BF1206F
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 7 September 2011
© NXP B.V. 2011. All rights reserved.
4 of 21
BF1206F
NXP Semiconductors
Dual N-channel dual gate MOSFET
Table 8.
Dynamic characteristics for amplifier A …continued
Common source; Tamb = 25 C; VG2-S = 2.5 V; VDS = 2.8 V; ID = 4 mA.
Symbol
Parameter
Xmod
Conditions
cross modulation
input level for k = 1 %; fw = 50 MHz;
funw = 60 MHz
[1]
Calculated from measured S-parameters.
[2]
Measured in Figure 32 test circuit.
Min
Typ
Max
Unit
[2]
at 0 dB AGC
88
-
-
dBV
at 10 dB AGC
-
85
-
dBV
at 40 dB AGC
92
97
-
dBV
8.1.1 Graphs for amplifier A
001aad896
15
(1)
(1)
ID
(mA)
(3)
ID
(mA)
001aad897
16
(2)
(2)
12
(3)
10
8
5
(4)
(5)
(4)
(6)
4
(7)
0
0
0
0.4
0.8
1.2
1.6
2.0
VG1−S (V)
0
1
3
4
VDS (V)
(1) VG2-S = 2.5 V.
(1) VG1-S(A) = 1.4 V.
(2) VG2-S = 2.0 V.
(2) VG1-S(A) = 1.3 V.
(3) VG2-S = 1.5 V.
(3) VG1-S(A) = 1.2 V.
(4) VG2-S = 1.0 V.
(4) VG1-S(A) = 1.0 V.
VDS(A) = 2.8 V; Tj = 25 C.
2
(5) VG1-S(A) = 0.9 V.
(6) VG1-S(A) = 0.85 V.
(7) VG1-S(A) = 0.8 V.
VG2-S = 2.5 V; Tj = 25 C.
Fig 2.
Amplifier A: transfer characteristics; typical
values
BF1206F
Product data sheet
Fig 3.
Amplifier A: output characteristics; typical
values
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 7 September 2011
© NXP B.V. 2011. All rights reserved.
5 of 21
BF1206F
NXP Semiconductors
Dual N-channel dual gate MOSFET
001aad898
100
IG1
(μA)
001aad899
40
⏐Yfs⏐
(mS)
(1)
80
30
(1)
(2)
60
20
(2)
40
10
(3)
20
(4)
(3)
(4)
0
0
0
0.5
1.0
1.5
2.0
2.5
VG1−S (V)
0
4
12
16
ID (mA)
(1) VG2-S = 2.5 V.
(1) VG2-S = 2.5 V.
(2) VG2-S = 2.0 V.
(2) VG2-S = 2.0 V.
(3) VG2-S = 1.5 V.
(3) VG2-S = 1.5 V.
(4) VG2-S = 1.0 V.
(4) VG2-S = 1.0 V.
VDS(A) = 2.8 V; Tj = 25 C.
Fig 4.
8
VDS(A) = 2.8 V; Tj = 25 C.
Amplifier A: gate1 current as a function of
gate1 voltage; typical values
Fig 5.
001aad900
16
ID
(mA)
Amplifier A: forward transfer admittance as a
function of drain current; typical values
001aad901
6
ID
(mA)
12
4
8
2
4
0
0
10
20
0
30
0
IG1 (μA)
Product data sheet
3
VDS(A) = 2.8 V; VG2 = 2.5 V; RG1(A) = 270 k; see
Figure 32.
Amplifier A: drain current as a function of
gate1 current; typical values
BF1206F
2
VGG (V)
VDS(A) = 2.8 V; VG2-S = 2.5 V, Tamb = 25 C.
Fig 6.
1
Fig 7.
Amplifier A: drain current as a function of
gate1 supply voltage (=VGG); typical values
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 7 September 2011
© NXP B.V. 2011. All rights reserved.
6 of 21
BF1206F
NXP Semiconductors
Dual N-channel dual gate MOSFET
001aad902
10
ID
(mA)
001aad903
6
(1)
ID
(mA)
(2)
8
(1)
(3)
4
(4)
6
(2)
(5)
(6)
(3)
(7)
(8)
(9)
4
2
(4)
2
(5)
0
0
0
1
2
3
4
VGG = VDS (V)
0
1
2
3
4
VG2−S (V)
(1) RG1 = 100 k.
(1) VGG = 1.0 V
(2) RG1 = 120 k.
(2) VGG = 1.5 V
(3) RG1 = 150 k.
(3) VGG = 2.0 V
(4) RG1 = 180 k.
(4) VGG = 2.5 V
(5) RG1 = 220 k.
(5) VGG = 3.0 V
Tj = 25 C; RG1(A) = 270 k (connected to VGG);
see Figure 32.
(6) RG1 = 270 k.
(7) RG1 = 330 k.
(8) RG1 = 390 k.
(9) RG1 = 470 k.
VG2-S = 2.5 V; Tj = 25 C; see Figure 32.
Fig 8.
Amplifier A: drain current as a function of VDS
and VGG; typical values
BF1206F
Product data sheet
Fig 9.
Amplifier A: drain current as a function of
gate2 voltage; typical values
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 7 September 2011
© NXP B.V. 2011. All rights reserved.
7 of 21
BF1206F
NXP Semiconductors
Dual N-channel dual gate MOSFET
001aad904
0
gain
reduction
(dB)
10
001aad905
110
Vunw
(dBμV)
100
20
30
90
40
50
80
0
1
2
3
0
20
VAGC (V)
40
60
gain reduction (dB)
VDS(A) = 2.8 V; VGG = 2.8 V; VG2(nom) = 2.5 V;
fw = 50 MHz; funw = 60 MHz; ID(nom) = 4 mA;
Tamb = 25 C.
VDS(A) = 2.8 V; VGG = 2.8 V; ID(nom) = 4 mA;
Tamb = 25 C.
Fig 10. Amplifier A: typical gain reduction as a
function of the AGC voltage; typical values
Fig 11. Amplifier A: unwanted voltage for 1 %
cross-modulation as a function of gain
reduction; typical values
001aad906
5
ID
(mA)
4
3
2
1
0
0
20
40
60
gain reduction (dB)
VDS(A) = 2.8 V; VGG = 2.8 V; VG2(nom) = 2.5 V; RG1(A) = 270 k; f = 50 MHz; Tamb = 25 C.
Fig 12. Amplifier A: typical drain current as a function of gain reduction; typical values
BF1206F
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 7 September 2011
© NXP B.V. 2011. All rights reserved.
8 of 21
BF1206F
NXP Semiconductors
Dual N-channel dual gate MOSFET
001aad907
102
001aad908
102
−102
bis, gis
(mS)
⏐Yfs⏐
(mS)
10
ϕfs
(deg)
⏐Yfs⏐
bis
1
10
−10
ϕfs
gis
10−1
10−2
10
102
1
103
10
−1
103
102
f (MHz)
f (MHz )
VDS(A) = 2.8 V; VG2-S = 2.5 V; VDS(B) = 0 V; ID(A) = 4 mA.
Fig 13. Amplifier A: input admittance and phase as a
function of frequency; typical values
001aad909
102
102
VDS(A) = 2.8 V; VG2-S = 2.5 V; VDS(B) = 0 V; ID(A) = 4 mA.
Fig 14. Amplifier A: forward transfer admittance and
phase as a function of frequency; typical
values
001aad910
10
ϕrs
⏐Yrs⏐
(μS)
ϕrs
(deg)
bos, gos
(mS)
bos
1
⏐Yrs⏐
10
10
10−1
gos
1
10
1
103
102
10−2
10
f (MHz )
Fig 15. Amplifier A: reverse transfer admittance and
phase as a function of frequency: typical
values
Product data sheet
103
f (MHz)
VDS(A) = 2.8 V; VG2-S = 2.5 V; VDS(B) = 0 V; ID(A) = 4 mA.
BF1206F
102
VDS(A) = 2.8 V; VG2-S = 2.5 V; VDS(B) = 0 V; ID(A) = 4 mA.
Fig 16. Amplifier A: output admittance and phase as a
function of frequency; typical values
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 7 September 2011
© NXP B.V. 2011. All rights reserved.
9 of 21
BF1206F
NXP Semiconductors
Dual N-channel dual gate MOSFET
8.1.2 Scattering parameters for amplifier A
Table 9.
Scattering parameters for amplifier A
VDS(A) = 2.8 V; VG2-S = 2.5 V; ID(A) = 4 mA; VDS(B) = 0 V; VG1-S(B) = 0 V; Tamb = 25 C; typical values.
f (MHz)
s11
s21
s12
s22
Magnitude
(ratio)
Angle
(deg)
Magnitude
(ratio)
Angle
(deg)
Magnitude
(ratio)
Angle
(deg)
Magnitude
(ratio)
Angle
(deg)
50
0.9923
4.11
2.18
174.68
0.00038
102.27
0.995
1.83
100
0.9930
8.29
2.18
169.51
0.00080
85.65
0.996
3.75
200
0.9877
16.41
2.16
159.20
0.00161
80.93
0.995
7.49
300
0.9802
24.48
2.12
149.04
0.00233
76.76
0.994
11.22
400
0.9705
32.34
2.07
138.99
0.00303
73.21
0.992
14.96
500
0.9596
39.91
2.01
129.15
0.00354
69.83
0.989
18.68
600
0.9483
47.34
1.94
119.45
0.00394
67.19
0.987
22.39
700
0.9361
54.59
1.87
109.95
0.00426
65.26
0.984
26.11
800
0.9239
61.64
1.79
100.69
0.00453
63.89
0.981
29.82
900
0.9129
68.28
1.72
91.66
0.00457
64.06
0.979
33.57
1000
0.9018
74.57
1.64
82.86
0.00456
65.60
0.976
37.31
8.2 Noise data for amplifier A
Table 10. Noise data for amplifier A
VDS(A) = 2.8 V; VG2-S = 2.5 V; ID(A) = 4 mA.
f (MHz)
NFmin (dB)
opt
rn (ratio)
ratio
(deg)
400
1.0
0.78
26
0.84
800
1.1
0.87
53
0.87
8.3 Dynamic characteristics for amplifier B
Table 11. Dynamic characteristics for amplifier B
Common source; Tamb = 25 C; VG2-S = 2.5 V; VDS = 2.8 V; ID = 4 mA.
Symbol Parameter
Conditions
yfs
Tj = 25 C
Ciss(G1)
forward transfer admittance
input capacitance at gate1
Min
Typ
Max Unit
-
22
-
mS
f = 100 MHz
[1]
-
1.7
2.2
pF
Ciss(G2)
input capacitance at gate2
f = 100 MHz
[1]
-
4.0
-
pF
Coss
output capacitance
f = 100 MHz
[1]
-
0.85
-
pF
reverse transfer capacitance f = 100 MHz
[1]
-
30
45
fF
transducer power gain
[1]
Crss
Gtr
NF
noise figure
BF1206F
Product data sheet
BS = BS(opt); BL = BL(opt)
f = 200 MHz; GS = 2 mS; GL = 0.5 mS
-
32
-
dB
f = 400 MHz; GS = 2 mS; GL = 1 mS
-
29
-
dB
f = 800 MHz; GS = 3.3 mS; GL = 1 mS
-
25
-
dB
f = 11 MHz; GS = 20 mS; BS = 0
-
4.5
-
dB
f = 400 MHz; YS = YS(opt)
-
0.9
1.5
dB
f = 800 MHz; YS = YS(opt)
-
1.0
1.6
dB
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 7 September 2011
© NXP B.V. 2011. All rights reserved.
10 of 21
BF1206F
NXP Semiconductors
Dual N-channel dual gate MOSFET
Table 11. Dynamic characteristics for amplifier B …continued
Common source; Tamb = 25 C; VG2-S = 2.5 V; VDS = 2.8 V; ID = 4 mA.
Symbol Parameter
Xmod
Conditions
cross modulation
input level for k = 1 %; fw = 50 MHz; funw = 60 MHz
at 0 dB AGC
[1]
Calculated from measured S-parameters.
[2]
Measured in Figure 32 test circuit.
Min
Typ
Max Unit
89
-
-
[2]
dBV
at 10 dB AGC
-
85
-
dBV
at 40 dB AGC
93
98
-
dBV
8.3.1 Graphs for amplifier B
001aad911
15
(1)
(1)
ID
(mA)
(3)
ID
(mA)
001aad912
16
(2)
(2)
12
10
(3)
8
5
(4)
(4)
(5)
4
(6)
(7)
0
0
0
0.4
0.8
1.2
1.6
2.0
VG1−S (V)
0
1
3
4
VDS (V)
(1) VG2-S = 2.5 V.
(1) VG1-S(B) = 1.3 V.
(2) VG2-S = 2.0 V.
(2) VG1-S(B) = 1.2 V.
(3) VG2-S = 1.5 V.
(3) VG1-S(B) = 1.1 V.
(4) VG2-S = 1.0 V.
(4) VG1-S(B) = 1.0 V.
VDS(B) = 2.8 V; Tj = 25 C.
2
(5) VG1-S(B) = 0.9 V.
(6) VG1-S(B) = 0.85 V.
(7) VG1-S(B) = 0.8 V.
VG2-S = 2.5 V; Tj = 25 C.
Fig 17. Amplifier B: transfer characteristics; typical
values
BF1206F
Product data sheet
Fig 18. Amplifier B: output characteristics; typical
values
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 7 September 2011
© NXP B.V. 2011. All rights reserved.
11 of 21
BF1206F
NXP Semiconductors
Dual N-channel dual gate MOSFET
001aad913
100
IG1
(μA)
001aad914
40
⏐Yfs⏐
(mS)
(1)
80
(1)
30
(2)
20
(3)
10
(2)
60
40
(4)
20
(3)
(4)
0
0
0
0.5
1.0
1.5
2.0
2.5
VG1−S (V)
0
4
8
12
16
ID (mA)
(1) VG2-S = 2.5 V.
(1) VG2-S = 2.5 V.
(2) VG2-S = 2.0 V.
(2) VG2-S = 2.0 V.
(3) VG2-S = 1.5 V.
(3) VG2-S = 1.5 V.
(4) VG2-S = 1.0 V.
(4) VG2-S = 1.0 V.
VDS(B) = 2.8 V; Tj = 25 C.
VDS(B) = 2.8 V; Tj = 25 C.
Fig 19. Amplifier B: gate1 current as a function of
gate1 voltage; typical values
Fig 20. Amplifier B: forward transfer admittance as a
function of drain current; typical values
001aad915
16
ID
(mA)
001aad916
6
ID
(mA)
12
4
8
2
4
0
0
10
20
30
IG1 (μA)
1
2
3
VDS(B) = 2.8 V; VG2-S = 2.5 V; RG1(B) = 220 k;
see Figure 32.
Fig 21. Amplifier B: drain current as a function of
gate1 current; typical values
Product data sheet
0
VGG (V)
VDS(B) = 2.8 V; VG2-S = 2.5 V, Tamb = 25 C.
BF1206F
0
Fig 22. Amplifier B: drain voltage as a function of
gate1 supply voltage (=VGG); typical values
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 7 September 2011
© NXP B.V. 2011. All rights reserved.
12 of 21
BF1206F
NXP Semiconductors
Dual N-channel dual gate MOSFET
001aad917
10
ID
(mA)
001aad918
6
ID
(mA)
(1)
8
(2)
(1)
4
(3)
6
(2)
(4)
(3)
(5)
4
(6)
(7)
(8)
2
(4)
2
(5)
0
0
0
1
2
3
4
VGG = VDS (V)
0
1
2
3
4
VG2−S (V)
(1) RG1 = 120 k.
(1) VGG = 3.0 V.
(2) RG1 = 150 k.
(2) VGG = 2.5 V.
(3) RG1 = 180 k.
(3) VGG = 2.0 V.
(4) RG1 = 220 k.
(4) VGG = 1.5 V.
(5) RG1 = 270 k.
(5) VGG = 1.0 V.
RG1(B) = 220 k; Tj = 25 C; see Figure 32.
(6) RG1 = 330 k.
(7) RG1 = 390 k.
(8) RG1 = 470 k.
VG2-S = 2.5 V; RG1(B) connected to VGG; see Figure 32.
Fig 23. Amplifier B: drain current as a function of VDS
and VGG; typical values
001aad919
0
gain
reduction
(dB)
10
Fig 24. Amplifier B: drain current as a function of
gate2 voltage; typical values
001aad920
110
Vunw
(dBμV)
100
20
30
90
40
80
50
0
1
2
3
0
VAGC (V)
VDS(A) = 2.8 V; VG2(nom) = 2.5 V; ID(nom) = 4 mA;
Tamb = 25 C.
Fig 25. Amplifier B: typical gain reduction as a
function of the AGC voltage; typical values
BF1206F
Product data sheet
20
40
60
gain reduction (dB)
VDS(B) = 2.8 V; VG2 = 2.5 V; ID(nom) = 4 mA; fw = 50 MHz;
funw = 60 MHz; Tamb = 25 C.
Fig 26. Amplifier B: unwanted voltage for 1 %
cross-modulation as a function of gain
reduction; typical values
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 7 September 2011
© NXP B.V. 2011. All rights reserved.
13 of 21
BF1206F
NXP Semiconductors
Dual N-channel dual gate MOSFET
001aad921
5
ID
(mA)
4
3
2
1
0
0
20
40
60
gain reduction (dB)
VDS(B) = VGG = 2.8 V; VG2(nom) = 2.5 V; RG1(B) = 220 kW; f = 50 MHz; Tamb = 25 C.
Fig 27. Amplifier B: typical drain current as a function of gain reduction; typical values
BF1206F
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 7 September 2011
© NXP B.V. 2011. All rights reserved.
14 of 21
BF1206F
NXP Semiconductors
Dual N-channel dual gate MOSFET
001aad922
102
001aad923
102
−102
bis, gis
(mS)
⏐Yfs⏐
(mS)
10
ϕfs
(deg)
⏐Yfs⏐
bis
1
−10
10
ϕfs
10−1
gis
10−2
10
102
1
103
10
−1
103
102
f (Mhz)
f (MHz )
VDS(B) = 2.8 V; VG2-S = 2.5 V; VDS(A) = 0 V; ID(B) = 4 mA.
Fig 28. Amplifier B: input admittance and phase as a
function of frequency; typical values
001aad924
1
⏐Yrs⏐
(μS)
103
ϕrs
(deg)
ϕrs
10−1
102
⏐Yrs⏐
10−2
10−3
10X
10
1
103
102
VDS(B) = 2.8 V; VG2-S = 2.5 V; VDS(A) = 0 V; ID(B) = 4 mA.
Fig 29. Amplifier B: forward transfer admittance and
phase as a function of frequency; typical
values
001aad925
10
bos, gos
(mS)
bos
1
10−1
gos
10−2
10
f (MHz)
Fig 30. Amplifier B: reverse transfer admittance and
phase as a function of frequency: typical
values
Product data sheet
103
f (MHz)
VDS(B) = 2.8 V; VG2-S = 2.5 V; VDS(A) = 0 V; ID(B) = 4 mA.
BF1206F
102
VDS(B) = 2.8 V; VG2-S = 2.5 V; VDS(A) = 0 V; ID(B) = 4 mA.
Fig 31. Amplifier B: output admittance and phase as a
function of frequency; typical values
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 7 September 2011
© NXP B.V. 2011. All rights reserved.
15 of 21
BF1206F
NXP Semiconductors
Dual N-channel dual gate MOSFET
8.3.2 Scattering parameters for amplifier B
Table 12. Scattering parameters for amplifier B
VDS(B) = 2.8 V; VG2-S = 2.5 V; ID(B) = 4 mA; VDS(A) = 0 V; VG1-S(A) = 0 V; Tamb = 25 C; typical values.
f (MHz)
s11
s21
s12
s22
Magnitude
(ratio)
Angle
(deg)
Magnitude
(ratio)
Angle
(deg)
Magnitude
(ratio)
Angle
(deg)
Magnitude
(ratio)
Angle
(deg)
50
0.9939
3.12
2.27
176.11
0.00089
94.68
0.993
1.62
100
0.9936
6.29
2.26
172.41
0.00170
84.37
0.993
3.23
200
0.9896
12.47
2.25
164.98
0.00336
81.29
0.992
6.44
300
0.9845
18.59
2.23
157.64
0.00503
77.17
0.990
9.65
400
0.9779
24.66
2.20
150.35
0.00642
73.23
0.988
12.85
500
0.9703
30.55
2.16
143.16
0.00769
69.72
0.986
16.00
600
0.9620
36.37
2.13
136.02
0.00873
66.28
0.983
19.18
700
0.9529
42.10
2.08
129.01
0.00967
63.19
0.980
22.37
800
0.9439
47.79
2.04
122.01
0.01024
60.51
0.977
25.50
900
0.9353
53.24
1.99
115.30
0.01058
58.52
0.975
28.66
1000
0.9266
58.46
1.94
108.64
0.01074
57.24
0.973
31.85
8.3.3 Noise data for amplifier B
Table 13. Noise data for amplifier B
VDS(B) = 2.8 V; VG2-S = 2.5 V; ID(B) = 4 mA.
f (MHz)
opt
NFmin (dB)
rn (ratio)
ratio
(deg)
400
0.9
0.8
19
0.9
800
1.0
0.83
46
0.96
9. Test information
VAGC
R1
10 kΩ
C1
C3
4.7 nF
4.7 nF
C2
RGEN
50 Ω
VI
4.7 nF
R2
50 Ω
DUT
L1
≈ 2.2 μH
RL
50 Ω
C4
RG1
VGG
4.7 nF
VDS
001aad926
Fig 32. Cross-modulation test setup (for one MOSFET)
BF1206F
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 7 September 2011
© NXP B.V. 2011. All rights reserved.
16 of 21
BF1206F
NXP Semiconductors
Dual N-channel dual gate MOSFET
10. Package outline
Plastic surface-mounted package; 6 leads
SOT666
D
E
A
X
Y S
S
HE
6
5
4
pin 1 index
A
1
2
e1
c
3
bp
w M A
Lp
e
detail X
0
1
2 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
bp
c
D
E
e
e1
HE
Lp
w
y
mm
0.6
0.5
0.27
0.17
0.18
0.08
1.7
1.5
1.3
1.1
1.0
0.5
1.7
1.5
0.3
0.1
0.1
0.1
OUTLINE
VERSION
REFERENCES
IEC
JEDEC
JEITA
EUROPEAN
PROJECTION
ISSUE DATE
04-11-08
06-03-16
SOT666
Fig 33. Package outline SOT666
BF1206F
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 7 September 2011
© NXP B.V. 2011. All rights reserved.
17 of 21
BF1206F
NXP Semiconductors
Dual N-channel dual gate MOSFET
11. Revision history
Table 14.
Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
BF1206F v.2
20110907
Product data sheet
-
BF1206F v.1
Modifications:
BF1206F v.1
BF1206F
Product data sheet
•
The format of this data sheet has been redesigned to comply with the new identity
guidelines of NXP Semiconductors.
•
•
Legal texts have been adapted to the new company name where appropriate.
Package outline drawings have been updated to the latest version.
20060130
Product data sheet
-
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 7 September 2011
-
© NXP B.V. 2011. All rights reserved.
18 of 21
BF1206F
NXP Semiconductors
Dual N-channel dual gate MOSFET
12. Legal information
12.1 Data sheet status
Document status[1][2]
Product status[3]
Definition
Objective [short] data sheet
Development
This document contains data from the objective specification for product development.
Preliminary [short] data sheet
Qualification
This document contains data from the preliminary specification.
Product [short] data sheet
Production
This document contains the product specification.
[1]
Please consult the most recently issued document before initiating or completing a design.
[2]
The term ‘short data sheet’ is explained in section “Definitions”.
[3]
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
12.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to offer functions and qualities beyond those described in the
Product data sheet.
12.3 Disclaimers
Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and operation of their applications
and products using NXP Semiconductors products, and NXP Semiconductors
accepts no liability for any assistance with applications or customer product
design. It is customer’s sole responsibility to determine whether the NXP
Semiconductors product is suitable and fit for the customer’s applications and
products planned, as well as for the planned application and use of
customer’s third party customer(s). Customers should provide appropriate
design and operating safeguards to minimize the risks associated with their
applications and products.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for the customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from national authorities.
BF1206F
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 7 September 2011
© NXP B.V. 2011. All rights reserved.
19 of 21
BF1206F
NXP Semiconductors
Dual N-channel dual gate MOSFET
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Non-automotive qualified products — Unless this data sheet expressly
states that this specific NXP Semiconductors product is automotive qualified,
the product is not suitable for automotive use. It is neither qualified nor tested
in accordance with automotive testing or application requirements. NXP
Semiconductors accepts no liability for inclusion and/or use of
non-automotive qualified products in automotive equipment or applications.
In the event that customer uses the product for design-in and use in
automotive applications to automotive specifications and standards, customer
(a) shall use the product without NXP Semiconductors’ warranty of the
product for such automotive applications, use and specifications, and (b)
whenever customer uses the product for automotive applications beyond
NXP Semiconductors’ specifications such use shall be solely at customer’s
own risk, and (c) customer fully indemnifies NXP Semiconductors for any
liability, damages or failed product claims resulting from customer design and
use of the product for automotive applications beyond NXP Semiconductors’
standard warranty and NXP Semiconductors’ product specifications.
12.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
13. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
BF1206F
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 7 September 2011
© NXP B.V. 2011. All rights reserved.
20 of 21
BF1206F
NXP Semiconductors
Dual N-channel dual gate MOSFET
14. Contents
1
1.1
1.2
1.3
1.4
2
3
4
5
6
7
8
8.1
8.1.1
8.1.2
8.2
8.3
8.3.1
8.3.2
8.3.3
9
10
11
12
12.1
12.2
12.3
12.4
13
14
Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1
General description . . . . . . . . . . . . . . . . . . . . . 1
Features and benefits . . . . . . . . . . . . . . . . . . . . 1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Quick reference data . . . . . . . . . . . . . . . . . . . . 2
Pinning information . . . . . . . . . . . . . . . . . . . . . . 2
Ordering information . . . . . . . . . . . . . . . . . . . . . 2
Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3
Thermal characteristics . . . . . . . . . . . . . . . . . . 3
Static characteristics. . . . . . . . . . . . . . . . . . . . . 4
Dynamic characteristics . . . . . . . . . . . . . . . . . . 4
Dynamic characteristics for amplifier A. . . . . . . 4
Graphs for amplifier A. . . . . . . . . . . . . . . . . . . . 5
Scattering parameters for amplifier A . . . . . . . 10
Noise data for amplifier A . . . . . . . . . . . . . . . . 10
Dynamic characteristics for amplifier B. . . . . . 10
Graphs for amplifier B. . . . . . . . . . . . . . . . . . . 11
Scattering parameters for amplifier B . . . . . . . 16
Noise data for amplifier B . . . . . . . . . . . . . . . . 16
Test information . . . . . . . . . . . . . . . . . . . . . . . . 16
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 17
Revision history . . . . . . . . . . . . . . . . . . . . . . . . 18
Legal information. . . . . . . . . . . . . . . . . . . . . . . 19
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 19
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Contact information. . . . . . . . . . . . . . . . . . . . . 20
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2011.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
Date of release: 7 September 2011
Document identifier: BF1206F