Si8900EDB Datasheet

Si8900EDB
Vishay Siliconix
Bi-Directional N-Channel 20-V (D-S) MOSFET
FEATURES
PRODUCT SUMMARY
VS1S2 (V)
RS1S2(on) (Ω)
20
0.024 at VGS = 4.5 V
7
0.026 at VGS = 3.7 V
6.8
0.034 at VGS = 2.5 V
5.0
0.040 at VGS = 1.8 V
5.5
7 6
COMPLIANT
S2
S1
Pin 1 Identifier
8 5
S2
G2
9
G1
8900E
xxx
S2
4
RoHS
• Battery Protection Circuit
- 1-2 Cell Li+/LiP Battery Pack for Portable Devices
Backside View
Bump Side View
TrenchFET® Power MOSFET
Ultra-Low RSS(on)
ESD Protected: 4000 V
MICRO FOOT® Chipscale Packaging
Reduces Footprint Area Profile (0.62 mm)
and On-Resistance Per Footprint Area
APPLICATIONS
MICRO FOOT
S2
•
•
•
•
IS1S2 (A)
G1
Device Marking:
4 kΩ
8900E = P/N Code
xxx = Date/Lot Traceability Code
4 kΩ
S1
10 3
S1
S1
1 2
S1
G2
Ordering Information:
Si8900EDB-T2-E1 (Lead (Pb)-free)
N-Channel
S2
ABSOLUTE MAXIMUM RATINGS TA = 25 °C, unless otherwise noted
Parameter
Symbol
Source1- Source2 Voltage
Gate-Source Voltage
Continuous Source1- Source2 Current (TJ = 150 °C)a
TA = 25 °C
TA = 85 °C
TA = 25 °C
TA = 85 °C
Package Reflow Conditions
20
VGS
± 12
IS1S2
PD
Unit
V
7
5.4
5.1
3.9
A
50
1.8
1
0.9
0.5
TJ, Tstg
Operating Junction and Storage Temperature Range
c
Steady State
ISM
Pulsed Source1- Source2 Current
Maximum Power Dissipationa
5s
VS1S2
- 55 to 150
IR/Convection
W
°C
260
THERMAL RESISTANCE RATINGS
Parameter
Symbol
Maximum Junction-to-Ambienta
b
t≤5s
Steady State
Steady State
Maximum Junction-to-Foot
Notes:
a. Surface Mounted on 1" x 1" FR4 board.
b. The foot is defined as the top surface of the package.
c. Refer to IPC/JEDEC (J-STD-020C), no manual or hand soldering.
Document Number: 71830
S-82119-Rev. G, 08-Sep-08
RthJA
RthJF
Typical
Maximum
55
70
95
120
12
15
Unit
°C/W
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1
Si8900EDB
Vishay Siliconix
SPECIFICATIONS TJ = 25 °C, unless otherwise noted
Parameter
Symbol
Test Conditions
Min.
VSS = VGS, ID = 1.1 mA
0.45
Typ.
Max.
Unit
Static
VGS(th)
Gate Threshold Voltage
1.0
V
VSS = 0 V, VGS = ± 4.5 V
±4
µA
VSS = 0 V, VGS = ± 12 V
± 10
mA
VSS = 20 V, VGS = 0 V
1
VSS = 20 V, VGS = 0 V, TJ = 85 °C
5
IGSS
Gate-Body Leakage
Zero Gate Voltage Drain Current
IS1S2
On-State Drain Currenta
IS(on)
VSS = 5 V, VGS = 4.5 V
a
A
0.020
0.024
VGS = 3.7 V, ISS = 1 A
0.022
0.026
VGS = 2.5 V, ISS = 1 A
0.026
0.034
VGS = 1.8 V, ISS = 1 A
0.032
0.040
VSS = 10 V, ISS = 1 A
31
3
5
VSS = 10 V, RL = 10 Ω
ISS ≅ 1 A, VGEN = 4.5 V, Rg = 6 Ω
4.5
7
55
85
15
25
gfs
Forward Transconductance
5
VGS = 4.5 V, ISS = 1 A
Source1- Source2 On State Resistancea RS1S2(on)
µA
Ω
S
b
Dynamic
td(on)
Turn-On Delay Time
tr
Rise Time
td(off)
Turn-Off Delay Time
tf
Fall Time
µs
Notes:
a. Pulse test; pulse width ≤ 300 µs, duty cycle ≤ 2 %.
b. Guaranteed by design, not subject to production testing.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
20
10 000
1000
I GSS - Gate Current (µA)
I GSS - Gate Current (mA)
IGSS at 25 °C (mA)
16
12
8
4
100
TJ = 150 °C
10
1
TJ = 25 °C
0.1
0
0.01
0
3
6
9
12
VGS - Gate-to-Source Voltage (V)
Gate-Current vs. Gate-Source Voltage
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2
15
0
3
6
9
12
15
VGS - Gate-to-Source Voltage (V)
Gate Current vs. Gate-Source Voltage
Document Number: 71830
S-82119-Rev. G, 08-Sep-08
Si8900EDB
Vishay Siliconix
TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
10
10
VGS = 5 thru 1.5 V
8
I D - Drain Current (A)
I D - Drain Current (A)
8
6
4
1V
6
4
TC = 125 °C
2
2
0
0
0.0
25 °C
- 55 °C
0
1
2
3
4
0.2
0.4
0.6
0.8
1.0
1.2
VGS - Gate-to-Source Voltage (V)
V DS - Drain-to-Source Voltage (V)
Transfer Characteristics
Output Characteristics
0.05
1.6
0.04
1.4
VGS = 1.8 V
0.03
R DS(on) - On-Resistance
(Normalized)
R DS(on) - On-Resistance (Ω)
VGS = 4.5 V
IS1S2 = 1 A
VGS = 2.5 V
VGS = 3.7 V
0.02
VGS = 4.5 V
0.01
0.00
0
2
4
6
8
1.2
1.0
0.8
0.6
- 50
10
- 25
0
25
50
75
100
125
150
TJ - Junction Temperature (°C)
ID - Drain Current (A)
On-Resistance vs. Drain Current
On-Resistance vs. Junction Temperature
0.2
0.10
IS1S2 = 1.1 mA
IS1S2 = 5 A
V GS(th) Variance (V)
RDS(on) - On-Resistance (Ω)
0.1
0.08
0.06
IS1S2 = 1 A
0.04
0.02
0.0
- 0.1
- 0.2
- 0.3
0.00
0
1
2
3
4
VGS - Gate-to-Source Voltage (V)
On-Resistance vs. Gate-to-Source Voltage
Document Number: 71830
S-82119-Rev. G, 08-Sep-08
5
- 0.4
- 50
- 25
0
25
50
75
100
125
150
TJ - Temperature (°C)
Threshold Voltage
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Si8900EDB
Vishay Siliconix
TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
30
25
Power (W)
20
15
10
5
0
0.01
0.1
1
10
100
1000
Time (s)
Single Pulse Power, Junction-to-Ambient
2
Normalized Effective Transient
Thermal Impedance
1
Duty Cycle = 0.5
0.2
Notes:
0.1
PDM
0.1
0.05
t1
t2
1. Duty Cycle, D =
t1
t2
2. Per Unit Base = R thJA = 95 °C/W
0.02
3. T JM - TA = PDMZthJA(t)
Single Pulse
4. Surface Mounted
0.01
10- 4
10- 3
10- 2
10- 1
1
Square Wave Pulse Duration (s)
10
100
600
Normalized Thermal Transient Impedance, Junction-to-Ambient
2
Normalized Effective Transient
Thermal Impedance
1
Duty Cycle = 0.5
0.2
0.1
0.1
0.05
0.02
Single Pulse
0.01
10- 4
10- 3
10- 2
Square Wave Pulse Duration (s)
10- 1
1
Normalized Thermal Transient Impedance, Junction-to-Foot
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Document Number: 71830
S-82119-Rev. G, 08-Sep-08
Si8900EDB
Vishay Siliconix
PACKAGE OUTLINE
MICRO FOOT: 10-BUMP (2 x 5, 0.8 mm PITCH)
10 x ∅ 0.30 ~ 0.31
Note 3
Solder Mask ∅ ~ 0.40
A
e
A2
Silicon
A1
Bump Note 2
e
Recommended Land
b Diamerter
S2
8900E
xxx
E
Mark on Backside of Die
e
S1
e
D
Notes (Unless Otherwise Specified):
1. Laser mark on the silicon die back, coated with a thin metal.
2. Bumps are 95.5Sn/3.8Ag/0.7Cu.
3. Non-solder mask defined copper landing pad.
Dim.
Millimetersa
Inches
Min.
Max.
Min.
Max.
A
0.600
0.650
0.0236
0.0256
A1
0.260
0.290
0.102
0.0114
A2
0.340
0.360
0.0134
0.0142
b
0.370
0.410
0.0146
0.0161
D
4.050
4.060
0.1594
0.1598
E
1.980
2.000
0.0780
0.0787
e
0.750
0.850
0.0295
0.0335
S1
0.430
0.450
0.0169
0.0177
S2
0.580
0.600
0.0228
0.0236
Notes:
a. Use millimeters as the primary measurement.
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see http://www.vishay.com/ppg?71830.
Document Number: 71830
S-82119-Rev. G, 08-Sep-08
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Revision: 02-Oct-12
1
Document Number: 91000