Si8405DB Datasheet

Si8405DB
Vishay Siliconix
12 V P-Channel 1.8 V (G-S) MOSFET
FEATURES
PRODUCT SUMMARY
VDS (V)
- 12
• TrenchFET® Power MOSFET
RDS(on) ()
ID (A)
0.055 at VGS = - 4.5 V
- 4.9
0.070 at VGS = - 2.5 V
- 4.4
0.090 at VGS = - 1.8 V
-4
• Material categorization:
For definitions of compliance please see
www.vishay.com/doc?99912
MICRO FOOT
Bump Side View
3
Backside View
APPLICATIONS
D
S
G
S
• PA, Battery and Load Switch
2
D
• MICRO FOOT® Chipscale Packaging
Reduces Footprint Area Profile (0.62 mm) and
On-Resistance Per Footprint Area
8405
xxx
• Battery Charger Switch
G
4
1
Device Marking: 8405
xxx = Date/Lot Traceability Code
D
Ordering Information: Si8405DB-T1-E1 (Lead (Pb)-free and Halogen-free)
P-Channel MOSFET
ABSOLUTE MAXIMUM RATINGS (TA = 25 °C, unless otherwise noted)
Parameter
Symbol
5s
Steady State
Drain-Source Voltage
VDS
- 12
Gate-Source Voltage
VGS
±8
Continuous Drain Current (TJ = 150 °C)a
TA = 25 °C
TA = 70 °C
Continuous Source Current (Diode Conduction)a
IS
TA = 25 °C
Maximum Power Dissipationa
TA = 70 °C
- 3.6
- 3.9
- 2.8
- 10
- 2.5
A
- 1.3
2.77
1.47
1.77
0.94
TJ, Tstg
Operating Junction and Storage Temperature Range
Conditionsb
PD
V
- 4.9
IDM
Pulsed Drain Current
Package Reflow
ID
Unit
- 55 to 150
IR/Convection
W
°C
260
THERMAL RESISTANCE RATINGS
Parameter
Maximum Junction-to-Ambienta
Maximum Junction-to-Foot (drain)
Symbol
t5s
Steady State
Steady State
RthJA
RthJF
Typical
Maximum
35
45
72
85
16
20
Unit
°C/W
Notes:
a. Surface mounted on 1" x 1" FR4 board.
b. Refer to IPC/JEDEC (J-STD-020), no manual or hand soldering.
c. In this document, any reference to case represents the body of the MICRO FOOT device and foot is the bump.
Document Number: 71814
S13-1847-Rev. F, 19-Aug-13
For technical questions, contact: [email protected]
www.vishay.com
1
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Si8405DB
Vishay Siliconix
SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)
Parameter
Symbol
Test Conditions
Min.
Typ.
Max.
Unit
VGS(th)
VDS = VGS, ID = - 250 µA
- 0.45
- 0.7
- 0.95
V
nA
Static
Gate Threshold Voltage
IGSS
Gate-Body Leakage
Zero Gate Voltage Drain Current
IDSS
On-State Drain Currenta
ID(on)
Drain-Source On-State Resistancea
Diode Forward Voltagea
± 100
-1
VDS = - 12 V, VGS = 0 V, TJ = 70 °C
-5
VDS  - 5 V, VGS = - 4.5 V
RDS(on)
Forward Transconductancea
VDS = 0 V, VGS = ± 8 V
VDS = - 12 V, VGS = 0 V
µA
-5
A
VGS = - 4.5 V, ID = - 1 A
0.045
0.055
VGS = - 2.5 V, ID = - 1 A
0.055
0.070
VGS = - 1.8 V, ID = - 1 A
0.073
0.090
gfs
VDS = - 10 V, ID = - 1 A
6
VSD
IS = - 1 A, VGS = 0 V
- 0.73
- 1.1
14
21
VDS = - 6 V, VGS = - 4.5 V, ID = - 1 A
1.7

S
V
Dynamicb
Total Gate Charge
Qg
Gate-Source Charge
Qgs
Gate-Drain Charge
Qgd
2.5
Turn-On Delay Time
td(on)
16
VDD = - 6 V, RL = 6 
ID  - 1 A, VGEN = - 4.5 V, Rg = 6 
tr
Rise Time
td(off)
Turn-Off Delay Time
Fall Time
tf
Source-Drain Reverse Recovery Time
trr
IF = - 1 A, dI/dt = 100 A/µs
nC
25
32
50
120
180
80
120
46
70
ns
Notes:
a. Pulse test; pulse width  300 µs, duty cycle  2 %.
b. Guaranteed by design, not subject to production testing.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
10
10
VGS = 5 thru 2 V
8
ID - Drain Current (A)
ID - Drain Current (A)
8
6
1.5 V
4
2
6
4
TC = 125 °C
2
25 °C
- 55 °C
0
0
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2
2
4
6
8
10
0
0.00
0.25
0.50
0.75
1.00
1.25
1.50
VDS - Drain-to-Source Voltage (V)
VGS - Gate-to-Source Voltage (V)
Output Characteristics
Transfer Characteristics
For technical questions, contact: [email protected]
1.75
2.00
Document Number: 71814
S13-1847-Rev. F, 19-Aug-13
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Si8405DB
Vishay Siliconix
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
2000
0.14
0.12
C - Capacitance (pF)
1600
0.10
VGS = 1.8 V
0.08
VGS = 2.5 V
R DS(on) -
0.06
Ciss
1200
800
0.04
Coss
VGS = 4.5 V
Crss
400
0.02
0.00
0
0
2
4
6
0
8
2
ID - Drain Current (A)
4
8
10
12
VDS - Drain-to-Source Voltage (V)
On-Resistance vs. Drain Current
Capacitance
1.6
RDS(on) - On-Resistance (Normalized)
6
VGS - Gate-to-Source Voltage (V)
6
VDS = 6 V
ID = 1 A
5
4
3
2
1
0
0
4
8
12
16
VGS = 4.5 V
ID = 1 A
1.4
1.2
1.0
0.8
0.6
- 50
20
- 25
0
25
50
75
100
125
150
TJ - Junction Temperature (°C)
Qg - Total Gate Charge (nC)
Gate Charge
On-Resistance vs. Junction Temperature
0.30
10
ID = 1 A
0.18
TJ = 150 °C
1
RDS(on) -
I S - Source Current (A)
0.24
TJ = 25 °C
0.1
0.0
0.12
0.06
0.00
0.2
0.4
0.6
0.8
1.0
VSD - Source-to-Drain Voltage (V)
Source-Drain Diode Forward Voltage
Document Number: 71814
S13-1847-Rev. F, 19-Aug-13
1.2
0
1
2
3
4
5
6
VGS - Gate-to-Source Voltage (V)
On-Resistance vs. Gate-to-Source Voltage
For technical questions, contact: [email protected]
www.vishay.com
3
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Si8405DB
Vishay Siliconix
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
0.4
80
ID = 250 µA
0.3
Power (W)
V GS(th) Variance (V)
60
0.2
0.1
40
0.0
20
- 0.1
- 0.2
- 50
0
- 25
0
25
50
75
100
125
150
0.001
0.01
TJ - Temperature (°C)
0.1
1
10
Time (s)
Threshold Voltage
Single Pulse Power, Junction-to-Ambient
2
Normalized Effective Transient
Thermal Impedance
1
Duty Cycle = 0.5
0.2
Notes:
0.1
PDM
0.1
0.05
t1
t2
1. Duty Cycle, D =
0.02
t1
t2
2. Per Unit Base = R thJA = 72 °C/W
3. T JM - TA = PDMZthJA(t)
4. Surface Mounted
Single Pulse
0.01
10- 4
10- 3
10- 2
10- 1
1
Square Wave Pulse Duration (s)
10
100
600
Normalized Thermal Transient Impedance, Junction-to-Ambient
2
Normalized Effective Transient
Thermal Impedance
1
Duty Cycle = 0.5
0.2
0.1
0.1
0.05
0.02
Single Pulse
0.01
10- 4
10- 3
10- 2
10- 1
Square Wave Pulse Duration (s)
1
10
Normalized Thermal Transient Impedance, Junction-to-Foot
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For technical questions, contact: [email protected]
Document Number: 71814
S13-1847-Rev. F, 19-Aug-13
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Si8405DB
Vishay Siliconix
PACKAGE OUTLINE
MICRO FOOT: 4-BUMP (0.8 mm PITCH)
4
0.30
0.31
Note 3
0.40
Solder Mask
e
A2
Silicon
A
A1
Bump Note 2
b Diamerter
e
S
Recommended Land
E
e
8401
XXX
e
S
D
Mark on Backside of Die
Notes (unless otherwise specified):
1. Laser mark on the silicon die back, coated with a thin metal.
2. Bumps are 95.5/3.8/0.7 Sn/Ag/Cu.
3. Non-solder mask defined copper landing pad.
4. The flat side of wafers is oriented at the bottom.
Dim.
Millimetersa
Inches
Min.
Max.
Min.
Max.
A
0.600
0.650
0.0236
0.0256
A1
0.260
0.290
0.0102
0.0114
A2
0.340
0.360
0.0134
0.0142
b
0.370
0.410
0.0146
0.0161
D
1.520
1.600
0.0598
0.0630
E
1.520
1.600
0.0598
e
S
0.800
0.360
0.0630
0.0315
0.400
0.0142
0.0157
Notes:
a. Use millimeters as the primary measurement.
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?71814.
Document Number: 71814
S13-1847-Rev. F, 19-Aug-13
For technical questions, contact: [email protected]
www.vishay.com
5
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Legal Disclaimer Notice
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Revision: 02-Oct-12
1
Document Number: 91000