TO -22 0 AB BUK953R2-40B N-channel TrenchMOS logic level FET 17 April 2014 Product data sheet 1. General description Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic package using TrenchMOS technology. This product has been designed and qualified to the appropriate AEC standard for use in automotive critical applications. 2. Features and benefits • • • • AEC Q101 compliant Low conduction losses due to low on-state resistance Suitable for logic level gate drive sources Suitable for thermally demanding environments due to 175 °C rating 3. Applications • • • • 12 V loads Automotive systems General purpose power switching Motors, lamps and solenoids 4. Quick reference data Table 1. Quick reference data Symbol Parameter Conditions Min Typ Max Unit VDS drain-source voltage Tj ≥ 25 °C; Tj ≤ 175 °C - - 40 V ID drain current VGS = 5 V; Tmb = 25 °C; Fig. 2; Fig. 3 - - 100 A Ptot total power dissipation Tmb = 25 °C; Fig. 1 - - 300 W VGS = 10 V; ID = 25 A; Tj = 25 °C - 2.4 2.8 mΩ VGS = 5 V; ID = 25 A; Tj = 25 °C; - 2.7 3.2 mΩ - 37 - nC [1] Static characteristics RDSon drain-source on-state resistance Fig. 11; Fig. 12 Dynamic characteristics QGD gate-drain charge VGS = 5 V; ID = 25 A; VDS = 32 V; Tj = 25 °C; Fig. 13 Scan or click this QR code to view the latest information for this product BUK953R2-40B NXP Semiconductors N-channel TrenchMOS logic level FET Symbol Parameter Conditions Min Typ Max Unit ID = 100 A; Vsup ≤ 40 V; RGS = 50 Ω; - - 1.2 J Avalanche ruggedness EDS(AL)S non-repetitive drainsource avalanche energy [1] VGS = 5 V; Tj(init) = 25 °C; unclamped All individual parts of device must be ≤ 175 °C to achieve maximum current rating. 5. Pinning information Table 2. Pinning information Pin Symbol Description Simplified outline 1 G gate 2 D drain 3 S source mb D mounting base; connected to drain Graphic symbol D mb G mbb076 S 1 2 3 TO-220AB (SOT78A) 6. Ordering information Table 3. Ordering information Type number BUK953R2-40B BUK953R2-40B Product data sheet Package Name Description Version TO-220AB plastic single-ended package; heatsink mounted; 1 mounting hole; 3-lead TO-220AB SOT78A All information provided in this document is subject to legal disclaimers. 17 April 2014 © NXP Semiconductors N.V. 2014. All rights reserved 2 / 13 BUK953R2-40B NXP Semiconductors N-channel TrenchMOS logic level FET 7. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit VDS drain-source voltage Tj ≥ 25 °C; Tj ≤ 175 °C - 40 V VDGR drain-gate voltage RGS = 20 kΩ - 40 V VGS gate-source voltage -15 15 V Ptot total power dissipation Tmb = 25 °C; Fig. 1 - 300 W ID drain current Tmb = 25 °C; VGS = 5 V; Fig. 2; Fig. 3 [1] - 222 A Tmb = 100 °C; VGS = 5 V; Fig. 2 [2] - 100 A Tmb = 25 °C; VGS = 5 V; Fig. 2; Fig. 3 [2] - 100 A - 888 A IDM peak drain current Tmb = 25 °C; pulsed; tp ≤ 10 µs; Fig. 3 Tstg storage temperature -55 175 °C Tj junction temperature -55 175 °C [1] - 222 A [2] - 100 A pulsed; tp ≤ 10 µs; Tmb = 25 °C - 888 A ID = 100 A; Vsup ≤ 40 V; RGS = 50 Ω; - 1.2 J Source-drain diode IS ISM source current Tmb = 25 °C peak source current Avalanche ruggedness EDS(AL)S non-repetitive drain-source avalanche energy [1] [2] BUK953R2-40B Product data sheet VGS = 5 V; Tj(init) = 25 °C; unclamped Current is limited by power dissipation chip rating. All individual parts of device must be ≤ 175 °C to achieve maximum current rating. All information provided in this document is subject to legal disclaimers. 17 April 2014 © NXP Semiconductors N.V. 2014. All rights reserved 3 / 13 BUK953R2-40B NXP Semiconductors N-channel TrenchMOS logic level FET 03na19 120 03nh38 250 ID (A) Pder (%) 200 80 150 100 40 Capped at 100 A due to package 50 0 Fig. 1. 0 50 100 150 Tmb (°C) 0 200 Normalized total power dissipation as a function of mounting base temperature Fig. 2. 0 50 100 150 Tmb (°C) 200 Continuous drain current as a function of mounting base temperature 03nh36 104 ID (A) 103 Limit RDSon = VDS / ID tp = 10 µs 100 µs 102 1 ms Capped at 100 A due to package DC 10 1 10- 1 Fig. 3. 10 ms 100 ms 1 10 VDS (V) 102 Safe operating area; continuous and peak drain currents as a function of drain-source voltage BUK953R2-40B Product data sheet All information provided in this document is subject to legal disclaimers. 17 April 2014 © NXP Semiconductors N.V. 2014. All rights reserved 4 / 13 BUK953R2-40B NXP Semiconductors N-channel TrenchMOS logic level FET 8. Thermal characteristics Table 5. Thermal characteristics Symbol Parameter Conditions Min Typ Max Unit Rth(j-mb) thermal resistance from junction to mounting base Fig. 4 - - 0.5 K/W Rth(j-a) thermal resistance from junction to ambient vertical in still air - 60 - K/W 03nh37 1 Zth(j-mb) (K/W) 10- 1 δ = 0.5 0.2 0.1 0.05 0.02 P 10- 2 single shot 10- 3 10- 6 Fig. 4. tp 10- 5 10- 4 10- 3 10- 2 tp δ= T t T 10- 1 1 tp (s) Transient thermal impedance from junction to mounting base as a function of pulse duration 9. Characteristics Table 6. Characteristics Symbol Parameter Conditions Min Typ Max Unit drain-source breakdown voltage ID = 0.25 mA; VGS = 0 V; Tj = -55 °C 36 - - V ID = 0.25 mA; VGS = 0 V; Tj = 25 °C 40 - - V gate-source threshold voltage ID = 1 mA; VDS = VGS; Tj = 25 °C; 1.1 1.5 2 V 0.5 - - V - - 2.3 V VDS = 40 V; VGS = 0 V; Tj = 25 °C - 0.02 1 µA VDS = 40 V; VGS = 0 V; Tj = 175 °C - - 500 µA Static characteristics V(BR)DSS VGS(th) Fig. 10 ID = 1 mA; VDS = VGS; Tj = 175 °C; Fig. 10 ID = 1 mA; VDS = VGS; Tj = -55 °C; Fig. 10 IDSS drain leakage current BUK953R2-40B Product data sheet All information provided in this document is subject to legal disclaimers. 17 April 2014 © NXP Semiconductors N.V. 2014. All rights reserved 5 / 13 BUK953R2-40B NXP Semiconductors N-channel TrenchMOS logic level FET Symbol Parameter Conditions Min Typ Max Unit IGSS gate leakage current VGS = 15 V; VDS = 0 V; Tj = 25 °C - 2 100 nA VGS = -15 V; VDS = 0 V; Tj = 25 °C - 2 100 nA VGS = 10 V; ID = 25 A; Tj = 25 °C - 2.4 2.8 mΩ VGS = 4.5 V; ID = 25 A; Tj = 25 °C - - 3.5 mΩ VGS = 5 V; ID = 25 A; Tj = 175 °C; - - 6 mΩ - 2.7 3.2 mΩ RDSon drain-source on-state resistance Fig. 11; Fig. 12 VGS = 5 V; ID = 25 A; Tj = 25 °C; Fig. 11; Fig. 12 Dynamic characteristics QG(tot) total gate charge ID = 25 A; VDS = 32 V; VGS = 5 V; - 94 - nC QGS gate-source charge Tj = 25 °C; Fig. 13 - 17 - nC QGD gate-drain charge - 37 - nC Ciss input capacitance VGS = 0 V; VDS = 25 V; f = 1 MHz; - 7877 10502 pF Coss output capacitance Tj = 25 °C; Fig. 14 - 1397 1676 pF Crss reverse transfer capacitance - 608 833 pF td(on) turn-on delay time VDS = 30 V; RL = 1.2 Ω; VGS = 5 V; - 68 - ns tr rise time RG(ext) = 10 Ω; Tj = 25 °C - 268 - ns td(off) turn-off delay time - 257 - ns tf fall time - 192 - ns LD internal drain inductance from drain lead 6 mm from package to center of die; Tj = 25 °C - 4.5 - nH from contact screw on mounting base to center of die; Tj = 25 °C - 3.5 - nH from source lead to source bond pad; Tj = 25 °C - 7.5 - nH LS internal source inductance Source-drain diode VSD source-drain voltage IS = 40 A; VGS = 0 V; Tj = 25 °C; Fig. 15 - 0.85 1.2 V trr reverse recovery time IS = 20 A; dIS/dt = -100 A/µs; - 70 - ns Qr recovered charge VGS = -10 V; VDS = 20 V; Tj = 25 °C - 127 - nC BUK953R2-40B Product data sheet All information provided in this document is subject to legal disclaimers. 17 April 2014 © NXP Semiconductors N.V. 2014. All rights reserved 6 / 13 BUK953R2-40B NXP Semiconductors N-channel TrenchMOS logic level FET 350 ID (A) 03nh56 10 5 4 3.8 280 03nh55 5 Label is VGS (V) RDSon (mΩ) 3.6 4 3.4 210 3.2 140 3 3 2.8 70 2.6 0 Fig. 5. 2.4 2.2 0 2 4 6 8 VDS (V) 2 10 Output characteristics: drain current as a Fig. 6. function of drain-source voltage; typical values 03ng53 10- 1 3 7 11 15 Drain-source on-state resistance as a function of gate-source voltage; typical values 03nh53 200 ID (A) VGS (V) gfs (S) 10- 2 150 min 10- 3 typ max 100 10- 4 50 10- 5 10- 6 Fig. 7. 0 1 2 VGS (V) 0 3 Sub-threshold drain current as a function of gate-source voltage BUK953R2-40B Product data sheet Fig. 8. 0 40 ID (A) 60 Forward transconductance as a function of drain current; typical values All information provided in this document is subject to legal disclaimers. 17 April 2014 20 © NXP Semiconductors N.V. 2014. All rights reserved 7 / 13 BUK953R2-40B NXP Semiconductors N-channel TrenchMOS logic level FET 03nh54 100 03ng52 2.5 VGS(th) (V) ID (A) 2.0 75 max 1.5 typ 50 min 1.0 25 0 Fig. 9. 0.5 Tj = 175 °C Tj = 25 °C 0 1 2 VGS (V) 0 - 60 3 Transfer characteristics: drain current as a function of gate-source voltage; typical values 2.8 3 RDSon (mΩ) 60 120 Tj (°C) 180 Fig. 10. Gate-source threshold voltage as a function of junction temperature 03nh57 8 0 03aa27 2 Label is VGS (V) a 3.2 1.5 3.4 6 3.6 1 3.8 4 4 5 0.5 10 2 0 70 140 210 280 ID (A) 0 - 60 350 Fig. 11. Drain-source on-state resistance as a function of drain current; typical values BUK953R2-40B Product data sheet 0 60 120 Tj (° C) 180 Fig. 12. Normalized drain-source on-state resistance factor as a function of junction temperature All information provided in this document is subject to legal disclaimers. 17 April 2014 © NXP Semiconductors N.V. 2014. All rights reserved 8 / 13 BUK953R2-40B NXP Semiconductors N-channel TrenchMOS logic level FET 03nh52 5 03nh58 12000 VGS (V) Ciss C (pF) 4 VDD = 14 V 8000 VDD = 32 V 3 Coss 2 4000 Crss 1 0 0 25 50 75 QG (nC) 0 10- 1 100 1 10 VDS (V) 102 Fig. 14. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values Fig. 13. Gate-source voltage as a function of gate charge; typical values 03nh51 100 IS (A) 75 50 Tj = 175 °C Tj = 25 °C 25 0 0.0 0.2 0.4 0.6 0.8 1.0 VSD (V) Fig. 15. Source current as a function of source-drain voltage; typical values BUK953R2-40B Product data sheet All information provided in this document is subject to legal disclaimers. 17 April 2014 © NXP Semiconductors N.V. 2014. All rights reserved 9 / 13 BUK953R2-40B NXP Semiconductors N-channel TrenchMOS logic level FET 10. Package outline Plastic single-ended package; heatsink mounted; 1 mounting hole; 3-lead TO-220AB E SOT78A A A1 p q mounting base D1 D L2 L1(1) Q b1 L 1 2 3 b e c e 0 5 10 mm scale DIMENSIONS (mm are the original dimensions) UNIT A A1 b b1 c D D1 E e L L1(1) L2 max. p q Q mm 4.5 4.1 1.39 1.27 0.9 0.6 1.3 1.0 0.7 0.4 15.8 15.2 6.4 5.9 10.3 9.7 2.54 15.0 13.5 3.30 2.79 3.0 3.8 3.6 3.0 2.7 2.6 2.2 Note 1. Terminals in this zone are not tinned. OUTLINE VERSION SOT78A REFERENCES IEC JEDEC JEITA 3-lead TO-220AB SC-46 EUROPEAN PROJECTION ISSUE DATE 03-01-22 05-03-14 Fig. 16. Package outline TO-220AB (SOT78A) BUK953R2-40B Product data sheet All information provided in this document is subject to legal disclaimers. 17 April 2014 © NXP Semiconductors N.V. 2014. All rights reserved 10 / 13 BUK953R2-40B NXP Semiconductors N-channel TrenchMOS logic level FET In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. 11. Legal information 11.1 Data sheet status Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. Document status [1][2] Product status [3] Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] [2] [3] Definition Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Please consult the most recently issued document before initiating or completing a design. The term 'short data sheet' is explained in section "Definitions". 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In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the Product data sheet. 11.3 Disclaimers Limited warranty and liability — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. NXP Semiconductors takes no responsibility for the content in this document if provided by an information source outside of NXP Semiconductors. BUK953R2-40B Product data sheet Suitability for use in automotive applications — This NXP Semiconductors product has been qualified for use in automotive applications. Unless otherwise agreed in writing, the product is not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors and its suppliers accept no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer's own risk. Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. All information provided in this document is subject to legal disclaimers. 17 April 2014 © NXP Semiconductors N.V. 2014. All rights reserved 11 / 13 BUK953R2-40B NXP Semiconductors N-channel TrenchMOS logic level FET No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. Translations — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. 11.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. Adelante, Bitport, Bitsound, CoolFlux, CoReUse, DESFire, EZ-HV, FabKey, GreenChip, HiPerSmart, HITAG, I²C-bus logo, ICODE, ICODE, ITEC, Labelution, MIFARE, MIFARE Plus, MIFARE Ultralight, MoReUse, QLPAK, Silicon Tuner, SiliconMAX, SmartXA, STARplug, TOPFET, TrenchMOS, TriMedia and UCODE — are trademarks of NXP Semiconductors N.V. HD Radio and HD Radio logo — are trademarks of iBiquity Digital Corporation. BUK953R2-40B Product data sheet All information provided in this document is subject to legal disclaimers. 17 April 2014 © NXP Semiconductors N.V. 2014. All rights reserved 12 / 13 BUK953R2-40B NXP Semiconductors N-channel TrenchMOS logic level FET 12. Contents 1 General description ............................................... 1 2 Features and benefits ............................................1 3 Applications ........................................................... 1 4 Quick reference data ............................................. 1 5 Pinning information ............................................... 2 6 Ordering information ............................................. 2 7 Limiting values .......................................................3 8 Thermal characteristics .........................................5 9 Characteristics ....................................................... 5 10 Package outline ................................................... 10 11 11.1 11.2 11.3 11.4 Legal information .................................................11 Data sheet status ............................................... 11 Definitions ...........................................................11 Disclaimers .........................................................11 Trademarks ........................................................ 12 © NXP Semiconductors N.V. 2014. All rights reserved For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Date of release: 17 April 2014 BUK953R2-40B Product data sheet All information provided in this document is subject to legal disclaimers. 17 April 2014 © NXP Semiconductors N.V. 2014. All rights reserved 13 / 13