LF PA K 56 BUK7Y18-75B N-channel TrenchMOS standard level FET 1 March 2013 Product data sheet 1. General description Standard level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic package using NXP High-Performance Automotive (HPA) TrenchMOS technology. This product has been designed and qualified to the appropriate AEC standard for use in automotive critical applications. 2. Features and benefits • • • Q101 compliant Suitable for standard level gate drive sources Suitable for thermally demanding environments due to 175 °C rating 3. Applications • • • • • • • 12 V, 24 V and 42 V loads Automotive systems DC-to-DC converters Engine management General purpose power switching Motors, lamps and solenoids Transmission control 4. Quick reference data Table 1. Quick reference data Symbol Parameter Conditions Min Typ Max Unit VDS drain-source voltage Tj ≥ 25 °C; Tj ≤ 175 °C - - 75 V ID drain current VGS = 10 V; Tmb = 25 °C; Fig. 1; Fig. 4 - - 49 A Ptot total power dissipation Tmb = 25 °C; Fig. 2 - - 105 W VGS = 10 V; ID = 20 A; Tj = 25 °C; - 13.8 18 mΩ - 14.24 - nC Static characteristics RDSon drain-source on-state resistance Fig. 12; Fig. 13 Dynamic characteristics QGD gate-drain charge ID = 20 A; VDS = 60 V; VGS = 10 V; Fig. 14 Scan or click this QR code to view the latest information for this product BUK7Y18-75B NXP Semiconductors N-channel TrenchMOS standard level FET Symbol Parameter Conditions Min Typ Max Unit ID = 49 A; Vsup ≤ 75 V; RGS = 50 Ω; - - 118 mJ Avalanche ruggedness EDS(AL)S non-repetitive drainsource avalanche energy VGS = 10 V; Tj(init) = 25 °C; unclamped 5. Pinning information Table 2. Pinning information Pin Symbol Description Simplified outline 1 S source 2 S source 3 S source 4 G gate mb D mounting base; connected to drain Graphic symbol D mb G S mbb076 1 2 3 4 LFPAK56; PowerSO8 (SOT669) 6. Ordering information Table 3. Ordering information Type number Package BUK7Y18-75B Name Description Version LFPAK56; Power-SO8 Plastic single-ended surface-mounted package (LFPAK56; Power-SO8); 4 leads SOT669 7. Marking Table 4. Marking codes Type number Marking code BUK7Y18-75B 71875B 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit VDS drain-source voltage Tj ≥ 25 °C; Tj ≤ 175 °C - 75 V VDGR drain-gate voltage RGS = 20 kΩ - 75 V VGS gate-source voltage -20 20 V ID drain current - 49 A BUK7Y18-75B Product data sheet Tmb = 25 °C; VGS = 10 V; Fig. 1; Fig. 4 All information provided in this document is subject to legal disclaimers. 1 March 2013 © NXP B.V. 2013. All rights reserved 2 / 13 BUK7Y18-75B NXP Semiconductors N-channel TrenchMOS standard level FET Symbol Parameter Conditions Min Max Unit Tmb = 100 °C; VGS = 10 V; Fig. 1 - 34.9 A IDM peak drain current Tmb = 25 °C; pulsed; tp ≤ 10 µs; Fig. 4 - 198 A Ptot total power dissipation Tmb = 25 °C; Fig. 2 - 105 W Tstg storage temperature -55 175 °C Tj junction temperature -55 175 °C Source-drain diode IS source current Tmb = 25 °C - 49 A ISM peak source current pulsed; tp ≤ 10 µs; Tmb = 25 °C - 198 A non-repetitive drain-source avalanche energy ID = 49 A; Vsup ≤ 75 V; RGS = 50 Ω; - 118 mJ repetitive drain-source avalanche energy Fig. 3 - J Avalanche ruggedness EDS(AL)S EDS(AL)R [1] [2] [3] VGS = 10 V; Tj(init) = 25 °C; unclamped [1][2][3] - Single-pulse avalanche rating limited by maximum junction temperature of 175 °C. Repetitive avalanche rating limited by an average junction temperature of 170 °C. Refer to application note AN10273 for further information. 003aac508 50 ID (A) 40 03na19 120 Pder (%) 80 30 20 40 10 0 Fig. 1. 0 50 100 150 Tmb (°C) Continuous drain current as a function of mounting base temperature BUK7Y18-75B Product data sheet 0 200 Fig. 2. 0 100 150 Tmb (°C) 200 Normalized total power dissipation as a function of mounting base temperature All information provided in this document is subject to legal disclaimers. 1 March 2013 50 © NXP B.V. 2013. All rights reserved 3 / 13 BUK7Y18-75B NXP Semiconductors N-channel TrenchMOS standard level FET 003aac487 102 IAL (A) (1) 10 (2) 1 (3) 10-1 10-3 10-2 10-1 1 tAL (ms) 10 (1) Single pulse; Tj = 25°C. (2) Single pulse; Tj = 150°C. (3) Repetitive. Fig. 3. Single-pulse and repetitive avalanche rating; avalanche current as a function of avalanche time 003aad516 103 ID (A) Limit RDSon = V DS / ID 102 tp = 10 µs 100 µs 10 DC 1 ms 1 10 ms 100 ms 10-1 Fig. 4. 1 102 10 103 V DS (V) Safe operating area; continuous and peak drain currents as a function of drain-source voltage. 9. Thermal characteristics Table 6. Thermal characteristics Symbol Parameter Conditions Min Typ Max Unit Rth(j-mb) thermal resistance from junction to mounting base Fig. 5 - - 1.42 K/W BUK7Y18-75B Product data sheet All information provided in this document is subject to legal disclaimers. 1 March 2013 © NXP B.V. 2013. All rights reserved 4 / 13 BUK7Y18-75B NXP Semiconductors N-channel TrenchMOS standard level FET 003aac479 10 Zth (j-mb) (K/W) δ = 0.5 1 0.2 0.1 10-1 0.05 P 0.02 δ= tp T 10-2 single shot 10-3 10-6 Fig. 5. tp 10-5 10-4 10-3 10-2 10-1 t T 1 tp (s) Transient thermal impedance from junction to mounting base as a function of pulse duration. 10. Characteristics Table 7. Characteristics Symbol Parameter Conditions Min Typ Max Unit drain-source breakdown voltage ID = 250 µA; VGS = 0 V; Tj = 25 °C 75 - - V ID = 250 µA; VGS = 0 V; Tj = -55 °C 68 - - V gate-source threshold voltage ID = 1 mA; VDS = VGS; Tj = 25 °C; 2 3 4 V - - 4.4 V 1 - - V VDS = 75 V; VGS = 0 V; Tj = 25 °C - 0.02 1 µA VDS = 75 V; VGS = 0 V; Tj = 175 °C - - 500 µA VGS = 20 V; VDS = 0 V; Tj = 25 °C - 2 100 nA VGS = -20 V; VDS = 0 V; Tj = 25 °C - 2 100 nA VGS = 10 V; ID = 20 A; Tj = 175 °C; - - 43.2 mΩ - 13.8 18 mΩ Static characteristics V(BR)DSS VGS(th) Fig. 10; Fig. 11 ID = 1 mA; VDS = VGS; Tj = -55 °C; Fig. 10 ID = 1 mA; VDS = VGS; Tj = 175 °C; Fig. 10 IDSS IGSS RDSon drain leakage current gate leakage current drain-source on-state resistance Fig. 12; Fig. 13 VGS = 10 V; ID = 20 A; Tj = 25 °C; Fig. 12; Fig. 13 Dynamic characteristics QG(tot) total gate charge ID = 20 A; VDS = 60 V; VGS = 10 V; - 35 - nC QGS gate-source charge Fig. 14 - 8.28 - nC QGD gate-drain charge - 14.24 - nC BUK7Y18-75B Product data sheet All information provided in this document is subject to legal disclaimers. 1 March 2013 © NXP B.V. 2013. All rights reserved 5 / 13 BUK7Y18-75B NXP Semiconductors N-channel TrenchMOS standard level FET Symbol Parameter Conditions Min Typ Max Unit Ciss input capacitance VGS = 0 V; VDS = 25 V; f = 1 MHz; - 1630 2173 pF Coss output capacitance Tj = 25 °C; Fig. 15 - 274 329 pF Crss reverse transfer capacitance - 115 158 pF td(on) turn-on delay time VDS = 30 V; RL = 1.5 Ω; VGS = 10 V; - 18.5 - ns tr rise time RG(ext) = 10 Ω - 22.5 - ns td(off) turn-off delay time - 44.5 - ns tf fall time - 19.8 - ns - 0.85 1.2 V Source-drain diode VSD source-drain voltage IS = 25 A; VGS = 25 V; Tj = 25 °C; Fig. 16 trr Qr reverse recovery time IS = 20 A; dIS/dt = -100 A/µs; VGS = 0 V; - 55.4 - ns recovered charge VDS = 30 V - 143 - nC 003aad509 40 20 ID (A) 30 4.7 4.7 4.9 VGS (V) = 5.1 40 4.5 10 20 4.3 Fig. 6. 4.5 60 4.9 0 4.3 RDSon (mΩ) VGS (V) = 5.1 20 003aad510 80 10 0 1 2 3 4 VDS (V) 20 5 0 Output characteristics: drain current as a function of drain-source voltage; typical values. BUK7Y18-75B Product data sheet 10 Fig. 7. 0 20 30 I D (A) 40 Drain-source on-state resistance as a function of drain current; typical values. All information provided in this document is subject to legal disclaimers. 1 March 2013 10 © NXP B.V. 2013. All rights reserved 6 / 13 BUK7Y18-75B NXP Semiconductors N-channel TrenchMOS standard level FET 003aad511 56 003aad552 40 ID (A) gfs (S) 30 44 20 32 10 25 °C Tj = 175 °C 20 Fig. 8. 0 20 40 ID (A) 0 60 Forward transconductance as a function of drain current; typical values. Fig. 9. 03aa32 5 4 6 03aa35 min typ max 10- 3 10- 4 min 10- 5 1 0 60 120 Tj (°C) 10- 6 180 Fig. 10. Gate-source threshold voltage as a function of junction temperature Product data sheet VGS (V) Transfer characteristics: drain current as a function of gate-source voltage; typical values. 10- 2 typ 2 4 10- 1 max 3 BUK7Y18-75B 2 ID (A) VGS(th) (V) 0 - 60 0 0 2 4 VGS (V) 6 Fig. 11. Sub-threshold drain current as a function of gate-source voltage All information provided in this document is subject to legal disclaimers. 1 March 2013 © NXP B.V. 2013. All rights reserved 7 / 13 BUK7Y18-75B NXP Semiconductors N-channel TrenchMOS standard level FET 03nq03 3 003aad616 60 R DSON (mΩ) a 2 40 1 20 0 -60 -20 20 60 100 0 140 180 Tj (°C) Fig. 12. Normalized drain-source on-state resistance factor as a function of junction temperature 8 12 16 VGS (V) 20 Fig. 13. Drain-source on-state resistance as a function of gate-source voltage; typical values. 003aad513 10 4 003aad514 104 VGS (V) 8 C (pF) V DS = 14 V Ciss 6 VDS = 60 V 103 4 Coss 2 0 0 10 20 30 QG (nC) Fig. 14. Gate-source voltage as a function of gate charge; typical values. BUK7Y18-75B Product data sheet 102 10-1 40 Crss 1 10 VDS (V) 102 Fig. 15. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values. All information provided in this document is subject to legal disclaimers. 1 March 2013 © NXP B.V. 2013. All rights reserved 8 / 13 BUK7Y18-75B NXP Semiconductors N-channel TrenchMOS standard level FET 003aad512 40 IS (A) 30 20 175 °C Tj = 25 °C 10 0 0.2 0.4 0 .6 0.8 VSD (V) 1 Fig. 16. Source (diode forward) current as a function of source-drain (diode forward) voltage; typical values. BUK7Y18-75B Product data sheet All information provided in this document is subject to legal disclaimers. 1 March 2013 © NXP B.V. 2013. All rights reserved 9 / 13 BUK7Y18-75B NXP Semiconductors N-channel TrenchMOS standard level FET 11. Package outline Plastic single-ended surface-mounted package (LFPAK56; Power-SO8); 4 leads E A2 A SOT669 C c2 b2 E1 b3 L1 mounting base b4 D1 D H L2 1 2 3 e 4 w b A X c 1/2 e A (A3) A1 C q L detail X 0 y C θ 5 mm 8° scale 0° Dimensions (mm are the original dimensions) Unit(1) A A1 A2 A3 b b2 max 1.20 0.15 1.10 0.50 4.41 nom 0.25 min 1.01 0.00 0.95 0.35 3.62 mm c c2 D(1) D1(1) E(1) E1(1) b3 b4 2.2 0.9 0.25 0.30 4.10 4.20 5.0 3.3 2.0 0.7 0.19 0.24 3.80 4.8 3.1 e 1.27 H L L1 L2 6.2 0.85 1.3 1.3 5.8 0.40 0.8 0.8 Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. Outline version SOT669 References IEC JEDEC JEITA w y 0.25 0.1 sot669_po European projection Issue date 11-03-25 13-02-27 MO-235 Fig. 17. Package outline LFPAK56; Power-SO8 (SOT669) BUK7Y18-75B Product data sheet All information provided in this document is subject to legal disclaimers. 1 March 2013 © NXP B.V. 2013. All rights reserved 10 / 13 BUK7Y18-75B NXP Semiconductors N-channel TrenchMOS standard level FET In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. 12. Legal information 12.1 Data sheet status Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. Document status [1][2] Product status [3] Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] [2] [3] Definition Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Please consult the most recently issued document before initiating or completing a design. The term 'short data sheet' is explained in section "Definitions". The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 12.2 Definitions Preview — The document is a preview version only. The document is still subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification — The information and data provided in a Product data sheet shall define the specification of the product as agreed between NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the Product data sheet. 12.3 Disclaimers Limited warranty and liability — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. NXP Semiconductors takes no responsibility for the content in this document if provided by an information source outside of NXP Semiconductors. BUK7Y18-75B Product data sheet Suitability for use in automotive applications — This NXP Semiconductors product has been qualified for use in automotive applications. Unless otherwise agreed in writing, the product is not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors and its suppliers accept no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer's own risk. Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. All information provided in this document is subject to legal disclaimers. 1 March 2013 © NXP B.V. 2013. All rights reserved 11 / 13 BUK7Y18-75B NXP Semiconductors N-channel TrenchMOS standard level FET No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. Translations — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. 12.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. Adelante, Bitport, Bitsound, CoolFlux, CoReUse, DESFire, EZ-HV, FabKey, GreenChip, HiPerSmart, HITAG, I²C-bus logo, ICODE, I-CODE, ITEC, Labelution, MIFARE, MIFARE Plus, MIFARE Ultralight, MoReUse, QLPAK, Silicon Tuner, SiliconMAX, SmartXA, STARplug, TOPFET, TrenchMOS, TriMedia and UCODE — are trademarks of NXP B.V. HD Radio and HD Radio logo — are trademarks of iBiquity Digital Corporation. BUK7Y18-75B Product data sheet All information provided in this document is subject to legal disclaimers. 1 March 2013 © NXP B.V. 2013. All rights reserved 12 / 13 BUK7Y18-75B NXP Semiconductors N-channel TrenchMOS standard level FET 13. Contents 1 General description ............................................... 1 2 Features and benefits ............................................1 3 Applications ........................................................... 1 4 Quick reference data ............................................. 1 5 Pinning information ............................................... 2 6 Ordering information ............................................. 2 7 Marking ................................................................... 2 8 Limiting values .......................................................2 9 Thermal characteristics .........................................4 10 Characteristics ....................................................... 5 11 Package outline ................................................... 10 12 12.1 12.2 12.3 12.4 Legal information .................................................11 Data sheet status ............................................... 11 Definitions ...........................................................11 Disclaimers .........................................................11 Trademarks ........................................................ 12 © NXP B.V. 2013. All rights reserved For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Date of release: 1 March 2013 BUK7Y18-75B Product data sheet All information provided in this document is subject to legal disclaimers. 1 March 2013 © NXP B.V. 2013. All rights reserved 13 / 13