PCS3P7303A D

PCS3P7303A
General Purpose Peak EMI
Reduction IC
Functional Description
PCS3P7303A is a versatile, 3.3 V / 2.5 V Peak EMI reduction IC
based on TIMING SAFEt technology. PCS3P7303A accepts an
input clock either from a Crystal or from an external reference (AC or
DC coupled to XIN / CLKIN) and locks on to it delivering a 1x
modulated clock output. PCS3P7303A has a Frequency Selection (FS)
control that facilitates selecting one of the two frequency ranges
within the operating frequency range. Refer to the Frequency
Selection Table for details.
PCS3P7303A has an SSEXTR pin to select different deviations
depending upon the value of an external resistor connected between
SSEXTR and GND. Modulation Rate (MR) control selects two
different Modulation Rates.
PPCS3P7303A operates from a 3.3 V / 2.5 V supply and is available
in an 8−pin TSSOP and 8L 2 mm x 2 mm WDFN packages.
Application
PCS3P7303A is targeted for many applications including USB and
SATA.
General Features
• 1x LVCMOS Peak EMI Reduction
• Input Frequency:
10 MHz − 70 MHz @ 2.5 V
10 MHz − 80 MHz @ 3.3 V
Output Frequency:
♦ 10 MHz − 70 MHz @ 2.5 V
♦ 10 MHz − 80 MHz @ 3.3 V
Analog Deviation Selection
ModRate Selection Option
Supply Voltage: 2.5 V ± 0.2 V
3.3 V ± 0.3 V
8−pin TSSOP, 8L 2 mm x 2 mm WDFN (TDFN) Packages
The First True Drop−in Solution
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
♦
•
•
•
•
•
•
•
♦
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MARKING
DIAGRAMS
BKL
YWW
AG
TSSOP8 4.4x3
CASE 948AL
1
1
BK MG
G
WDFN8 2x2, 0.5P
CASE 511AQ
XX
= Specific Device Code
M
= Date Code
YY, Y
= Year
WW, W = Work Week
A
= Assembly Location
G
= Pb−Free Device
(Note: Microdot may be in either location)
PIN CONFIGURATION
XIN / CLKIN 1
XOUT 2
8
VDD
7
SSEXTR
PCS3P7303A
FS
3
6
MR
GND
4
5
ModOUT
ORDERING INFORMATION
See detailed ordering and shipping information on page 7 of
this data sheet.
© Semiconductor Components Industries, LLC, 2014
October, 2014 − Rev. 0
1
Publication Order Number:
PCS3P7303A/D
PCS3P7303A
FS
XIN / CLKIN
MR
Crystal
Oscillator
XOUT
VDD
ModOUT
PLL
GND
SSEXTR
Figure 1. Block Diagram
Table 1. PIN DESCRIPTION
Pin #
Pin Name
Type
Description
1
XIN / CLKIN
Input
Crystal connection or External reference clock input.
2
XOUT
Output
3
FS
Input
4
GND
Power
Ground.
5
ModOUT
Output
Buffered Modulated clock output.
6
MR
input
Modulation Rate Select. When LOW selects Low Modulation Rate.
Selects High Modulation Rate when pulled HIGH. Has an internal pull−down resistor.
7
SSEXTR
Input
Analog Deviation Selection through external resistor to GND.
8
VDD
Power
Crystal connection. If using an external reference, this pin should be left open.
Frequency Select. Pull LOW to select Low Frequency range. Selects High Frequency
range when pulled HIGH. Has an internal pull−up resistor. (See Frequency Selection table
for details.)
2.5 V / 3.3 V supply Voltage.
Table 2. FREQUENCY SELECTION TABLE
VDD (V)
2.5
3.3
FS
Frequency (MHz)
0
10 − 35
1
30 − 70
0
10 − 40
1
30 − 80
Table 3. ABSOLUTE MAXIMUM RATINGS
Symbol
VDD, VIN
TSTG
Parameter
Rating
Unit
Voltage on any input pin with respect to Ground
−0.5 to +4.6
V
Storage temperature
−65 to +125
°C
Ts
Max. Soldering Temperature (10 sec)
260
°C
TJ
Junction Temperature
150
°C
2
kV
TDV
Static Discharge Voltage (As per JEDEC STD22− A114−B)
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
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2
PCS3P7303A
Table 4. OPERATING CONDITIONS
Parameter
Min
Max
Unit
Supply Voltage
2.3
3.6
V
TA
Operating Temperature (Ambient Temperature)
−25
+85
°C
CL
Load Capacitance
10
pF
CIN
Input Capacitance
7
pF
VDD
Description
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
Table 5. DC ELECTRICAL CHARACTERISTICS FOR 2.5 V
Parameter
VDD
Description
Test Conditions
Supply Voltage
VIL
Input LOW Voltage
VIH
Input HIGH Voltage
IIL
Input LOW Current
VIN = 0 V
Min
Typ
Max
Units
2.3
2.5
2.7
V
0.7
V
1.7
V
−50
mA
IIH
Input HIGH Current
VIN = VDD
50
mA
VOL
Output LOW Voltage
IOL = 8 mA
0.6
V
VOH
Output HIGH Voltage
IOH = −8 mA
ICC
Static Supply Current
XIN / CLKIN pulled low
IDD
Dynamic Supply Current
Unloaded
Output
ZO
1.8
V
500
mA
FS = 0; @ 10 MHz
5
mA
FS = 1; @ 70 MHz
12
Output Impedance
45
W
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
Table 6. SWITCHING CHARACTERISTICS FOR 2.5 V
Parameter
Test Conditions
Min
Typ
Max
Units
MHz
Input Frequency (Note 1) /
ModOUT
FS = 0
10
35
FS = 1
30
70
Duty Cycle (Notes 2, 3)
Measured at VDD/2
45
Output Rise Time
(Notes 2, 3)
50
55
%
Measured between 20% to 80%
1.75
2.5
nS
Output Fall Time
(Notes 2, 3)
Measured between 80% to 20%
1.0
1.6
nS
Cycle−to−Cycle Jitter
(Note 3)
Unloaded output
10 MHz
±450
±600
pS
35 MHz
±125
±250
30 MHz
±225
±350
70 MHz
±150
±300
FS = 0
FS = 1
PLL Lock Time (Note 3)
Stable power supply, valid clock presented on XIN / CLKIN
1. Functionality with Crystal is guaranteed by design and characterization. Not 100% tested in production.
2. All parameters are specified with 10 pF loaded outputs.
3. Parameter is guaranteed by design and characterization. Not 100% tested in production.
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3
3
mS
PCS3P7303A
Table 7. DC ELECTRICAL CHARACTERISTICS FOR 3.3 V
Parameter
VDD
Description
Test Conditions
Supply Voltage
VIL
Input LOW Voltage
VIH
Input HIGH Voltage
Min
Typ
Max
Units
3.0
3.3
3.6
V
0.8
V
2.0
V
IIL
Input LOW Current
VIN = 0 V
−50
mA
IIH
Input HIGH Current
VIN = VDD
50
mA
VOL
Output LOW Voltage
IOL = 8 mA
0.4
V
VOH
Output HIGH Voltage
IOH = −8 mA
ICC
Static Supply Current
XIN / CLKIN pulled low
IDD
Dynamic Supply Current
Unloaded
Output
ZO
Output Impedance
2.4
V
FS = 0; @ 10 MHz
FS = 1; @ 80 MHz
700
mA
7
mA
20
35
W
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
Table 8. SWITCHING CHARACTERISTICS FOR 3.3 V
Parameter
Test Conditions
Min
Typ
Max
Units
MHz
Input Frequency (Note 1) /
ModOUT
FS = 0
10
40
FS = 1
30
80
Duty Cycle (Notes 2, 3)
Measured at VDD/2
45
Output Rise Time
(Notes 2, 3)
50
55
%
Measured between 20% to 80%
1.3
2
nS
Output Fall Time
(Notes 2, 3)
Measured between 80% to 20%
0.9
1.3
nS
Cycle−to−Cycle Jitter
(Note 3)
Unloaded output
10 MHz
±450
±600
pS
40 MHz
±125
±250
30 MHz
±225
±350
80 MHz
±125
±250
FS = 0
FS = 1
PLL Lock Time (Note 3)
Stable power supply, valid clock presented on XIN / CLKIN
3
4. Functionality with Crystal is guaranteed by design and characterization. Not 100% tested in production.
5. All parameters are specified with 10 pF loaded outputs.
6. Parameter is guaranteed by design and characterization. Not 100% tested in production.
Table 9. TYPICAL CRYSTAL SPECIFICATIONS
Fundamental AT Cut Parallel Resonant Crystal
Nominal frequency
25 MHz
Frequency tolerance
±50 ppm or better at 25°C
Operating temperature range
−25°C to +85°C
Storage temperature
−40°C to +85°C
Load capacitance (CP)
18 pF
Shunt capacitance
7 pF maximum
ESR
25 W
NOTE: CL is the Load Capacitance and R1 is used to prevent oscillations at overtone frequency of the Fundamental frequency.
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4
mS
PCS3P7303A
PCS3P7303A
R
XOUT
XIN / CLKIN
R1
Crystal
CX
CX
CX = 2*(CP − CS),
Where CP = Load capacitance of crystal from crystal vendor datasheet.
CS = Stray capacitance due to CIN, PCB, Trace, etc.
Figure 2. Typical Crystal Interface Circuit
Switching Waveforms
t1
t2
VDD/2
VDD/2
VDD/2
OUTPUT
Figure 3. Duty Cycle Timing
80%
80%
20%
OUTPUT
20%
t3
t4
Figure 4. Output Rise/Fall Time
Application Schematic
Noise Reduction Filter
VDD
R
CLKIN
VDD
R1
1 XIN/CLKIN
2 XOUT
VDD
8
SSEXTR
7
C
0.1 mF
External Deviation Control
VDD
3 FS
MR
6
ModOUT
5
R3
R2
4
GND
REXT
R4
Note: FS (Pin#3) MR (Pin#6): Connect to VDD or GND
Refer to Pin Description table for Functionality details.
Use 0 W resistor at either R1 or R2 to configure FS.
Use 0 W resistor at either R3 or R4 to configure MR.
Figure 5. Application Schematic
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5
Analog Deviation Control
SSEXTR can be Pulled HIGH
to turn OFF Deviation.
PCS3P7303A
Charts
2.00
2.00
12M
27M
33M
1.75
1.50
Deviation (±%)
1.50
Deviation (±%)
12M
27M
33M
1.75
1.25
1.00
0.75
1.25
1.00
0.75
0.50
0.50
0.25
0.25
0.00
0.00
20
0
40
60
80
100 120 140 160 180 200 220 240
0
20
40
60
80
Resistance (KW)
Resistance (KW)
Figure 6. Deviation vs. Resistance (FS = 0, MR = 0)
2.00
Figure 7. Deviation vs. Resistance (FS = 0, MR = 1)
2.00
33M
40M
50M
1.75
33M
40M
50M
1.75
1.50
Deviation (±%)
1.50
Deviation (±%)
100 120 140 160 180 200 220 240
1.25
1.00
0.75
1.25
1.00
0.75
0.50
0.50
0.25
0.25
0.00
0.00
0
20
40
60
80
100 120 140 160 180 200 220 240
0
20
40
60
Resistance (KW)
80
100 120 140 160 180 200 220 240
Resistance (KW)
Figure 9. Deviation vs. Resistance (FS = 1, MR = 1)
Figure 8. Deviation vs. Resistance (FS = 1, MR = 0)
2
2
1.75
1.75
1.5
1.5
Deviation (±%)
Deviation (±%)
NOTE: Device to Device variation of Deviation is ±10% (0°C to 70°C) and ±25% (−25°C to +85°C)
1.25
1
0.75
1.25
1
0.75
0.5
0.5
0.25
0.25
0
0
20 40 60 80 100 120 140160 180 200 220 240 260
Resistance (kW)
0
0
Figure 10. Deviation vs. Resistance (FS = 1,
MR = 0) VDD = 3.3 V
20 40 60 80 100 120 140160 180 200 220 240 26
Resistance (kW)
Figure 11. Deviation vs. Resistance (FS = 1,
MR = 1) VDD = 3.3 V
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PCS3P7303A
Table 10. ORDERING INFORMATION
Marking
Temperature
Package
Shipping†
PCS3P7303AG−08TR
BKL
−25°C to +85°C
8−pin TSSOP
(Pb−Free)
Tape & Reel
PCS3P7303AG−08TT
BKL
−25°C to +85°C
8−pin TSSOP
(Pb−Free)
Tube
PCS3P7303AG−08CR
BK
−25°C to +85°C
8L WDFN (2 mm x 2 mm)
(Pb−Free)
Tape & Reel
Part Number
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
NOTE: A “microdot” placed at the end of last row of marking or just below the last row toward the center of package indicates Pb−Free.
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7
PCS3P7303A
PACKAGE DIMENSIONS
TSSOP8, 4.4x3
CASE 948AL
ISSUE O
b
SYMBOL
MIN
NOM
A
E1
E
MAX
1.20
A1
0.05
A2
0.80
b
0.19
0.30
c
0.09
0.20
D
2.90
3.00
3.10
E
6.30
6.40
6.50
E1
4.30
4.40
4.50
0.15
0.90
e
0.65 BSC
L
1.00 REF
L1
0.50
θ
0º
0.60
1.05
0.75
8º
e
TOP VIEW
D
A2
c
q1
A
A1
L1
SIDE VIEW
L
END VIEW
Notes:
(1) All dimensions are in millimeters. Angles in degrees.
(2) Complies with JEDEC MO-153.
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PCS3P7303A
PACKAGE DIMENSIONS
WDFN8 2x2, 0.5P
CASE 511AQ
ISSUE A
D
PIN ONE
REFERENCE
2X
A
B
L1
ÍÍÍ
ÍÍÍ
ÍÍÍ
DETAIL A
E
OPTIONAL
CONSTRUCTIONS
0.10 C
2X
0.10 C
EXPOSED Cu
A3
0.05 C
MOLD CMPD
DETAIL B
A
8X
OPTIONAL
CONSTRUCTION
A1
C
SIDE VIEW
SEATING
PLANE
MILLIMETERS
MIN
MAX
0.70
0.80
0.00
0.05
0.20 REF
0.20
0.30
2.00 BSC
2.00 BSC
0.50 BSC
0.50
0.60
--0.15
RECOMMENDED
SOLDERING FOOTPRINT*
7X
0.78
DETAIL A
1
DIM
A
A1
A3
b
D
E
e
L
L1
ÉÉ
ÉÉ
ÉÉ
TOP VIEW
DETAIL B
0.05 C
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED
TERMINAL AND IS MEASURED BETWEEN
0.15 AND 0.30mm FROM TERMINAL.
L
L
8X
4
PACKAGE
OUTLINE
L
2.30
0.88
8
5
e/2
e
8X
b
0.10 C A
0.05 C
BOTTOM VIEW
8X
1
0.50
PITCH
0.35
B
DIMENSIONS: MILLIMETERS
NOTE 3
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
TIMING SAFE is a trademark of Semiconductor Components Industries, LLC (SCILLC).
ON Semiconductor and the
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries.
SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed
at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation
or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and
specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets
and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each
customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended,
or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which
the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or
unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim
alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable
copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada
Email: [email protected]
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81−3−5817−1050
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ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your local
Sales Representative
PCS3P7303A/D