LC75847T CMOS LSI 1/3, 1/4 Duty General-Purpose LCD Driver www.onsemi.com Overview The LC75847T is 1/3 duty and 1/4 duty general-purpose LCD driver that can be used for frequency display in electronic tuners under the control of a microcontroller. The LC75847T can drive an LCD with up to 420 segments directly. The LC75847T can also control up to 8 general-purpose output ports. Features TQFP120 14x14 Switching between 1/3 duty and 1/4 duty drive techniques under serial data control. Switching between 1/2 bias and 1/3 bias drive techniques under serial data control. Up to 318 segments for 1/3 duty drive and 420 segments for 1/4 duty drive can be displayed. Serial data input supports CCB format communication with the system controller. Serial data control of the power-saving mode based backup function and all the segments forced off function. Serial data control of switching between the segment output port and the general-purpose output port functions. Serial data control of frame frequency for common and segment output waveforms. High generality, since display data is displayed directly without decoder intervention. Built-in display contrast adjustment circuit Independent VLCD for the LCD driver block The INH pin can force the display to the off state. RC oscillator circuit Specifications Absolute Maximum Ratings at Ta = 25C, VSS = 0V Parameter Maximum supply voltage Symbol VDD max VLCD max Conditions Ratings unit VDD –0.3 to +7.0 VLCD –0.3 to +7.0 CE, CL, DI, INH V –0.3 to +7.0 VIN1 VIN2 OSC VIN3 VOUT1 VLCD1, VLCD2 OSC VOUT2 IOUT1 VLCD0, S1 to S106, COM1 to COM4, P1 to P8 Output current IOUT2 COM1 to COM4 Allowable power dissipation IOUT3 Pd max Ta = 85°C Operating temperature Topr –40 to +85 C Storage temperature Tstg –55 to +125 C Input voltage Output voltage –0.3 to VDD +0.3 V –0.3 to VLCD +0.3 S1 to S106 P1 to P8 –0.3 to VDD +0.3 –0.3 to VLCD +0.3 V 300 A 3 mA 5 mA 200 mW Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. CCB is ON Semiconductor® ’s original format. All addresses are managed by ON Semiconductor® for this format. CCB is a registered trademark of Semiconductor Components Industries, LLC. ORDERING INFORMATION See detailed ordering and shipping information on page 28 of this data sheet. © Semiconductor Components Industries, LLC, 2013 October 2013 - Rev. 0 1 Publication Order Number : LC75847T/D LC75847T Allowable Operating Ranges at Ta = –40 to +85°C, VSS = 0 V Parameter Symbol VDD Supply voltage Output voltage Input voltage VLCD Conditions Ratings min typ max VDD 2.7 6.0 VLCD, VLCD0 = 0.70 VLCD to 0.95 VLCD 4.0 6.0 VLCD, VLCD0 = VLCD 2.7 6.0 2.7 VLCD0 VLCD0 VLCD1 VLCD1 2/3 VLCD0 VLCD0 VLCD2 VLCD2 1/3 VLCD0 VLCD0 VLCD Unit V V V Input high level voltage VIH CE, CL, DI, INH 0.8 VDD 6.0 V Input low level voltage VIL CE, CL, DI, INH 0 0.2 VDD V Recommended external resistance ROSC OSC 39 Recommended external capacitance COSC OSC 1000 Guaranteed oscillation range fOSC OSC 19 38 kΩ pF 76 kHz Data setup time tds CL, DI: Figure 2 160 ns Data hold time tdh CL, DI: Figure 2 160 ns CE wait time tcp CE, CL: Figure 2 160 ns CE setup time tcs CE, CL: Figure 2 160 ns CE hold time tch CE, CL: Figure 2 160 ns High level clock pulse width tøH CL: Figure 2 160 ns Low level clock pulse width tøL CL: Figure 2 160 ns Rise time tr CE, CL, DI: Figure 2 160 ns Fall time tf CE, CL, DI: Figure 2 160 ns INH switching time tc INH, CE: Figure 3, Figure 4 10 µs No. 7389-2/27 LC75847T Electrical Characteristics for the allowable operating ranges Parameter Symbol Conditions Hysteresis VH CE, CL, DI, INH Input high level current IIH CE, CL, DI, INH: VI = 6.0 V Input low level current Output high level voltage Output low level voltage Output middle level voltage*1 Oscillator frequency Current drain Ratings min typ Unit max 0.1 VDD V 5.0 IIL CE, CL, DI, INH: VI = 0 V VOH1 S1 to S106: IO = –20 µA VLCD0 – 0.9 VOH2 COM1 to COM4: IO = –100 µA VLCD0 – 0.9 VOH3 P1 to P8: IO = –1 mA VLCD – 0.9 –5.0 µA V VOL1 S1 to S106: IO = 20 µA 0.9 VOL2 COM1 to COM4: IO = 100 µA 0.9 VOL3 P1 to P8: IO = 1 mA 0.9 VMID1 COM1 to COM4: 1/2 bias, IO = ±100 µA 1/2 VLCD0 – 0.9 1/2 VLCD0 + 0.9 VMID2 S1 to S106: 1/3 bias, IO = ±20 µA 2/3 VLCD0 – 0.9 2/3 VLCD0 + 0.9 VMID3 S1 to S106: 1/3 bias, IO = ±20 µA 1/3 VLCD0 – 0.9 1/3 VLCD0 + 0.9 VMID4 COM1 to COM4: 1/3 bias, IO = ±100 µA 2/3 VLCD0 – 0.9 2/3 VLCD0 + 0.9 VMID5 COM1 to COM4: 1/3 bias, IO = ±100 µA 1/3 VLCD0 – 0.9 1/3 VLCD0 + 0.9 fOSC OSC: ROSC = 39 kΩ, COSC = 1000 pF IDD1 VDD: Power-saving mode 30.4 µA 38 45.6 V V kHz 5 IDD2 VDD: VDD = 6.0 V, output open, fOSC = 38 kHz ILCD1 VLCD: Power-saving mode ILCD2 VLCD: VLCD = 6.0 V, output open, 1/2 bias, fOSC = 38 kHz, VLCD0 = 0.70 VLCD to 0.95 VLCD 400 800 ILCD3 VLCD: VLCD = 6.0 V, output open, 1/2 bias, fOSC = 38 kHz, VLCD0 = VLCD 350 700 ILCD4 VLCD: VLCD = 6.0 V, output open, 1/3 bias, fOSC = 38 kHz, VLCD0 = 0.70 VLCD to 0.95 VLCD 300 600 ILCD5 VLCD: VLCD = 6.0 V, output open, 1/3 bias, fOSC = 38 kHz, VLCD0 = VLCD 250 500 250 500 5 µA Note: *1 Excluding the bias voltage generation divider resistors built in the VLCD0, VLCD1, VLCD2, and VSS. (See Figure 1.) VLCD CONTRAST ADJUSTER VLCD0 VLCD1 VLCD2 To the common segment drivers VSS Except these resistors Figure 1 No. 7389-3/27 LC75847T 1. When CL is stopped at the low level VIH CE VIL tøH CL tøL VIH 50% VIL tr tf tcp tcs tch VIH DI VIL tds tdh 2. When CL is stopped at the high level VIH VIL CE tøL tøH VIH 50% VIL CL tf tr tcp tcs tch VIH DI VIL tds tdh Figure 2 OSC COMMON DRIVER SEGMENT DRIVER & LATCH CLOCK GENERATOR SHIFT REGISTER S2/P2 S1/P1 S8/P8 S9 S105 S104 COM1 COM2 COM3 COM4/S106 Block Diagram VDD VLCD CONTRAST ADJUSTER VLCD0 ADDRESS DETECTOR VLCD1 VLCD2 CE CL DI INH VSS No. 7389-4/27 LC75847T Pin Functions Pin No. Function Active I/O Handling when unused S1/P1 to S8/P8 1 to 8 S9 to S105 9 to 105 Segment outputs for displaying the display data transferred by serial data input. The pins S1/P1 to S8/P8 can be used as general-purpose output ports when so set up by the control data. — O Open COM1 to COM3 109 to 107 COM4/S106 106 — O Open OSC 116 An oscillator circuit is formed by connecting an external resistor and capacitor to this pin. — I/O VDD CE 118 Serial data transfer inputs. These pins are connected to the control microprocessor. H I CL 119 DI 120 CE: Chip enable CL: Synchronization clock DI: Transfer data Symbol Common driver outputs. The frame frequency is fO Hz. The COM4/S106 pin can be used as a segment output in 1/3 duty. Oscillator connection. I GND — I L I GND — O Open Display off control input INH 117 • INH = low (VSS) ....Off S1/P1 to S8/P8 = low (VSS) (These pins are forcibly set to the segment output port function and fixed at the VSS level.) S9 to S105 = low (VSS) COM1 to COM3 = low (VSS) COM4/S106 = low (VSS) • INH = high (VDD) ..On Note that serial data transfers can be performed when the display is forced off by this pin. VLCD0 112 LCD drive 3/3 bias voltage (high level) supply. This level can be modified using the display contrast adjustment circuit. However, note that VLCD0 must be greater than or equal to 2.7 V. Also, since this IC provides the built-in display contrast adjustment circuit, applications must not attempt to provide this level from external circuits. VLCD1 113 LCD drive 2/3 bias voltage (middle level) supply. It is possible to supply the 2/3 VLCD0 voltage to this pin externally. This pin must be shorted to VLCD2 if 1/2 bias is used. — I Open VLCD2 114 LCD drive 1/3 bias voltage (middle level) supply. It is possible to supply the 1/3 VLCD0 voltage to this pin externally. This pin must be shorted to VLCD1 if 1/2 bias is used. — I Open VDD 110 Logic block power supply. Provide a voltage in the range 2.7 to 6.0 V. — — — VLCD 111 LCD driver block power supply. When VLCD0 is between 0.70 VLCD and 0.95 VLCD, supply a voltage in the range 4.0 to 6.0 V. When VLCD0 and VLCD will be equal, supply a voltage in the range 2.7 to 6.0 V. — — — VSS 115 Ground pin. Connect to ground. — — — No. 7389-5/27 LC75847T S90 S89 S88 S87 S86 S85 S84 S83 S82 S81 S80 S79 S78 S77 S76 S75 S74 S73 S72 S71 S70 S69 S68 S67 S66 S65 S64 S63 S62 S61 Pin Assignment 90 61 91 60 S91 S92 S93 S94 S95 S96 S97 S98 S99 S100 S101 S102 S103 S104 S105 S106/COM4 COM3 COM2 COM1 VDD VLCD VLCD0 VLCD1 VLCD2 VSS OSC INH CE CL DI S60 S59 S58 S57 S56 S55 S54 S53 S52 S51 S50 S49 S48 S47 S46 S45 S44 S43 S42 S41 S40 S39 S38 S37 S36 S35 S34 S33 S32 S31 LC75847T (TQFP120) 120 31 30 P1/S1 P2/S2 P3/S3 P4/S4 P5/S5 P6/S6 P7/S7 P8/S8 S9 S10 S11 S12 S13 S14 S15 S16 S17 S18 S19 S20 S21 S22 S23 S24 S25 S26 S27 S28 S29 S30 1 No. 7389-6/27 LC75847T Serial Data Transfer Format 1. 1/3 duty ① When CL is stopped at the low level CE CL DI 1 0 1 0 0 0 0 1 D1 B0 B1 B2 B3 A0 A1 A2 A3 CCB address 8 bits D104 D105 D106 D107 D108 0 Display data 108 bits 0 0 0 0 0 P0 P1 P2 P3 CT0 CT1 CT2 DR DT FC SC BU 0 0 Control data 18 bits DD 2 bits D212 D213 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 1 0 0 0 0 1 D109 B0 B1 B2 B3 A0 A1 A2 A3 CCB address Display data Fixed data DD 8 bits 105 bits 21 bits 2 bits D317 D318 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 1 0 0 0 0 1 D214 B0 B1 B2 B3 A0 A1 A2 A3 CCB address Display data Fixed data DD 8 bits 105 bits 21 bits 2 bits Note: DD···Direction data. No. 7389-7/27 LC75847T ② When CL is stopped at the high level CE CL DI 1 0 1 0 0 0 0 1 D1 B0 B1 B2 B3 A0 A1 A2 A3 CCB address 8 bits D104 D105 D106 D107 D108 0 Display data 108 bits 0 0 0 0 0 P0 P1 P2 P3 CT0 CT1 CT2 DR DT FC SC BU 0 0 Control data 18 bits DD 2 bits 1 0 1 0 0 0 0 1 D109 D212 D213 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 B0 B1 B2 B3 A0 A1 A2 A3 CCB address Display data Fixed data DD 8 bits 105 bits 21 bits 2 bits D317 D318 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 1 0 0 0 0 1 D214 B0 B1 B2 B3 A0 A1 A2 A3 CCB address Display data Fixed data DD 8 bits 105 bits 21 bits 2 bits Note: DD···Direction data. • • • • • • • • • CCB address......85H D1 to D318........Display data P0 to P3 .............Segment output port/general-purpose output port switching control data CT0 to CT2 .......Control data that sets the display contrast DR .....................1/2 bias drive or 1/3 bias drive switching control data DT .....................1/3 duty drive or 1/4 duty drive switching control data FC......................Common and segment output waveforms frame frequency setting control data SC......................Segments on/off control data BU .....................Normal mode/power-saving mode control data No. 7389-8/27 LC75847T 2. 1/4 duty ① When CL is stopped at the low level CE CL DI 1 0 1 0 0 0 0 1 D1 B0 B1 B2 B3 A0 A1 A2 A3 CCB address 8 bits D104 D105 D106 D107 D108 0 Display data 108 bits 0 0 0 0 0 P0 P1 P2 P3 CT0 CT1 CT2 DR DT FC SC BU 0 0 Control data 18 bits DD 2 bits D212 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 1 0 0 0 0 1 D109 B0 B1 B2 B3 A0 A1 A2 A3 CCB address Display data Fixed data DD 8 bits 104 bits 22 bits 2 bits 1 0 1 0 0 0 0 1 D213 D316 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 B0 B1 B2 B3 A0 A1 A2 A3 CCB address Display data Fixed data DD 8 bits 104 bits 22 bits 2 bits D420 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 0 1 0 0 0 0 1 D317 B0 B1 B2 B3 A0 A1 A2 A3 CCB address Display data Fixed data DD 8 bits 104 bits 22 bits 2 bits Note: DD···Direction data. No. 7389-9/27 LC75847T ② When CL is stopped at the high level CE CL DI 1 0 1 0 0 0 0 1 D1 B0 B1 B2 B3 A0 A1 A2 A3 CCB address 8 bits D104 D105 D106 D107 D108 0 Display data 108 bits 0 0 0 0 0 P0 P1 P2 P3 CT0 CT1 CT2 DR DT FC SC BU 0 0 Control data 18 bits DD 2 bits 1 0 1 0 0 0 0 1 D109 D212 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 B0 B1 B2 B3 A0 A1 A2 A3 CCB address Display data Fixed data DD 8 bits 104 bits 22 bits 2 bits 1 0 1 0 0 0 0 1 D213 B0 B1 B2 B3 A0 A1 A2 A3 CCB address 8 bits D316 0 Display data 104 bits 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 Fixed data 22 bits DD 2 bits D420 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 0 1 0 0 0 0 1 D317 B0 B1 B2 B3 A0 A1 A2 A3 CCB address Display data Fixed data DD 8 bits 104 bits 22 bits 2 bits Note: DD···Direction data. • • • • • • • • • CCB address......85H D1 to D420........Display data P0 to P3 .............Segment output port/general-purpose output port switching control data CT0 to CT2 .......Control data that sets the display contrast DR .....................1/2 bias drive or 1/3 bias drive switching control data DT .....................1/3 duty drive or 1/4 duty drive switching control data FC......................Common and segment output waveforms frame frequency setting control data SC......................Segments on/off control data BU .....................Normal mode/power-saving mode control data No. 7389-10/27 LC75847T Serial Data Transfer Example 1. 1/3 duty ① When 214 or more segments are used All 384 bits of serial data must be sent. 8 bits 1 0 1 0 128 bits 0 0 0 1 D1 D104 D105 D106 D107 D108 0 0 0 0 0 0 P0 P1 P2 P3 CT0 CT1 CT2 DR DT FC SC BU 0 0 D109 D212 D213 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 D214 D317 D318 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 B0 B1 B2 B3 A0 A1 A2 A3 1 0 1 0 0 0 0 1 B0 B1 B2 B3 A0 A1 A2 A3 1 0 1 0 0 0 0 1 B0 B1 B2 B3 A0 A1 A2 A3 ② When fewer than 214 segments are used Either 128 or 256 bits of serial data may be sent, depending on the number of segments used. However, the serial data shown below (the D1 to D108 display data and the control data) must be sent. 8 bits 1 0 1 0 0 128 bits 0 0 1 D1 D104 D105 D106 D107 D108 0 0 0 0 0 0 P0 P1 P2 P3 CT0 CT1 CT2 DR DT FC SC BU 0 0 B0 B1 B2 B3 A0 A1 A2 A3 2. 1/4 duty ① When 317 or more segments are used All 512 bits of serial data must be sent. 8 bits 1 0 1 0 128 bits 0 0 0 1 D1 D104 D105 D106 D107 D108 0 0 0 0 0 0 P0 P1 P2 P3 CT0 CT1 CT2 DR DT FC SC BU 0 0 D109 D212 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 D213 D316 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 D317 D420 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 B0 B1 B2 B3 A0 A1 A2 A3 1 0 1 0 0 0 0 1 B0 B1 B2 B3 A0 A1 A2 A3 1 0 1 0 0 0 0 1 B0 B1 B2 B3 A0 A1 A2 A3 1 0 1 0 0 0 0 1 B0 B1 B2 B3 A0 A1 A2 A3 ② When fewer than 317 segments are used Either 128, 256 or 384 bits of serial data may be sent, depending on the number of segments used. However, the serial data shown below (the D1 to D108 display data and the control data) must be sent. 8 bits 1 0 1 0 0 128 bits 0 0 1 D1 D104 D105 D106 D107 D108 0 0 0 0 0 0 P0 P1 P2 P3 CT0 CT1 CT2 DR DT FC SC BU 0 0 B0 B1 B2 B3 A0 A1 A2 A3 No. 7389-11/27 LC75847T Control Data Functions 1. P0 to P3: Segment output port/general-purpose output port switching control data. These control data bits switch the S1/P1 to S8/P8 output pins between their segment output port and generalpurpose output port functions. Control data Output pin state P0 P1 P2 P3 S1/P1 S2/P2 S3/P3 S4/P4 S5/P5 S6/P6 S7/P7 S8/P8 0 0 0 0 S1 S2 S3 S4 S5 S6 S7 S8 0 0 0 1 P1 S2 S3 S4 S5 S6 S7 S8 0 0 1 0 P1 P2 S3 S4 S5 S6 S7 S8 0 0 1 1 P1 P2 P3 S4 S5 S6 S7 S8 0 1 0 0 P1 P2 P3 P4 S5 S6 S7 S8 0 1 0 1 P1 P2 P3 P4 P5 S6 S7 S8 0 1 1 0 P1 P2 P3 P4 P5 P6 S7 S8 0 1 1 1 P1 P2 P3 P4 P5 P6 P7 S8 1 0 0 0 P1 P2 P3 P4 P5 P6 P7 P8 Note: Sn (n = 1 to 8): Segment output ports Pn (n = 1 to 8): General-purpose output ports Also note that when the general-purpose output port function is selected, the output pins and the display data will have the correspondences listed in the tables below. Corresponding display data Output pin 1/3 duty 1/4 duty S1/P1 D1 D1 S2/P2 D4 D5 S3/P3 D7 D9 S4/P4 D10 D13 S5/P5 D13 D17 S6/P6 D16 D21 S7/P7 D19 D25 S8/P8 D22 D29 For example, when 1/4 duty drive scheme is used, if the general-purpose output port function is selected for the S4/P4 output pin, that output pin will output a high level (VLCD) when the display data D13 is 1, and a low level (VSS) when the D13 is 0. 2. CT0 to CT2: Control data that sets the display contrast This control data is used to set the display contrast. CT0 to CT2: Display contrast setting (7 steps) CT0 CT1 CT2 0 0 0 1.00 VLCD = VLCD – (0.05 VLCD × 0) LCD drive 3/3 bias voltage power supply (VLCD0) level 1 0 0 0.95 VLCD = VLCD – (0.05 VLCD × 1) 0 1 0 0.90 VLCD = VLCD – (0.05 VLCD × 2) 1 1 0 0.85 VLCD = VLCD – (0.05 VLCD × 3) 0 0 1 0.80 VLCD = VLCD – (0.05 VLCD × 4) 1 0 1 0.75 VLCD = VLCD – (0.05 VLCD × 5) 0 1 1 0.70 VLCD = VLCD – (0.05 VLCD × 6) Note that although the display contrast can be adjusted by operating the built-in display contrast adjustment circuit, it is also possible to adjust the contrast by varying the voltage level on the LCD drive block power supply VLCD pin. However, VLCD0 must always be greater than or equal to 2.7 V. No. 7389-12/27 LC75847T 3. DR: 1/2 bias drive or 1/3 bias drive switching control data This control data bit selects either 1/2 bias drive or 1/3 bias drive. DR Bias drive scheme 0 1/3 bias drive 1 1/2 bias drive 4. DT: 1/3 duty drive or 1/4 duty drive switching control data This control data bit selects either 1/3 duty drive or 1/4 duty drive. DT Duty drive scheme Output pin state (COM4/S106) 0 1/4 duty drive COM4 1 1/3 duty drive S106 Note: COM4: Common output S106: Segment output 5. FC: Common and segment output waveforms frame frequency setting control data This control data bit sets the frame frequency for common and segment output waveforms. FC Frame frequency f0 [Hz] 0 fosc ——— 384 1 fosc ——— 192 6. SC: Segments on/off control data This control data bit controls the on/off state of the segments. SC Display state 0 On 1 Off However, note that when the segments are turned off by setting SC to 1, the segments are turned off by outputting segment off waveforms from the segment output pins. 7. BU: Normal mode/power-saving mode control data This control data bit selects either normal mode or power-saving mode. BU 0 1 Mode Normal mode Power saving mode (The OSC pin oscillator is stopped, and the common and segment output pins go to the VSS level. However, the S1/P1 to S8/P8 output pins that are set to be general-purpose output ports by the control data P0 to P3 can be used as general-purpose output ports.) No. 7389-13/27 LC75847T Display Data to Segment Output Pin Correspondence 1. 1/3 duty Segment Output pin COM1 COM2 COM3 Segment Output pin COM1 COM2 COM3 Segment Output pin COM1 COM2 COM3 S1/P1 D1 D2 D3 S37 D109 D110 D111 S73 D217 D218 D219 S2/P2 D4 D5 D6 S38 D112 D113 D114 S74 D220 D221 D222 S3/P3 D7 D8 D9 S39 D115 D116 D117 S75 D223 D224 D225 S4/P4 D10 D11 D12 S40 D118 D119 D120 S76 D226 D227 D228 S5/P5 D13 D14 D15 S41 D121 D122 D123 S77 D229 D230 D231 S6/P6 D16 D17 D18 S42 D124 D125 D126 S78 D232 D233 D234 S7/P7 D19 D20 D21 S43 D127 D128 D129 S79 D235 D236 D237 S8/P8 D22 D23 D24 S44 D130 D131 D132 S80 D238 D239 D240 S9 D25 D26 D27 S45 D133 D134 D135 S81 D241 D242 D243 S10 D28 D29 D30 S46 D136 D137 D138 S82 D244 D245 D246 S11 D31 D32 D33 S47 D139 D140 D141 S83 D247 D248 D249 S12 D34 D35 D36 S48 D142 D143 D144 S84 D250 D251 D252 S13 D37 D38 D39 S49 D145 D146 D147 S85 D253 D254 D255 S14 D40 D41 D42 S50 D148 D149 D150 S86 D256 D257 D258 S15 D43 D44 D45 S51 D151 D152 D153 S87 D259 D260 D261 S16 D46 D47 D48 S52 D154 D155 D156 S88 D262 D263 D264 S17 D49 D50 D51 S53 D157 D158 D159 S89 D265 D266 D267 S18 D52 D53 D54 S54 D160 D161 D162 S90 D268 D269 D270 S19 D55 D56 D57 S55 D163 D164 D165 S91 D271 D272 D273 S20 D58 D59 D60 S56 D166 D167 D168 S92 D274 D275 D276 D279 S21 D61 D62 D63 S57 D169 D170 D171 S93 D277 D278 S22 D64 D65 D66 S58 D172 D173 D174 S94 D280 D281 D282 S23 D67 D68 D69 S59 D175 D176 D177 S95 D283 D284 D285 S24 D70 D71 D72 S60 D178 D179 D180 S96 D286 D287 D288 S25 D73 D74 D75 S61 D181 D182 D183 S97 D289 D290 D291 S26 D76 D77 D78 S62 D184 D185 D186 S98 D292 D293 D294 S27 D79 D80 D81 S63 D187 D188 D189 S99 D295 D296 D297 S28 D82 D83 D84 S64 D190 D191 D192 S100 D298 D299 D300 S29 D85 D86 D87 S65 D193 D194 D195 S101 D301 D302 D303 S30 D88 D89 D90 S66 D196 D197 D198 S102 D304 D305 D306 S31 D91 D92 D93 S67 D199 D200 D201 S103 D307 D308 D309 S32 D94 D95 D96 S68 D202 D203 D204 S104 D310 D311 D312 S33 D97 D98 D99 S69 D205 D206 D207 S105 D313 D314 D315 COM4/S106 D316 D317 D318 S34 D100 D101 D102 S70 D208 D209 D210 S35 D103 D104 D105 S71 D211 D212 D213 S36 D106 D107 D108 S72 D214 D215 D216 Note: This applies to the case where the S1/P1 to S8/P8, and COM4/S106 output pins are set to be segment output ports. For example, the table below lists the segment output states for the S11 output pin. Display data Segment output pin (S11) state D31 D32 D33 0 0 0 The LCD segments corresponding to COM1, COM2, and COM3 are off. 0 0 1 The LCD segment corresponding to COM3 is on. 0 1 0 The LCD segment corresponding to COM2 is on. 0 1 1 The LCD segments corresponding to COM2 and COM3 are on. 1 0 0 The LCD segment corresponding to COM1 is on. 1 0 1 The LCD segments corresponding to COM1 and COM3 are on. 1 1 0 The LCD segments corresponding to COM1 and COM2 are on. 1 1 1 The LCD segments corresponding to COM1, COM2, and COM3 are on. No. 7389-14/27 LC75847T 2. 1/4 duty Segment Output pin COM3 COM4 Segment Output pin COM1 COM2 S1/P1 D1 D2 D3 D4 S54 D213 D214 D215 D216 S2/P2 D5 D6 D7 D8 S55 D217 D218 D219 D220 COM1 COM2 COM3 COM4 S3/P3 D9 D10 D11 D12 S56 D221 D222 D223 D224 S4/P4 D13 D14 D15 D16 S57 D225 D226 D227 D228 S5/P5 D17 D18 D19 D20 S58 D229 D230 D231 D232 S6/P6 D21 D22 D23 D24 S59 D233 D234 D235 D236 S7/P7 D25 D26 D27 D28 S60 D237 D238 D239 D240 S8/P8 D29 D30 D31 D32 S61 D241 D242 D243 D244 S9 D33 D34 D35 D36 S62 D245 D246 D247 D248 S10 D37 D38 D39 D40 S63 D249 D250 D251 D252 S11 D41 D42 D43 D44 S64 D253 D254 D255 D256 S12 D45 D46 D47 D48 S65 D257 D258 D259 D260 S13 D49 D50 D51 D52 S66 D261 D262 D263 D264 S14 D53 D54 D55 D56 S67 D265 D266 S267 D268 S15 D57 D58 D59 D60 S68 D269 D270 D271 D272 S16 D61 D62 D63 D64 S69 D273 D274 D275 D276 S17 D65 D66 D67 D68 S70 D277 D278 D279 D280 S18 D69 D70 D71 D72 S71 D281 D282 D283 D284 S19 D73 D74 D75 D76 S72 D285 D286 D287 D288 S20 D77 D78 D79 D80 S73 D289 D290 D291 D292 S21 D81 D82 D83 D84 S74 D293 D294 D295 D296 S22 D85 D86 D87 D88 S75 D297 D298 D299 D300 S23 D89 D90 D91 D92 S76 D301 D302 D303 D304 S24 D93 D94 D95 D96 S77 D305 D306 D307 D308 S25 D97 D98 D99 D100 S78 D309 D310 D311 D312 S26 D101 D102 D103 D104 S79 D313 D314 D315 D316 S27 D105 D106 D107 D108 S80 D317 D318 D319 D320 S28 D109 D110 D111 D112 S81 D321 D322 D323 D324 S29 D113 D114 D115 D116 S82 D325 D326 D327 D328 S30 D117 D118 D119 D120 S83 D329 D330 D331 D332 S31 D121 D122 D123 D124 S84 D333 D334 D335 D336 S32 D125 D126 D127 D128 S85 D337 D338 D339 D340 S33 D129 D130 D131 D132 S86 D341 D342 D343 D344 S34 D133 D134 D135 D136 S87 D345 D346 D347 D348 S35 D137 D138 D139 D140 S88 D349 D350 D351 D352 S36 D141 D142 D143 D144 S89 D353 D354 D355 D356 S37 D145 D146 D147 D148 S90 D357 D358 D359 D360 S38 D149 D150 D151 D152 S91 D361 D362 D363 D364 S39 D153 D154 D155 D156 S92 D365 D366 D367 D368 S40 D157 D158 D159 D160 S93 D369 D370 D371 D372 S41 D161 D162 D163 D164 S94 D373 D374 D375 D376 S42 D165 D166 D167 D168 S95 D377 D378 D379 D380 S43 D169 D170 D171 D172 S96 D381 D382 D383 D384 S44 D173 D174 D175 D176 S97 D385 D386 D387 D388 S45 D177 D178 D179 D180 S98 D389 D390 D391 D392 S46 D181 D182 D183 D184 S99 D393 D394 D395 D396 S47 D185 D186 D187 D188 S100 D397 D398 D399 D400 S48 D189 D190 D191 D192 S101 D401 D402 D403 D404 S49 D193 D194 D195 D196 S102 D405 D406 D407 D408 S50 D197 D198 D199 D200 S103 D409 D410 D411 D412 S51 D201 D202 D203 D204 S104 D413 D414 D415 D416 S52 D205 D206 D207 D208 S105 D417 D418 D419 D420 S53 D209 D210 D211 D212 Note: This applies to the case where the S1/P1 to S8/P8 output pins are set to be segment output ports. No. 7389-15/27 LC75847T For example, the table below lists the segment output states for the S11 output pin. Display data Segment output pin (S11) state D41 D42 D43 D44 0 0 0 0 The LCD segments corresponding to COM1, COM2, COM3, and COM4 are off. 0 0 0 1 The LCD segment corresponding to COM4 is on. 0 0 1 0 The LCD segment corresponding to COM3 is on. 0 0 1 1 The LCD segments corresponding to COM3 and COM4 are on. 0 1 0 0 The LCD segment corresponding to COM2 is on. 0 1 0 1 The LCD segments corresponding to COM2 and COM4 are on. 0 1 1 0 The LCD segments corresponding to COM2 and COM3 are on. 0 1 1 1 The LCD segments corresponding to COM2, COM3, and COM4 are on. 1 0 0 0 The LCD segment corresponding to COM1 is on. 1 0 0 1 The LCD segments corresponding to COM1 and COM4 are on. 1 0 1 0 The LCD segments corresponding to COM1 and COM3 are on. 1 0 1 1 The LCD segments corresponding to COM1, COM3, and COM4 are on. 1 1 0 0 The LCD segments corresponding to COM1 and COM2 are on. 1 1 0 1 The LCD segments corresponding to COM1, COM2, and COM4 are on. 1 1 1 0 The LCD segments corresponding to COM1, COM2, and COM3 are on. 1 1 1 1 The LCD segments corresponding to COM1, COM2, COM3, and COM4 are on. No. 7389-16/27 LC75847T 1/3 Duty, 1/2 Bias Drive Technique fo[Hz] COM1 VLCD0 VLCD1, VLCD2 0V COM2 VLCD0 VLCD1, VLCD2 0V COM3 VLCD0 VLCD1, VLCD2 0V LCD driver output when all LCD segments corresponding to COM1, COM2, and COM3 are turned off. VLCD0 VLCD1, VLCD2 0V LCD driver output when only LCD segments corresponding to COM1 are on. VLCD0 VLCD1, VLCD2 0V LCD driver output when only LCD segments corresponding to COM2 are on. VLCD0 VLCD1, VLCD2 0V LCD driver output when LCD segments corresponding to COM1 and COM2 are on. VLCD0 VLCD1, VLCD2 0V LCD driver output when only LCD segments corresponding to COM3 are on. VLCD0 VLCD1, VLCD2 0V LCD driver output when LCD segments corresponding to COM1 and COM3 are on. VLCD0 VLCD1, VLCD2 0V LCD driver output when LCD segments corresponding to COM2 and COM3 are on. VLCD0 VLCD1, VLCD2 0V LCD driver output when all LCD segments corresponding to COM1, COM2, and COM3 are on. VLCD0 VLCD1, VLCD2 0V When the control data FC = 0 : f0 = When the control data FC = 1 : f0 = fosc 384 fosc 192 No. 7389-17/27 LC75847T 1/3 Duty, 1/3 Bias Drive Technique fo[Hz] COM1 VLCD0 VLCD1 VLCD2 0V COM2 VLCD0 VLCD1 VLCD2 0V COM3 VLCD0 VLCD1 VLCD2 0V LCD driver output when all LCD segments corresponding to COM1, COM2, and COM3 are turned off. VLCD0 VLCD1 VLCD2 0V LCD driver output when only LCD segments corresponding to COM1 are on. VLCD0 VLCD1 VLCD2 0V LCD driver output when only LCD segments corresponding to COM2 are on. VLCD0 VLCD1 VLCD2 0V LCD driver output when LCD segments corresponding to COM1 and COM2 are on. VLCD0 VLCD1 VLCD2 0V LCD driver output when only LCD segments corresponding to COM3 are on. VLCD0 VLCD1 VLCD2 0V LCD driver output when LCD segments corresponding to COM1 and COM3 are on. VLCD0 VLCD1 VLCD2 0V LCD driver output when LCD segments corresponding to COM2 and COM3 are on. VLCD0 VLCD1 VLCD2 0V LCD driver output when all LCD segments corresponding to COM1, COM2, and COM3 are on. VLCD0 VLCD1 VLCD2 0V When the control data FC = 0 : f0 = When the control data FC = 1 : f0 = fosc 384 fosc 192 No. 7389-18/27 LC75847T 1/4 Duty, 1/2 Bias Drive Technique fo[Hz] COM1 VLCD0 VLCD1, VLCD2 0V COM2 VLCD0 VLCD1, VLCD2 0V COM3 VLCD0 VLCD1, VLCD2 0V COM4 VLCD0 VLCD1, VLCD2 0V LCD driver output when all LCD segments corresponding to COM1, COM2, COM3, and COM4 are turned off. VLCD0 VLCD1, VLCD2 0V LCD driver output when only LCD segments corresponding to COM1 are on. VLCD0 VLCD1, VLCD2 0V LCD driver output when only LCD segments corresponding to COM2 are on. VLCD0 VLCD1, VLCD2 0V LCD driver output when LCD segments corresponding to COM1 and COM2 are on. VLCD0 VLCD1, VLCD2 0V LCD driver output when only LCD segments corresponding to COM3 are on. VLCD0 VLCD1, VLCD2 0V LCD driver output when LCD segments corresponding to COM1 and COM3 are on. VLCD0 VLCD1, VLCD2 0V LCD driver output when LCD segments corresponding to COM2 and COM3 are on. VLCD0 VLCD1, VLCD2 0V LCD driver output when LCD segments corresponding to COM1, COM2, and COM3 are on. VLCD0 VLCD1, VLCD2 0V LCD driver output when only LCD segments corresponding to COM4 are on. VLCD0 VLCD1, VLCD2 0V LCD driver output when LCD segments corresponding to COM2 and COM4 are on. VLCD0 VLCD1, VLCD2 0V LCD driver output when all LCD segments corresponding to COM1, COM2, COM3, and COM4 are on. VLCD0 VLCD1, VLCD2 0V When the control data FC = 0 : f0 = When the control data FC = 1 : f0 = fosc 384 fosc 192 No. 7389-19/27 LC75847T 1/4 Duty, 1/3 Bias Drive Technique fo[Hz] VLCD0 VLCD1 VLCD2 0V VLCD0 VLCD1 VLCD2 0V VLCD0 VLCD1 VLCD2 0V VLCD0 VLCD1 VLCD2 0V VLCD0 VLCD1 VLCD2 0V VLCD0 VLCD1 VLCD2 0V VLCD0 VLCD1 VLCD2 0V VLCD0 VLCD1 VLCD2 0V VLCD0 VLCD1 VLCD2 0V VLCD0 VLCD1 VLCD2 0V VLCD0 VLCD1 VLCD2 0V VLCD0 VLCD1 VLCD2 0V VLCD0 VLCD1 VLCD2 0V VLCD0 VLCD1 VLCD2 0V VLCD0 VLCD1 VLCD2 0V COM1 COM2 COM3 COM4 LCD driver output when all LCD segments corresponding to COM1, COM2, COM3, and COM4 are turned off. LCD driver output when only LCD segments corresponding to COM1 are on. LCD driver output when only LCD segments corresponding to COM2 are on. LCD driver output when LCD segments corresponding to COM1 and COM2 are on. LCD driver output when only LCD segments corresponding to COM3 are on. LCD driver output when LCD segments corresponding to COM1 and COM3 are on. LCD driver output when LCD segments corresponding to COM2 and COM3 are on. LCD driver output when LCD segments corresponding to COM1, COM2, and COM3 are on. LCD driver output when only LCD segments corresponding to COM4 are on. LCD driver output when LCD segments corresponding to COM2 and COM4 are on. LCD driver output when all LCD segments corresponding to COM1, COM2, COM3, and COM4 are on. When the control data FC = 0 : f0 = When the control data FC = 1 : f0 = fosc 384 fosc 192 No. 7389-20/27 LC75847T The INH pin and Display Control Since the IC internal data (1/3 duty: the display data D1 to D318 and the control data, 1/4 duty: the display data D1 to D420 and the control data) is undefined when power is first applied, applications should set the INH pin low at the same time as power is applied to turn off the display (This sets the S1/P1 to S8/P8, S9 to S105, COM1 to COM3, and COM4/S106 to the VSS level.) and during this period send serial data from the controller. The controller should then set the INH pin high after the data transfer has completed. This procedure prevents meaningless displays at power on. (See Figures 3 and 4.) Notes on the Power On/Off Sequences Applications should observe the following sequences when turning the LC75847T power on and off. • At power on: Logic block power supply (VDD) on → LCD driver block power supply (VLCD) on • At power off: LCD driver block power supply (VLCD) off → Logic block power supply (VDD) off However, if the logic and LCD driver block use a shared power supply, then the power supplies can be turned on and off at the same time. • 1/3 duty t2 t1 t3 VDD VLCD INH VIL tc CE VIL Display and control data transfer D1 to D108, Internal data P0 to P3, CT0 to CT2, DR, DT, FC, SC, BU Undefined Defined Undefined Internal data (D109 to D213) Undefined Defined Undefined Internal data (D214 to D318) Undefined Defined Undefined Notes: t1 ≥ 0 t2 > 0 t3 ≥ 0 (t2 > t3) tc .......10µs min. Figure 3 No. 7389-21/27 LC75847T • 1/4 duty t2 t1 t3 VDD VLCD INH VIL tc CE VIL Display and control data transfer D1 to D108 Internal data P0 to P3, CT0 to CT2, DR, DT, FC, SC, BU Undefined Defined Undefined Internal data (D109 to D212) Undefined Defined Undefined Internal data (D213 to D316) Undefined Defined Undefined Internal data (D317 to D420) Undefined Defined Undefined Notes: t1 ≥ 0 t2 > 0 t3 ≥ 0 (t2 > t3) tc .......10µs min. Figure 4 Notes on Controller Transfer of Display Data Since the LC75847T accepts the display data (D1 to D318) divided into three separate transfer operations when using 1/3 duty drive scheme and the data (D1 to D420) divided into four separate transfer operations when 1/4 duty drive, we recommend that applications transfer all of the display data within a period of less than 30 ms to prevent observable degradation of display quality. No. 7389-22/27 LC75847T Sample Application Circuit 1 1/3 Duty, 1/2 Bias (for use with normal panels) (P1) *2 (P2) General-purpose output ports (P8) Used for functions such as backlight control OSC VDD COM1 COM2 COM3 P1/S1 P2/S2 VSS +5.8 V Open LCD panel (up to 318 segments) +3.0 V VLCD VLCD0 VLCD1 P8/S8 S9 VLCD2 C C ≥ 0.047µF INH CE CL From the controller S104 S105 DI COM4/S106 Note: *2 When a capacitor except the recommended external capacitance (Cosc = 1000 pF) is connected the OSC pin, we recommend that applications connect the OSC pin with a capacitor in the range 220 to 2200 pF. Sample Application Circuit 2 1/3 Duty, 1/2 Bias (for use with large panels) (P1) *2 (P2) General-purpose output ports (P8) Used for functions such as backlight control VDD COM1 COM2 VSS COM3 P1/S1 P2/S2 VLCD +5.8 V VLCD0 R VLCD1 P8/S8 10 kΩ ≥ R ≥ 2.2 kΩ C ≥ 0.047 µF From the controller C R VLCD2 INH CE CL DI S9 LCD panel (up to 318 segments) OSC +3.0 V S104 S105 COM4/S106 Note: *2 When a capacitor except the recommended external capacitance (Cosc = 1000 pF) is connected the OSC pin, we recommend that applications connect the OSC pin with a capacitor in the range 220 to 2200 pF. No. 7389-23/27 LC75847T Sample Application Circuit 3 1/3 Duty, 1/3 Bias (for use with nornal panels) (P1) *2 (P2) General-purpose output ports (P8) Used for functions such as backlight control +5.8 V Open VDD COM1 COM2 VSS COM3 P1/S1 P2/S2 LCD panel (up to 318 segments) OSC +3.0 V VLCD VLCD0 VLCD1 P8/S8 S9 VLCD2 C ≥ 0.047 µF C C INH CE From the controller S104 CL DI S105 COM4/S106 Note: *2 When a capacitor except the recommended external capacitance (Cosc = 1000 pF) is connected the OSC pin, we recommend that applications connect the OSC pin with a capacitor in the range 220 to 2200 pF. Sample Application Circuit 4 1/3 Duty, 1/3 Bias (for use with large panels) (P1) *2 (P2) General-purpose output ports (P8) Used for functions such as backlight control VSS VLCD +5.8 V COM1 COM2 COM3 P1/S1 P2/S2 VLCD0 R VLCD1 R 10 kΩ ≥ R ≥ 2.2 kΩ C ≥ 0.047 µF From the controller P8/S8 VLCD2 C C S9 R INH CE CL DI LCD panel (up to 318 segments) OSC VDD +3.0 V S104 S105 COM4/S106 Note: *2 When a capacitor except the recommended external capacitance (Cosc = 1000 pF) is connected the OSC pin, we recommend that applications connect the OSC pin with a capacitor in the range 220 to 2200 pF. No. 7389-24/27 LC75847T Sample Application Circuit 5 1/4 Duty, 1/2 Bias (for use with normal panels) (P1) *2 (P2) General-purpose output ports (P8) Used for functions such as backlight control OSC COM1 COM2 COM3 VSS +5.8 V Open LCD panel (up to 420 segments) VDD +3.0 V S106/COM4 P1/S1 P2/S2 VLCD VLCD0 VLCD1 P8/S8 VLCD2 S9 C C ≥ 0.047 µF INH CE From the controller S104 CL DI S105 Note: *2 When a capacitor except the recommended external capacitance (Cosc = 1000 pF) is connected the OSC pin, we recommend that applications connect the OSC pin with a capacitor in the range 220 to 2200 pF. Sample Application Circuit 6 1/4 Duty, 1/2 Bias (for use with large panels) (P1) *2 (P2) General-purpose output ports (P8) Used for functions such as backlight control VSS VLCD +5.8 V VLCD0 R 10 kΩ ≥ R ≥ 2.2 kΩ C ≥ 0.047 µF C R COM1 COM2 COM3 S106/COM4 P1/S1 P2/S2 VLCD1 VLCD2 P8/S8 S9 INH From the controller CE CL DI LCD panel (up to 420 segments) OSC VDD +3.0 V S104 S105 Note: *2 When a capacitor except the recommended external capacitance (Cosc = 1000 pF) is connected the OSC pin, we recommend that applications connect the OSC pin with a capacitor in the range 220 to 2200 pF. No. 7389-25/27 LC75847T Sample Application Circuit 7 1/4 Duty, 1/3 Bias (for use with nornal panels) (P1) *2 (P2) General-purpose output ports (P8) Used for functions such as backlight control OSC COM1 COM2 COM3 VSS +5.8 V Open LCD panel (up to 420 segments) VDD +3.0 V S106/COM4 P1/S1 P2/S2 VLCD VLCD0 VLCD1 P8/S8 S9 VLCD2 C ≥ 0.047µF C C INH From the controller CE S104 CL DI S105 Note: *2 When a capacitor except the recommended external capacitance (Cosc = 1000 pF) is connected the OSC pin, we recommend that applications connect the OSC pin with a capacitor in the range 220 to 2200 pF. Sample Application Circuit 8 1/4 Duty, 1/3 Bias (for use with large panels) (P1) *2 (P2) General-purpose output ports (P8) Used for functions such as backlight control OSC VSS VLCD +5.8 V VLCD0 COM1 COM2 COM3 S106/COM4 P1/S1 P2/S2 R VLCD1 R 10 kΩ ≥ R ≥ 2.2 kΩ C ≥ 0.047 µF From the controller VLCD2 C C R INH CE CL DI P8/S8 S9 LCD panel (up to 420 segments) VDD +3.0 V S104 S105 Note: *2 When a capacitor except the recommended external capacitance (Cosc = 1000 pF) is connected the OSC pin, we recommend that applications connect the OSC pin with a capacitor in the range 220 to 2200 pF. No. 7389-26/27 LC75847T Package Dimensions unit : mm TQFP120 14x14 / TQFP120 CASE 932AZ ISSUE A 0.5 0.2 16.0 0.2 16.0 0.2 120 14.0 0.1 14.0 0.1 12 0.4 0.125 0.15 0.10 (1.0) 0 to 10° 0.1 0.1 1.2 MAX (1.2) 0.10 GENERIC MARKING DIAGRAM* SOLDERING FOOTPRINT* 15.40 XXXXXXXX YMDDD 15.40 (Unit: mm) XXXXX = Specific Device Code Y = Year M = Month DDD = Additional Traceability Data *This information is generic. Please refer to device data sheet for actual part marking. 0.23 may or may not be present. 1.00 0.40 NOTE: The measurements are not to guarantee but for reference only. *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. www.onsemi.com 27 LC75847T ORDERING INFORMATION Device LC75847T-E Package TQFP120 14x14 (Pb-Free) LC75847TS-E TQFP120 14x14 (Pb-Free) Shipping (Qty / Packing) 450 / Tray JEDEC 450 / Tray JEDEC ON Semiconductor and the ON logo are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries. SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf . 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