STK5DFU350D-E Advance Information 8A/600V 2-in-1 PFC and Inverter Intelligent Power Module The STK5DFU350D-E is a fully-integrated PFC and inverter power stage consisting of a high-voltage driver, six motor drive IGBT’s, one PFC IGBT, one PFC rectifier and a thermistor, suitable for driving permanent magnet synchronous (PMSM) motors, brushless-DC (BLDC) motors and AC asynchronous motors. The IGBT’s are configured in a 3-phase bridge with an integrated single shunt which is connected to an internal overcurrent protection comparator. A second comparator is used for detecting faults in the combined PFC and inverter circuit. The intelligent power module has a full range of protection functions including cross-conduction protection, external shutdown and undervoltage lockout functions. www.onsemi.com PACKAGE PICTURE Features Simple thermal design with PFC and inverter stage in one package. PFC operating frequency up to 40kHz Cross-conduction protection Internal inverter shunt for compact design PFC and inverter fault detection with negative reference voltage Integrated bootstrap diodes and resistors Multiplexed fault and thermistor pin (FAULT/TH) 32-pin DIP05 with exposed pad MARKING DIAGRAM TBD Typical Applications Industrial Pumps Industrial Fans Industrial Automation Home Appliances STK5DFU350D = Specific Device Code A = Year B = Month C = Production Site DD = Factory Lot Code Device marking is on package underside ORDERING INFORMATION Device STK5DFU350D-E Package Shipping (Qty / Packing) DIP32 44 x 26.5 (Pb-Free) 11 / Tube Figure 1. Functional Diagram This document contains information on a new product. Specifications and information herein are subject to change without notice. © Semiconductor Components Industries, LLC, 2016 May 2016 – P2 1 Publication Order Number: STK5DFU350D-E/D STK5DFU350D-E Figure 2. Application Schematic www.onsemi.com 2 STK5DFU350D-E Figure 3. Simplified Block Diagram www.onsemi.com 3 STK5DFU350D-E PIN FUNCTION DESCRIPTION Pin 1 2 3 4 5 11 12 13 14 15 16 17 18 20 21 23 24 27 29 31 32 Name VDD ITRIP PTRIP FAULT/TH PFCIN HINU HINV HINW LINU LINV LINW VBU U VBV V VBW W VP PFCL HVGND GND Description +15V Main Supply Current protection for inverter, connected to internal shunt Current protection for PFC Fault pin connected to thermistor Logic Input PFC Gate Driver Logic Input High Side Gate Driver - Phase U Logic Input High Side Gate Driver - Phase V Logic Input High Side Gate Driver - Phase W Logic Input Low Side Gate Driver - Phase U Logic Input Low Side Gate Driver - Phase V Logic Input Low Side Gate Driver - Phase W High Side Floating Supply voltage for U phase U phase output. Internally connected to U phase high side driver ground High Side Floating Supply voltage for V phase V phase output. Internally connected to V phase high side driver ground High Side Floating Supply Voltage for W phase W phase output. Internally connected to W phase high side driver ground Positive PFC Output Voltage PFC Inductor Connection to IGBT and Rectifier node Negative PFC Output Voltage Negative Main Supply Note : Pins 6, 7, 8, 9, 10, 19, 22, 25, 26, 28, 30 are not present www.onsemi.com 4 STK5DFU350D-E ABSOLUTE MAXIMUM RATINGS at Tc= 25°C (Notes 1,2) Symbol Rating Conditions Value Unit PFC Section PFC IGBT PFC Diode Collector-emitter voltage VCE PFCL to HVGND 600 V Repetitive peak collector current ICP Duty cycle 10%, pulse width 100us 24 A Collector current IC 11.3 A Power dissipation PC 39.1 W Diode reverse voltage VRM VP to PFCL 600 V Repetitive peak forward current IFP1 Duty cycle 10%, pulse width 100us 24 A Diode forward current IF1 11.3 A Power dissipation PD1 27.2 W 264 V 424 V 1.8 kW 9.5 Arms Maximum AC input voltage VAC Maximum output voltage Vo Maximum output power Wo Input AC current (steady state) Iin Single-phase Full-rectified In the Application Circuit (Vac=200V, Vout=380V, fc=40kHz) Inverter Section Supply voltage VP VP to HVGND surge < 500V (Note 3) 450 V Collector-emitter voltage VCE VP to U, V, W or U, V, W to HVGND 600 V VP, HVGND, U, V, W terminal current ±8 A Output current Io ±3.7 A Output peak current Iop VP, HVGND, U, V, W terminal current at Tc=100C VP, HVGND, U, V, W terminal current for a Pulse width of 1ms ±16 A Maximum power dissipation Pd IGBT per 1 channel 16.0 W Gate driver supply voltage VD1,2,3,4 VBU to U, VBV to V, VBW to W, VDD to GND ( Note 4) 0.3 to 20 V Input signal voltage VIN HINx, LINx, PFCIN (x=U,V,W) 0.3 to VDD V V Gate driver section FAULT terminal voltage VFAULT FAULT terminal 0.3 to VDD PFCTRIP terminal voltage VPTRIP PTRIP terminal 1.5 to 2.0 V Junction temperature Tj IGBT, FRD 150 C Storage temperature Tstg 40 to +125 C Operating Case temperature Tc IPM case temperature 20 to +100 C Tightening torque MT Case mounting screws 0.9 Nm Isolation voltage Vis 50Hz sine wave AC 1 minute (Note 5) 2000 VRMS Intelligent Power Module 1. 2. 3. 4. 5. Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. Refer to ELECTRICAL CHARACTERISTICS, RECOMMENDED OPERATING RANGES and/or APPLICATION INFORMATION for Safe Operating parameters. This surge voltage developed by the switching operation due to the wiring inductance between VP and HVGND terminals. VBS=VBU to U, VBV to V, VBW to W Test conditions : AC2500V, 1 s www.onsemi.com 5 STK5DFU350D-E RECOMMENDED OPERATING RANGES (Note 6) Rating Symbol Min Typ Max Unit 450 V 12.5 15 17.5 VDD to GND (Note 6) 13.5 15 16.5 HINU, HINV, HINW, LINU, LINV, LINW,PFCIN 3.0 5.0 VIN(OFF) 0 0.3 fPWM 1 20 VCC VP to HVGND VBS VBU to U, VBV to V, VBW to W VDD ON-state input voltage VIN(ON) OFF-state input voltage PWM frequency Supply voltage Gate driver supply voltage 0 Dead time DT Turn-off to turn-on (external) Allowable input pulse width PWIN ON and OFF Package mounting torque 6. ‘M3’ type screw 6 V kHz 1.5 μs 1 μs 0.6 0.9 Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended Operating Ranges limits may affect device reliability. www.onsemi.com V Nm STK5DFU350D-E ELECTRICAL CHARACTERISTICS at Tc=25C, VD1, VD2, VD3, VD4=15V (Note 7) Parameter Test Conditions Symbol Min Typ Max Unit - 100 μA PFC Section Collector-emitter cut-off current VCE=600V ICE - Reverse leakage current (PFC Diode) VR=600V IR - - 100 μA Ic=12A, Tj=25°C VCE(sat) - 1.8 2.2 V - 1.5 - - 2.5 3.0 - 1.9 - Collector-emitter saturation voltage Diode forward voltage (PFC Diode) Junction to case thermal resistance Ic=6A, Tj=100°C IF=12A, Tj=25°C VF1 IF=6A, Tj=100°C V IGBT(Q1) θj-c(T) - - 3.2 FRD1(D1) θj-c(D) - - 4.6 tON - 0.5 - μs Ic=12A,VP=300V, Tj=25C tOFF - 1.1 - μs trr - 180 - ns °C/W Switching characteristics Switching time Diode reverse recovery time Inverter section Collector-emitter leakage current VCE=600V ICE - - 100 μA Bootstrap diode reverse current VR(BD)=600V IR(BD) - - 100 μA - 2.1 2.6 V - 1.8 - V - 2.0 2.5 V - 1.6 - V Collector to emitter saturation voltage Diode forward voltage Ic=8A, Tj=25C VCE(sat) Ic=4A, Tj=100C IF=8A, Tj=25C VF IF=4A, Tj=100C θj-c(T) - - 7.8 C/W tON - 0.7 - μs tOFF - 0.9 - μs EON - 770 - μJ EOFF - 200 - μJ Total switching loss ETOT - 970 - μJ Turn-on switching loss EON - 350 - μJ EOFF - 110 - μJ ETOT - 460 - μJ EREC - 130 - μJ - ns - μs Junction to case thermal resistance Switching time IGBT Ic=8A,VP=300V, Tj=25C Turn-on switching loss Turn-off switching loss Turn-off switching loss Ic=8A, VCC=300V, Tj=25C Ic=4A, VCC=300V, Tj=100C Total switching loss Diode reverse recovery energy Diode reverse recovery time Ic=8A, VCC=300V, Tj=25C (di/dt set by internal driver) trr - 180 - Reverse bias safe operating area Ic=16A, VCE=450V RBSOA Full Square Short circuit safe operating area VCE=400V SCSOA 4 7. Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. www.onsemi.com 7 STK5DFU350D-E ELECTRICAL CHARACTERISTICS at Tc=25C, VBS=15V, VDD=15V (Note 8) Parameter Test Conditions Symbol Min Typ Max Unit Driver Section Gate driver consumption current High level Input voltage Low level Input voltage VBS=15V (Note 4), per driver ID - 0.08 0.4 mA VDD=15V, total ID - 0.85 2.4 mA HINU, HINV, HINW, LINU, LINV, LINW to GND Vin H 2.5 - - V Vin L - - 0.8 V Logic 1 input current VIN=+3.3V IIN+ - 100 143 μA Logic 0 input current VIN=0V IIN- - - 2 μA IF=0.1A VF(DB) - 0.8 - V RBC - 2 - Ω IoSD - 2 - mA FLTCLR 1 2 3 ms Bootstrap diode forward voltage Bootstrap circuit resistance FAULT/TH terminal sink current FAULT : ON / VFAULT=0.1V FAULT clearance delay time Over current protection for inverter stage VN to HVGND current OCP 8.7 9.8 10.9 A ISO terminal Output voltage Io=8A, ISO to GND voltage VISO 0.38 0.40 0.42 V PTRIP to GND VPTRIP 0.37 0.26 V tPTRIP (790) (900) (1150) ns PTRIP threshold voltage PTRIP to shutdown propagation delay PTRIP blanking time tPTRIPBL 290 350 - ns VDD and VBS supply undervoltage positive going input threshold VDD and VBS supply undervoltage negative going input threshold VDD and VBS supply undervoltage Ilockout hysteresis VDDUV+ VBSUV+ 10.5 11.1 11.7 V VDDUVVBSUV- 10.3 10.9 11.5 V VDDUVH VBSUVH - 0.2 - V 8. Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. www.onsemi.com 8 STK5DFU350D-E TYPICAL CHARACTERISTICS PFC SECTION 15 IF, FOWERD CURRENT (A) IC, COLLECTOR CURRENT (A) 15 TJ =25C 10 TJ = 100C 5 0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 TJ = 25C 10 TJ = 100C 5 0 0.0 VCE, COLLECTOR-EMITTER VOLTAGE (V) 1.5 2.0 2.5 3.0 Figure 5 PFC Diode VF versus IF for different temperatures 0.8 0.8 Eoff, SWITCHIG LOSS (mJ) EON, SWITCHING LOSS (mJ) 1.0 VF, FOWERD VOLTAGE (V) Figure 4 VCE versus ID for different temperatures (VDD=15V) 0.6 TJ = 100C 0.4 TJ = 25C 0.2 0.0 0 2 4 6 8 10 12 14 16 IC, COLLECTOR CURRENT (A) Figure 6 IGBT EON versus ID for different temperatures 0.8 0.6 0.4 0.2 0.0 0.000001 0.0001 0.01 ON-PULSE WIDTH (S) 1 0.6 TJ = 100C 0.4 TJ = 25C 0.2 0.0 0 2 4 6 8 10 12 IC, COLLECTOR CURRENT (A) 14 Figure 4 IGBT EOFF versus ID for different temperatures 1.0 STANDARDIZED SQUAREWAVE PEAK R(t) 0.5 100 Figure 8 Thermal Impedance Plot www.onsemi.com 9 16 STK5DFU350D-E TYPICAL CHARACTERISTICS INVERTER SECTION 10 IF, FOWERD CURRENT (A) IC, COLLECTOR CURRENT (A) 10 8 TJ=25C 6 4 TJ = 100C 2 0 0.0 0.5 1.0 1.5 2.0 2.5 TJ = 100C 4 2 0.0 Figure 9 VCE versus ID for different temperatures (VDD=15V) 0.5 1.0 1.5 2.0 2.5 VF, FOWERD VOLTAGE (V) 3.0 Figure 10 VF versus ID for different temperatures 0.30 Eoff, SWITCHIG LOSS (mJ) 1.0 EON, SWITCHING LOSS (mJ) TJ = 25C 6 0 3.0 VCE, COLLECTOR-EMITTER VOLTAGE (V) 0.8 TJ = 100C 0.6 0.4 TJ = 25C 0.2 0.0 0 2 4 6 8 0.8 0.6 0.4 0.2 0.01 ON-PULSE WIDTH (S) 1 0.15 TJ = 25C 0.10 0.05 0.00 2 4 6 8 10 Figure 12 EOFF versus ID for different temperatures 1.0 0.0001 TJ = 100C 0.20 IC, COLLECTOR CURRENT (A) Figure 11 EON versus ID for different temperatures 0.0 0.000001 0.25 0 10 IC, COLLECTOR CURRENT (A) STANDARDIZED SQUAREWAVE PEAK R(t) 8 100 Figure 13 Thermal Impedance Plot www.onsemi.com 10 STK5DFU350D-E APPLICATIONS INFORMATION Input / Output Timing Chart Figure 14. Input/Output Timing Chart Notes 1. This section of the timing diagram shows the effect of cross-conduction prevention. 2. This section of the timing diagram shows that when the voltage on VDD decreases sufficiently all gate output signals will go low, switching off all six IGBTs. When the voltage on VDD rises sufficiently, normal operation will resume. 3. This section shows that when the bootstrap voltage VBS drops, the corresponding high side output (U or V or W) is switched off. When VBS rises sufficiently, normal operation will resume. 4. This section shows that when the voltage on ITRIP exceeds the threshold, all IGBT’s are turned off. Normal operation resumes later after the over-current condition is removed. Input / Output Logic Table INPUT OUTPUT HIN LIN Itrip Enable High side IGBT Low side IGBT U,V,W FAULT H L L H ON (Note 5) OFF VP OFF L H L H OFF ON NU,NV,NW OFF L L L H OFF OFF High Impedance OFF H H L H OFF OFF High Impedance OFF X X H H OFF OFF High Impedance ON X X X L OFF OFF High Impedance OFF www.onsemi.com 11 STK5DFU350D-E Thermistor characteristics Parameter Resistance Symbol Condition Min Typ Max Unit R25 Tc=25℃ 99 100 101 kΩ R100 Tc=100℃ B B-Constant (25 to 50℃) 5.18 5.38 5.60 kΩ 4208 4250 4293 K +125 ℃ 40 Temperature Range Case Temperature(Tc) - Thermistor resistance(RTH) RTH, Thermistor Resistance (kΩ) 10000 min typ max 1000 100 Figure 6 Thermistor resistance versus case temperature 10 1 Figure 7 Voltage on circuit connected to thermistor -40 -30 -20 -10(RTH=39k, 0 10 20pull-up 30 40voltage 50 60 5V, 70 see 80 90 100 110 120 130 Tc, Case temperature (degC) Figure 2) Figure 5 Thermistor Resistance versus Case Temperature Temperature(Tc) THto to GND VSS voltage characteristic Case Case Temperature (Tc) -TH voltage characteristic VTH, TH-VSS terminal voltage [V] 6.0 min typ max 5.0 4.0 3.0 2.0 1.0 0.0 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 Tc, Case temperature [degC] 90 100 110 120 130 Figure 8 Thermistor Voltage versus Case Temperature Conditions: RTH=39kΩ, pull-up voltage 5.0V (see Figure 2) www.onsemi.com 12 STK5DFU350D-E Calculation of bootstrap capacitor value Signal inputs The bootstrap capacitor value CB is calculated using the following approach. The following parameters influence the choice of bootstrap capacitor: Each signal input has a pull-down resistor. An additional pull-down resistor of between 2.2kΩ and 3.3kΩ is recommended on each input to improve noise immunity VBS: Bootstrap power supply. 15V is recommended. QG: Total gate charge of IGBT at VBS=15V. 42nC UVLO: Falling threshold for UVLO. Specified as 12V. IDMAX: High side drive consumption current.. Specified as 95A tONMAX: Maximum ON pulse width of high side IGBT. FAULT/TH pin The FAULT/TH pin is connected to an open-drain FAULT output requiring a pull-up resistor. If the pullup voltage is 5V, use a pull-up resistor with a value of 6.8kΩ or higher. If the pull-up voltage is 15V, use a pull-up resistor with a value of 20kΩ or higher. The pulled up voltage in normal operation for the FLTEN pin should be above 2.5V. The FAULT output is triggered if there is a VCC undervoltage or an overcurrent condition on either the PFC or inverter stages. The terminal has a function of thermistor output, which is connected between GND and this terminal. Capacitance calculation formula: CB = (QG + IDMAX * tONMAX)/(VBS - UVLO) Overcurrent protection CB is recommended to be approximately 3 times the value calculated above. The recommended value of CB is in the range of 1 to 47μF, however, the value needs to be verified prior to production. When not using the bootstrap circuit, each high side driver power supply requires an external independent power supply. An over-current condition is detected if the voltage on the PTRIP pin is larger than the reference voltage. There is a blanking time of typically 350ns to improve noise immunity. After a shutdown propagation delay of typically 0.55 s, the FAULT output is switched on. The over-current protection threshold should be set to be equal or lower to the absolute maximum current. The internal bootstrap circuit uses a MOSFET. The turn on time of this MOSFET is synchronized with the turn on of the low side IGBT. The bootstrap capacitor is charged by turning on the low side IGBT. An additional fuse is recommended to protect against system level or abnormal over-current fault conditions. If the low side IGBT is held on for a long period of time (more than one second for example), the bootstrap voltage on the high side MOSFET will slowly discharge. Capacitors on High Voltage and VDD supplies Bootstrap Capacitance CB F Both the high voltage and VDD supplies require an electrolytic capacitor and an additional high frequency capacitor. The recommended value of the high frequency capacitor is between 100nF and 10 μF. Minimum input pulse width When input pulse width is less than 1μs, an output may not react to the pulse. (Both ON signal and OFF signal) Input terminal Zener Diode The inputs are protected with 10V Zener diodes. If the input voltage exceeds 5V, a current limiting resistor which limits the input current to less than 0.5mA must be added to the input. This also helps with improving noise immunity. 100 10 1 0.1 0.01 0.1 1 10 tONMAX [ms] 100 1000 Figure 97: Bootstrap capacitance versus tONMAX www.onsemi.com 13 STK5DFU350D-E Mounting Instructions Item Recommended Condition Pitch 41±0.1mm (Please refer to Package Outline Diagram) Screw Diameter : M3 Screw head types: pan head, truss head, binding head Washer Plane washer dimensions (Figure 14) D = 7mm, d = 3.2mm and t = 0.5mm JIS B 1256 Heat sink Torque Grease Material: Aluminum or Copper Warpage (the surface that contacts IPM ) : 50 to 50 μm Screw holes must be countersunk. No contamination on the heat sink surface that contacts IPM. Temporary tightening : 50 to 60 % of final tightening on first screw Temporary tightening : 50 to 60 % of final tightening on second screw Final tightening : 0.4 to 0.6Nm on first screw Final tightening : 0.4 to 0.6Nm on second screw Silicone grease. Thickness : 50 to 100 μm Uniformly apply silicon grease to whole back. Thermal foils are only recommended after careful evaluation. Thickness, stiffness and compressibility parameters have a strong influence on performance. Recommended Notrecommended Siliconegrease Figure 108: Module Mounting details: components; washer drawing; need for even spreading of thermal grease www.onsemi.com 14 STK5DFU350D-E Package Dimensions unit : mm The tolerances of length are +/ 0.5mm unless otherwise specified. 5.5 11.0 7.0 missing pin : 6,7,8,9,10,19,22,25,26,28,30 1.1 44.0 41.0 note2 32 17 26.5 (24.0) 3.4 (15.75) 31.5 (32.7) note3 16 2 +0.2 ‐0.05 +0.2 1 note1 0.6 ‐0.05 0.50 15×2.0=30 11.0 7.0 1.1 3.2 note1 : Mark of mirror surface for No.1 pin identification. note2 : The form of a character in this drawing differs from that of IPM. note3 : This indicates the lot code. The form of a character in this drawing differs from that of IPM. (35.0) ON Semiconductor and the ON logo are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries. SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf . SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. www.onsemi.com 15