STK57FU394AG E D

STK57FU394AG-E
Advance Information
2-in-1 PFC and Inverter
Intelligent Power Module (IPM),
600 V, 15 A
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The STK57FU394AG-E is a fully-integrated PFC and inverter power
stage consisting of a high-voltage driver, six motor drive IGBT’s, one
PFC IGBT, one PFC rectifier and a thermistor, suitable for driving
permanent magnet synchronous (PMSM) motors, brushless-DC (BLDC)
motors and AC asynchronous motors.
The IGBT’s are configured in a 3-phase bridge with separate emitter
connections for the lower legs for maximum flexibility in the choice of
control algorithm.
An internal comparator and reference connected to the over-current
protection circuit allows the designer to set individual over-current
protection levels for the PFC and the inverter stages. Additionally, the
power stage has a full range of protection functions including crossconduction protection, external shutdown and under-voltage lockout
functions.
PACKAGE PICTURE
Features
 Simple thermal design with PFC and inverter stage in one package.
 PFC operating frequency up to 40kHz
 Cross-conduction protection
 Adjustable over-current protection level
 Integrated bootstrap diodes and resistors
SIP35 56x25.8 / SIP2A-3
MARKING DIAGRAM
ABCDD
S TK5 7 FU 3 9 4AG
Certification
 UL1557 (File Number : E339285)
Typical Applications
 Heat Pumps
 Home Appliances
 Industrial Fans
 Industrial Pumps
4
1
8
5
9
12
13
16
20 22 24 26 28 30 32 34
19 21 23 25 27 29 31 33 35
STK57FU394AG = Specific Device Code
A = Year
B = Month
C = Production Site
DD = Factory Lot Code
Device marking is on package top side
ORDERING INFORMATION
Device
Package
Shipping
(Qty / Packing)
STK57FU394AG-E
SIP35 56x25.8
/ SIP2A-3
(Pb-Free)
8 / Tube
Figure 1. Functional Diagram
This document contains information on a new product. Specifications and information
herein are subject to change without notice.
© Semiconductor Components Industries, LLC, 2016
June 2016 - Rev. P1
1
Publication Order Number:
STK57FU394AG-E/D
STK57FU394AG-E
Figure 2. Application Schematic
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2
STK57FU394AG-E
Figure 3. Simplified Block Diagram
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STK57FU394AG-E
PIN FUNCTION DESCRIPTION
Pin
Name
Description
1
PFCL
PFC Inductor Connection to IGBT and Rectifier node
4
VBW
High Side Floating Supply voltage for W phase
5
W
V phase output. Internally connected to W phase high side driver ground
8
VBV
High Side Floating Supply voltage for V phase
9
V
V phase output. Internally connected to V phase high side driver ground
12
VBU
High Side Floating Supply voltage for U phase
13
U
U phase output. Internally connected to U phase high side driver ground
16
VP
Positive PFC Output Voltage
19
HVGND
Negative PFC Output Voltage
20
NW
Low Side Emitter Connection - Phase W
21
NV
Low Side Emitter Connection - Phase V
22
NU
Low Side Emitter Connection - Phase U
23
HINU
Logic Input High Side Gate Driver - Phase U
24
HINV
Logic Input High Side Gate Driver - Phase V
25
HINW
Logic Input High Side Gate Driver - Phase W
26
LINU
Logic Input Low Side Gate Driver - Phase U
27
LINV
Logic Input Low Side Gate Driver - Phase V
28
LINW
Logic Input Low Side Gate Driver – Phase W
29
PFCIN
Logic Input PFC Gate Driver
30
FLTEN
Bidirectional FAULT output and ENABLE input
31
PTRIP
Current protection pin for PFC
32
ITRIP
Current protection pin for inverter
33
TH
Thermistor output
34
VDD
+15V Main Supply
35
GND
Negative Main Supply
Note: Pins 2, 3, 6, 7, 10, 11, 14, 15, 17 and 18 are not present
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STK57FU394AG-E
ABSOLUTE MAXIMUM RATINGS (Notes 1, 2)
Tc=25C unless otherwise noted.
Rating
Symbol
Conditions
Value
Unit
Collector-emitter voltage
VCE
PFCL to HVGND
600
V
Repetitive peak collector current
ICP
Duty cycle 10%, pulse width 1ms
72
A
Collector current
IC
36
A
Tc=100C
18
A
Maximum power dissipation
PC
73
W
Diode reverse voltage
VRM
VP to PFCL
600
V
Repetitive peak forward current
IFP1
Duty cycle 10%, pulse width 1ms
60
A
Diode forward current
IF1
30
A
Tc=100C
15
A
Maximum power dissipation
PD1
56
W
Repetitive peak forward current
IFP2
11
A
Diode forward current
IF2
5
A
PFC Section
PFC
IGBT
PFC
Diode
Antiparallel
Diode
Maximum power dissipation
Duty cycle 10%, pulse width 1ms
10
W
Maximum AC input voltage
VAC
PD2
Single-phase Full-rectified
264
V
Maximum output voltage
Vo
450
V
Input AC current (steady state)
Iin
In the Application Circuit
(VAC=200V)
15
Arms
450
V
600
V
±15
A
±8
A
±30
A
35
W
0.3 to +20.0
V
0.3 to VDD
V
Inverter Section
Supply voltage
VCC
Collector-emitter voltage
VCE max
Output current
Io
VP to NU, NV, NW surge < 500V
(Note 3)
VP to U, V, W or U to NU, V to NV, W
to NW
VP, U, V, W, NU, NV, NW terminal
current
VP, U, V, W, NU, NV, NW terminal
current at Tc=100C
VP, U, V, W, NU, NV, NW terminal
current, pulse width 1ms
Output peak current
Iop
Maximum power dissipation
Pd
IGBT per 1 channel
Gate driver supply voltage
VBS
Input signal voltage
VIN
VBU to U, VBV to V, VBW to W, VDD
to GND (Note 4)
HINU, HINV, HINW, LINU, LINV,
LINW, PFCIN
FLTEN terminal voltage
VFLTEN
FLTEN terminal
0.3 to VDD
V
ITRIP terminal voltage
VITRIP
ITRIP terminal
0.3 to +10.0
V
PFCTRIP terminal voltage
VPTRIP
PTRIP terminal
1.5 to +2.0
V
Junction temperature
Tj
IGBT, FRD, Gate driver IC
150
C
Storage temperature
Tstg
45 to +125
C
Operating case temperature
Tc
IPM case temperature
30 to +100
C
Tightening torque
MT
Case mounting screws
0.9
Nm
Gate driver section
Intelligent Power Module
50Hz sine wave AC 1 minute
Isolation voltage
Vis
2000
Vrms
(Note 5)
1. Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device
functionality should not be assumed, damage may occur and reliability may be affected.
2. Refer to ELECTRICAL CHARACTERISTICS, RECOMMENDED OPERATING RANGES and/or APPLICATION INFORMATION for
Safe Operating parameters.
3. This surge voltage developed by the switching operation due to the wiring inductance between VP and NU, NV, NW terminals.
4. VBS=VBU to U, VBV to V, VBW to W
5. Test conditions : AC2500V, 1 s
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STK57FU394AG-E
RECOMMENDED OPERATING RANGES (Note 6)
Rating
Symbol
Supply voltage
VCC
VP to HVGND, NU, NV, NW
VBS
VDD
Gate driver supply voltage
ON-state input voltage
VIN(ON)
OFF-state input voltage
VIN(OFF)
PWM frequency(PFC)
fPWMp
Min
Typ
Max
Unit
0
280
400
V
VBU to U, VBV to V, VBW to W
12.5
15
17.5
V
VDD to GND (Note 6)
13.5
15
16.5
V
HINU, HINV, HINW, LINU, LINV, LINW,
PFCIN
2.5
-
5.0
V
0
-
0.3
V
1
-
40
kHz
PWM frequency(Inverter)
fPWMi
Dead time
DT
Turn-off to Turn-on (external)
Allowable input pulse width
PWIN
ON and OFF
Tightening torque
6.
‘M3’ type screw
1
-
20
kHz
1.5
-
-
μs
1
-
-
μs
0.6
-
0.9
Nm
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to
stresses beyond the Recommended Operating Ranges limits may affect device reliability.
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STK57FU394AG-E
ELECTRICAL CHARACTERISTICS (Note 7)
Tc=25C, VBIAS (VBS, VDD)=15V unless otherwise noted.
Parameter
Test Conditions
Symbol
Min
Typ
Max
Unit
PFC Section
Collector-emitter cut-off current
VCE=600V
ICE
-
-
0.1
mA
Reverse leakage current (PFC Diode)
VR=600V
IR
-
-
0.1
mA
-
1.9
2.5
V
-
1.6
-
V
V
Collector-emitter saturation voltage
Diode forward voltage (PFC Diode)
Diode forward voltage (Anti-parallel Diode)
Junction to case thermal resistance
IC=30A, Tj=25°C
VCE(sat)
IC=15A, Tj=100°C
IF=30A, Tj=25°C
VF1
IF=15A, Tj=100°C
-
2.0
2.6
-
1.5
-
IF=5A, Tj=25°C
VF2
-
1.7
2.3
V
IGBT
θj-c(T)
-
-
1.7
°C/W
PFC Diode
θj-c(D)
-
-
2.2
°C/W
tON
0.1
0.3
0.8
μs
tOFF
0.1
0.4
0.9
μs
-
60
-
ns
Switching characteristics
Switching time
IC=30A, VP=300V, Tj=25C
Diode reverse recovery time
trr
Inverter section
Collector-emitter leakage current
VCE=600V
ICE
-
-
100
μA
Bootstrap diode reverse current
VR(DB)=600V
IR(BD)
-
-
100
μA
-
2.0
2.6
V
-
1.7
-
V
-
2.1
2.7
V
Collector to emitter saturation voltage
Diode forward voltage
IC=15A, Tj=25C
VCE(SAT)
IC=8A, Tj=100C
IF=15A, Tj=25C
VF
-
1.7
-
V
Junction to case thermal resistance
IGBT
θj-c(T)
-
-
3.5
C/W
Junction to case thermal resistance
FRD
θj-c(D)
-
-
7.2
C/W
Switching time
IC = 15A, VCC=300V, Tj=25C
tON
0.1
0.5
1.0
μs
tOFF
0.2
0.7
1.2
μs
IF=8A, Tj=100C
Turn-on switching loss
EON
-
200
-
μJ
EOFF
-
150
-
μJ
Total switching loss
ETOT
-
350
-
μJ
Turn-on switching loss
EON
-
300
-
μJ
EOFF
-
200
-
μJ
Total switching loss
ETOT
-
500
-
μJ
Diode reverse recovery energy
EREC
-
100
-
μJ
-
ns
Turn-off switching loss
Turn-off switching loss
Diode reverse recovery time
IC = 15A, VCC=300V, Tj=25C
IC = 15A, VCC=300V, Tj=100C
IC = 15A, VCC=300V, Tj=100C
(di/dt set by internal driver)
trr
-
200
-
Reverse bias safe operating area
Ic=30A, VCE=450V
RBSOA
Full
Square
Short circuit safe operating area
VCE=400V, Tj=100C
SCSOA
4
-
-
μs
Allowable offset voltage slew rate
U to NU, V to NV, W to NW
dv/dt
50
-
50
V/ns
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STK57FU394AG-E
Parameter
Test Conditions
Symbol
Min
Typ
Max
Unit
VBS=15V (Note 4), per driver
VDD=15V, total
ID
-
0.08
0.4
mA
ID
-
0.85
2.4
mA
Low level Input voltage
HINU, HINV, HINW, LINU, LINV, LINW,
PFCIN to GND
VIN H
2.5
-
-
V
VIN L
-
-
0.8
V
Logic 1 input current
VIN=+3.3V
IIN+
-
100
143
μA
Driver Section
Gate driver consumption current
High level Input voltage
Logic 0 input current
VIN=0V
IIN-
-
-
2
μA
Bootstrap diode forward voltage
IF=0.1A
VF(DB)
-
0.8
-
V
Resistor value for common boot charge
line
Resister values for separate boot
charge lines
RBC
-
22
-
Ω
Bootstrap circuit resistance
RBS
-
22
-
Ω
FLTEN : ON / VFAULT=0.1V
IoSD
-
2
-
mA
FLTCLR
1.3
1.65
2.0
ms
VEN ON-state voltage
VEN(ON)
2.5
-
-
V
VEN OFF-state voltage
VEN(OFF)
-
-
0.8
V
ITRIP threshold voltage
ITRIP to GND
VITRIP
0.44
0.49
0.54
V
PTRIP threshold voltage
PTRIP to GND
VPTRIP
0.37
0.31
0.25
V
FLTEN terminal sink current
FLTEN clearance delay time
FLTEN Threshold
ITRIP to shutdown propagation delay
tITRIP
490
600
850
ns
PTRIP to shutdown propagation delay
tPTRIP
440
550
800
ns
290
350
-
ns
tITRIPBL
tPFCTRIPBL
VDDUV+
VBSUV+
ITRIP and PTRIP blanking time
VDD and VBS supply undervoltage
10.5
11.1
11.7
V
positive going input threshold
VDD and VBS supply undervoltage
VDDUV10.3
10.9
11.5
V
VBSUVnegative going input threshold
VDD and VBS supply undervoltage Iockout
VDDUVH
0.14
0.2
V
VBSUVH
hysteresis
7. Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted.
Product performance may not be indicated by the Electrical Characteristics if operated under different conditions.
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STK57FU394AG-E
TYPICAL CHARACTERISTICS PFC SECTION
60
IF, FORWARD CURRENT (A)
IC, COLLECTOR CURRENT (A)
60
50
40
30
TJ = 25°C
20
TJ = 100°C
10
50
40
30
20
TJ = 100°C
10
TJ = 25°C
0
0
0
0.5
1
1.5
2
2.5
3
3.5
VCE, COLLECTOR-EMITTER VOLTAGE (V)
4
0
Figure 4. VCE versus IC for different temperatures
(VDD=15V)
1
1.5
2
2.5
3
VF, FORWARD VOLTAGE (V)
3.5
4
Figure 5. PFC Diode VF versus IF for different
temperatures
2.5
1.2
VCE = 300V
VDD = 15V
2
Eoff, SWITCHING LOSS (mJ)
EON, SWITCHING LOSS (mJ)
0.5
1.5
TJ = 100°C
1
TJ = 25°C
0.5
0
VCE = 300V
VDD = 15V
0.9
0.6
TJ = 100°C
TJ = 25°C
0.3
0
0
10
20
30
40
50
IC, COLLECTOR CURRENT (A)
60
70
0
Figure 6. EON versus IC for different temperatures
10
20
30
40
50
IC, COLLECTOR CURRENT (A)
60
70
Figure 7. EOFF versus IC for different temperatures
STANDARDIZED SQUARE-WAVE
PEAK R(t)
1.0
0.8
0.6
0.4
0.2
0.0
0.000001
0.0001
0.01
ON-PULSE WIDTH (S)
1
100
500
50
400
40
VCE
300
30
200
20
100
10
IC
0
0
-100
-10
-1
-0.8 -0.6 -0.4 -0.2 0 0.2
Time (μs)
0.4
0.6
0.8
600
60
500
50
400
40
IC
300
30
200
20
100
10
VCE
0
0
-100
1
-10
-1
Figure 9. Turn-on waveform Tj=100°C, VCC=300V
IC, COLLECTOR CURRENT (A)
60
VCE, COLLECTOR-EMITTER
VOLTAGE (V)
600
IC, COLLECTOR CURRENT (A)
VCE, COLLECTOR-EMITTER
VOLTAGE (V)
Figure 8. Thermal Impedance Plot
-0.8 -0.6 -0.4 -0.2 0 0.2
Time (μs)
0.4
0.6
0.8
1
Figure 10. Turn-off waveform Tj=100°C, VCC=300V
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STK57FU394AG-E
TYPICAL CHARACTERISTICS INVERTER SECTION
30
IF, FORWARD CURRENT (A)
IC, COLLECTOR CURRENT (A)
30
25
20
15
TJ = 25°C
10
TJ = 100°C
5
25
TJ = 25°C
20
10
5
0
0
0
0.5
1
1.5
2
2.5
3
3.5
VCE, COLLECTOR-EMITTER VOLTAGE (V)
0
4
Figure 11. VCE versus ID for different temperatures
(VDD=15V)
0.5
1
1.5
2
2.5
3
VF, FORWARD VOLTAGE (V)
3.5
4
Figure 12. VF versus ID for different temperatures
0.8
1.5
VCE = 300V
VDD = 15V
Eoff, SWITCHING LOSS (mJ)
EON, SWITCHING LOSS (mJ)
TJ = 100°C
15
1
TJ = 100°C
0.5
TJ = 25°C
VCE = 300V
VDD = 15V
0.6
TJ = 100°C
0.4
TJ = 25°C
0.2
0
0
0
5
10
15
20
25
IC, COLLECTOR CURRENT (A)
30
0
35
Figure 13. EON versus ID for different temperatures
5
10
15
20
25
IC, COLLECTOR CURRENT (A)
30
35
Figure 14. EOFF versus ID for different temperatures
STANDARDIZED SQUARE-WAVE
PEAK R(t)
1.0
0.8
0.6
0.4
0.2
0.0
0.000001
0.0001
0.01
ON-PULSE WIDTH (S)
1
100
500
50
400
40
VCE
300
30
200
20
100
10
IC
0
0
-100
-10
-1
-0.8 -0.6 -0.4 -0.2 0 0.2
Time (μs)
0.4
0.6
0.8
600
60
500
50
400
40
300
30
IC
200
20
100
10
VCE
0
0
-100
1
-10
-1
Figure 16. Turn-on waveform Tj=100°C, VCC=300V
IC, COLLECTOR CURRENT (A)
60
VCE, COLLECTOR-EMITTER
VOLTAGE (V)
600
IC, COLLECTOR CURRENT (A)
VCE, COLLECTOR-EMITTER
VOLTAGE (V)
Figure 15. Thermal Impedance Plot
-0.8 -0.6 -0.4 -0.2 0 0.2
Time (μs)
0.4
0.6
0.8
1
Figure 17. Turn-off waveform Tj=100°C, VCC=300V
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STK57FU394AG-E
APPLICATIONS INFORMATION
Input / Output Timing Chart
Figure 18. Input / Output Timing Chart
Notes
1. This section of the timing diagram shows the effect of cross-conduction prevention.
2. This section of the timing diagram shows that when the voltage on VDD decreases sufficiently all gate output signals will go low,
switching off all six IGBTs. When the voltage on VDD rises sufficiently, normal operation will resume.
3. This section shows that when the bootstrap voltage on VBU (VBV, VBW) drops, the corresponding high side output U (V, W) is
switched off. When the voltage on VBU (VBV, VBW) rises sufficiently, normal operation will resume.
4. This section shows that when the voltage on ITRIP exceeds the threshold, all IGBT’s are turned off. Normal operation resumes
later after the over-current condition is removed. Similarly, when the voltage on PTRIP exceeds the threshold, all IGBT’s are
turned off. Normal operation resumes later after the over-current condition is removed
5. After VDD has risen above the threshold to enable normal operation, the driver waits to receive an input signal on the LIN input
before enabling the driver for the HIN signal.
Input / Output Logic Table
INPUT
OUTPUT
HIN
LIN
ITRIP
PTRIP
High side IGBT
Low side IGBT
U,V,W
FAULT
H
L
L
L
ON (Note 5)
OFF
VP
OFF
L
H
L
L
OFF
ON
NU,NV,NW
OFF
L
L
L
L
OFF
OFF
High Impedance
OFF
H
H
L
L
OFF
OFF
High Impedance
OFF
X
X
H
X
OFF
OFF
High Impedance
ON
X
X
X
H
OFF
OFF
High Impedance
ON
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STK57FU394AG-E
Thermistor characteristics
Parameter
Resistance
Symbol
Condition
Min
Typ
Max
Unit
R25
Tc=25℃
99
100
101
kΩ
R100
Tc=100℃
B
B-Constant (25 to 50℃)
5.18
5.38
5.60
kΩ
4208
4250
4293
K
+125
℃
40
Temperature Range
Case Temperature(Tc) - Thermistor resistance(RTH)
RTH, Thermistor Resistance (kΩ)
10000
min
typ
max
1000
100
10
1
-40 -30 -20 -10
0
10 20 30 40 50 60 70 80 90 100 110 120 130
Tc, Case temperature (degC)
Figure 19. Thermistor Resistance versus Case Temperature
Case Temperature(Tc) - TH to VSS voltage characteristic
VTH, TH-VSS terminal voltage [V]
6.0
min
typ
max
5.0
4.0
3.0
2.0
1.0
0.0
-40 -30 -20 -10
0
10
20 30 40 50 60 70 80
Tc, Case temperature [degC]
90 100 110 120 130
Figure 20. Thermistor Voltage versus Case Temperature
Conditions: RTH=39kΩ, pull-up voltage 5.0V (see Figure 2)
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STK57FU394AG-E
Calculation of bootstrap capacitor value
Signal inputs
The bootstrap capacitor value CB is calculated using
the following approach. The following parameters
influence the choice of bootstrap capacitor:
Each signal input has a pull-down resistor. An
additional pull-down resistor of between 2.2kΩ and
3.3kΩ is recommended on each input to improve noise
immunity.

FLTEN pin
VBS: Bootstrap power supply.
15V is recommended.
QG: Total gate charge of IGBT at VBS=15V.
53nC
UVLO: Falling threshold for UVLO.
Specified as 12V.
IDMAX: High side drive power dissipation.
Specified as 0.4mA
TONMAX: Maximum ON pulse width of
high side IGBT.

The FLTEN pin is connected to an open-drain FAULT
output requiring a pull-up resistor and an ENABLE
input. If the pull-up voltage is 5V, use a pull-up resistor
with a value of 6.8kΩ or higher. If the pull-up voltage
is 15V, use a pull-up resistor with a value of 20kΩ or
higher. The pulled up voltage in normal operation for
the FLTEN pin should be above 2.5V, noting that it is
connected to an internal ENABLE input. The FAULT
output is triggered if there is a VDD undervoltage or an
overcurrent condition on either the PFC or inverter
stages.
Driving the FLTEN terminal pin is used to enable or
shut down the built-in driver. If the voltage on the
FLTEN pin rises above the positive going FLTEN
threshold, the output drivers are enabled. If the voltage
on the FLTEN pin falls below the negative going
FLTEN threshold, the drivers are disabled.



Capacitance calculation formula:
CB = (QG + IDMAX * TONMAX)/(VBS - UVLO)
CB is recommended to be approximately 3 times the
value calculated above. The recommended value of CB
is in the range of 1 to 47μF, however, the value needs
to be verified prior to production. When not using the
bootstrap circuit, each high side driver power supply
requires an external independent power supply. If the
capacitors selected are 47 μF or more, a series resistor
of 20Ω should be added in series with the three
capacitors to limit the current. The resistors should be
inserted between VBU and U, VBV and V and VBW
and W.
Undervoltage protection
If VDD goes below the VDD supply undervoltage
lockout falling threshold, the FAULT output is
switched on. The FAULT output stays on until VDD
rises above the VDD supply undervoltage lockout
rising threshold. The hysteresis is approximately
200mV.
The internal bootstrap circuit uses a MOSFET. The
turn on time of this MOSFET is synchronized with the
turn on of the low side IGBT. The bootstrap capacitor
is charged by turning on the low side IGBT.
Overcurrent protection
An over-current condition is detected if the voltage on
the ITRIP/PTRIP pin is larger than the reference
voltage. There is a blanking time of typically 350ns to
improve noise immunity. After a shutdown
propagation delay of typically 0.6 us, the FAULT
output is switched on.
If the low side IGBT is held on for a long period of
time (more than one second for example), the bootstrap
voltage on the high side MOSFET will slowly
discharge.
Bootstrap Capacitance CB [uF]
The over-current protection threshold should be set to
be equal or lower to 2 times the module rated current
(Io).
An additional fuse is recommended to protect against
system level or abnormal over-current fault conditions.
Capacitors on High Voltage and VDD supplies
Both the high voltage and VDD supplies require an
electrolytic capacitor and an additional high frequency
capacitor. The recommended value of the high
frequency capacitor is between 100nF and 10 μF.
80
60
40
20
0
0.1
1
10
Tonmax [ms]
100
1000
Figure 21. Bootstrap capacitance versus Tonmax
Minimum input pulse width
When input pulse width is less than 1μs, an output may
not react to the pulse. (Both ON signal and OFF signal)
www.onsemi.com
13
STK57FU394AG-E
Mounting Instructions
Item
Recommended Condition
Pitch
56.0±0.1mm (Please refer to Package Outline Diagram)
Screw
diameter : M3
Screw head types: pan head, truss head, binding head
Washer
Plane washer
The size is D:7mm, d:3.2mm and t:0.5mm JIS B 1256
Heat sink
Material: Aluminum or Copper
Warpage (the surface that contacts IPM ) : 50 to 100 μm
Screw holes must be countersunk.
No contamination on the heat sink surface that contacts IPM.
Torque
Temporary tightening : 20 to 30 % of final tightening on first screw
Temporary tightening : 20 to 30 % of final tightening on second screw
Final tightening : 0.6 to 0.9Nm on first screw
Final tightening : 0.6 to 0.9Nm on second screw
Grease
Silicone grease.
Thickness : 100 to 200 μm
Uniformly apply silicone grease to whole back.
Thermal foils are only recommended after careful evaluation. Thickness, stiffness and
compressibility parameters have a strong influence on performance.
Figure23. Size of Washer
Figure 22. Mount IPM on a Heat Sink
Figure24. Uniform Application of Grease Recommended
Steps to mount an IPM on a heat sink 1st: Temporarily tighten maintaining a left/right balance. 2nd: Finally tighten maintaining a left/right balance. www.onsemi.com
14
STK57FU394AG-E
TEST CIRCUITS
■ ICE, IR(DB)
U+
V+
W+
U-
V-
W-
PFC
IGBT
A
16
16
16
13
9
5
1
B
13
9
5
22
21
20
19
VBS=15V
ICE
4
5
VBS=15V
A
A
8
VCE,VR
9
VBS=15V
12
13
U+,V+,W+ : High side phase
U-,V-,W- : Low side phase
VDD=15
34
B
35,19,20,21,22
U(DB)
V(DB)
W(DB)
PFC
Diode
A
12
8
4
16
B
35
35
35
1
Figure 25. Test Circuit for ICE
■ VCE(sat) (Test by pulse)
U+
V+
W+
U-
V-
W-
PFC
IGBT
VBS=15V
A
16
16
16
13
9
5
1
VBS=15V
B
13
9
5
22
21
20
19
C
23
24
25
26
27
28
29
4
5
A
8
9
VBS=15V
12
V
13
34
IC
VCE(sat)
VDD=15V
30
5V
C
B
35,19,20,21,22
Figure 26. Test circuit for VCE(SAT)
■ VF (Test by pulse)
U+
V+
W+
U-
V-
W-
A
16
16
16
13
9
5
B
13
9
5
22
21
20
A
V
U(DB)
V(DB)
W(DB)
PFC
Diode
Anti-parallel
Diode
A
12
8
4
16
1
B
34
34
34
1
19
B
Figure 27. Test circuit for VF
■ ID
VBS U+
VBS V+
VBS W+
VDD
A
12
8
4
34
B
13
9
5
35
ID
A
A
VD*
B
Figure 28. Test circuit for ID
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15
IF
STK57FU394AG-E
■ VITRIP, VPTRIP
VITRIP(U-)
VPTRIP
A
13
1
B
22
19
C
26
29
D
32
A
34
31
VDD=15
V
30
Input signal
(0 to 5V)
Input Signal
C
VITRIP/VPFCTRIP
D
Io
B
35,19,20,21,22
ITRIP
/PFCTRIP
Figure 29. Test circuit for ITRIP.PTRIP
Io
■ Switching time (The circuit is a representative example of the lower side U phase.)
U+
V+
W+
U-
V-
W-
PFC
IGBT
A
16
16
16
16
16
16
16
B
22
21
20
22
21
20
19
C
13
9
5
13
9
5
1
D
22
E
23
21
24
20
25
16
26
16
27
16
28
16
29
VBS=15V
VBS=15V
4
5
A
8
C
9
VBS=15V
12
CS
Vcc
13
34
D
VDD=15
30
Input signal
(0 to 5V)
Input Signal
E
35,19,20,21,22
B
Io
Figure 30. Test circuit for switching time
Io
90%
10%
tON
tOFF
www.onsemi.com
16
STK57FU394AG-E
Package Dimensions
unit : mm
SIP35 56x25.8 / SIP2A−3
CASE 127DY
ISSUE O
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